Scalable surface codec with temporal parallelization

Abstract

Decoder graphics may be used to perform scalable, parallelizable quantum error correction on surface code. The decoder graphics may be used to generate overlapping decoder graphics windows. A first correction may be independently determined for each overlapping decoder graphics window. A first core correction may be reserved for a core region of each overlapping decoder graphics window. Decoder graphics may be used to generate non-overlapping decoder graphics windows. The temporal boundary of the non-overlapping decoder graphics window may be a temporal boundary of the corrected core region of the overlapping decoder graphics window. A second correction may be independently determined for each non-overlapping decoder graphics window based on the corrected temporal boundaries of the core region. The first core correction and the second correction may be combined to form a complete set of corrections of the decoder graphics.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure claims priority to U.S. Provisional Patent Application No. 63 / 373,182, filed on August 22, 2022, and claims priority to U.S. Patent Application No. 18 / 449,978, entitled “Scalable Surface Code Decoder with Temporal Parallelization,” filed on August 15, 2023. All of the above applications are expressly incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure relates generally to quantum error correction (QEC). In particular, the present disclosure relates to a decoder design for QEC using surface codes. Background Art

[0004] Fault tolerance theory allows for scalable and universal quantum computing, as long as the physical error rate is below a threshold. A variety of fault-tolerant architectures have been proposed, but these proposals typically employ instantaneous conventional computations when estimating the threshold and resource overhead. In practice, existing architectures may require a high decoding throughput, i.e., a high number of error syndromes that the decoder can handle per unit time. But existing decoder architectures lack the right combination of accuracy, throughput, and scalability. Decoding schemes for surface codes may have high thresholds, but insufficient decoding throughput. Local decoding schemes can be fast and, to some extent, scalable, but speed is gained at the expense of accuracy. Summary of the invention

[0005] The disclosed system and method implements scalable parallel processing of decoder graphs using window decoding. Overlapping windows are generated using the decoder graph. These windows are processed independently to produce corrections. Because these windows are processed independently, they can be processed in parallel. Non-overlapping windows are processed independently, and each non-overlapping window is inserted between the core regions of the corrections of two overlapping adjacent overlapping windows to reconcile any inconsistencies between the core regions of the corrections.

[0006] The disclosed embodiments include methods of quantum error correction. The quantum error correction method according to the disclosed embodiments may include multiple operations. The method may include obtaining a period of multiple error checkers of a surface code. The method may also include generating a decoder graph using the error checkers. The method may also include determining a first correction to eliminate a fault within a first decoder window on the decoder graph, the first decoder window having two open time boundaries. The method may also include retaining a first correction on a core area of ​​the first decoder window, the core area having a first boundary. The method may also include determining a second correction to eliminate a fault within a second decoder window on the decoder graph, the second decoder window having two closed time boundaries, the first of the two closed time boundaries being the first boundary. The method may also include providing an indication of the retained first correction and the second correction to enable correction of the surface code.

[0007] The disclosed embodiments also include systems for performing the quantum error correction methods according to the disclosed embodiments.

[0008] The disclosed embodiments also include a non-transitory computer-readable medium containing instructions that, when executed by a system according to the disclosed embodiments, cause the system to perform a method of quantum error correction.

[0009] The disclosed embodiments also include a computer program product including computer program instructions which, when executed by a system according to the disclosed embodiments, cause the system to perform a method of quantum error correction.

[0010] The disclosed embodiments also include a computer program which, when executed by a system according to the disclosed embodiments, causes the system to perform a method of quantum error correction.

[0011] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosed embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] The accompanying drawings, which constitute a part of this specification, illustrate several embodiments and, together with the description, are used to explain the principles and features of the disclosed embodiments. In the drawings:

[0013] Figures 1A to 1C Depicted are qubit layouts and fault-tolerant syndrome extraction circuits for rotating surface codes according to disclosed embodiments.

[0014] Figure 2A and Figure 2B Depicted are Z-type and X-type decoder graphs, respectively, according to disclosed embodiments.

[0015] Figure 3A and Figure 3B Depicted are two views of a window on a Z-decoder graph in accordance with disclosed embodiments.

[0016] Figure 3C , Figure 3D and Figure 3E Additional details of a decoding window according to disclosed embodiments are depicted.

[0017] FIG. 4A to FIG. 4D A forward window approach to a sliding window decoder in accordance with disclosed embodiments is depicted.

[0018] Figure 5 Depicted is sandwich decoding using seven windows in accordance with the disclosed embodiments.

[0019] FIG. 6A to FIG. 6C A second type of windows having varying degrees of overlap are depicted in accordance with disclosed embodiments.

[0020] Figure 7 An exemplary decoding process 700 using a sandwich sliding window decoder is depicted in accordance with disclosed embodiments.

[0021] FIG. 8A to FIG. 8D Depicted are exemplary logical error rates as a function of physical error rates for different code distances for a MWPM sandwich and batch decoder and a UF sandwich and batch decoder in accordance with disclosed embodiments.

[0022] Fig. 9A and Fig. 9B Dependence of logic error rate per shot and per d cycles on step size and overlap according to disclosed embodiments is depicted.

[0023] Fig. 10A and Fig. 10B Dependence of logic error rate per issue and per d cycles on window architecture according to disclosed embodiments is depicted.

[0024] Fig.11A and Fig. 11B Dependence of the logic error rate per shot and per d cycles of a forward window on the closed or open window boundaries is depicted in accordance with the disclosed embodiments.

[0025] Fig. 11C and Fig.11D Dependence of the logic error rate per shot and per d cycles of a sandwich window on the closed or open window boundaries is depicted in accordance with disclosed embodiments.

[0026] Fig. 12A and Fig. 12BDependence of logic error rate per shot and per d cycles for different boundary offsets according to disclosed embodiments is depicted.

[0027] Fig.13 The performance of a sandwich decoder according to the disclosed embodiments is depicted compared to a batch decoder on real-world data.

[0028] Fig.14A Depicted is an exemplary overall decoder diagram for two-qubit parity measurement in accordance with disclosed embodiments.

[0029] Fig. 14B Depicts the following embodiments according to the disclosed Fig.14A The overall decoder graph of the decoder is decomposed into smaller decoder windows suitable for independent processing.

[0030] Fig.15 Depicted is a schematic diagram of an exemplary quantum circuit suitable for implementing quantum error correction in accordance with disclosed embodiments. DETAILED DESCRIPTION

[0031] Reference will now be made in detail to the exemplary embodiments discussed in accordance with the accompanying drawings. In some cases, the same reference numerals will be used throughout all drawings and the following description to refer to the same or similar parts. Unless otherwise defined, technical or scientific terms have the meanings commonly understood by those of ordinary skill in the art. The disclosed embodiments are described in sufficient detail to enable those skilled in the art to practice the disclosed embodiments. It should be understood that other embodiments may be utilized and may be changed without departing from the scope of the disclosed embodiments. Therefore, materials, methods, and examples are illustrative only and are not meant to be necessarily restrictive.

[0032] According to the surface code decoder (e.g., decoder) of the disclosed embodiment, high accuracy, scalability and throughput can be provided. Such a decoder can be configured to process a window portion of a decoder graph. The decoder can identify corrections that eliminate defects detected in these window portions. The correction can be a set of edges in the decoder graph, and if the defect is associated with an odd number of edges included in the group, the defect can be eliminated. The window portion can include a non-overlapping area (core area) and an overlapping area (buffer area). The decoder can then process the boundary between the core areas (which can also be described as a "seam" connecting two core areas). The correction in the core area can be expressed as an update defect in the boundary. The decoder can then identify the correction in the boundary, which is used to eliminate the updated defect.

[0033] According to the disclosed embodiments, the decoder can process window portions of the decoder graph in parallel, or process boundaries in parallel. This parallelism supports improved scalability. Although traditional sequential decoders may have difficulty maintaining sufficient throughput when the code distance increases, given sufficient parallel processing units (e.g., cores, processors, FPGAs, ASICs, hardware accelerators, etc.), the envisioned decoder can maintain sufficient throughput as the code distance increases. In addition, the envisioned system and method reduce the communication requirements of the parallel processing units because the window portions of the decoder graph can be processed independently. Reducing communication requirements can simplify the system architecture. The throughput requirements can be met by using additional cores or processors without the need for faster processors. In addition, the number of parallel processing units required may only be proportional to the speed of the quantum hardware and the code distance, rather than to the length of the quantum calculation.

[0034] Thus, the disclosed embodiments enable QEC of surface codes with greater code distances while reducing system architecture requirements and allowing simpler components. Thus, the disclosed embodiments constitute a technical improvement in the field of QEC.

[0035] Figures 1A to 1C Depicts the rotation surface code The qubit layout and fault-tolerant syndrome extraction circuit of . Figure 1A Depicted is the qubit layout for a d=3 spin surface code. The data qubits (black) are located in the corners of the small area. Figure 1B and Figure 1C Circuit in Figure 1. Check operators of type X (grey) and Z (white) are measured via an auxiliary qubit located in the center of the tile. First, the auxiliary can be prepared in the |+> or |0> state. Second, CNOT gates can be applied to pairs of qubits connected to the black links in the order specified by the numbers on the corners of the tile. Finally, the auxiliary can be measured in the X or Z basis, respectively.

[0036] In quantum memory experiments (e.g., testing the ability of a quantum memory to store quantum states for subsequent retrieval), by initializing all data qubits to the corresponding physical basis states {|0>, |1>, |+>, |->}, one can select The code patch is prepared in the logical basis state of . For example, the data qubit can first be initialized to the state |0>. Then, the syndrome extraction circuit (e.g., Figure 1B and Figure 1C As shown in FIG. 1 , n cycles can be repeatedly applied to obtain the syndromes of the X-type and Z-type check operators, respectively. where i = 1, ..., n. Finally, all data qubits in the physical basis corresponding to the logical basis used during preparation can be measured to obtain the result In this example, all data qubits can be measured in Z basis to obtain a result.

[0037] The measurement results of auxiliary i The decoder will return a binary result. If the result is consistent with the reference logic state, the decoding is successful; otherwise, a logical error occurs. In fact, σ i and m are usually preprocessed before being fed into a graph-based decoder.

[0038] According to the disclosed embodiments, quantum memory experiments can measure the initial logical state The syndrome extraction circuit is assumed to be fault-tolerant, and the entire circuit of the quantum memory experiment is assumed to be subject to random Pauli errors. Specifically, each gate, qubit idle, and initialization (respectively, measurement) is modeled as an ideal operation, followed (respectively, preceded) by a random Pauli operation acting on the qubit involved, which is called a fault.

[0039] For surface codes, each cycle of the detector is the XOR of two consecutive check sub-cycles. Assume is the syndrome of the Z-type check operator evaluated from the data qubit measurement m. Then:

[0040]

[0041] therefore, (where i=2, ..., n) is a true X-type detector, and (where i=1, ..., n+1) is a true Z-type detector.

[0042] Given these assumptions about the circuit and the noise model, in the absence of a fault, the detector is 0; therefore, any detector with a value of 1 indicates the presence of a fault. Furthermore, each occurrence of a fault flips at most two detectors of each type (X or Z). A detector can be "on" when there is a fault that flips that detector but no other detectors of the same type, and off otherwise.

[0043] Assume the standard random Pauli noise model and use Figure 1B and Figure 1C With the syndrome extraction circuit in, it is easy to verify that any single fault in the entire memory experiment will flip one or two bits among all the bits in the detection event.

[0044] Surface codes can have two types of spatial boundaries. For example, in Figure 1AIn the example above, the top and bottom boundaries are described herein as X boundaries, while the left and right boundaries are described herein as Z boundaries. The Z boundary is safer from the perspective of correcting X errors: in the middle of the Z boundary, an X error on a data qubit will always flip both Z stabilizers, whereas on the X boundary a single X error will only flip one Z stabilizer.

[0045] A boundary detection event in a decoder graph is called open if and only if there is some error that flips only that event; otherwise, it is closed. When a boundary detection event is open, it is associated with a virtual event so that for each fault that flips only that boundary detection event, the associated virtual event is also flipped. Therefore, Z boundaries are described herein as closed spatial boundaries because no virtual Z stabilizer is required. X boundaries are described herein as open spatial boundaries. Similarly, in a decoder graph with Z errors, X boundaries are open and Z boundaries are closed. A boundary in the decoder graph is said to be open if every vertex on that boundary is open. If a boundary is not open, it is closed.

[0046] In some embodiments, the decoder graph can be defined so that all boundary vertices are grouped into one, which has the advantage that its value will be known (since the total number of flipped stabilizers (real and virtual combined) must be even). This simplification may help implementation of the decoding algorithm, but is not inherent to the model.

[0047] One way to demonstrate the terms "open" and "closed" intuitively is to look at the form of undetectable errors. For codes without spatial boundaries (e.g., torus codes), an undetectable error always looks like a cycle or combination of cycles that is either trivial from a topological point of view (in which case it will never cause a logic error) or non-trivial (in which case it could be a logic operator). For codes with spatial boundaries, an undetectable error can also be a path that lies on open boundaries at both ends, as if the path entered and exited the code patch through those boundaries.

[0048] For the disclosed 3D decoder graph, time boundaries can be defined at the data qubit initialization and final data qubit measurement. Each time boundary can also be classified as open or closed given a specific type of error and execution details. Given a logical qubit For the decoder graph derived from the Z syndrome, both temporal boundaries are closed, since each fault flips exactly two Z detection events (including the virtual vertex on the spatial boundary).

[0049] Example: Assume that only the Z stabilizer measurement is wrong in the last cycle of syndrome extraction, i.e., (where i∈{1,…,n+1}\{n}) and It can be seen that in and There are only two non-trivial detection events in . The edge connecting these two detection events represents the Z-stabilizer measurement error.

[0050] Example: Suppose that at the end of the memory experiment there is only one data qubit measurement error. Given where i∈{1,…,n}. In the final set of Z syndromes based on the measurement results of the data qubits In the example above, a flipped data qubit affects all stabilizers it touches. Therefore, has 1 or 2 non-trivial syndromes, With 1 or 2 non-virtual detection events. Due to the virtual detection events on the X-space boundary, any single data qubit measurement failure flips exactly two detection events.

[0051] However, for a decoder graph derived from the X syndrome, the result of the first cycle of X-stabilizer extraction can be a random binary string, even without errors. Therefore, it is necessary to leave the initial time boundaries open (i.e., allow the bottom detection event to connect to some virtual vertices) to handle those non-trivial syndrome measurement results. Similarly, the ending time boundaries of the X syndrome also need to be open. The final measurement of the data qubit in the Z basis does not provide any additional information about the X syndrome.

[0052] Quantum memory experiments must close or open temporal boundaries depending on the specific type of error. In some cases, quantum memory experiments can be designed to prevent the logical Z operator from flipping (an odd number of times). But if a temporal boundary is open (for example, if the decoder does not utilize the Z measurement results on the data qubits during initialization), then there will be low-weight (i.e., short) undetectable X errors at both endpoints of that temporal boundary. Moreover, such undetectable X errors can easily flip the logical Z operator, violating the requirement of only at least On the other hand, when both temporal boundaries are closed, the only open boundary is the X-space boundary, and a low-weight X-error that starts and ends at one of the boundaries can only flip the logical Z operator an even number of times. To flip the logical Z operator, the error must cross from one X-boundary to another, but then to a logical operator of weight ≥ d.

[0053] Regarding Z errors, if the t=0 and t=T boundaries are closed for X errors, then they are open for Z errors. In practice, in such a quantum memory experiment, there are low-weight undetectable Z errors that flip the logical X operator, but this does not matter because the experiment does not care about the logical X operator anyway. Similarly, suppose the logical qubit is initialized as But it is measured on the basis of X. In this case, the t=0 boundary is the opening boundary of the Z error, which may cause an undetectable flip of the logical X operator. But the results of this experiment are uniformly random anyway, and uniformly random binary variables remain uniformly random regardless of whether they flip or with what probability, so the behavior of this experiment is still correct.

[0054] Figure 2A A Z-type decoder graph 200 is depicted in accordance with disclosed embodiments. The decoder graph 200 can be constructed by adding a solid vertex (e.g., real detector 201) for each real Z-type detector. When a single fault changes the value of two corresponding detectors, an edge connecting the two vertices (e.g., edge 205a, edge 205b, etc.) can be added to the decoder graph 200. For each solid vertex corresponding to an open circuit detector, a fictitious detector vertex (e.g., fictitious detector 203) and an edge connecting the solid vertex and the fictitious detector vertex can be added to the decoder graph 200. Each edge in the decoder graph 200 thus represents an equivalence class of faults that flip the same two detectors. In this example, three syndrome cycles are obtained before measuring the data qubit. Therefore, the decoder graph 200 includes four layers of vertices. For ease of visualization, the vertices are depicted as being clustered in a continuous plane in their temporal order (e.g., first cycle detector 210, second cycle detector 220, third cycle detector 230, and measurement-derived detector 240).

[0055] Figure 2BAn X-type decoder graph 299 is depicted in accordance with disclosed embodiments. The decoder graph 299 can be constructed by adding a solid vertex for each real X-type detector (e.g., real detector 251). When a single fault changes the value of two corresponding detectors, an edge connecting the two vertices (e.g., edge 255a, edge 255b, etc.) can be added to the decoder graph 299. For each solid vertex corresponding to an open detector, a fictitious detector vertex (e.g., fictitious detector 253, fictitious detector 254, etc.) and an edge connecting the solid vertex and the fictitious detector vertex can be added to the decoder graph 299. Each edge in the decoder graph 299 thus represents an equivalence class of faults that flip the same two detectors. In this example, three syndrome cycles are obtained before measuring the data qubit. Given the definition of an X-type detector event, the decoder graph 299 includes two layers of vertices. For ease of visualization, the vertices are depicted as clustered in a continuous plane in their temporal order (e.g., second cycle detector 250 and third cycle detector 260).

[0056] In the first (or last) syndrome extraction cycle, any measurement fault on the auxiliary of the X-type check operator is only in (or in Thus, both time boundaries are open. In some embodiments, Figure 2B As shown, to help distinguish whether a fault affects an auxiliary measurement or a boundary data qubit, a real detector at the intersection of the space and time boundaries can be connected to two imaginary detectors instead of one imaginary detector. For example, real detector 251 can be connected to imaginary detector 254 (corresponding to the space boundary) and imaginary detector 253 (corresponding to the time boundary).

[0057] Traditional implementations and simulations of quantum memory experiments can perform decoding as an offline process. The entire quantum circuit for a quantum memory experiment can be executed or simulated, resulting in a total of n rounds of error syndromes. The entire batch of n rounds of syndromes can then be input to a decoder. A decoder that works on an entire batch of syndromes can be described as a batch decoder.

[0058] The batch decoder is conceptually simple, demonstrating that QEC can protect quantum information and demonstrating the general idea of ​​recovering such quantum information (MWPM, UF, etc.). However, batch decoders may be difficult to scale up temporarily. Most current demonstrations of quantum memory experiments involve a finite number of surface code cycles, especially when the code distance d is large (e.g., only n~d surface code cycles can be simulated). But a quantum memory configured to store quantum states for subsequent retrieval will preferably be usable for multiple surface code cycles, depending on the logical error rate per cycle (which should decrease exponentially with the code distance). Batch decoder-based methods require O(pnd 2 ) space, and thus will quickly exhaust memory. Furthermore, after measuring the logical qubit, decoding will take an additional amount of time that is at least linear in n, and for some decoding methods may be even longer (for example, a naive implementation of the MWPM decoder will generate a decoder with O(p 2 n 2 d 4 ) edges, and is therefore quadratically proportional to n).

[0059] According to the disclosed embodiments, quantum memories can be configured to support logic operations beyond single-qubit measurements. QECs can support fault-tolerant quantum computing with logic gates. At least one type of logic gate requires measuring an "auxiliary" logic qubit that is entangled with the "data" logic qubit of interest. In the surface code, two such entangled logic qubits form a connected object in space-time. Decoding such a logic-auxiliary measurement with a batch decoder may require all syndromes since the life cycle of the data qubit began. Therefore, the decoding time will eventually result in a "backlog" of syndromes that grows exponentially with the number of logic gates, making fault-tolerant quantum computing infeasible.

[0060] In some implementations, for example, a relatively small number of error checkers in a dxdx O(d) region can be used to decode any portion of a 3D surface code structure in space and time. These dxdx O(d) regions can be formalized as windows, resulting in the concept of a sliding window decoder. The sliding window decoder can be configured to process one window at a time. Within each window, the inner decoder can determine a set of edges from the decoder graph that can eliminate all defects. If a defect is associated with an odd number of edges in the determined set of edges, the defect can be eliminated. The edges in the set of edges can be corrections. The corrections assembled from all windows can jointly eliminate each observed defect in the entire decoder graph. In addition, the sliding window decoder can take advantage of the fact that any two consecutive windows overlap. These overlaps allow each window to retain only a relatively credible subset of corrections for later assembly and discard the remaining corrections.

[0061] Figure 3A and Figure 3B depicts two views of a window on a Z - type decoder graph according to the disclosed embodiments. The window may include detectors from to , where w is the width of the window, s < w is the step between windows, and k is the number of windows (e.g., first, second, third, etc.). In this example, according to the disclosed embodiments, the window has a width of 3, and the Z - type decoder graph is constructed from more than 3 syndrome periods. As described herein, real detectors, fictitious detectors, and edges can be used to construct the decoder graph. Figure 3A depicts a surface code patch region corresponding to the detectors and the edges connecting the detectors, while Figure 3B depicts a top view of the detectors in each successive time plane. Figure 3B also depicts a real detector and a time plane included in window 311 and a subsequent time plane 312 not included in window 311. As Figure 3B shown, window 311 may include a closing time boundary 313 corresponding to the earliest time plane, an opening time boundary 315 corresponding to the latest time plane, and two opening space boundaries. The opening boundaries can be reflected by fictitious detectors. Specifically, a fictitious detector 319 can be temporarily added to the decoder graph to reflect the opening time boundary 315. Each added fictitious detector can be connected to an appropriate real detector on the opening time boundary 315. In some embodiments, when window 311 is updated to include the next time plane, the fictitious detector 319 can be removed and replaced with a new set of fictitious detectors after the final time plane in the updated window (e.g., to reflect the opening time boundary of the updated window).

[0062] Figure 3C , Figure 3D and Figure 3E depict additional details of a decoding window according to the disclosed embodiments. Figure 3C depicts a decoding window with a closed initial time boundary and an open final time boundary. This example may correspond to a forward - sliding window with a width of 5 and a step of 2. Real detectors are depicted as solid vertices, while fictitious detectors are depicted as open vertices. For the core region, the edges connecting the vertices are shown, while for the buffer region, no edges are shown. Figure 3C also depicts an equivalent representation, where the core region is shaded, solid lines represent the closed time boundaries, and dashed lines represent the remaining open space and time boundaries.

[0063] Figure 3D and Figure 3EDepicted is a decoding window with two open time boundaries. These examples may correspond to a first type of sandwich decoder window (as described herein) of width 6 and step size 2. Each buffer region has a size of b=2. Figure 3D and Figure 3E The decoder windows in represent valid alternative designs, and the core regions across different windows in each design are disjoint sets of edges. Figure 3C As shown, for the core region, edges connecting vertices are shown, while for the two buffer regions, no edges are shown. In these examples, the buffer regions are asymmetric. Figure 3D and Figure 3E An equivalent representation is also depicted, similar to Figure 3C The equivalent representation of . Figure 3C , Figure 3D and Figure 3E The equivalent representation depicted in is used for FIG. 4A to FIG. 4D and Figure 5 middle.

[0064] For simplicity, the following discussion will focus on quantum memory experiments. According to the disclosed embodiments, the application of sliding window decoders to quantum memory experiments can be generalized to more practical uses of surface codes, such as lattice surgery. This article describes a method for using a sliding window decoder for lattice surgery.

[0065] In existing implementations of sliding window decoders, the dxdxm decoding window "slides" forward one surface code period at a time, which means that two adjacent windows have an overlap of m-1 surface code periods. Therefore, from each window, only the oldest correction layer output by the decoder is used. It can be understood that less information about future error syndromes is used to calculate corrections for newer layers. Therefore, as more future information becomes available, corrections can improve accuracy. Correcting each layer at the last possible moment, just before it "slides out of the window", ensures that a larger amount of future information (e.g., m-1 round syndromes, the same amount of overlap between windows) is used for each correction.

[0066] However, there is a disadvantage to moving forward only one surface code cycle at a time: the total time complexity of decoding all windows increases. In an experiment with a total of n surface code cycles, the number of sliding windows required is O(n), and each window requires at least O(pmd 2 ) time to decode, making the total time complexity O(pnmd 2 ). The additional factor O(m) can severely limit the code distance that can be achieved in practice, or can force the implementation to require additional traditional computing resources to achieve the desired throughput.

[0067] The disclosed embodiment solves this problem by moving forward s=O(m) surface code periods at a time, while still preserving the same amount of overlap between windows l=ms. Importantly, when l is fixed, increasing the size of each window m will increase the step size s, thereby reducing the overall time complexity (assuming the time complexity of the underlying decoder is linear). For example, if s=l, m=2l, then the overall time complexity becomes:

[0068]

[0069] Therefore, preserving overlaps incurs a constant overhead compared to a batch decoder.

[0070] It will be appreciated that the decoder may be configured to neutralize all detection events, rather than finding the "correct" error assignment at each individual location. The "correct" error assignment may not be unique. Any two sets of corrections that differ by one or more stabilizers are logically equivalent. This fact presents a challenge for a sliding window decoder. Each decoder window may determine a separate "correct" set of (physical) corrections. However, it may not be feasible to combine these sets of corrections into a consistent set of overall corrections for the entire decoder graph. A naive approach - simply extracting a subset of the edges from each decoder window - may result in inconsistencies along the boundaries separating the decoder windows, e.g., unneutralized detection events after the corrections have been applied. Such detection events may even be newly created by applying the corrections.

[0071] It is understood that when there is an inconsistency between corrections, the result of the logical measurement may not be well-defined and may depend on the logical operator representative chosen. Furthermore, no matter which logical operator representative is chosen, the possibility that a low-weight error will lead to a logical error cannot be ruled out. It is understood that two adjacent windows may not agree on where an error should be corrected, resulting in an error being corrected 0 or 2 times.

[0072] In existing sliding window implementations, closed past time boundaries for each decoding window are used together with a syndrome update process to ensure that each window cooperates with the previous window to neutralize all detection events on the boundary. The oldest correction layer from the previous window can be applied before the current window receives input, which includes a set of detection events that may have been modified by the previous window. Since the past time boundaries are closed, the window can only send detection events to the "future" but not "back to the past". In contrast, the syndrome update process enables the use of closed past time boundaries because the updated syndrome contains information passed down from all previous windows, so it is less likely that detection events on past time boundaries will be interpreted as time-class errors in the past of the current window.

[0073] The disclosed embodiments can generalize this syndrome update scheme to a step size s>1. Because the syndrome is continuously passed forward, this method is referred to as a forward window method herein. In some embodiments, the forward window method may require strict data dependencies between window decodings. For example, decoding of one window may end before decoding of the next window can begin. For a sliding window decoder, throughput can theoretically be increased by exploiting parallelism between windows, but this efficiency cannot be achieved with a forward window decoder because strict data dependencies result in a critical path that runs through all windows.

[0074] FIG. 4A to FIG. 4D A forward window approach to a sliding window decoder according to the disclosed embodiments is depicted. Each window includes a detector arrive Where k is from 0 to 3. Within each window (starting from the first window, k=0), the inner decoder first finds a set of corrections that can eliminate existing defects. However, the decoder only keeps corrections in the core area. If the current window is the last window, all observed defects will be eliminated and the decoder will terminate. Figure 4A An initial window is depicted. The front temporal boundary is closed, the back temporal boundary is open, and the spatial boundary is open. The window includes the detector arrive Wherein, w is the width of the window. The window includes a core region 410 and a buffer region 420 (including a time plane overlapping with the core region of the subsequent region). The core region 410 may include the time plane incident on the plane arrive A set of edges in a window of at least one detector in , where s is the step size. Buffer region 420 may include the remaining edges in the window. Some detectors in the window, such as detector failure 411, have values ​​indicating a failure (e.g., a value of 1, as opposed to 0). The internal decoder may identify a set of edges that eliminate the detector failure. This set of edges may include edges connected to a fictitious detector (e.g., fictitious detector 430). However, the decoder retains only the edges in core region 410. Figure 4B Depicts the next window. Updates the detector on the initial time boundary (e.g., ) to reflect the correction in the core region 411. This produces a detector failure (e.g., the detector failure 431 produced). The inner decoder then identifies a set of edges that eliminate the detector failure, but only retains the edges in the core region. Figure 4C Depicts the next window. Updates the detector on the initial time boundary (e.g., ), generating a detector failure (e.g., generated detector failure 441). The inner decoder then identifies a set of edges that eliminate the detector failure, but only retains the edges in the core region. 4D depicts the final window. The entirety of this window constitutes the core region. The inner decoder then identifies a set of edges that eliminate the detector failure, and retains the edges in the window. In some embodiments, the set of all corrections retained in all windows can be the output of the decoder.

[0075] Intuitively, the corrections found in the core become more reliable with larger buffer regions, since future faults outside the window are less likely to affect the core region. The window does not need a buffer before the core region, since all past defects have been reliably eliminated, making the past time boundary of the window closed.

[0076] The disclosed embodiments can implement an alternative method for a sliding window decoder. This method achieves sufficient window overlap and solves the correction consistency problem described herein. In addition, this method can achieve parallelism between windows. In some embodiments, this method can provide a much shorter critical path that does not increase with the total number of windows.

[0077] The forward window method can solve the correction consistency problem by combining the opening time boundary and the closing time boundary and propagating the boundary syndrome from the time boundary of the previous window to the time boundary of the next window. In the forward window method, this is only done in the forward direction, which leads to a long critical path.

[0078] In some implementations, the boundary syndrome may be propagated backward from the opening time boundary to the closing time boundary. By alternating forward propagation and backward propagation, the length of the critical path (in terms of the window) may remain constant:

[0079] The first window type has open time boundaries on both sides (or on one side for the first and last windows) and is not dependent on any other windows.

[0080] The second window type (also called bounded) has closed time bounds on both sides and depends only on windows of the first type.

[0081] This approach is referred to herein as a sandwich window approach because each window of the second type is "sandwiched" between two windows of the first type.

[0082] Figure 5Depicted is sandwich decoding using seven windows according to the disclosed embodiment. The seven windows include four windows of the first window type. Window 501, the first window, has a closing time boundary (at the initial time) and an opening time boundary. Window 501 includes a core area and a buffer area overlapping with window 503. Window 507 has an opening time boundary and a closing time boundary (at the final time). Window 507 includes a core area and a buffer area overlapping with window 505. Windows 505 and 503 have an opening time boundary. Window 505 includes a core area, a buffer area overlapping with window 507, and a buffer area overlapping with window 503. Window 503 includes a core area, a buffer area overlapping with window 505, and a buffer area overlapping with window 501. In this example, the seven windows also include three windows of the second type (e.g., windows 511, 513, 515).

[0083] like Figure 5 As shown, different windows can access different fault information. The decoder can determine a set of corrections for each window to eliminate errors on the window. Therefore, the decoder can determine several sets of corrections that are inconsistent between windows. In this example, several sets of corrections for windows 505 and 507 are inconsistent (e.g., inconsistent corrections 531). Similarly, several sets of corrections for windows 501 and 503 are inconsistent (e.g., inconsistent corrections 521). As described herein, the corrections in the core area are retained, and the closed time boundary is updated with the generated faults to reflect these corrections. Therefore, inconsistent corrections cause faults to be generated in window 511 (e.g., generated fault 522) and window 515 (e.g., generated fault 532). The decoder of the second type of window can be configured to handle these generated faults, just like any other faults present in the processing window. For example, the decoder of window 511 can identify boundary correction 523 as eliminating generated fault 522, and identify boundary correction 533 as eliminating generated fault 532. It can be noted that boundary correction 533 is connected to the imaginary detector. Generally, boundary corrections can be determined because the spatial edge of the decoder window is open.

[0084] In this example, the second type of windows each have a window size of 1. This configuration choice causes them to degenerate into a 2D decoder graph. It will be appreciated that this description is not limiting. In some embodiments, the second type of windows need not overlap with adjacent windows, because such windows already have "context information" from the boundary syndromes propagated to both sides of them. For example, FIG. 6A to FIG. 6C A second type of windows with varying degrees of overlap is depicted. Fig. 6AThere is no overlap of the core area in the second type of windows. Therefore, the second type of windows includes detectors that are not in the non-overlapping first type of windows. The decoder identifies corrections that eliminate any errors in the windows, including errors that occur in the closing time boundaries of the second type of windows. Figure 6B The core area meets in the second type of window is a two-dimensional decoder graph, such as Figure 5 As shown. Figure 6C In the embodiment of the present invention, the core regions overlap. It will be appreciated that the corrections determined in the core region of each window of the first type may be retained. Therefore, the only faults present in the window of the second type may be faults generated at the time boundaries of the window. The decoder may determine corrections for these generated errors. In each case, the entire set of corrections may include corrections from windows of the first type and windows of the second type.

[0085] Figure 7 An exemplary decoding process 700 using a sandwich sliding window decoder according to the disclosed embodiments is depicted. The decoding process 700 can be performed by a conventional computing system, such as a laptop, a desktop computer, a workstation, a computing cluster, an application running on a cloud computing platform, or any combination thereof. The decoding process 700 can be performed as an online process. For example, the decoding process 700 can be performed while performing a quantum memory experiment. The decoding process 700 can include different tasks (e.g., processing a first type of window, processing a second type of window, combining corrections from different windows, etc.). A conventional computing system can use different threads, kernels, processing units, or any combination of the foregoing to perform these different tasks. Certain tasks can be performed at least partially in parallel. For example, a conventional computing system can use different threads, kernels, or processing units to process multiple first type windows simultaneously. Similarly, a conventional computing system can use different threads, kernels, or processing units to process a first type of window and a second type of window simultaneously (as long as the prerequisites for the second type of window are met).

[0086] In step 701, process 700 may begin. In some embodiments, process 700 may be performed as part of another process. For example, process 700 may be performed as a QEC component of a quantum computation performed using a surface code. In some embodiments, process 700 may be performed as a standalone process. For example, a quantum memory experiment using process 700 may be performed during a characterization or benchmark of a surface code implementation. In some embodiments, step 701 may include obtaining parameters that control decoding. These parameters may include window width and overlap, internal decoder type, etc. These parameters may be obtained from a user of a conventional computing system, from another system or memory accessible to the conventional computing system, may be specified in a configuration file or default settings, or some combination of the above, etc.

[0087] In step 703 of process 700, according to disclosed embodiments, a conventional computing system may receive a set of syndromes from a quantum processing unit. The conventional computing system may receive the syndromes directly from the quantum processing unit, or may receive the syndromes indirectly through one or more other computing systems. In some cases, the set of syndromes may correspond to a period of syndrome extraction (e.g., performing a Figure 1B and 1C In some cases, receiving the set of syndromes may include receiving a final measurement of the data bit and extracting the Z-type syndrome of the ancillary qubit from the measurement of the data bit.

[0088] In some embodiments, as described herein, a conventional computing system can use the set of syndromes to generate a corresponding set of detectors. For example, a first set of syndromes can generate a detector The second set of syndromes can generate detectors and And the final set of measurements can be used to generate the set of detectors Where n is the number of cycles. A conventional computing system can add the generated detectors to a set of accumulated detectors.

[0089] In step 705 of process 700, a conventional computing system may determine whether a set of accumulated detectors constitutes a complete decoder window in accordance with disclosed embodiments. In some cases, a complete decoder window may include a predetermined number of detector cycles (e.g., based on the parameters obtained in step 701). For example, Figure 3D As shown, the decoder window may include 7 detector cycles. In some cases, the final decoder window may include a different number of cycles (e.g., when the quantum memory experiment includes 10 syndrome measurement cycles, one data measurement, and the window size is 3). In this case, when the conventional computing system obtains the final detector group, the conventional computing system may determine that a set of accumulated detectors includes the complete decoder window.

[0090] When the conventional computing system has obtained a complete decoder window, process 700 may proceed to step 707. Otherwise, process 700 may return to step 703 to wait for receiving additional syndromes.

[0091] In step 707 of process 700, according to the disclosed embodiments, a conventional computing system may process the set of accumulated detectors as a first type of window. In some embodiments, the conventional computing system may perform step 707 using a thread, core, or processing unit separate from the thread, core, or processing unit that performs step 703 or 705. For example, the thread that performs step 703 and step 705 may start a new thread to perform step 707 using the set of accumulated detectors. In some cases, such as Figure 7 As shown, the execution of step 707 can be at least partially parallelized. Multiple instances of step 707 can be performed on multiple decoder windows at the same time.

[0092] In some embodiments, processing a set of accumulated detectors may include determining a correction set that eliminates any faults within the decoder window, such as reference Figure 5 The internal decoder may be used to determine the set of corrections. The disclosed embodiments are not limited to a specific formula for the internal decoder. In some embodiments, the internal decoder may be or include a joint search decoder. The joint search decoder may be a weighted growth joint search decoder. In some embodiments, the internal decoder may be or include a minimum weight perfect match decoder.

[0093] According to the disclosed embodiments, the output of step 707 may be a set of corrections and multiple sets of core region boundary values ​​(e.g., left boundary and right boundary). The set of corrections may include those corrections within the core region of the decoder window. It will be appreciated that the first and last decoder windows of the first type may include the core region and one buffer region, while the other decoder windows of the first type may include the core region and two buffer regions. After applying the corrections within the core region, the boundary may include the detector values ​​of the detector at the boundary of the core region. It will be appreciated that the boundary may include detector faults generated, such as Figure 5 shown.

[0094] In some implementations, after processing of a first type of window is complete, the thread may terminate, or a core or processing unit may become available to process other windows.

[0095] According to the disclosed embodiment, in step 709 of process 700, a conventional computing system may receive the border generated in step 707. It is understood that the thread, kernel, or processing unit that receives each border may be different from the thread, kernel, or processing unit that processes the first type of window. For example, a first thread responsible for processing the first type of window may identify a second thread responsible for processing the left border. The first thread may make the left border available to the second thread (e.g., through a suitable inter-thread communication method). The first thread may start a new third thread and assign the task of processing the right border to the third thread. As another example, the first thread may determine whether there is another thread responsible for processing the right (or left) border. If so, the first thread may provide the right (or left) border to the other thread. Otherwise, the first thread may cause the conventional computing system to generate a suitable thread for processing the left (or right) border.

[0096] In some embodiments, when both types of windows include multiple detector cycles (e.g., Fig. 6A and Figure 6C As shown), a thread, core, or processing unit can obtain an appropriate set of detectors (e.g., from another thread, core, or processing unit, from memory or another system, etc.).

[0097] In step 711 of process 700, according to the disclosed embodiments, the conventional computing system can determine whether a complete set of boundaries has been obtained. If obtained, process 700 can proceed to step 713. Otherwise, process 700 can return to step 709 to wait for another boundary.

[0098] In step 713 of process 700, in accordance with disclosed embodiments, a conventional computing system may use the boundaries (and, in some embodiments, multiple detector cycles) obtained in step 709 to process a second type of window. In some embodiments, the boundaries may be combined (e.g., XORed) to generate updated boundaries. It will be appreciated that when two overlapping windows of the first type have a consistent set of corrections, the boundaries of the windows will include matching generated faults. The combined boundaries will eliminate these generated faults. When two overlapping windows of the first type have inconsistent corrections, the boundaries of the windows will include different generated faults (or an odd number of faults). The combined boundaries will then include the generated faults. The conventional computing system may then apply an internal detector (which may or may not be the same internal detector as in step 707) to determine a set of corrections that eliminate any faults present in the second type of window. In some embodiments, after completing processing of the second type of window, the thread may terminate, or the core or processing unit may be available to process other windows. In some cases, such as Figure 7As shown, the execution of step 713 can be at least partially parallelized. Multiple instances of step 713 can be executed on multiple windows of the second type at the same time.

[0099] In step 715 of process 700, a conventional computing system may receive the corrections generated in steps 707 and 713. It will be appreciated that the thread, kernel, or processing unit that receives such corrections may be different from the thread, kernel, or processing unit that generates such corrections. For example, a first thread responsible for processing a first type of window may identify a second thread responsible for determining a complete set of corrections. The first thread may make a set of corrections available to the second thread (e.g., through a suitable inter-thread communication method). As another example, the first thread may determine whether there is another thread responsible for determining a complete set of corrections. If so, the first thread may provide the set of corrections to the other thread. Otherwise, the first thread may cause a conventional computing system to generate a suitable thread for determining a set of corrections.

[0100] In step 717 of process 700, according to the disclosed embodiments, the conventional computing system can determine whether a complete set of corrections has been received. In some embodiments, the complete set of corrections can include core region corrections for all windows of the first type and border (in some cases, core region) corrections for all windows of the second type. If a complete set of corrections has been received, process 700 can proceed to step 719, otherwise process 700 can return to step 715 to wait for receipt of additional corrections.

[0101] In step 719 of process 700, a conventional computing system may determine a correction set. In some embodiments, the correction set may be a combination of a correction set for a core region of a first type of window and a correction set for a boundary (in some cases, a core region) of a second type of window. For example, the correction set may be an XOR of the correction sets for the first type of window and the second type of window. For example, if an edge is included in an even number of correction sets, the edge is not included in the combined correction set. If the edge is included in an odd number of correction sets, the edge is included in the final correction set.

[0102] In step 799, process 700 can terminate. In some embodiments, the determined correction set can be output to a user or another system. For example, an indication of the determined correction set can be displayed to the user in a graphical user interface or otherwise provided to the user. When process 700 is performed as part of a larger process, the determined correction set can be used to perform another step in the process. For example,

[0103] The disclosed embodiments are not limited to using a specific decoder as the internal decoder for decoding each individual window. In addition, the internal decoder can be implemented in any suitable computing language (e.g., Python, C or another suitable language).

[0104] In some embodiments, the inner decoder may be a Union Find (UF) decoder. In some embodiments, such a Union Find decoder may be a Weighted Growth UF decoder. It will be appreciated that a UF decoder exhibits low time complexity both in theory and in practice. However, a UF decoder does not approximate a minimum weight correction, or indeed any "possible" correction; instead, the decoder attempts to find an equivalence class that may contain the actual error, and then selects an arbitrary correction in that equivalence class using a simple stripping decoder. This means that a "boundary syndrome" given by applying only a portion of the correction output by the UF decoder may be misleading. In some embodiments, the inner decoder may be a Minimum Weight Perfect Match (MWPM) decoder.

[0105] Simulations according to the disclosed embodiments were performed for various configurations. Given each code distance d G∈{3, 5, ..., 17}, a sandwich decoder is selected with a step size of s d =(d+1) / 2, window w d =3s d We use 3D MWPM and UF decoder as inner decoder to process each first type of window, and use 2D MWPM and UF decoder to process each second type of window (i.e., the boundary offset is 0), respectively.

[0106] For experiments with the UF inner decoder, physical error rates p∈{0.3%, 0.4%, 0.5%, 0.55%, 0.6%, 0.7%, 0.8%} were considered; for experiments with the MWPM inner decoder, physical error rates p∈{0.4%, 0.5%, 0.6%, 0.65%, 0.7%, 0.8%} were considered. For each physical error rate p, a Monte Carlo simulation was performed to find the logical error rate per d cycles for 100,000 transmissions. Figure 8C As shown in , an estimated threshold of 0.55% is obtained for the UF sandwich decoder. The same experiment is performed using the UF batch decoder, and similar thresholds are obtained, as Fig.8D The thresholds of the MWPM sandwich decoder and batch decoder are shown in Fig. 8A In Figure 8B The average is 0.70%.

[0107] To define the “logical error rate per d cycles” p L (d) assumes that each cycle of syndrome extraction has a fixed probability pL (1) Independent flipping of the logic qubit. If we exclude the data qubit initialization and final measurement failures, the probability p of flipping the logic qubit after i syndrome extraction cycles is L (i) Satisfy:

[0108] 1-2p L (i) = (1-2p L (1)) i

[0109] If q is defined as the probability that data qubit initialization and measurement jointly flip the logic qubit, then the probability of a logic error for an n-cycle memory experiment, p L,n satisfy:

[0110] 1-2p L，n =(1-2q)·(1-2p L (1)) n

[0111] Therefore, the logic error rate p per d cycles is L (d) A weighted least squares estimator can be used to estimate the The estimated logistic error rate is calculated as:

[0112]

[0113] in, This paper describes the estimator In our experiments, we simulate different total number of cycles Among them, k∈{8, 9,…, 20}.

[0114] To more effectively simulate the behavior of our scheme for different numbers of cycles, we perform simulation experiments simultaneously, reusing the sampling errors and decoder outputs of earlier cycles. That is, for each d and p, we construct a decoder graph with n = 10s d data and sample errors. Then, in the same decoder graph, we compute all The logical error rate per shot of , where k∈{8, 9, …, 20}. This causes the results of those experiments to be correlated, but over 100,000 independent shots, the effect of this correlation should be small. More specifically, each simulation proceeds as follows:

[0115] 1. Before starting any sliding, sample edges on the entire decoder graph according to pre-computed probabilities, except for the final data qubit measurement error.

[0116] 2. Decode each window of the first type with defects generated from the sampled edges and identify the core region. More specifically, (a) when the window has reached the last cycle (i.e., the last layer in the decoder graph), decode the window with the sampled edges generated by the final data qubit measurement error and apply correction in the core region. Finally, calculate the logical error rate for every d cycles; (b) when the window has not yet reached the last cycle, but if the number of cycles is equal to (where k∈{8, 9, ..., 19}), when it is the last window, make two copies of the current situation. On one copy, treat the window as the last window in case (a). On the other copy, proceed as in case (c); (c) When the window is not the last window for any number of cycles requested, decode, apply correction in the core area, and slide to the next window.

[0117] 3. For each window of the second type (ie, the overlapping boundary between two consecutively decoded windows of the first type), put all inconsistent detectors into the 2D decoder and apply all generated corrections.

[0118] For each value of n (and other combinations of parameters), our Monte Carlo simulation gives The estimated logistic error rate of , where the variance is:

[0119]

[0120] Where N = 10 5 represents the number of launches. The weight w used in the least squares estimator i is derived from the approximate variance:

[0121]

[0122] As described in the paper, estimates for different values ​​of n is correlated. Therefore, the least squares user variance estimator cannot be used. Instead, a conservative estimate of the variance can be:

[0123]

[0124] Therefore, the logic error rate per cycle can be calculated from the logic error rate per issue.

[0125] Fig. 8A and Figure 8B Exemplary decoder error rates are described for the MWPM sandwich decoder and batch decoder, respectively. Figure 8C and Fig.8DExample decoder error rates for UF sandwich windows and batch decoders according to the disclosed embodiments are plotted, respectively. Logical error rates are plotted against physical error rates for surface codes at different depths. All error rates for different numbers of cycles are plotted for each physical error rate. The line drawn for each distance d passes through all For both inner decoders, the sandwich sliding window decoder has similar performance to the corresponding batch decoder.

[0126] Sampling errors are studied using a circuit-level depolarization noise model with a single parameter p. Preparation and measurement errors are assumed on all data and auxiliary qubits, where a qubit is initialized to an orthogonal state with probability p and a measurement result flips with probability p. Each single-qubit, two-qubit, and idle gate is implemented as a perfect gate followed by a depolarization pass. With probability p, the perfect gate is subject to a nontrivial Pauli error chosen uniformly at random. Errors attached to different elementary operations are applied independently.

[0127] Each sandwich window is associated with a range so that only corrections (edges) that fall within that range are applied (e.g. Figure 3C to Figure 3E For a general window that is neither the first nor the last, the range is the middle s in the current window. d Layers, and both time boundaries are open. The top and bottom layers within this correction range are called the upper and lower boundaries. The upper boundary of the current window is consistent with the lower boundary of the next window, so that the inconsistency between the two windows can be resolved using a 2D decoder.

[0128] For the first window, the decoder should not only correct the intermediate s d layers, and should correct all layers before them, since the lower temporal boundaries of the first window are closed. Similarly, the last window corrects the intermediate s d layers and all layers after them, because the upper temporal boundary of the last window is closed.

[0129] When evaluating the performance of a sandwich sliding window decoder, stride and window size are two natural features to consider:

[0130] Window size (w) = step size (s) + 2x overlap (o)

[0131] As the number of cycles increases, the logic error rate per launch also increases and gradually converges to 0.5.

[0132] Fig. 9A and Fig. 9BDepicted is the time series of each transmission ( Fig. 9A ) and each cycle ( Fig. 9B ) on the step size and overlap. Larger step sizes and overlaps generally lead to lower logic error rates. Fig. 9A In , the overlap is fixed to 3 and 5, and the step size varies. Fig. 9B In , the logic error rate per shot is converted to the logic error rate per d cycles as a function of overlap. Each transparent point is calculated from a cycle number. Each specific point is the average of all 7 transparent points.

[0133] During each sandwich window, the decoder is given information from both future and past detection events because corrections are received in between. According to the disclosed embodiments, the forward window approach can prevent premature matches by considering the most recent future detection events. However, the forward window approach cannot prevent problematic matches from the past because the decoder does not know its most recent past events.

[0134] Fig. 10A and Fig. 10B Depicted is the time series of each transmission ( Fig. 10A ) and each cycle ( Fig. 10B ) on the window architecture (forward window vs. sandwich window). As shown, when the same number of future events are released to the sandwich window and the forward window (i.e., fixed step size and overlap), the sandwich window produces a lower logical error rate. The forward window size is s+b and the sandwich window size is s+2b. Therefore, given any forward window decoder, a sandwich window decoder can be constructed to have comparable or better performance.

[0135] The performance of windows with closed upper and lower time bounds is compared to the normal case of closing only the lower bound for the first window and the upper bound for the last window. There is a clear advantage of open bounds over closed bounds. This advantage becomes less pronounced as the overlap increases.

[0136] Fig.11A and Fig. 11B Each transmission of the forward sliding window according to the disclosed embodiment ( Fig.11A ) and every d cycles ( Fig. 11B ) on the dependence of the logical error rate of closing or opening window boundaries. Fig.11AIn , the overlap varies from 1 to 6 for each of the closed and open boundaries. Fig. 11B In , the logic error rate per shot is converted into the logic error rate per d cycles and plotted against the overlap.

[0137] Fig. 11C and Fig.11D Each shot ( Fig. 11C ) and every d cycles ( Fig.11D ) on the dependence of the logical error rate of closing or opening window boundaries. Fig. 11C In , the overlap varies from 1 to 6 for each of the closed and open boundaries. Fig.11D In , the logic error rate per shot is converted into the logic error rate per d cycles and plotted against the overlap.

[0138] Fig. 12A and Fig. 12B Depicted are the transmissions for different boundary offsets according to the disclosed embodiments when d=9 and p=0.005, the window size is s+2b, the number of cycles ranges from 30 to 90, and the boundary offset ranges from -3 to 3 ( Fig. 12A ) and each cycle ( Fig. 12B ). The step size and overlap are fixed to 5, 4, and 3.

[0139] The performance of the sliding window (UF) decoder is evaluated on real-world data provided by R. Acharya et al. (“Acharya”) in “Suppressing quantum errors by scaling surface code logic qubits”, where d=3 and d=5. Fig.13 Depicted is the application of a decoder according to the disclosed embodiments to Google QEC data. For d=3, each point is the average of 4 configurations of the surface code specified in Acharya. When d=5, there is only one configuration. Each configuration has 50,000 transmissions. The batch decoder is a single UF decoder. The step size of the sandwich window decoder is chosen to be (d+1) / 2 and the window size is 3(d+1) / 2. The y-axis is the logical fidelity c is the number of cycles. The slope represents the logic error rate per cycle. Fig.13 As shown, the sandwich decoder has only slightly larger logical error rate than using the batch (UF) decoder. Note that the original data was obtained using a tensor network and belief decoders, which inherently have higher accuracy than the UF decoder, to obtain error suppression from d=3 to d=5.

[0140] The surface code patches used in stability experiments can have closed spatial boundaries on all sides. The decoder graph for a "boundary decoder" may not have any open boundaries at all. But if two adjacent windows produce completely different corrections, the decoder graph may still get an odd number of detection events as input. Moreover, only O(m) errors are required to produce such irreconcilable consistency, and stability experiments should be able to tolerate any O(n) errors (remember that in our notation, n is the total number of cycles in the experiment and m is the number of cycles in a window).

[0141] One motivation for stability experiments is to simulate "space-like sections" that appear in various useful logic operations of lattice surgery, e.g., moving one qubit or making a parity measurement of two qubits. Each of these "space-like sections" may only last O(d) surface code cycles, since adding more cycles may have diminishing returns for suppressing time-like logic errors and may be detrimental for suppressing space-like logic errors (of the opposite X / Z type). Stability experiments do not need to be divided into windows in time, in contrast to memory experiments, which can last much longer than O(d) cycles in "real" cases (depending on the number of logic operations applied to the logic qubits). The spatial span of the "space-like sections" may be significantly larger than d, depending on the physical distance on the surface code lattice between the qubits involved. Therefore, one can consider performing stability experiments on elongated rectangular code patches. The elongated rectangular code patches can be divided into multiple windows in the spatial direction. Such a sliding window decoder can be formed by switching the roles of time and one of the spatial dimensions.

[0142] The disclosed embodiments can be generalized to operations in lattice surgery, such as qubit movement and two-qubit parity measurement. For example, a two-qubit parity measurement can have Fig.14A The overall decoder graph shown is shaped like an "H", as opposed to the rectangular box-shaped decoder graphs used for memory experiments (where the box is elongated in the time direction) or stability experiments (where the box is elongated in the space direction). However, the two-qubit parity measurement decoder graph can be split into smaller decoder windows, each of dimension O(d) x O(d) x O(d), as Fig. 14B The only significant difference is that there are two T-windows, which propagate boundary syndromes in three directions instead of two. Other lattice surgery operations may increase the complexity of the scheme (for example, warp defects may require combining X decoder graphs and Z decoder graphs).

[0143] The disclosed embodiments include a general parallel divide-and-conquer approach. Given a stabilizer code and its syndrome extraction circuit, denote the set of detectors by V. Then, a random Pauli noise model induces a (hyper)graph (V; E) where Consider the transition from edge space to vertex space. -Linear Mapping

[0144]

[0145] where vector addition corresponds to symmetric difference. and e∈E, define

[0146] Δ(E, V) :={e∈E: e is associated with a vertex in V}

[0147] Then, the generalized sandwich method combines the graph (V; E) and a set of The defects are taken as input and a set of K∈E corrections are output such that δK=D.

[0148] The method assumes the presence of an "internal decoder" that works for sufficiently small instances. Given a fixed defect D, a correction K can be "valid" if δK = D. If the internal decoder fails to find a valid correction in any case, the decoder terminates and declares failure. The method also assumes a "partitioning method" for decomposing the input graph in step 3. Note that each execution of this step does not necessarily split the set of vertices, but the "core" of all recursive steps taken together will partition the initial input graph.

[0149] This approach provides a generalization of the sandwich decoder with respect to disjoint core regions (e.g., with non-negative boundary offsets) across windows. Similar variants can be constructed for overlapping core regions.

[0150] Assumptions Represents the union of disjoint sets.

[0151]

[0152] This method always terminates after finite recursion because is increasing. The point of this method is how to parallelize the computation. When the method does not fail, the output is valid. To see this, first observe that step 5 defines a valid input instance, i.e., all vertices involved in E' are in V', and The former follows from the definitions of E' and V'. To see the latter, note:

[0153]

[0154] in, Represents C i Then, according to the requirements in step 4, from δK∩C i =D∩C i Start following

[0155]

[0156] Note that for all i, Otherwise there will be j, j≠i, such that Δ(E, C i )∩Δ(E,C j ) in δ(K i ) has elements, which is consistent with {Δ(E, C i )} i The indivisibility of is a contradiction. Therefore,

[0157] By inductive argument,

[0158]

[0159] Thus, the method outputs a valid correction as long as the method does not fail. The method also leaves a lot of freedom in the choice of inner decoder and partitioning method. In some embodiments, the sandwich decoder can partition the input graph along the time direction, which disconnects the graph, resulting in a recursion of depth 2. The sandwich decoder can also guarantee success based on the graph properties of the window. In some embodiments, when the basic input size is set small enough, an alternative inner decoder can be or include a pre-computed lookup table.

[0160] Fig.15 A schematic diagram of an exemplary quantum circuit 1510 suitable for implementing quantum error correction according to disclosed embodiments is depicted. Quantum circuit 1510 may include one or more qubits. Fig.15 In the non-limiting example shown, quantum circuit 1510 may include two flux qubits. Continuing with this example, each flux qubit may be implemented using a Josephson junction shunted by a capacitor and an inductor. Each of these inductors may be implemented by an array of Josephson junctions. Each qubit may be configured to operate at a local minimum frequency with respect to the bias magnetic flux. In this non-limiting example, capacitors may be used to couple the qubits, implementing transverse resonant coupling (e.g., charge coupling, etc.) between the qubits. Such coupling may require alignment of the qubit frequencies. When the gate is not operating, the qubits may maintain different frequencies.

[0161] In some embodiments, circuit 1510 can be implemented using a chip including qubits and couplings between qubits. In some embodiments, the chip can include one of multiple couplings to quantum controller 1520.

[0162] Quantum controller 1520 may be a digital computing device (e.g., a computing device including a central processing unit, a graphics processing unit, an application specific integrated circuit, a field programmable gate array, or other suitable processor). Quantum controller 1520 may configure quantum circuit 1510 for computation, provide computation gates, and read out state information from quantum circuit 1510.

[0163] According to the disclosed embodiments, the quantum controller 1520 can configure the quantum circuit 1510 by enabling gate operations to be performed on one or more qubits of the circuit quantum 1510. In some embodiments, the quantum circuit 1510 can be configured by providing one or more bias drives to move two qubits into a resonant state. The quantum controller 1520 can provide one or more bias drives directly to the circuit 1510, or can provide instructions to a bias drive source (e.g., a waveform generator, etc.) so that the bias drive source provides a bias drive to the circuit 1510. In some embodiments, providing the bias drive may include passing a current through a coil external to the circuit 1510. In various embodiments, providing the bias drive may include passing a current through a coil on a chip. The disclosed embodiments are not limited to a specific method of providing a bias drive or a specific method of biasing a qubit.

[0164] According to the disclosed embodiments, the quantum controller 1520 can implement computational gates on the circuit 1510. The quantum controller 1520 can implement such gates by providing one or more computational drives to the corresponding qubits in the circuit 1510, or by providing instructions to a computational drive source (e.g., a waveform generator, etc.) so that the computational drive source provides one or more computational drives to the circuit 1510. Such computational drives may include microwave drives. The computational drives may include sine waves, square waves, pulse trains, or other quantum gate drives with parameters selected by the quantum controller 1520 to implement quantum gates on the qubits. One or more coils coupled to the corresponding qubits may be used to provide the corresponding qubits to the one or more computational drives. The coils may be external to the circuit 1510 or on a chip containing the circuit 1510.

[0165] According to the disclosed embodiments, the quantum controller 1520 can be configured to determine state information of the quantum circuit 1510. In some embodiments, the quantum controller 1520 can measure the state of one or more qubits of the circuit 1510. The state can be measured when one or more quantum operation sequences are completed. In some embodiments, the quantum controller 1520 can provide a detection signal (e.g., a microwave detection tone) to the coupled resonator of the circuit 1510, or provide instructions to a readout device (e.g., an arbitrary waveform generator) that provides the detection signal. In various embodiments, the quantum controller 1520 may include or be configured to receive information from a detector that is configured to determine the amplitude and phase of an output signal received from the coupled resonator in response to providing the microwave detection tone. The amplitude and phase of the output signal can be used to determine the state of the qubit being detected. The disclosed embodiments are not limited to any particular method of measuring the state of a qubit.

[0166] The disclosed embodiments may be further described using the following terms:

[0167] 1. A method of quantum error correction, comprising: obtaining a plurality of error checker cycles of a surface code; generating a decoder graph using the error checkers; determining a first correction that eliminates a fault within a first decoder window on the decoder graph, the first decoder window having two open time boundaries; retaining the first correction on a core region of the first decoder window, the core region having a first boundary; determining a second correction that eliminates a fault within a second decoder window on the decoder graph, the second decoder window having two closed time boundaries, the first of the two closed time boundaries being the first boundary; and providing an indication of the retained first correction and the second correction to enable correction of the surface code.

[0168] 2. A method according to clause 1, wherein: generating the decoder graph includes determining vertices corresponding to real detectors, and the first pair of real detectors are connected by a first edge when a first fault in a first data qubit of the surface code flips the values ​​of two real detectors in a first pair of real detectors.

[0169] 3. A method according to clause 2, wherein: generating the decoder graph also includes determining vertices corresponding to imaginary detectors, and a second pair of real detectors including imaginary detectors and real detectors are connected by a second edge when a second fault in a second data qubit of the surface code flips the value of only the real detector in the second pair in the real detector.

[0170] 4. A method according to any one of clauses 1 to 3, wherein the decoder pattern is a z-type decoder pattern with closed temporal boundaries and open spatial boundaries.

[0171] 5. A method according to any one of clauses 1 to 4, wherein: a first correction is retained on a core area of ​​a first decoder window, wherein the first decoder window produces a fault on a first boundary; and a second correction eliminates the fault produced on the first boundary.

[0172] 6. A method according to any of clauses 1 to 5, wherein the second decoder window is a 2D decoder graphic.

[0173] 7. The method according to any one of clauses 1 to 5 further includes: determining a third correction to eliminate a fault within a third decoder window on the decoder graph, the third decoder window having two open time boundaries; retaining a third correction on a core area of ​​the third decoder window, the core area having a third boundary; and wherein the second of the two closed time boundaries is the third boundary.

[0174] 8. The method of clause 7, wherein: the second of the two off-time boundaries corresponds to an earlier detector cycle than the first of the two off-time boundaries.

[0175] 9. A method according to any of clauses 1 to 8, wherein determining the first correction comprises applying a union-find (UF) decoder or a minimum weight perfect match (MWPM) decoder to the first decoder window.

[0176] 10. The method according to any of clauses 1 to 9, further comprising determining, at least partially in parallel, corrections for a plurality of decoding windows having open temporal boundaries, the corrections comprising the first correction.

[0177] 11. A system for quantum error correction, comprising: at least one processor; and at least one computer-readable medium containing instructions, which, when executed by the at least one processor, cause the system to perform operations, the operations comprising: obtaining a plurality of error syndromes of a surface code; generating a decoder pattern using the error syndromes; determining a first correction that eliminates a fault within a first decoder window on the decoder pattern, the first decoder window having two open time boundaries; retaining the first correction on a core region of the first decoder window, the core region having a first boundary; determining a second correction that eliminates a fault within a second decoder window on the decoder pattern, the second decoder window having two closed time boundaries, the first of the two closed time boundaries being the first boundary; and providing an indication of the retained first correction and the second correction to enable correction of the surface code.

[0178] 12. The system of clause 11, wherein: generating the decoder graph comprises determining vertices corresponding to real detectors that are connected by a first edge when a first fault in a first data qubit of the surface code flips values ​​of both real detectors in a first pair of real detectors.

[0179] 13. A system according to clause 12, wherein: generating the decoder graph also includes determining vertices corresponding to imaginary detectors, and a second pair of real detectors including the imaginary detectors and the real detectors are connected by a second edge when a second fault in the second data qubit of the surface code flips the value of only the real detector in the second pair in the real detector.

[0180] 14. A system according to any of clauses 11 to 13, wherein the decoder pattern is a z-type decoder pattern having closed temporal boundaries and open spatial boundaries.

[0181] 15. A system according to any one of clauses 11 to 14, wherein: a first correction is retained on a core area of ​​a first decoder window, wherein the first decoder window produces a glitch on a first boundary; and a second correction eliminates the glitch produced on the first boundary.

[0182] 16. A system according to any of clauses 11 to 15, wherein the second decoder window is a 2D decoder graphic.

[0183] 17. A system according to any one of clauses 11 to 15, wherein the operations further include: determining a third correction that eliminates a fault within a third decoder window on the decoder graph, the third decoder window having two open time boundaries; retaining a third correction on a core area of ​​the third decoder window, the core area having a third boundary; and wherein the second of the two closed time boundaries is the third boundary.

[0184] 18. The system of clause 17, wherein: the second of the two off-time boundaries corresponds to an earlier detector cycle than the first of the two off-time boundaries.

[0185] 19. The system of any of clauses 11 to 18, wherein determining the first correction comprises applying a Union-Find (UF) decoder or a Minimum Weight Perfect Match (MWPM) decoder to the first decoder window.

[0186] 20. The system of any of clauses 11 to 19, wherein the operations further comprise: determining, at least partially in parallel, corrections for a plurality of decoding windows having open temporal boundaries, the corrections comprising the first correction.

[0187] 21. A computer-readable storage medium storing a set of instructions executable by one or more processors of a device to cause the device to initiate a method according to any one of clauses 1 to 10.

[0188] 22. A computer program product comprising computer program instructions, and the computer program instructions enable a computer to perform the method according to any one of clauses 1 to 10.

[0189] 23. A computer program, and the computer program enables a computer to perform the method according to any one of clauses 1 to 10.

[0190] The foregoing description is provided for the purpose of illustration. This description is not exhaustive and is not limited to the precise form or implementation disclosed. Modifications and adjustments to the implementation will be apparent in light of the specification and practice of the disclosed implementation. For example, the described implementation includes hardware, but systems and methods consistent with the present disclosure may be implemented with hardware and software. In addition, although certain components have been described as being coupled to each other, these components may be integrated with each other or distributed in any suitable manner.

[0191] In addition, although illustrative embodiments have been described herein, the scope includes any and all embodiments based on the present disclosure with equivalent elements, modifications, omissions, combinations (e.g., across aspects of the various embodiments), adjustments, or variations. The elements in the claims should be interpreted broadly based on the language used in the claims, and are not limited to the examples described in this specification or during the prosecution, which should be interpreted as non-exclusive. In addition, the steps of the disclosed methods may be modified in any way, including reordering steps or inserting or deleting steps.

[0192] According to the detailed description, the features and advantages of the present disclosure are obvious, and therefore, the appended claims are intended to cover all systems and methods that fall within the true spirit and scope of the present disclosure. As used herein, the indefinite articles "a" and "an" mean "one or more". Similarly, the use of plural terms does not necessarily mean a plurality unless it is clear in a given context. In addition, since many modifications and changes will easily occur through the study of the present disclosure, it is not desired to limit the present disclosure to the exact construction and operation shown and described, and therefore, all suitable modifications and equivalents may be considered to fall within the scope of the present disclosure.

[0193] As used herein, unless expressly stated otherwise, the term "or" includes all possible combinations unless not feasible. For example, if a component is specified to include A or B, then unless specifically stated otherwise or not feasible, the component may include A, or B, or A and B. As a second example, if a component is specified to include A, B, or C, then unless specifically stated otherwise or not feasible, the component may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0194] Other embodiments will be apparent from consideration of the specification and practice of the embodiments disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosed embodiments being indicated by the following claims.

Claims

1. A method for quantum error correction, characterized in that: include: Obtaining a plurality of error syndrome cycles of the surface code; generating a decoder graph using the error syndrome; determining a first correction to eliminate a fault within a first decoder window on the decoder graph, the first decoder window having two open time boundaries; retaining a first correction on a core region of the first decoder window, the core region having a first boundary; determining a second correction that eliminates a fault within a second decoder window on the decoder graph, the second decoder window having two closing time boundaries, a first of the two closing time boundaries being the first boundary; and An indication of the retained first correction and the second correction is provided to enable correction of the surface code.

2. The method according to claim 1, characterized in that: Generating the decoder graph includes determining vertices corresponding to real detectors that are connected by a first edge when a first fault in a first data qubit of the surface code flips values ​​of both real detectors of a first pair of real detectors.

3. The method according to claim 2, characterized in that: Generating the decoder graph further includes determining vertices corresponding to imaginary detectors, the second pair including the imaginary detectors and the real detectors being connected by a second edge when a second fault in a second data qubit of the surface code flips in the real detectors only the value of the real detector in the second pair.

4. The method according to claim 1, characterized in that: The decoder pattern is a z-type decoder pattern with closed temporal boundaries and open spatial boundaries.

5. The method according to claim 1, characterized in that: retaining the first correction over the core region of the first decoder window, wherein the first decoder window generates failures on the first boundary; and The second correction eliminates the fault generated on the first boundary.

6. The method according to claim 1, characterized in that: The second decoder window is a 2D decoder graphic.

7. The method according to claim 1, characterized in that The method further comprises: determining a third correction that eliminates a fault within a third decoder window on the decoder graph, the third decoder window having two open time boundaries; retaining a third correction on a core region of the third decoder window, the core region having a third boundary; The second of the two closing time boundaries is the third boundary.

8. The method according to claim 7, characterized in that: The second of the two off-time boundaries corresponds to an earlier detector cycle than the first of the two off-time boundaries.

9. The method according to claim 1, characterized in that: Determining the first correction includes applying a Union-Find (UF) decoder or a Minimum Weight Perfect Match (MWPM) decoder to the first decoder window.

10. The method according to claim 1, characterized in that The method further comprises: Corrections for a plurality of decoding windows having open temporal boundaries are determined at least partially in parallel, the corrections including the first correction.

11. A quantum error correction system, characterized in that: include: at least one processor; and at least one computer-readable medium containing instructions that, when executed by the at least one processor, cause the system to perform operations comprising: Obtaining a plurality of error syndrome cycles of the surface code; generating a decoder graph using the error syndrome; determining a first correction to eliminate a fault within a first decoder window on the decoder graph, the first decoder window having two open time boundaries; retaining a first correction on a core region of the first decoder window, the core region having a first boundary; determining a second correction that eliminates a fault within a second decoder window on the decoder graph, the second decoder window having two closing time boundaries, a first of the two closing time boundaries being the first boundary; and An indication of the retained first correction and the second correction is provided to enable correction of the surface code.

12. The system according to claim 11, characterized in that: Generating the decoder graph includes determining vertices corresponding to real detectors that are connected by a first edge when a first fault in a first data qubit of the surface code flips values ​​of both real detectors of a first pair of real detectors.

13. The system according to claim 12, characterized in that: Generating the decoder graph further includes determining vertices corresponding to imaginary detectors, the second pair including the imaginary detectors and the real detectors being connected by a second edge when a second fault in a second data qubit of the surface code flips in the real detectors only the value of the real detector in the second pair.

14. The system according to claim 11, characterized in that: The decoder pattern is a z-type decoder pattern with closed temporal boundaries and open spatial boundaries.

15. The system according to claim 11, characterized in that: retaining the first correction over the core region of the first decoder window, wherein the first decoder window generates failures on the first boundary; and The second correction eliminates the fault generated on the first boundary.

16. The system according to claim 11, characterized in that: The second decoder window is a 2D decoder graphic.

17. The system according to claim 11, characterized in that The operations also include: determining a third correction that eliminates a fault within a third decoder window on the decoder graph, the third decoder window having two open time boundaries; retaining a third correction on a core region of the third decoder window, the core region having a third boundary; and The second of the two closing time boundaries is the third boundary.

18. The system according to claim 17, characterized in that: The second of the two off-time boundaries corresponds to an earlier detector cycle than the first of the two off-time boundaries.

19. The system according to claim 11, characterized in that: Determining the first correction includes applying a Union-Find (UF) decoder or a Minimum Weight Perfect Match (MWPM) decoder to the first decoder window.

20. The system according to claim 11, characterized in that The operations also include: Corrections for a plurality of decoding windows having open temporal boundaries are determined at least partially in parallel, the corrections including the first correction.

21. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a set of instructions executable by one or more processors of a device to cause the device to initiate a method according to any one of claims 1 to 10.

22. A computer program product, characterized in that The method comprises computer program instructions, and the computer program instructions enable a computer to perform the method according to any one of claims 1 to 10.

23. A computer program, characterized in that The computer program enables a computer to execute the method according to any one of claims 1 to 10.

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