Photoelectric co-packaging adapter plate and photoelectric co-packaging device

By setting up high-refractive index optical waveguides and aspherical lenses on the photoelectric co-packaged adapter plate, the problem of mismatch between the micro-nano optical chip and the silicon optical waveguide mode field is solved, and a smaller size and lower loss is achieved, while reducing the requirements for alignment accuracy.

CN119902326AInactive Publication Date: 2025-04-29YONGJIANG LAB
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Patent Information

Application Number
CN202411961425.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-27
Publication Date
2025-04-29
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

In the existing photoelectric co-packaging technology, the mismatch between the micro-nano optical chip mode field and the silicon optical waveguide mode field leads to losses, and the alignment accuracy requirements are high.

Method used

A photoelectric co-packaged adapter plate is designed, including a light waveguide is provided between the first and second cladding layers formed on the substrate, the refractive index of the optical waveguide is greater than the refractive index of the cladding layer, and an aspherical lens is provided on the light exit window to form an optical path.

Benefits of technology

Through the design of aspherical microlens, efficient coupling between semiconductor silicon optical chips and micro-nano optical chips is achieved, which is smaller in size compared to traditional solutions, has low theoretical losses, and reduces the alignment requirements between optical waveguides and optical devices.

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Abstract

The invention discloses a photoelectric co-packaging adapter plate and a photoelectric co-packaging device. A photoelectric co-packaging adapter plate comprises a first coating layer and a second coating layer which are formed on a substrate, and an optical waveguide arranged between the first coating layer and the second coating layer, and the refractive index of the optical waveguide is larger than the refractive index of the first coating layer and the refractive index of the second coating layer; a light emitting window is formed in the second coating layer, an aspherical lens is arranged on the light emitting window, a first reflecting part is arranged at the first end part of the optical waveguide, and the first reflecting part is used for forming a light path between the optical waveguide and the aspherical lens. According to the technical scheme provided by the invention, loss caused by mismatching of a micro-nano optical chip mode field and a silicon optical waveguide mode field is reduced, and alignment precision requirements between different modules are reduced.
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Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and in particular relates to an optoelectronic co-packaged adapter board and an optoelectronic co-packaged device. Background Art

[0002] Co-Packaged Optics (CPO) technology is a technology that directly packages optical devices (such as microlenses, lasers, detectors, etc.) around semiconductor chips. Compared with traditional discrete packaged optical devices, CPO can reduce the loss of optical signal transmission paths and increase data transmission speeds, especially in high-speed data communications and data center applications.

[0003] CPO is the development trend of semiconductor optoelectronic devices. In CPO technology, optical devices can include semiconductor silicon photonic chips and micro-nano optical chips. The coupling package between the two has always been a difficult point in the on-chip integration process. The relevant technology provides close coupling solutions and fiber coupling solutions. The above two solutions will either produce higher mode field matching losses or increase the alignment accuracy requirements. Summary of the invention

[0004] The present application provides an optoelectronic co-packaged adapter plate and an optoelectronic co-packaged device, which are intended to reduce the loss caused by the mismatch between the mode field of a micro-nano optical chip and the mode field of a silicon optical waveguide, and to reduce the alignment accuracy requirements between different modules.

[0005] An embodiment of the present application provides an optoelectronic co-packaging adapter board, comprising a first cladding layer and a second cladding layer formed on a substrate, and an optical waveguide arranged between the first cladding layer and the second cladding layer, wherein the refractive index of the optical waveguide is greater than the refractive index of the first cladding layer and the second cladding layer; a light exit window is formed on the second cladding layer, an aspheric lens is arranged on the light exit window, and a first reflecting portion is arranged at the first end portion of the optical waveguide, wherein the first reflecting portion is used to form an optical path between the optical waveguide and the aspheric lens.

[0006] In some embodiments, the first cladding layer is located on a side of the optical waveguide close to the substrate, the second cladding layer is located on a side of the optical waveguide away from the substrate, and the refractive index of the first cladding layer is greater than or equal to the refractive index of the second cladding layer.

[0007] In some embodiments, the first cladding layer and the second cladding layer are respectively made of at least one of silicon, silicon carbide, lithium niobate, silicon oxynitride, silicon oxide III-V semiconductor compounds, silicon on insulator and polymer.

[0008] In some embodiments, the aspheric lens is manufactured by processing the second cladding layer.

[0009] In some embodiments, the aspheric lens is bonded to the optical waveguide through a bonding process.

[0010] In some embodiments, the aspheric lens is a rotationally symmetric aspheric lens, or the aspheric lens is a non-rotationally symmetric aspheric lens.

[0011] In some embodiments, the rotationally symmetric aspheric lens comprises a secondary rotationally symmetric aspheric lens or a high-order rotationally symmetric aspheric lens;

[0012] The above-mentioned non-rotationally symmetric aspheric lens includes a regular non-rotationally symmetric aspheric lens or a free-form surface lens.

[0013] In some embodiments, a second reflective portion is further disposed at the second end of the optical waveguide, and the second reflective portion is used to form an optical path between the optical waveguide and an external device.

[0014] In some embodiments, the optical waveguide is a planar dielectric optical waveguide or a strip dielectric optical waveguide.

[0015] In some embodiments, a micro-nano optical chip and a silicon photonic chip are included, as well as an optoelectronic co-packaging adapter plate arranged between the micro-nano optical chip and the silicon photonic chip.

[0016] The technical solution provided by the embodiment of the present application, wherein the optoelectronic co-packaging adapter plate includes a first cladding layer and a second cladding layer formed on a substrate, and an optical waveguide arranged between the first cladding layer and the second cladding layer, the refractive index of the optical waveguide is greater than the refractive index of the first cladding layer and the second cladding layer; a light exit window is formed on the first cladding layer, an aspheric lens is arranged on the light exit window, and a first reflective portion is arranged at the first end of the optical waveguide, and the first reflective portion is used to form an optical path between the optical waveguide and the aspheric lens. This technical solution realizes the coupling of semiconductor silicon photonic chips and micro-nano optical chips by setting an optoelectronic co-packaging adapter plate with an aspheric microlens. Compared with the traditional optical fiber coupling solution and the close-fitting end face coupling solution, it has a smaller size and a lower theoretical loss, and by setting the optical waveguide and the aspheric microlens on the same packaging substrate, the alignment requirements of the optical waveguide and the optical device are reduced.

[0017] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0019] Figure 1 A schematic diagram of the structure of an optoelectronic co-packaging adapter board provided in an embodiment of the present application;

[0020] Figure 2 A schematic diagram of the structure of another optoelectronic co-packaging adapter board provided in an embodiment of the present application;

[0021] Figure 3 A diagram of the optical transmission path in an optoelectronic co-packaged adapter provided in an embodiment of the present application;

[0022] Figure 4 A schematic diagram of the structure of an optoelectronic co-packaged device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0023] The embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0024] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable under appropriate circumstances, so that the embodiments of the present application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are generally of one type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the specification and claims represents at least one of the connected objects, and the character " / " generally indicates that the objects associated with each other are in an "or" relationship.

[0025] In the description of the present application, “plurality” means two or more.

[0026] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0027] When describing some embodiments, the expression "connected" and its derivatives may be used. The term "connected" should be understood in a broad sense. For example, "connected" can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium. The term "electrically connected" indicates, for example, that two or more components are in direct physical or electrical contact, and may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other. The embodiments disclosed herein are not necessarily limited to the contents of this document.

[0028] Additionally, the use of “based on” is meant to be open and inclusive, as a process, step, calculation, or other action “based on” one or more stated conditions or values ​​may, in practice, be based on additional conditions or values ​​beyond those stated.

[0029] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0030] Exemplary embodiments are described herein with reference to cross-sectional views that are idealized exemplary drawings. In the drawings, the thickness of layers and the area of ​​regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0031] Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and cannot be understood as limiting the present application.

[0032] Optoelectronic co-packaging is the development trend of semiconductor optoelectronic devices. The coupling packaging between semiconductor silicon photonic chips and micro-nano optical chips has always been a difficult point in the on-chip integration process. There are two main traditional technical solutions: one is to couple the cross-section between semiconductor silicon photonic chips and micro-nano optical chips by a close fitting method. This method will cause loss due to the mismatch between the micro-nano optical core mode field and the silicon optical waveguide mode field. In addition, this solution requires extremely high alignment accuracy between the silicon optical waveguide and the optical device. The second is to replace part of the electrical wiring in the electrical wiring substrate with optical fiber, couple the micro-nano optical chip with the optical fiber, and use the optical fiber component to process the optical signal. This solution is large in size and is not conducive to the efficient integration of optical modules at the micro-nano scale. Therefore, how to achieve high-density information transmission in the optical waveguide, reduce the space between the substrate and the optical element, simplify the operation process and improve the positioning accuracy has become a problem to be solved in the prior art. In addition, the prior art realizes the convergence or divergence of light by setting a spherical microlens on the surface of the substrate. Spherical microlenses have the advantages of simple design and easy processing and are widely used in simple optical application scenarios. However, in applications with high requirements for high-quality imaging, wide viewing angle and lightweight, spherical aberration and other high-order aberrations in spherical microlenses become major disadvantages.

[0033] In view of the above problems existing in the related art, the embodiment of the present application provides an optoelectronic co-packaging adapter board. Figure 1 A schematic diagram of the structure of an optoelectronic co-packaging adapter board provided in an embodiment of the present application.

[0034] For details, see Figure 1 As shown, the optoelectronic co-packaging adapter board 10 provided in the embodiment of the present application may include:

[0035] A first cladding layer 103 and a second cladding layer 101 are formed on a substrate 100, and an optical waveguide 102 is arranged between the first cladding layer 103 and the second cladding layer 101. The refractive index of the optical waveguide 102 is greater than the refractive index of the first cladding layer 103 and the second cladding layer 101, so that when the light is transmitted inside the optical waveguide 102, it can be totally reflected at the interface between the first cladding layer 103 and the second cladding layer 101, thereby limiting the light to be transmitted inside the optical waveguide 102; a light exit window 107 is formed on the second cladding layer 101, an aspheric lens 106 is arranged on the light exit window 107, and a first reflecting portion 105 is arranged at the first end portion 109 of the optical waveguide 102, and the first reflecting portion 105 is used to form an optical path between the optical waveguide 102 and the aspheric lens 106.

[0036] In the embodiment of the present application, the aspheric microlens 106 refers to an optical lens designed and manufactured on a micro scale, and its surface shape is not a perfect sphere, but an optimized aspheric surface. This lens can better focus light and reduce or eliminate optical aberrations by changing the curvature of its surface, thereby achieving higher optical performance. The characteristics of the aspheric microlens 106 include:

[0037] One is the aspheric curvature, that is, the surface curvature of the aspheric lens varies radially, which means that different parts of the lens surface have different curvatures. This design can better control the propagation path of light and enable the light to be focused on a point more accurately.

[0038] The second is to reduce aberrations. Due to the aspherical design, aspherical microlenses can effectively eliminate spherical aberration and other high-order aberrations in spherical lenses, especially in the case of large viewing angles and high numerical apertures. It can greatly improve the imaging quality of the optical system.

[0039] Third, lightweight and compact design, aspheric lenses can simplify optical system design by reducing the number and volume of optical components. They can usually replace multiple spherical lenses, thereby reducing the weight and size of the system, and are particularly suitable for applications such as portable devices and optical communication systems.

[0040] Fourth, the complex surface shape of the aspheric lens has higher manufacturing requirements than the spherical lens, and can be completed through a more precise manufacturing process, such as precision molding, ion beam polishing or nanoimprinting technology, to achieve high-precision surface curvature control. In the embodiment of the present application, the aspheric lens 106 is arranged on the substrate 100 to replace the traditional spherical microlens, thereby improving the imaging quality and reducing the overall weight.

[0041] The technical solution provided by the embodiment of the present application, wherein the optoelectronic co-packaging adapter plate includes a first cladding layer 103 and a second cladding layer 101 formed on a substrate, and an optical waveguide 102 arranged between the above-mentioned first cladding layer 103 and the above-mentioned second cladding layer 101, and the refractive index of the above-mentioned optical waveguide 102 is greater than the refractive index of the above-mentioned first cladding layer 103 and the second cladding layer 101; a light exit window 107 is formed on the above-mentioned first cladding layer 103, an aspheric lens 106 is arranged on the above-mentioned light exit window 107, and a first reflecting portion 105 is arranged at the first end of the above-mentioned optical waveguide 102, and the above-mentioned first reflecting portion 105 is used to form an optical path between the above-mentioned optical waveguide 102 and the above-mentioned aspheric lens 106. The optoelectronic co-packaging adapter provided by the present technical solution couples the semiconductor silicon photonic chip and the micro-nano optical chip through the aspheric microlens arranged thereon. Compared with the traditional optical fiber coupling scheme and the close-fitting end face coupling scheme, it has a smaller size and a lower theoretical loss. In addition, by arranging the optical waveguide and the aspheric microlens on the same packaging substrate, the alignment requirements between the optical waveguide and the optical device are reduced.

[0042] In some embodiments, the first cladding layer 103 is located on the side of the optical waveguide 102 close to the substrate 100, the second cladding layer 101 is located on the side of the optical waveguide 102 away from the substrate 100, and the refractive index of the first cladding layer 103 is greater than or equal to the refractive index of the second cladding layer 101. Among them, the substrate 100 can be selected from materials with good stability and mechanical strength, such as silicon, silicon dioxide or other suitable semiconductors or insulating materials. The optical waveguide 102 is a core component for optical signal transmission, and is usually made of a material with a higher refractive index than the surrounding cladding layer to ensure that the optical signal can be transmitted in the optical waveguide 102 by total reflection, thereby reducing the loss of the optical signal. The first cladding layer 103 located on the side of the optical waveguide 102 close to the substrate 100 has the main function of providing a refractive index difference between the optical waveguide 102 and the substrate 100, thereby helping the optical signal to propagate inside the optical waveguide 102 without leaking into the substrate 100. The second cladding layer 101 located on the side of the optical waveguide 102 away from the substrate 100 also plays the role of maintaining the optical signal propagating inside the optical waveguide 102, and its interface is more likely to form total reflection with the optical waveguide 102.

[0043] In some embodiments, the first cladding layer 103 and the second cladding layer 101 are respectively made of at least one of silicon, silicon carbide, lithium niobate, silicon oxynitride, silicon oxide III-V semiconductor compounds, silicon on insulator, and polymer.

[0044] In some embodiments, Figure 2As shown, the aspheric lens 206 is made by processing the second cladding layer 201. That is, the aspheric microlens 206 is also a part of the second cladding layer 201, and there is no need to install another lens again, and there will be no position deviation caused by the installation. As a result, the light is transmitted with low loss, high quality and high efficiency. As in the above embodiment, the second cladding layer 201 is usually made of materials with excellent optical properties, such as silicon, silicon carbide, lithium niobate, silicon oxynitride, etc. These materials should have good light transmittance, stable refractive index and appropriate hardness to facilitate subsequent processing. According to the designed aspheric shape, the second cladding layer 201 is accurately processed and formed. This may involve a variety of processing technologies, such as single-point diamond turning, laser processing, precision grinding and polishing. After processing, the aspheric lens 206 needs to be subjected to necessary subsequent processing, such as cleaning, coating and testing. These processing steps can further improve the optical performance and stability of the aspheric lens 206.

[0045] In some embodiments, Figure 1 As shown, the aspheric lens 106 can also be bonded to the optical waveguide 102 through a bonding process. The bonding process is to tightly connect the aspheric lens and the optical waveguide together through physical or chemical methods. The bonding process can achieve efficient connection between the aspheric lens 106 and the optical waveguide 102, ensuring efficient transmission of optical signals inside the device while the bonding interface has good stability and reliability.

[0046] In some embodiments, the aspheric lens 106 may be of various types, for example, it may be a rotationally symmetric aspheric lens, or a non-rotationally symmetric aspheric lens. A rotationally symmetric aspheric lens refers to an aspheric lens 106 whose surface shape is rotationally symmetric about a certain central axis, that is, when the lens is rotated along the main optical axis, its surface shape will remain unchanged. Compared with non-rotationally symmetric aspheric lenses, the manufacturing process of rotationally symmetric aspheric lenses is generally simpler and more mature. A non-rotationally symmetric aspheric lens refers to an aspheric lens 106 whose surface shape is not rotationally symmetric about any central axis. The surface shape of this lens may differ in the x and y directions, and therefore has a higher degree of design freedom.

[0047] In some embodiments, the rotationally symmetric aspheric lens includes a quadratic rotationally symmetric aspheric lens or a high-order rotationally symmetric aspheric lens; the non-rotationally symmetric aspheric lens includes a regular non-rotationally symmetric aspheric lens or a free-form surface lens. Among them, the quadratic rotationally symmetric aspheric lens is a rotationally symmetric aspheric lens whose surface shape can be described by a quadratic equation; the high-order rotationally symmetric aspheric lens is a rotationally symmetric aspheric lens whose surface shape is described by a high-order equation, i.e., a higher-order equation; the regular non-rotationally symmetric aspheric lens, whose surface shape is not rotationally symmetric about any central axis, but still follows a certain rule or predictable pattern; the free-form surface lens, whose surface shape is completely irregular and does not follow any predictable pattern or rule.

[0048] In some embodiments, Figure 3 As shown, the second end 111 of the optical waveguide 102 is further provided with a second reflecting portion 110, and the second reflecting portion 110 is used to form an optical path between the optical waveguide 102 and an external device. The light L passes through the pre-coupling device to become parallel light or convergent light and enters the optical waveguide 102, and travels along the axial direction in the optical waveguide 102. The light L is reflected by the second reflecting portion 110 of the optical waveguide 102, and after passing through the light window 107 formed in the second cladding layer 101, the light L is formed into convergent light with high imaging quality and reaches the image plane 108 by the action of the aspherical microlens 106.

[0049] In some embodiments, the optical waveguide is a 102-plane dielectric optical waveguide or a strip dielectric optical waveguide. Among them, the plane dielectric optical waveguide is the simplest optical waveguide, which is made of silicon with a refractive index of n2 as a substrate, a dielectric film with a refractive index of n1 is plated on it by microelectronic technology, and then a covering layer with a refractive index of n3 is added. Usually n1>n2>n3 is taken to confine the light wave to propagate in the dielectric film. The strip dielectric optical waveguide is a long strip with a refractive index of n1 produced in a matrix with a refractive index of n2, and n1>n2 is taken to confine the light wave to propagate in the long strip. This optical waveguide is often used as a functional device such as an optical splitter, coupler, switch, etc.

[0050] The embodiment of the present invention further provides an optoelectronic co-packaged device, Figure 4 Schematic diagram of the structure of the optoelectronic co-packaged device in the embodiment of the present application. Figure 4 As shown, the optoelectronic co-packaged device includes a micro-nano optical chip 113 and a silicon photonic chip 114, and an optoelectronic co-packaged adapter plate disposed between the micro-nano optical chip 113 and the silicon photonic chip 114, wherein the optoelectronic co-packaged adapter plate adopts the optoelectronic co-packaged adapter plate in the above embodiment. The optoelectronic co-packaged device provided in the present application also has the advantages and technical effects of the optoelectronic co-packaged adapter plate in the above embodiment, which will not be repeated in this embodiment.

[0051] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that a person skilled in the art can think of within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. An optoelectronic co-packaging adapter board, characterized in that: The optical waveguide comprises a first cladding layer and a second cladding layer formed on a substrate, and an optical waveguide disposed between the first cladding layer and the second cladding layer, wherein the refractive index of the optical waveguide is greater than the refractive index of the first cladding layer and the second cladding layer; A light exit window is formed on the second cladding layer, an aspheric lens is arranged on the light exit window, and a first reflecting portion is arranged at the first end of the optical waveguide, the first reflecting portion is used to form an optical path between the optical waveguide and the aspheric lens.

2. The optoelectronic co-packaging adapter board according to claim 1, characterized in that: The first cladding layer is located on a side of the optical waveguide close to the substrate, the second cladding layer is located on a side of the optical waveguide away from the substrate, and the refractive index of the first cladding layer is greater than or equal to the refractive index of the second cladding layer.

3. The optoelectronic co-packaging adapter board according to claim 2, characterized in that: The first cladding layer and the second cladding layer are respectively made of at least one of silicon, silicon carbide, lithium niobate, silicon oxynitride, silicon oxide III-V group semiconductor compounds, silicon on insulator and polymer.

4. The optoelectronic co-packaging adapter board according to claim 1, characterized in that: The aspherical lens is manufactured by processing the second cladding layer.

5. The optoelectronic co-packaging adapter board according to claim 1, characterized in that: The aspheric lens is bonded to the optical waveguide through a bonding process.

6. The optoelectronic co-packaging adapter board according to any one of claims 1 to 5, characterized in that: The aspheric lens is a rotationally symmetric aspheric lens, or the aspheric lens is a non-rotationally symmetric aspheric lens.

7. The optoelectronic co-packaging adapter board according to claim 6, characterized in that: The rotationally symmetric aspheric lens includes a secondary rotationally symmetric aspheric lens or a high-order rotationally symmetric aspheric lens; The non-rotationally symmetric aspheric lens includes a regular non-rotationally symmetric aspheric lens or a free-form surface lens.

8. The optoelectronic co-packaging adapter board according to claim 6, characterized in that: The second end of the optical waveguide is further provided with a second reflecting portion, and the second reflecting portion is used to form an optical path between the optical waveguide and an external device.

9. The optoelectronic co-packaging adapter board according to any one of claims 1 to 5, characterized in that: The optical waveguide is a planar dielectric optical waveguide or a strip dielectric optical waveguide.

10. An optoelectronic co-package device, characterized in that: It comprises a micro-nano optical chip and a silicon photonic chip, and an optoelectronic co-packaging adapter plate arranged between the micro-nano optical chip and the silicon photonic chip, wherein the optoelectronic co-packaging adapter plate adopts the optoelectronic co-packaging adapter plate described in any one of claims 1-9.

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