Control circuit and control method for a power factor correction circuit

Abstract

The application discloses a control circuit and a control method of a power factor correction circuit, and relates to the field of power converters.The control circuit comprises a current reference signal generating circuit, a current sampling circuit, a first subtractor, a first calculation unit, a current loop and a control signal generating circuit.The current reference signal generating circuit generates a current reference signal, the current sampling circuit outputs a current sampling signal, the first subtractor generates a first error signal according to the current sampling signal and the current reference signal, the first calculation unit generates a first parameter and a second parameter according to the current reference signal, the current loop generates a current loop control signal according to the first error signal, the first parameter and the second parameter, and the control signal generating circuit generates a driving control signal according to the current loop control signal.The gradual control of the first parameter and the second parameter of the control circuit can overcome the contradiction between ITHD and input current peak oscillation, improve ITHD and avoid the problem of peak oscillation.

Description

Technical Field

[0001] This invention relates to the field of power converters such as server power supplies, and particularly to a control circuit and control method for a power factor correction circuit. Background Technology

[0002] Figure 1 A schematic diagram of a traditional bridge rectifier circuit is shown. Figure 1 As shown, the bridge rectifier circuit receives AC power at its input side and is connected to capacitor C1 at its output side. The bridge rectifier circuit consists of four diodes, D1, D2, D3, and D4. When the AC power is output to the load R1 after passing through the bridge rectifier circuit and being filtered by capacitor C1, the input current is severely distorted, meaning the input current cannot follow the changes in the input voltage. This results in poor total harmonic distortion (ITHD) and power factor (PF), causing serious pollution to the power grid. Power factor correction (PFC) circuits, which can effectively improve the power factor, have emerged. These circuits are divided into active PFC and passive PFC. Active PFC is more widely used in switching power supplies. Its control circuit generates pulse width modulation (PWM) signals through sampling signals and loop calculations to control the switching transistors, making the input current follow the changes in the input voltage, thereby achieving power factor correction.

[0003] Figure 2 A schematic diagram of a classic Boost PFC circuit is shown. Figure 2 As shown, the Boost circuit includes an inductor L2, a power switch Q21, a diode D21, an output capacitor C21, and a control circuit 20. One end of the inductor L2 is connected to the anode of the diode D21 and the first terminal of the power switch Q21. The cathode of the diode D21 is connected to one end of the output capacitor C21. The second terminal of the power switch Q21 is connected to the other end of the output capacitor C21. The other end of the inductor L2 is connected to one end of the power supply AC. The second terminal of the power switch Q21 is also connected to the other end of the power supply AC. The output capacitor C21 is connected to the load R21. The output terminal of the control circuit 20 is connected to the control terminal of the power switch Q21. The control circuit 20 includes an outer voltage loop and an inner current loop, where the outer voltage loop is a slow loop and the inner current loop is a fast loop. The outer voltage loop generates a current reference signal based on the output voltage of the PFC circuit. The inner current loop generates the control signal based on the input current of the PFC circuit and the current reference signal to control the conduction or disconnection of the power switch Q21. By controlling the charging and discharging of the inductor L2, the input current changes with the input voltage.

[0004] However, the inductance will decrease to different degrees with the magnitude of the input current. That is, the larger the input current, the smaller the inductance, and the larger the corresponding hardware open-loop gain. Figure 3The graph showing the relationship between inductance and input current is illustrated. Figure 3 As shown, when the input current is 0A, the inductance is approximately 620uH. As the input current increases, the inductance decreases accordingly, dropping to approximately 50uH when the input current increases to 30A. For inductor L2, which exhibits rapid attenuation characteristics, the gain difference between light and full load conditions increases, and the gain at the peak input voltage is much greater than the gain at the zero-crossing point of the input voltage. If constant loop parameters are still used for gain compensation, the contradiction between the total harmonic distortion (ITHD) of the input current and the peak input current is difficult to adjust, and performance requirements such as higher harmonics are also difficult to meet. Furthermore, in connection with line impedance stabilization networks (LISN) and weak grid testing, the inductive device at the input end is prone to causing a second crossover of the PFC circuit gain curve, resulting in insufficient phase margin, input current oscillation, and deterioration of ITHD, which may damage the PFC circuit, especially under heavy load.

[0005] Therefore, the industry urgently needs to develop a power factor correction control circuit and control method that can overcome the inherent contradiction between ITHD and input peak current oscillation, while meeting the performance requirements of weak power grids and high-order harmonics. Summary of the Invention

[0006] The above-mentioned problems include the difficulty in adjusting the contradiction between ITHD and input peak current, and the difficulty in meeting performance requirements such as high-order harmonics.

[0007] This invention proposes a control circuit for a power factor correction circuit, the power factor correction circuit including an inductor and a power switching transistor, and the control circuit including:

[0008] A current reference signal generation circuit is used to generate a current reference signal based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, a voltage reference signal, and a scaling factor.

[0009] A current sampling circuit is used to sample the input current of the power factor correction circuit and output a current sampling signal characterizing the input current.

[0010] A first subtractor is used to generate a first error signal based on the current sampling signal and the current reference signal;

[0011] The first calculation unit is used to generate a first parameter and a second parameter based on the current reference signal;

[0012] A current loop is used to generate a current loop control signal based on the first error signal, the first parameter, and the second parameter; and

[0013] A control signal generation circuit is used to generate a drive control signal based on the current loop control signal to control the power switch to turn on or off.

[0014] Optionally, the current reference signal generation circuit includes:

[0015] The first voltage sampling circuit is used to sample the output voltage of the power factor correction circuit and output a first voltage sampling signal characterizing the output voltage;

[0016] The second subtractor is used to generate a second error signal based on the first voltage sampling signal and the voltage reference signal;

[0017] A voltage loop is used to generate a first reference signal based on the second error signal;

[0018] The second voltage sampling signal is used to sample the input voltage of the power factor correction circuit and output the second voltage sampling signal characterizing the input voltage;

[0019] The second calculation unit is used to generate a second reference signal based on the second voltage sampling signal;

[0020] A first multiplier is used to generate a third reference signal based on the second voltage sampling signal, the second reference signal, and the scaling factor;

[0021] A second multiplier is used to generate the current reference signal based on the third reference signal and the first reference signal.

[0022] Optionally, within each power frequency cycle, the inductance of the inductor decreases as the current reference signal increases, and the inductance of the inductor increases as the current reference signal decreases, wherein the inductance of the inductor is at its minimum value when the current reference signal is at its maximum value, and the inductance of the inductor is at its maximum value when the current reference signal is at its minimum value.

[0023] Optionally, the waveform of the first parameter is consistent with the inductance waveform of the inductor; the waveform of the second parameter is consistent with the inductance waveform of the inductor.

[0024] Optionally, the first parameter is a first initial value minus the product of the current reference signal and the first attenuation factor.

[0025] Optionally, the second parameter is the second initial value minus the product of the current reference signal and the second attenuation factor.

[0026] Optionally, the phase angle of the current reference signal is the same as the phase angle of the input voltage of the power factor correction circuit.

[0027] This invention also proposes another control method for a power factor correction circuit, the power factor correction circuit including an inductor and a power switching transistor, the control method including:

[0028] A current reference signal is generated based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the scaling factor.

[0029] The power factor correction circuit samples the input current and outputs a current sampling signal characterizing the input current.

[0030] A first error signal is generated based on the current sampling signal and the current reference signal;

[0031] The first parameter and the second parameter are generated based on the current reference signal;

[0032] Generate a current loop control signal based on the first error signal, the first parameter, and the second parameter; and

[0033] A drive control signal is generated based on the current loop control signal to control the power switch to turn on or off.

[0034] Optionally, within each power frequency cycle, the inductance of the inductor decreases as the current reference signal increases, and the inductance of the inductor increases as the current reference signal decreases, wherein the inductance of the inductor is at its minimum value when the current reference signal is at its maximum value, and the inductance of the inductor is at its maximum value when the current reference signal is at its minimum value.

[0035] Optionally, the waveform of the first parameter is consistent with the inductance waveform of the inductor; the waveform of the second parameter is consistent with the inductance waveform of the inductor.

[0036] Optionally, the first parameter is a first initial value minus the product of the current reference signal and the first attenuation factor; the second parameter is a second initial value minus the product of the current reference signal and the second attenuation factor.

[0037] Optionally, a current reference signal is generated based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the scaling factor, specifically including:

[0038] The power factor correction circuit's output voltage is sampled, and a first voltage sampling signal characterizing the output voltage is output.

[0039] A second error signal is generated based on the first voltage sampling signal and the voltage reference signal;

[0040] A first reference signal is generated based on the second error signal;

[0041] The power factor correction circuit samples the input voltage and outputs a second voltage sampling signal characterizing the input voltage.

[0042] A second reference signal is generated based on the second voltage sampling signal;

[0043] A third reference signal is generated based on the second voltage sampling signal, the second reference signal, and the scaling factor;

[0044] The current reference signal is generated based on the third reference signal and the first reference signal.

[0045] The present invention can achieve the following beneficial effects:

[0046] The control circuit of this invention includes a current reference signal generation circuit, a current sampling circuit, a first subtractor, a first calculation unit, a current loop, and a control signal generation circuit. The current reference signal generation circuit generates a current reference signal based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, a voltage reference signal, and a proportional coefficient. The current sampling circuit samples the input current of the power factor correction circuit and outputs a current sampling signal characterizing the input current. The first subtractor generates a first error signal based on the current sampling signal and the current reference signal. The first calculation unit generates a first parameter and a second parameter based on the current reference signal. The current loop generates a current loop control signal based on the first error signal, the first parameter, and the second parameter. The control signal generation circuit generates a drive control signal based on the current loop control signal to control the on / off state of the power switch in the power factor correction circuit. By calculating the current reference signal in real time, the first and second parameters required for different phases are fitted, improving the current loop response performance, enhancing high-order harmonic performance, adapting to inductors with fast attenuation characteristics, and reducing production costs. By gradually controlling the first and second parameters, the contradiction between ITHD and oscillations at the peak of the input current can be overcome, thus improving ITHD while avoiding oscillations at the peak of the input current. Furthermore, it improves performance in LISN and weak grid testing, fits the required loop gain, improves the phase margin during secondary crossover, and avoids loop oscillations caused by phase loss.

[0047] The features and technical advantages of this application have been broadly outlined above to facilitate a better understanding of the following detailed description. Additional features and advantages of this application, which form the subject matter of the claims, will be described below. Those skilled in the art will understand that the disclosed concepts and specific embodiments can be readily utilized as the basis for modifying or designing other structures or processes to achieve the same purpose as this application. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of this application as set forth in the appended claims. Attached Figure Description

[0048] To gain a more comprehensive understanding of this application and its advantages, the following description is now presented in conjunction with the accompanying drawings.

[0049] In the picture:

[0050] Figure 1 A schematic diagram of a traditional bridge rectifier circuit is shown.

[0051] Figure 2 A schematic diagram of a classic Boost PFC circuit is shown.

[0052] Figure 3 The graph showing the relationship between inductance and input current is shown.

[0053] Figure 4 A schematic diagram of the control circuit of the power factor correction circuit according to an embodiment of the present invention is shown.

[0054] Figure 5 The waveforms of the inductance and current reference signal of the inductor according to an embodiment of the present invention are shown.

[0055] Figure 6 The waveforms of the first and second parameters in an embodiment of the present invention are shown.

[0056] Figure 7 A flowchart illustrating the control method of the power factor correction circuit according to an embodiment of the present invention is shown.

[0057] Unless otherwise indicated, corresponding numbers and symbols in different figures generally refer to corresponding parts. The accompanying drawings are provided to clearly illustrate relevant aspects of various embodiments and are not necessarily drawn to scale. Detailed Implementation

[0058] Various exemplary embodiments, features, and aspects of the present invention will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0059] The term "exemplary" as used herein means "serving as an example, embodiment, or illustration." Any embodiment illustrated herein as "exemplary" is not necessarily to be construed as superior to or better than other embodiments. The terms "first," "second," "third," etc. (if present) in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence.

[0060] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "coupled," "connected," and "linked" should be interpreted broadly. For example, they can refer to electrical connection or mutual communication; they can be a direct connection or an indirect connection through an intermediate medium; they can refer to the internal connection of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0061] Furthermore, to better illustrate the present invention, numerous specific details are provided in the following detailed embodiments. Those skilled in the art should understand that the present invention can be practiced without certain specific details. In some instances, methods, means, elements, and circuits well known to those skilled in the art have not been described in detail in order to highlight the spirit of the invention.

[0062] As the power range of the power factor correction circuit increases, the input current becomes larger, resulting in poor resistance to inductance degradation. For example... Figure 3 As shown, under light load, the inductance can be maintained. However, as the load increases, the inductance decays relatively quickly, and the current loop does not adjust accordingly, leading to oscillations at the peak of the input current. This invention primarily addresses the problem of inductance decaying with increasing input current, thus causing oscillations at the peak of the input current.

[0063] Figure 4 A schematic diagram of the control circuit of the power factor correction circuit according to an embodiment of the present invention is shown. Figure 4As shown, the power factor correction circuit includes an inductor L2 and a power switch Q21. The input terminal of the power factor correction circuit is connected to a power supply AC to receive the input voltage Vin, and the output terminal is connected to a load R21 to provide an output voltage Vout. The control circuit includes a current reference signal generation circuit 30, a current sampling circuit 34, a first subtractor 41, a first calculation unit 33, a current loop 35, and a control signal generation circuit 36. The current reference signal generation circuit 30 generates a current reference signal Iref based on the input voltage Vin of the power factor correction circuit, the output voltage Vout of the power factor correction circuit, a voltage reference signal Vref, and a proportionality coefficient Km. The current sampling circuit 34 samples the input current Iin of the power factor correction circuit and outputs a current sampling signal characterizing the input current. The first subtractor 41 receives the current sampling signal and the current reference signal Iref respectively and generates a first error signal based on the current sampling signal and the current reference signal Iref. The first calculation unit 33 receives the current reference signal Iref and generates a first parameter and a second parameter based on the current reference signal Iref. The current loop 35 receives the first error signal, the first parameter, and the second parameter, and generates a current loop control signal based on the first error signal, the first parameter, and the second parameter. The first parameter and the second parameter are the currently required current loop parameters, such as kp and ki. The control signal generation circuit 36 ​​receives the current loop control signal and generates a drive control signal, such as a PWM signal, based on the current loop control signal to control the power switch Q21 to turn on or off.

[0064] Furthermore, the current reference signal generation circuit 30 includes a first voltage sampling circuit 31, a second subtractor 42, a voltage loop 32, a second voltage sampling circuit 43, a second calculation unit 39, a first multiplier 37, and a second multiplier 38. The first voltage sampling circuit 31 is connected to the output terminal of the power factor correction circuit and is used to sample the output voltage Vout of the power factor correction circuit and output a first voltage sampling signal characterizing the output voltage Vout. The second subtractor 42 receives the first voltage sampling signal and the voltage reference signal Vref respectively, and generates a second error signal based on the first voltage sampling signal and the voltage reference signal Vref. The voltage loop 32 receives the second error signal and generates a first reference signal based on the second error signal. The second voltage sampling circuit 43 is connected to the input terminal of the power factor correction circuit and is used to sample the input voltage Vin of the power factor correction circuit and output a second voltage sampling signal characterizing the input voltage Vin. The second calculation unit 39 receives the second voltage sampling signal and generates a second reference signal based on the second voltage sampling signal, wherein the second reference signal may be the reciprocal of the square of the root mean square value of the input voltage Vin. The first multiplier 37 receives the second voltage sampling signal, the second reference signal, and the scaling factor Km, and generates a third reference signal based on the second voltage sampling signal, the second reference signal, and the scaling factor Km. The second multiplier 38 receives the third reference signal and the first reference signal, and generates the current reference signal Iref based on the third reference signal and the first reference signal.

[0065] In this embodiment, the first multiplier 37 and the second multiplier 38 can be replaced by a single multiplier. That is, the multiplier generates a current reference signal Iref based on the received first reference signal, second reference signal, second voltage sampling signal, and scaling factor Km.

[0066] The control circuit of this embodiment enables the power factor correction circuit to avoid oscillation at the peak of the input current when operating under heavy load or weak power grid conditions, and also effectively reduces the total harmonic distortion (ITHD) of the input current.

[0067] In this embodiment, the current reference signal Iref is calculated based on the first voltage sampling signal and the second voltage sampling signal sampled in real time. It has the same phase angle as the input voltage Vin and exhibits a sinusoidal shape within one power frequency cycle.

[0068] Figure 5 The diagram shows waveforms of the inductance and current reference signal of an inductor according to an embodiment of the present invention. Figure 5As shown, the dashed line represents the waveform of the current reference signal Iref, and the solid line represents the waveform of the inductance L. Within each power frequency cycle, the inductance L decreases as the current reference signal Iref increases, and increases as the current reference signal Iref decreases. Specifically, when the current reference signal Iref is at its maximum value, the inductance L is at its minimum value, and when the current reference signal Iref is at its minimum value, the inductance L is at its maximum value. This effectively matches the loop gain required by the inductor at different phases, improves the phase margin during secondary crossover, and avoids current loop oscillations caused by phase loss.

[0069] Based on the attenuation characteristics of the inductance, the first calculation unit 33 generates a first parameter kp and a second parameter ki according to the current reference signal Iref. The first parameter kp is the first initial value A1 minus the product of the current reference signal Iref and the first attenuation factor B1, i.e., Kp = A1 - B1 * Iref. The second parameter ki is the second initial value A2 minus the product of the current reference signal Iref and the second attenuation factor B2, i.e., Kp = A2 - B2 * Iref. The first parameter Kp and the second parameter Ki are different values. The first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, can be empirical values. By adjusting the first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, the corresponding first parameter kp and the second parameter ki can be obtained. In this embodiment, the required first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, can also be adjusted at any time according to different load specifications. By using the real-time calculated current reference signal Iref, the first and second parameters kp and ki required for different phases are fitted, improving the current loop response performance and enhancing high-order harmonic performance. Furthermore, this control circuit can be adapted to inductors with rapid attenuation characteristics, reducing production costs. In this embodiment, the first initial value A1 and the second initial value A2 can be the same or different, and the first attenuation factor B1 and the second attenuation factor B2 can also be the same or different, as long as the first parameter Kp and the second parameter Ki are different values. The values ​​of the first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, are selected according to actual requirements.

[0070] Figure 6 Waveform diagrams of the first and second parameters according to an embodiment of the present invention are shown. Figure 6As shown, the waveform of the first parameter kp is consistent with the waveform of the inductance L of the inductor; the waveform of the second parameter ki is consistent with the waveform of the inductance L of the inductor. It can be seen that when the input current reaches its peak, the first parameter kp and the second parameter ki are reduced, slowing down the loop response and ensuring that no oscillation occurs at the peak of the input current. When the input current is at its minimum, the first parameter kp and the second parameter ki are increased, speeding up the loop response and achieving good power factor correction. The first calculation unit 33 uses the current reference signal Iref to gradually control the first parameter kp and the second parameter ki, improving ITHD while avoiding oscillation at the peak of the input current Iin, and is well-suited for applications with a large power range.

[0071] In this embodiment, as Figure 4 As shown, the power factor correction circuit is illustrated using a Boost circuit as an example. This Boost circuit includes an inductor L2, a power switch Q21, a diode D21, an output capacitor C21, and a control circuit. One end of the inductor L2 is connected to the anode of the diode D21 and the first terminal of the power switch Q21. The cathode of the diode D21 is connected to one end of the output capacitor C21. The second terminal of the power switch Q21 is connected to the other end of the output capacitor C21 and one end of the power supply AC. The other end of the inductor L2 is used to connect to the other end of the power supply AC. The output terminal of the control circuit is connected to the control terminal of the power switch Q21 to control the conduction or disconnection of the power switch Q21. It should be noted that the power factor correction circuit is not limited to the Boost circuit; it can also be other topologies that include an inductor and a power switch, which will not be illustrated here.

[0072] In this embodiment, the first calculation unit 33 generates the first parameter kp and the second parameter ki based on the current reference signal Iref. The first parameter kp and the second parameter ki are gradually changed, which can fit the current loop gain required by the inductor at different phases, improve the loop response performance, improve the high-order harmonic performance, and at the same time adapt to inductors with fast attenuation characteristics, reduce costs, and avoid oscillation problems at the peak of the input current while improving ITHD.

[0073] Figure 7 A flowchart illustrating the control method of the power factor correction circuit according to an embodiment of the present invention is shown. Figure 7 As shown, the present invention provides another control method for a power factor correction circuit, the power factor correction circuit including an inductor and a power switching transistor, the control method including:

[0074] Step S71: Generate a current reference signal based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the proportional coefficient.

[0075] Specifically, such as Figure 4 As shown, the current reference signal generation circuit 30 is used to generate a current reference signal Iref based on the input voltage Vin of the power factor correction circuit, the output voltage Vout of the power factor correction circuit, the voltage reference signal Vref, and the scaling factor Km.

[0076] Step S72: Sample the input current of the power factor correction circuit and output a current sampling signal characterizing the input current.

[0077] Specifically, such as Figure 4 As shown, the current sampling circuit 34 samples the input current Iin of the power factor correction circuit and outputs a current sampling signal characterizing the input current.

[0078] Step S73: Generate a first error signal based on the current sampling signal and the current reference signal.

[0079] Specifically, such as Figure 4 As shown, the first subtractor 41 receives the current sampling signal and the current reference signal Iref respectively, and generates a first error signal based on the current sampling signal and the current reference signal Iref.

[0080] Step S74: Generate the first parameter and the second parameter based on the current reference signal.

[0081] Specifically, such as Figure 4 As shown, the first calculation unit 33 receives the current reference signal Iref and generates the first parameter kp and the second parameter ki based on the current reference signal Iref.

[0082] Step S75: Generate a current loop control signal based on the first error signal, the first parameter, and the second parameter.

[0083] Specifically, such as Figure 4 As shown, the current loop 35 receives the first error signal, the first parameter kp, and the second parameter ki, and generates a current loop control signal based on the first error signal, the first parameter, and the second parameter.

[0084] Step S76: Generate a drive control signal based on the current loop control signal to control the power switch to turn on or off.

[0085] Specifically, such as Figure 4 As shown, the control signal generation circuit 36 ​​receives the current loop control signal and generates a drive control signal, such as a PWM signal, based on the loop control signal to control the power switch to turn on or off.

[0086] The control circuit of this embodiment enables the power factor correction circuit to avoid oscillation at the peak of the input current when operating under heavy load or weak power grid conditions, and also effectively reduces the total harmonic distortion (ITHD) of the input current.

[0087] In this embodiment, the current reference signal Iref is calculated based on the first voltage sampling signal and the second voltage sampling signal sampled in real time. It has the same phase angle as the input voltage Vin and exhibits a sinusoidal shape within one power frequency cycle.

[0088] Furthermore, such as Figure 5 As shown, within each power frequency cycle, the inductance L of the inductor decreases as the current reference signal Iref increases, and the inductance L of the inductor increases as the current reference signal Iref decreases. Specifically, when the current reference signal Iref is at its maximum value, the inductance L of the inductor is at its minimum value, and when the current reference signal Iref is at its minimum value, the inductance L of the inductor is at its maximum value. This can effectively fit the loop gain required by the inductor in different phases, improve the phase margin of the secondary crossover, and avoid the problem of current loop oscillation caused by phase loss.

[0089] Furthermore, based on the attenuation characteristics of the inductance, the first calculation unit 33 generates a first parameter kp and a second parameter ki according to the current reference signal Iref. The first parameter kp is the first initial value A1 minus the product of the current reference signal Iref and the first attenuation factor B1, i.e., Kp = A1 - B1 * Iref. The second parameter ki is the second initial value A2 minus the product of the current reference signal Iref and the second attenuation factor B2, i.e., Kp = A2 - B2 * Iref. The first parameter Kp and the second parameter Ki can have different values. The first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, can be empirical values. By adjusting the first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, the corresponding kp and ki can be obtained. In this embodiment, the required first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, can also be adjusted at any time according to different load specifications. By using the real-time calculated current reference signal Iref, the first and second parameters kp and ki required for different phases are fitted, improving the current loop response performance and enhancing high-order harmonic performance. Furthermore, this control circuit can be adapted to inductors with rapid attenuation characteristics, reducing production costs. In this embodiment, the first initial value A1 and the second initial value A2 can be the same or different, and the first attenuation factor B1 and the second attenuation factor B2 can also be the same or different, as long as the first parameter Kp and the second parameter Ki are different values. The values ​​of the first initial value A1 and the second initial value A2, as well as the first attenuation factor B1 and the second attenuation factor B2, are selected according to actual requirements.

[0090] Furthermore, a current reference signal is generated based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the scaling factor, specifically including:

[0091] Step S710: Sample the output voltage of the power factor correction circuit and output a first voltage sampling signal characterizing the output voltage.

[0092] Specifically, such as Figure 4 As shown, the first voltage sampling circuit 31 is connected to the output terminal of the power factor correction circuit, and is used to sample the output voltage Vout of the power factor correction circuit and output a first voltage sampling signal characterizing the output voltage Vout.

[0093] Step S711: Generate a second error signal based on the first voltage sampling signal and the voltage reference signal.

[0094] Specifically, such as Figure 4As shown, the second subtractor 42 receives the first voltage sampling signal and the voltage reference signal Vref respectively, and generates a second error signal based on the first voltage sampling signal and the voltage reference signal Vref.

[0095] Step S712: Generate a first reference signal based on the second error signal.

[0096] Specifically, such as Figure 4 As shown, voltage loop 32 receives the second error signal and generates a first reference signal based on the second error signal.

[0097] Step S713: Sample the input voltage of the power factor correction circuit and output a second voltage sampling signal characterizing the input voltage.

[0098] Specifically, such as Figure 4 As shown, the second voltage sampling circuit 43 is connected to the input terminal of the power factor correction circuit, and is used to sample the input voltage Vin of the power factor correction circuit and output a second voltage sampling signal characterizing the input voltage Vin.

[0099] Step S714: Generate a second reference signal based on the second voltage sampling signal.

[0100] Specifically, such as Figure 4 As shown, the second calculation unit 39 receives the second voltage sampling signal and generates a second reference signal based on the second voltage sampling signal, wherein the second reference signal may be the reciprocal of the square of the root mean square value of the input voltage Vin.

[0101] Step S715: Generate a third reference signal based on the second voltage sampling signal, the second reference signal, and the scaling factor.

[0102] Specifically, such as Figure 4 As shown, the first multiplier 37 receives the second voltage sampling signal, the second reference signal, and the scaling factor Km respectively, and generates a third reference signal based on the second voltage sampling signal, the second reference signal, and the scaling factor Km.

[0103] Step S716: Generate the current reference signal based on the third reference signal and the first reference signal.

[0104] Specifically, such as Figure 4 As shown, the second multiplier 38 receives the third reference signal and the first reference signal and generates the current reference signal Iref based on the third reference signal and the first reference signal.

[0105] Furthermore, such as Figure 6As shown, the waveform of the first parameter kp is consistent with the waveform of the inductance L of the inductor; the waveform of the second parameter ki is consistent with the waveform of the inductance L of the inductor. Gradual control of the first parameter kp and the second parameter ki is achieved through the current reference signal Iref, which improves ITHD while avoiding oscillation at the peak of the input current Iin.

[0106] In this embodiment, the first calculation unit 33 generates the first parameter kp and the second parameter ki based on the current reference signal Iref. The first parameter kp and the second parameter ki are gradually changed, which can fit the current loop gain required by the inductor at different phases, improve the loop response performance, improve the high-order harmonic performance, and at the same time adapt to inductors with fast attenuation characteristics, reduce costs, and avoid oscillation problems at the peak of the input current while improving ITHD.

[0107] Although embodiments of the present application and their advantages have been described in detail, it should be understood that various changes, substitutions and alterations may be made herein without departing from the spirit and scope of the present application as defined by the appended claims.

[0108] Furthermore, the scope of this application is not limited to the specific embodiments of the processes, machines, manufactures, compositions of matter, methods, and steps described herein. Those skilled in the art will readily understand from the disclosure of this application that, according to this application, currently existing or to be developed processes, machines, manufactures, compositions of matter, methods, or steps that perform substantially the same function or achieve substantially the same results as the corresponding embodiments described herein can be utilized. Therefore, it is intended that the appended claims encompass such processes, machines, manufactures, compositions of matter, methods, or steps within their scope.

Claims

1. A control circuit of a power factor correction circuit, the power factor correction circuit comprising an inductance and a power switch, characterized in that, The control circuit includes: A current reference signal generation circuit is used to generate a current reference signal based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, a voltage reference signal, and a scaling factor. A current sampling circuit is used to sample the input current of the power factor correction circuit and output a current sampling signal characterizing the input current. A first subtractor is used to generate a first error signal based on the current sampling signal and the current reference signal; The first calculation unit is used to generate a first parameter and a second parameter based on the current reference signal; A current loop is used to generate a current loop control signal based on the first error signal, the first parameter, and the second parameter; and A control signal generation circuit is used to generate a drive control signal based on the current loop control signal to control the power switch to turn on or off. The current reference signal generation circuit includes: The first voltage sampling circuit is used to sample the output voltage of the power factor correction circuit and output a first voltage sampling signal characterizing the output voltage; The second subtractor is used to generate a second error signal based on the first voltage sampling signal and the voltage reference signal; A voltage loop is used to generate a first reference signal based on the second error signal; The second voltage sampling signal is used to sample the input voltage of the power factor correction circuit and output the second voltage sampling signal characterizing the input voltage; The second calculation unit is used to generate a second reference signal based on the second voltage sampling signal; A multiplier is used to generate the current reference signal based on the second voltage sampling signal, the second reference signal, the scaling factor, and the first reference signal; The first parameter is the first initial value minus the product of the current reference signal and the first attenuation factor; The second parameter is the second initial value minus the product of the current reference signal and the second attenuation factor.

2. The control circuit of a power factor correction circuit according to claim 1, characterized in that The multiplier includes: A first multiplier is used to generate a third reference signal based on the second voltage sampling signal, the second reference signal, and the scaling factor; A second multiplier is used to generate the current reference signal based on the third reference signal and the first reference signal.

3. The control circuit of a power factor correction circuit according to claim 1, characterized in that Within each power frequency cycle, the inductance of the inductor decreases as the current reference signal increases, and the inductance of the inductor increases as the current reference signal decreases. When the current reference signal is at its maximum value, the inductance of the inductor is at its minimum value, and when the current reference signal is at its minimum value, the inductance of the inductor is at its maximum value.

4. The control circuit of the power factor correction circuit according to claim 3, characterized in that, The waveform of the first parameter is consistent with the inductance waveform of the inductor; the waveform of the second parameter is consistent with the inductance waveform of the inductor.

5. The control circuit of a power factor correction circuit according to claim 1, characterized in that, The phase angle of the current reference signal is the same as the phase angle of the input voltage of the power factor correction circuit.

6. A control method of a power factor correction circuit including an inductor and a power switching transistor, characterized by, The control method includes: A current reference signal is generated based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the scaling factor. The power factor correction circuit samples the input current and outputs a current sampling signal characterizing the input current. A first error signal is generated based on the current sampling signal and the current reference signal; The first parameter and the second parameter are generated based on the current reference signal; Generate a current loop control signal based on the first error signal, the first parameter, and the second parameter; and A drive control signal is generated based on the current loop control signal to control the power switch to turn on or off. A current reference signal is generated based on the input voltage of the power factor correction circuit, the output voltage of the power factor correction circuit, the voltage reference signal, and the scaling factor, specifically including: The power factor correction circuit's output voltage is sampled, and a first voltage sampling signal characterizing the output voltage is output. A second error signal is generated based on the first voltage sampling signal and the voltage reference signal; A first reference signal is generated based on the second error signal; The power factor correction circuit samples the input voltage and outputs a second voltage sampling signal characterizing the input voltage. A second reference signal is generated based on the second voltage sampling signal; The current reference signal is generated based on the second voltage sampling signal, the second reference signal, the proportional coefficient, and the first reference signal; The first parameter is the first initial value minus the product of the current reference signal and the first attenuation factor; The second parameter is the second initial value minus the product of the current reference signal and the second attenuation factor.

7. The control method of the power factor correction circuit according to claim 6, characterized by, Within each power frequency cycle, the inductance of the inductor decreases as the current reference signal increases, and the inductance of the inductor increases as the current reference signal decreases. When the current reference signal is at its maximum value, the inductance of the inductor is at its minimum value, and when the current reference signal is at its minimum value, the inductance of the inductor is at its maximum value.

8. The control method of the power factor correction circuit according to claim 7, characterized by, The waveform of the first parameter is consistent with the inductance waveform of the inductor; the waveform of the second parameter is consistent with the inductance waveform of the inductor.

9. The control method of the power factor correction circuit according to claim 6, characterized by, The current reference signal is generated based on the second voltage sampling signal, the second reference signal, the scaling factor, and the first reference signal, specifically including: A third reference signal is generated based on the second voltage sampling signal, the second reference signal, and the scaling factor; The current reference signal is generated based on the third reference signal and the first reference signal.

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