Stimulation generation circuit for nerve stimulator

Abstract

The invention discloses a stimulation generation circuit for a nerve stimulator, and relates to the technical field of integrated circuits, and the circuit comprises a digital circuit which is used for generating a control signal of a stimulation waveform containing specific frequency, amplitude, pulse width, interval and number of times; the stimulation current generating circuit is used for generating stimulation current; the stimulation voltage generating circuit is used for generating stimulation voltage; the control signal is used for controlling the conduction duration and the conduction sequence of the switch A, the switch B, the switch C and the switch D, and the output stage circuit generates stimulation currents with different stimulation waveforms; the conduction duration and the conduction sequence of the signal voltage switch, the switch A, the switch B, the switch C, the switch D, the charging switch and the discharging switch are controlled, and the output stage circuit generates stimulation voltages with different stimulation waveforms. According to the invention, the conduction sequence and duration of different switches of the output stage circuit are controlled through the control signal, electrical stimulation of different modes and different waveforms can be realized, and diversified stimulation treatment is realized.

Description

Technical Field

[0001] The present invention relates to the technical field of integrated circuits, and in particular to a stimulation generating circuit for a neural stimulator. Background Art

[0002] With the advancement of integrated circuits and biomedical technology and the deepening of interdisciplinary integration, integrated spinal cord nerve stimulators have become an outstanding example of the integration of microelectronics technology and medicine. Through a highly integrated design, this stimulator achieves a reduction in size and power consumption while ensuring the therapeutic effect, thereby greatly improving the patient's comfort. It applies electrical stimulation to specific areas of the spinal cord, effectively adjusts the transmission and processing of nerve signals, and significantly reduces the patient's pain. Not only that, the role of spinal cord stimulation in the biomedical field also involves multiple key areas such as neurorehabilitation and motor function recovery. Therefore, in-depth research on spinal cord stimulation technology is of great significance to promoting the development of the biomedical field.

[0003] Spinal cord stimulation therapy mainly includes voltage stimulation and current stimulation. Voltage stimulation therapy relies on the change of voltage signal to activate nerve fibers. The advantages are simple operation and easy control, but it may be affected by the change of biological tissue impedance and requires a large energy storage capacitor. Current stimulation therapy directly acts on nerve fibers through current. The advantage is that the amount of charge generated by each stimulation can be better controlled and it is safer, but the power consumption is large and the power supply voltage requirement is also high. These two therapies have their own characteristics and need to be flexibly selected according to the specific situation of the patient in practical applications. The diversity of stimulation waveforms has also become one of the key factors in promoting the improvement of treatment effects. In addition to traditional low-frequency waveforms, high-frequency and burst signals have been introduced into spinal cord stimulation therapy. These waveforms use different frequencies and intensities from low-frequency tonic stimulation, aiming to produce stimulation therapy without abnormal sensations while improving treatment effects.

[0004] At present, the stimulation modes and waveforms of most neural stimulation circuits are relatively simple, usually only providing a single stimulation of voltage or current, and the selectivity of waveform adjustment is insufficient. In order to achieve diversified stimulation therapy, a stimulation generation circuit for a neural stimulator is proposed. Summary of the invention

[0005] Based on the defects of the above-mentioned prior art, the present invention provides a stimulation generating circuit for a neural stimulator, which solves the problem that the stimulation modes and waveforms of most existing neural stimulation circuits are relatively single, usually only providing a single stimulation of voltage or current, and the selectivity of waveform adjustment is insufficient.

[0006] The present invention adopts the following technical solutions:

[0007] The present invention provides a stimulation generating circuit for a neural stimulator, comprising:

[0008] A digital circuit for generating a control signal containing a stimulation waveform with a specific frequency, amplitude, pulse width, interval and number of times;

[0009] A stimulation current generating circuit, used for generating stimulation currents of different magnitudes;

[0010] A stimulation voltage generating circuit, used for generating a stimulation voltage of a set magnitude;

[0011] An output stage circuit comprises a voltage switch, an A switch, a B switch, a C switch, a D switch, a charging switch, a discharging switch, an energy storage capacitor and a reference resistor; one end of the voltage switch is connected to the output end of the stimulation voltage generating circuit, and the other end is connected to one end of the A switch and the B switch, the other end of the A switch is connected to human biological tissue and one end of the C switch, and the other end of the B switch is connected to human biological tissue and one end of the D switch; one end of the C switch and the D switch is connected to human biological tissue, and the other end is connected to the reference resistor; one end of the charging switch is connected to human biological tissue, the other end of the B switch and one end of the D switch, and the other end is connected to one end of the energy storage capacitor and one end of the discharging switch, and the other end of the energy storage capacitor and the discharging switch and the other end of the reference resistor are all grounded;

[0012] The stimulation current is replicated by a current mirror to obtain a current source, and the stimulation current is applied to the A switch and the B switch through the current source. The control signal is used to control the conduction time and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation currents with different stimulation waveforms; the control signal is also used to control the conduction time and conduction sequence of the voltage switch, the A switch, the B switch, the C switch, the D switch, the charging switch and the discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms.

[0013] Preferably, the stimulation voltage generating circuit includes a first charge pump circuit and a second charge pump circuit, the first charge pump circuit includes transistors M1-M4, capacitors C1 and C2, and the second charge pump circuit includes transistors M5-M8, capacitors C3 and C4; the first charge pump circuit and the second charge pump circuit have the same internal connection mode;

[0014] The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2; the source of MOS tube M3 is connected to the drain of M1 and the input VIN, the drain is connected to the gates of M1 and M2, one end of capacitor C2 and the drain of M4, and the gate is connected to the gate of M4, the sources of M1 and M2 and one end of capacitor C1; the source of MOS tube M4 is connected to the drains of M2 and M5 and the source of M7, the drain is connected to one end of capacitor C2, the drain of M3 and the gates of M1 and M2, the drain is connected to the drain of M3, the gates of M1 and M2 and one end of capacitor C2; the source of MOS tube M1 is connected to the drain of capacitor C2, the drain of M3 and the gates of M1 and M2, and the drain is connected to the drain of M3, the gates of M1 and M2 and one end of capacitor C2; the source of MOS tube M1 is connected to the gate of capacitor C2, the drain of M3 ... gate of M1 and M2, and the drain of M3 is connected to the gate of M1 and M2, and the drain of M4 is connected to the gate of M4. One end of capacitor C1 is connected to the source of M2 and the gates of M3 and M4, the gate is connected to one end of capacitor C2, the drains of M3 and M4 and the gate of M2, and the drain is connected to the source of M3 and the input VIN; the source of MOS tube M2 is connected to one end of capacitor C1, the source of M1 and the gates of M3 and M4, the gate is connected to one end of capacitor C2, the drains of M3 and M4 and the gate of M1, and the drain is connected to the sources of M4 and M7 and the drain of M5; the other end of capacitor C2 is connected to CLK, and the other end of C1 is connected to CLK_N; the drain of transistor M6 and the source of M8 are connected to VOUT.

[0015] Preferably, the stimulation current generating circuit includes a reference current generating circuit and an IDAC current steering, wherein the reference current generating circuit is used to generate a reference current, and the IDAC current steering is used to proportionally replicate the reference current with a required amplitude through a control signal to generate stimulation currents of different sizes.

[0016] Preferably, it also includes a SAD ADC, which includes a comparator, and the comparator is electrically connected to one end of the energy storage capacitor and the output end of the digital circuit; the digital circuit is also used to generate a reference voltage, and the comparator is used to compare the voltage of the energy storage capacitor with the reference voltage, and adjust the magnitude of the stimulation voltage according to the comparison result.

[0017] Preferably, the control signal is used to control the conduction duration and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation currents with different stimulation waveforms, including:

[0018] In the first step of the timing sequence, switches A, B, C, and D are all disconnected;

[0019] In the second step sequence, switches A and D are turned on, switches B and C are turned off, forming a positive stimulation current;

[0020] In the third step sequence, switches A, B, C, and D are all disconnected;

[0021] In the fourth step, the A switch and the D switch are disconnected, and the B switch and the C switch are turned on, forming a reverse stimulation current;

[0022] In the fifth step sequence, switch A and switch B are disconnected, switch C and switch D are turned on, and the electrodes on the human biological tissue are short-circuited to the ground.

[0023] Preferably, the control signal is also used to control the conduction duration and conduction sequence of the voltage switch, A switch, B switch, C switch, D switch, charging switch and discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms, including:

[0024] The voltage switch is always turned on;

[0025] In the pre-charging stage, the B switch and the charging switch are turned on, and the stimulation voltage bypasses the biological tissue to charge the energy storage capacitor to reach the specified voltage;

[0026] In the first stage, all switches are open;

[0027] In the second stage, the C switch and the charging switch are turned on, and the energy storage capacitor is stimulated by voltage discharge;

[0028] In the third stage, all switches are open;

[0029] In the fourth stage, the A switch and the charging switch are turned on, and the stimulation voltage charges the energy storage capacitor to a specified value through the biological tissue;

[0030] In the fifth stage, the C switch and the D switch are turned on, and the electrodes on the human biological tissue are short-circuited to the ground;

[0031] The discharge switch is used to discharge the energy storage capacitor when the voltage is higher than the specified value.

[0032] Preferably, it also includes a high-side gate voltage control circuit, whose input end is used to receive a control signal and whose output end is connected to a plurality of switches of the stimulation voltage generating circuit;

[0033] The high-side gate voltage control circuit includes PMOS tubes PM1, PM2 and PM3, NOMS tubes NM1, NM2 and NM3, resistors R1 and R2, diodes D1 and D2 and capacitor C;

[0034] The gate of NOMS tube NM1 is connected to the control signal CLKN, the source is connected to one end of the resistor R1, and the drain is connected to the drain and gate of PMOS tube PM1 and the gate of PM2; the gate of NOMS tube NM2 is connected to the control signal CLK, the source is connected to one end of the resistor R2, and the drain is connected to the drain of PM2 and the cathode of diode D2; the drain of NOMS tube NM3 is connected to the sources of PM1 and PM2, the source is connected to the anode of diode D1, and the gate outputs voltage V PS ;

[0035] The drain of the PMOS tube PM1 is connected to the gates of PM1 and PM2 and the drain of NM1, the source is connected to the source of PM2 and the drain of NM3, and the gate is connected to the gate of PM2; the source of the PMOS tube PM2 is connected to the drain of PM1 and the drain of NM3, the gate is connected to the gate and drain of PM1, the drain is connected to the drain of NM2 and the cathode of the diode D2; the drain of the PMOS tube PM3 is connected to one end of the capacitor C and the other end of the resistors R1 and R2, the source is connected to the cathode of the diode D2 and the other end of the capacitor C, and the gate outputs a voltage V PS ; The other ends of the resistors R1 and R2 are connected to one end of the capacitor C and the drain of PM3.

[0036] Preferably, it further comprises a level conversion circuit, wherein the level conversion circuit is used to convert the control signal into an analog domain voltage.

[0037] Compared with the prior art, at least one of the above technical solutions adopted by the present invention can achieve the following beneficial effects:

[0038] The present invention combines voltage stimulation with circuits related to current stimulation, and proposes an output stage circuit that can output stimulation voltage and stimulation current, including a voltage switch, an A switch, a B switch, a C switch, a D switch, a charging switch, a discharging switch, an energy storage capacitor and a reference resistor. It also proposes that a digital circuit can generate a control signal containing a stimulation waveform with a specific frequency, amplitude, pulse width, interval and number of times, and the control signal controls the conduction duration and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit can generate stimulation currents with different stimulation waveforms, control the conduction duration and conduction sequence of the signal voltage switch, the A switch, the B switch, the C switch, the D switch, the charging switch and the discharging switch, and the output stage circuit can generate stimulation voltages with different stimulation waveforms. The present invention can realize electrical stimulation of different modes and different waveforms, and realize diversified stimulation therapy. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0040] Figure 1 It is a structural schematic diagram of the stimulation generating circuit of the present invention;

[0041] Figure 2 is a schematic diagram of a stimulation voltage generating circuit of the present invention;

[0042] Figure 3is a schematic diagram of an output stage circuit of the present invention;

[0043] Figure 4 It is a stimulation voltage output diagram under load conditions of the present invention;

[0044] Figure 5 is a working timing diagram of the output stage circuit of the present invention;

[0045] in, Figure 5 (a): The first timing diagram, Figure 5 (b): The second timing diagram, Figure 5 (c): The third timing diagram, Figure 5 (d): The fourth timing diagram, Figure 5 (e): the fifth timing diagram;

[0046] Figure 6 is a schematic diagram of a high-side switch driving circuit of the present invention;

[0047] in, Figure 6 (a): High-side switch driving circuit, Figure 6 (b): Schematic diagram of output signal switching of the high-side switch driving circuit;

[0048] Figure 7 A system schematic diagram of an impedance measurement circuit of the present invention;

[0049] Figure 8 A schematic diagram comparing constant current stimulation and constant voltage stimulation performed by the stimulation generating circuit of the present invention;

[0050] in, Figure 8 (a): Constant current stimulation result, Figure 8 (b): Constant voltage stimulation results. DETAILED DESCRIPTION

[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] In order to solve the deficiencies of the prior art, the present invention provides a stimulation generating circuit for a neural stimulator, comprising:

[0053] The overall structure of the neural stimulator of the present invention is as follows Figure 1As shown, it is composed of six parts, namely, digital circuit (Stimulation Digital Control Unit, StiDCU)), level conversion circuit (Level Shift), stimulation voltage generating circuit, stimulation current generating circuit, output stage circuit and comparator. The control signal sent by the digital circuit is converted into an analog domain voltage by the level conversion circuit connected thereto, and then enters the subsequent stimulation current generating circuit, output stage circuit and comparator for control. After the stimulation generating circuit of the present invention receives the stimulation command from the control unit MCU from the outside world, the stimulation of StiDCU starts, the START control signal is set to 1, and the stimulation generating circuit starts to generate a stimulation waveform and a reference voltage of a specific frequency, amplitude, pulse width, interval and number of times according to the pre-programmed result of StiDCU, and the waveform is converted into a current or voltage stimulation by controlling the switch of the output stage circuit and then reaches the target organism to ensure the current neutralization in the organism. The stimulation circuit automatically enters the standby state after the stimulation waveform is set, and can also be terminated in advance through the STOP signal line to ensure the safety of the stimulation when performing long-term long-range electrical stimulation.

[0054] In this embodiment, the digital circuit achieves precise control of the stimulation current and stimulation voltage through on-chip digital control logic.

[0055] The stimulation current generation circuit consists of a reference current generation circuit and an IDAC current rudder. The reference current generation circuit is used to generate a reference current. The IDAC current rudder replicates the reference current in proportion to the required amplitude before reaching the output stage, thereby saving the power consumption of the module. The reference current is applied to the biological tissue through the output stage circuit for stimulation therapy. Voltage stimulation is also implemented in the output stage circuit, but capacitor discharge stimulation is used, and the switch control method is different from current stimulation.

[0056] In this embodiment, the reference current generating circuit generates the reference current for constant current stimulation through the bias reference. The IDAC current steering realizes the adjustable constant current stimulation amplitude through an 8-bit current digital-to-analog conversion control circuit.

[0057] The stimulation voltage generation circuit generates 3 times the reference voltage by a two-stage cross-coupled charge pump, thereby ensuring the voltage margin under high bioimpedance stimulation. The stimulation circuit can be easily expanded into multiple channels, increasing the flexibility of the stimulator for multi-point stimulation. The high-voltage generation circuit structure of the present invention is as follows Figure 2 As shown, it includes a first charge pump circuit and a second charge pump circuit. The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2, and the second charge pump circuit includes transistors M5-M8, capacitors C3 and C4. The first charge pump circuit and the second charge pump circuit have the same internal connection mode.

[0058] The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2. The source of MOS tube M3 is connected to the drain of M1 and the input VIN, the drain is connected to the gates of M1 and M2, one end of capacitor C2 and the drain of M4, and the gate is connected to the gate of M4, the sources of M1 and M2 and one end of capacitor C1. The source of MOS tube M4 is connected to the drains of M2 and M5 and the source of M7, the drain is connected to one end of capacitor C2, the drain of M3 and the gates of M1 and M2, the drain is connected to the drain of M3, the gates of M1 and M2 and one end of capacitor C2. The source of MOS tube M1 is connected to one end of capacitor C1, the source of M2 and the gates of M3 and M4, the gate is connected to one end of capacitor C2, the drains of M3 and M4 and the gate of M2, and the drain is connected to the source of M3 and the input VIN. The source of MOS tube M2 is connected to one end of capacitor C1, the source of M1, and the gates of M3 and M4. The gate is connected to one end of capacitor C2, the drains of M3 and M4, and the gate of M1. The drain is connected to the sources of M4 and M7, and the drain of M5. The other end of capacitor C2 is connected to CLK, and the other end of C1 is connected to CLK_N. The drain of transistor M6 and the source of M8 are connected to VOUT.

[0059] In order to ensure the driving and load capacity of the stimulation circuit, the output voltage needs to be raised to 15V with the help of a two-stage charge pump. The charge pump adopts a cross-coupling structure, and performs two-phase alternating charging and energy supply under the condition of gate voltage bootstrapping to reduce the on-resistance of the transistor to ensure the stimulation ability and load capacity of the output stage. The two sides of the circuit branch alternately charge the output capacitor C, and the output capacitor also alternately supplies power to the load. The advantage of this is that the output voltage will not drop significantly while the output capacitor continues to supply power to the load, and the output voltage ripple is small. MOS transistors are used in the circuit instead of diodes as switches to reduce the on-state voltage drop and reduce the loss in the voltage output process. The circuit uses two-phase non-overlapping clock signals for control to reduce the loss caused by the clock alternation time and improve the conversion efficiency of the charge pump system.

[0060] The stimulator output stage circuit of the present invention is as follows Figure 3As shown, it is an H-bridge switch array, and the power LDMOS tube with high voltage and high current resistance realizes the forward and reverse current generation. Specifically, it includes a voltage switch (STI-V), an A switch, a B switch, a C switch, a D switch, a charging switch, a discharge switch, an energy storage capacitor and a reference resistor. The current source is obtained by copying the stimulation current through a current mirror, and the current source needs to be driven by the stimulation voltage during use. One end of the voltage switch is connected to the output end of the stimulation voltage generation circuit, and the other end of the voltage switch is connected to one end of the A switch and the B switch. The other end of the A switch is connected to human biological tissue and one end of the C switch, and the other end of the B switch is connected to human biological tissue and one end of the D switch. One end of the C switch and the D switch is connected to human biological tissue, and the other end is connected to the reference resistor. One end of the charging switch is connected to human biological tissue, the other end of the B switch and one end of the D switch, and the other end is connected to one end of the energy storage capacitor and one end of the discharge switch. The other end of the energy storage capacitor and the discharge switch and the other end of the reference resistor are all grounded.

[0061] In this embodiment, the H-bridge is provided with a current mirror, and its input is the generated stimulation current, which is copied and used as a current source. In order to enable the output circuit to realize the capabilities of voltage stimulation and current stimulation and ensure zero charge accumulation during the stimulation process, the present invention combines the H-bridge circuit commonly used for current stimulation output with the switching circuit for voltage stimulation. In the application of current stimulation, the output stage only uses part of the H-bridge output circuit, which is controlled by the four switches A, B, C, and D, while the other switches remain in the disconnected state. Alternating current stimulation is performed by switches controlled by digital circuits. In the application of voltage stimulation, the voltage switch is always turned on, and the six switches A, B, C, D, Charge, and Discharge are used to control the stimulation.

[0062] Under load conditions, current stimulation is performed, and the high voltage output of the power supply generated by the charge pump is as follows Figure 4 As shown. At this time, the charge pump output voltage amplitude is 14.3V, which is still within the error range. There is a certain ripple in the output node voltage, which is caused by the switching of the charge pump switch and does not affect the output of the stimulation voltage and stimulation current.

[0063] The overall stimulation behavior is controlled by a digital logic circuit. The control method of the digital circuit is to change the output value of the IDAC current rudder, the on-time of the stimulation switch, and the on-order in a lookup table to achieve regulation of the stimulation amplitude, stimulation cycle, and stimulation quantity. The specific controllable quantities of the example are shown in Table 1.

[0064] Table 1

[0065]

[0066] The stimulation operation timing diagram of the output stage circuit of the present invention is as follows: Figure 5As shown, electrical stimulation of the organism is completed after five steps. In the first step, all switches are disconnected. In the second step, the upper left and lower right switches are turned on to form a forward stimulation current. In the third step, the upper left and lower right switches are disconnected again. In the fourth step, the upper right and lower left switches are turned on to form a reverse stimulation current from electrode B to electrode A. In the fifth step, the lower left and lower right switches are turned on, and electrode a and electrode b are short-circuited to the ground.

[0067] In the voltage stimulation mode, voltage stimulation is divided into five stages and a pre-charge stage similar to current stimulation. In the pre-charge stage, switch B, Charge is turned on, and the power supply bypasses the biological tissue and directly charges the energy storage capacitor to reach the specified voltage. In voltage stimulation, the first and third stages are idle and the switches are disconnected; in the second stage, switch C, Charge is turned on, and the energy storage capacitor undergoes voltage discharge stimulation; in the fourth stage, switch A, Charge is turned on, and the power supply charges the energy storage capacitor to the specified value through the biological tissue, and in the fifth stage, switches C, D are turned on, and the electrodes are short-circuited to the ground. The Discharge switch is used to discharge the energy storage capacitor voltage after it is higher than the specified value.

[0068] The present invention also provides a high-side switch driving circuit, which controls the high-voltage side power switch through a source following method to prevent gate-source breakdown. Figure 6 As shown, it includes PMOS tubes PM1, PM2 and PM3, NOMS tubes NM1, NM2 and NM3, resistors R1 and R2, diodes D1 and D2 and capacitor C. The gate of NOMS tube NM1 is connected to the control signal CLKN, the source is connected to one end of the resistor R1, and the drain is connected to the drain and gate of the PMOS tube PM1 and the gate of PM2. The gate of NOMS tube NM2 is connected to the control signal CLK, the source is connected to one end of the resistor R2, and the drain is connected to the drain of PM2 and the cathode of the diode D2. The drain of NOMS tube NM3 is connected to the sources of PM1 and PM2, the source is connected to the anode of the diode D1, and the gate output voltage V PS The drain of PMOS tube PM1 is connected to the gates of PM1 and PM2 and the drain of NM1, the source is connected to the source of PM2 and the drain of NM3, and the gate is connected to the gate of PM2. The source of PMOS tube PM2 is connected to the drain of PM1 and the drain of NM3, the gate is connected to the gate and drain of PM1, and the drain is connected to the drain of NM2 and the cathode of diode D2. The drain of PMOS tube PM3 is connected to one end of capacitor C and the other end of resistors R1 and R2, the source is connected to the cathode of diode D2 and the other end of capacitor C, and the gate outputs voltage V PS The other ends of the resistors R1 and R2 are connected to one end of the capacitor C and the drain of PM3.

[0069] The main structure of the high-side switch drive circuit is a switch control circuit composed of PM1, PM2, PM3, NM1, NM2, and NM3. The gate end of NM1 is connected to the control signal CLKN, the gate end of NM2 is connected to the control signal CLK, the gate ends of PM1 and PM2 are connected as current mirrors, PM1 is a current source tube, and the gate ends of PM3 and NM3 are connected to the high-side input terminal VPS of the H bridge. When CLKN is high, PM1, PM2, and PM3 are turned on, NM3 and NM2 are turned off, and the current flows along the green CON_P HIGH line, and the output node voltage V CONP V PS +V GSP3 , at this time, the signal controls the high side to shut down; when CLK is high, PM1, PM2, PM3, and NM1 are turned off, NM2 and NM3 are turned on, and the current flows along the red CON_PLOW line. The output node voltage VCONP is V PS -V GSN3 -V D1 -V D2 , at this time the signal controls the high side to open. V CONP The capacitor C connected to the end accumulates charge during the signal control high side off period, and discharges charge during the signal control high side on period. The charging and discharging rate is changed by changing the resistance values ​​of the two resistors R1 and R2. In the example, R2 is 5 times the resistance value of R1. The rising and falling speeds of the switch control signal are shown in the figure. In order to prevent the upper and lower switches on one side of the H bridge from being turned on at the same time, the source ground is short-circuited.

[0070] The present invention also includes a comparator, which is electrically connected to one end of the energy storage capacitor and the output end of the digital circuit, and is used to compare the voltage of the energy storage capacitor with the reference voltage, and adjust the magnitude of the stimulation voltage according to the comparison result.

[0071] Furthermore, the present invention also provides an impedance measurement circuit (SAR ADC). After the impedance measurement circuit is connected to the output stage circuit, the impedance value of the biological tissue is calculated by quantizing the collected biological voltage signal and combining it with the input stimulation signal.

[0072] The impedance measurement circuit structure diagram of the present invention is as follows: Figure 7As shown, the input and output stage circuits are connected to sample the voltage across the stimulated biological tissue. There is a reference resistor below the output stage circuit, and the voltage of the reference resistor must also be measured, and the measurement order is internally controlled. The output is connected to the digital end for processing, and then the impedance of the organism is calculated. The SAR ADC in the present invention is different from the traditional continuous sampling and continuous output working mode, and adopts a single measurement and single conversion working mode. That is, when no measurement is performed, the SAR ADC always samples the input signal, and the default sampling point is set to the common mode voltage Vcm equal to 0.9V. When it is necessary to measure the electrodes of the stimulation circuit, the sampling point is switched to the high point or low point of the H bridge in advance according to the stimulation logic and continues to sample. When the SAR ADC receives the measurement enable signal, the sampling is terminated and an A / D conversion is performed. The 10-bit digital result of the conversion is latched into the register and the ADC is reset. After the reset is completed, there is no dynamic loss.

[0073] The SAR ADC includes a measurement gating circuit, a capacitor array, a comparator, and a SAR control logic circuit. Figure 7 The three parts are sampling control, SAR core and register. The gating circuit is sampling control, which controls which part of the voltage is sampled. The capacitor array, comparator, and SAR control logic circuit belong to the SAR core, which is the actual functional module of ADC. The SAR core is a traditional structure ADC. The register is used to store the sampling results. The SAR ADC will be reused for the measurement of multiple biological electrode impedances. The control signal CH_SEL selects stimulation channel 1 or stimulation channel 2, and then the SEL_VR signal generated by the digital circuit selects the positive electrode or negative electrode in the channel to complete the selection of the stimulation electrode. The SARADC operates in the 1.8V voltage domain, while the stimulation circuit operates in the 15V voltage domain. After completing the channel selection, it needs to pass through the voltage attenuation circuit for voltage domain conversion. The SAR ADC is quantized only when there is a quantization instruction, and is normally in a dormant and closed state to adapt to the sparse impedance measurement commands.

[0074] Figure 8 The output results of constant current stimulation and constant voltage stimulation were compared. Figure 8 (a) shows the output result of constant current stimulation. Figure 8 (b) shows the output result of constant voltage stimulation. Compared with the latter, the former is less dependent on the load, the output current is basically unchanged, the output is more stable and safe, and it is easy to accurately control the stimulation intensity; the latter is more dependent on the load, and will change with the change of load and stimulation time. The intensity stability is lower, and it is suitable for strong stimulation with lower precision requirements.

[0075] In summary, the neural stimulation circuit proposed in the present invention provides both constant current and constant voltage stimulation modes at the same time, with a wide stimulation range, precise and diverse stimulation waveforms, which solves the risk of stimulation dead zones, and can measure the stimulation electrode impedance to optimize and adjust the stimulation scheme. Compared with traditional instruments used for spinal cord stimulation, this invention highlights the design concepts of miniaturization, intelligence, low power consumption, greater safety, and closed-loop feedback control.

[0076] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the present invention.

[0077] Obviously, those skilled in the art may make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A stimulation generating circuit for a neural stimulator, characterized in that: include: A digital circuit for generating a control signal containing a stimulation waveform with a specific frequency, amplitude, pulse width, interval and number of times; A stimulation current generating circuit, used for generating stimulation currents of different magnitudes; A stimulation voltage generating circuit, used for generating a stimulation voltage of a set magnitude; An output stage circuit comprises a voltage switch, an A switch, a B switch, a C switch, a D switch, a charging switch, a discharging switch, an energy storage capacitor and a reference resistor; one end of the voltage switch is connected to the output end of the stimulation voltage generating circuit, and the other end is connected to one end of the A switch and the B switch, the other end of the A switch is connected to human biological tissue and one end of the C switch, and the other end of the B switch is connected to human biological tissue and one end of the D switch; one end of the C switch and the D switch is connected to human biological tissue, and the other end is connected to the reference resistor; one end of the charging switch is connected to human biological tissue, the other end of the B switch and one end of the D switch, and the other end is connected to one end of the energy storage capacitor and one end of the discharging switch, and the other end of the energy storage capacitor and the discharging switch and the other end of the reference resistor are all grounded; The stimulation current is replicated by a current mirror to obtain a current source, and the stimulation current is applied to the A switch and the B switch through the current source. The control signal is used to control the conduction time and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation currents with different stimulation waveforms; the control signal is also used to control the conduction time and conduction sequence of the voltage switch, the A switch, the B switch, the C switch, the D switch, the charging switch and the discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms.

2. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: The stimulation voltage generating circuit includes a first charge pump circuit and a second charge pump circuit, the first charge pump circuit includes transistors M1-M4, capacitors C1 and C2, and the second charge pump circuit includes transistors M5-M8, capacitors C3 and C4; the first charge pump circuit and the second charge pump circuit have the same internal connection mode; The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2; the source of MOS tube M3 is connected to the drain of M1 and the input VIN, the drain is connected to the gates of M1 and M2, one end of capacitor C2 and the drain of M4, and the gate is connected to the gate of M4, the sources of M1 and M2 and one end of capacitor C1; the source of MOS tube M4 is connected to the drains of M2 and M5 and the source of M7, the drain is connected to one end of capacitor C2, the drain of M3 and the gates of M1 and M2, the drain is connected to the drain of M3, the gates of M1 and M2 and one end of capacitor C2; the source of MOS tube M1 is connected to the drain of capacitor C2, the drain of M3 and the gates of M1 and M2, and the drain is connected to the drain of M3, the gates of M1 and M2 and one end of capacitor C2; the source of MOS tube M1 is connected to the gate of capacitor C2, the drain of M3 ... gate of M1 and M2, and the drain of M3 is connected to the gate of M1 and M2, and the drain of M4 is connected to the gate of M4. One end of capacitor C1 is connected to the source of M2 and the gates of M3 and M4, the gate is connected to one end of capacitor C2, the drains of M3 and M4 and the gate of M2, and the drain is connected to the source of M3 and the input VIN; the source of MOS tube M2 is connected to one end of capacitor C1, the source of M1 and the gates of M3 and M4, the gate is connected to one end of capacitor C2, the drains of M3 and M4 and the gate of M1, and the drain is connected to the sources of M4 and M7 and the drain of M5; the other end of capacitor C2 is connected to CLK, and the other end of C1 is connected to CLK_N; the drain of transistor M6 and the source of M8 are connected to VOUT.

3. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: The stimulation current generating circuit includes a reference current generating circuit and an IDAC current steering circuit. The reference current generating circuit is used to generate a reference current. The IDAC current steering circuit is used to proportionally replicate the reference current with a required amplitude through a control signal to generate stimulation currents of different sizes.

4. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: It also includes a SAD ADC, which includes a comparator, which is electrically connected to one end of the energy storage capacitor and the output end of the digital circuit; the digital circuit is also used to generate a reference voltage, and the comparator is used to compare the voltage of the energy storage capacitor with the reference voltage, and adjust the size of the stimulation voltage according to the comparison result.

5. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: The control signal is used to control the conduction duration and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation currents with different stimulation waveforms, including: In the first step of the timing sequence, switches A, B, C, and D are all disconnected; In the second step sequence, switches A and D are turned on, switches B and C are turned off, forming a positive stimulation current; In the third step sequence, switches A, B, C, and D are all disconnected; In the fourth step, the A switch and the D switch are disconnected, and the B switch and the C switch are turned on, forming a reverse stimulation current; In the fifth step sequence, switch A and switch B are disconnected, switch C and switch D are turned on, and the electrodes on the human biological tissue are short-circuited to the ground.

6. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: The control signal is also used to control the conduction time and conduction sequence of the voltage switch, A switch, B switch, C switch, D switch, charging switch and discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms, including: The voltage switch is always turned on; In the pre-charging stage, the B switch and the charging switch are turned on, and the stimulation voltage bypasses the biological tissue to charge the energy storage capacitor to reach the specified voltage; In the first stage, all switches are open; In the second stage, the C switch and the charging switch are turned on, and the energy storage capacitor is stimulated by voltage discharge; In the third stage, all switches are open; In the fourth stage, the A switch and the charging switch are turned on, and the stimulation voltage charges the energy storage capacitor to a specified value through the biological tissue; In the fifth stage, the C switch and the D switch are turned on, and the electrodes on the human biological tissue are short-circuited to the ground; The discharge switch is used to discharge the energy storage capacitor when the voltage is higher than the specified value.

7. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: Also included is a high-side gate voltage control circuit, whose input end is used to receive a control signal and whose output end is connected to a plurality of switches of the stimulus voltage generating circuit; The high-side gate voltage control circuit includes PMOS tubes PM1, PM2 and PM3, NOMS tubes NM1, NM2 and NM3, resistors R1 and R2, diodes D1 and D2 and capacitor C; The gate of NOMS tube NM1 is connected to the control signal CLKN, the source is connected to one end of the resistor R1, and the drain is connected to the drain and gate of PMOS tube PM1 and the gate of PM2; the gate of NOMS tube NM2 is connected to the control signal CLK, the source is connected to one end of the resistor R2, and the drain is connected to the drain of PM2 and the cathode of diode D2; the drain of NOMS tube NM3 is connected to the sources of PM1 and PM2, the source is connected to the anode of diode D1, and the gate outputs voltage V PS ; The drain of the PMOS tube PM1 is connected to the gates of PM1 and PM2 and the drain of NM1, the source is connected to the source of PM2 and the drain of NM3, and the gate is connected to the gate of PM2; the source of the PMOS tube PM2 is connected to the drain of PM1 and the drain of NM3, the gate is connected to the gate and drain of PM1, the drain is connected to the drain of NM2 and the cathode of the diode D2; the drain of the PMOS tube PM3 is connected to one end of the capacitor C and the other end of the resistors R1 and R2, the source is connected to the cathode of the diode D2 and the other end of the capacitor C, and the gate outputs a voltage V PS ; The other ends of the resistors R1 and R2 are connected to one end of the capacitor C and the drain of PM3.

8. A stimulation generating circuit for a neural stimulator as claimed in claim 1, characterized in that: A level conversion circuit is also included, and the level conversion circuit is used to convert the control signal into an analog domain voltage.

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