A stimulation generation circuit for a neurostimulator

Abstract

This invention discloses a stimulation generation circuit for a neurostimulator, relating to the field of integrated circuit technology. It includes: a digital circuit for generating control signals of stimulation waveforms containing specific frequencies, amplitudes, pulse widths, intervals, and frequencies; a stimulation current generation circuit for generating stimulation currents; a stimulation voltage generation circuit for generating stimulation voltages; and an output stage circuit where control signals control the conduction duration and sequence of switches A, B, C, and D, generating stimulation currents with different stimulation waveforms; and control signals also control the conduction duration and sequence of voltage switches A, B, C, D, a charging switch, and a discharging switch, generating stimulation voltages with different stimulation waveforms. This invention, by controlling the conduction sequence and duration of different switches in the output stage circuit through control signals, can achieve electrical stimulation of different modes and waveforms, enabling diversified stimulation therapy.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a stimulation generation circuit for a neurostimulator. Background Technology

[0002] With advancements in integrated circuits and biomedical technologies, and the deepening integration of disciplines, integrated spinal cord stimulators have become an outstanding example of the fusion of microelectronics and medicine. Through highly integrated design, these stimulators achieve both reduced size and lower power consumption while ensuring therapeutic efficacy, thus significantly improving patient comfort. By applying electrical stimulation to specific areas of the spinal cord, they effectively modulate the transmission and processing of nerve signals, significantly alleviating patient pain. Furthermore, spinal cord stimulation plays a crucial role in several key areas of biomedicine, including neurorehabilitation and motor function recovery. Therefore, in-depth research into spinal cord stimulation technology is of paramount importance for advancing the biomedical field.

[0003] Spinal cord stimulation therapy mainly includes two types: voltage stimulation and current stimulation. Voltage stimulation therapy relies on changes in voltage signals to activate nerve fibers. Its advantages are simplicity and ease of control, but it may be affected by changes in biological tissue impedance and requires a large energy storage capacitor. Current stimulation therapy, on the other hand, acts directly on nerve fibers with current. Its advantages include better control over the amount of charge generated with each stimulation and greater safety, but it consumes more power and requires a higher power supply voltage. These two therapies each have their own characteristics, and the choice should be made flexibly according to the patient's specific condition in practical applications. The diversity of stimulation waveforms has also become one of the key factors driving improved treatment efficacy. In addition to traditional low-frequency waveforms, high-frequency and burst signals have been introduced into spinal cord stimulation therapy. These waveforms use different frequencies and intensities than low-frequency tetanic stimulation, aiming to produce stimulation therapy without abnormal sensations while improving treatment efficacy.

[0004] Currently, most neurostimulation circuits have relatively simple stimulation modes and waveforms, typically providing only voltage or current stimulation, and lack sufficient selectivity in waveform modulation. To achieve diversified stimulation therapy, a stimulation generation circuit for neurostimulators has been proposed. Summary of the Invention

[0005] Based on the deficiencies of the existing technology, the present invention provides a stimulation generation circuit for a neurostimulator, which solves the problems that most existing neurostimulation circuits have relatively simple stimulation modes and waveforms, usually only able to provide single stimulation of voltage or current, and have insufficient selectivity in waveform adjustment.

[0006] The present invention adopts the following technical solution:

[0007] This invention provides a stimulation generation circuit for a neurostimulator, comprising:

[0008] Digital circuits are used to generate control signals that contain stimulus waveforms with specific frequencies, amplitudes, pulse widths, intervals, and frequencies.

[0009] Stimulation current generating circuit, used to generate stimulation currents of different magnitudes;

[0010] Stimulation voltage generating circuit, used to generate a stimulation voltage of a set magnitude;

[0011] The output stage circuit includes a voltage switch, switch A, switch B, switch C, switch D, a charging switch, a discharging switch, an energy storage capacitor, and a reference resistor. One end of the voltage switch is connected to the output terminal of the stimulation voltage generating circuit, and the other end is connected to one end of switch A and switch B. The other end of switch A is connected to the human biological tissue and one end of switch C. The other end of switch B is connected to the human biological tissue and one end of switch D. One end of switches C and D is connected to the human biological tissue, and the other end is connected to the reference resistor. One end of the charging switch is connected to the human biological tissue, the other end of switch B, and one end of switch D. The other end is connected to one end of the energy storage capacitor and one end of the discharging switch. The other end of the energy storage capacitor, the other end of the discharging switch, and the other end of the reference resistor are all grounded.

[0012] A current source is obtained by replicating the stimulation current through a current mirror. The stimulation current is applied to switches A and B through the current source. The control signal is used to control the conduction duration and conduction sequence of switches A, B, C, and D. The output stage circuit generates stimulation currents with different stimulation waveforms. The control signal is also used to control the conduction duration and conduction sequence of voltage switches, switches A, B, C, D, charging switches, and discharging switches. The output stage circuit generates stimulation voltages with different stimulation waveforms.

[0013] Preferably, the stimulation voltage generating circuit includes a first charge pump circuit and a second charge pump circuit. The first charge pump circuit includes transistors M1-M4, capacitor C1 and capacitor C2, and the second charge pump circuit includes transistors M5-M8, capacitor C3 and capacitor C4. The internal connection methods of the first charge pump circuit and the second charge pump circuit are the same.

[0014] The first charge pump circuit includes transistors M1-M4, capacitor C1, and capacitor C2; the source of MOSFET M3 is connected to the drain of M1 and the input VIN, and its drain is connected to the gates of M1 and M2, one end of capacitor C2, and the drain of M4; its gate is connected to the gate of M4, the source of M1 and M2, and one end of capacitor C1; the source of MOSFET M4 is connected to the drains of M2 and M5 and the source of M7; its drain is connected to one end of capacitor C2, the drain of M3, and the gates of M1 and M2; its drain is connected to the drain of M3, the gates of M1 and M2, and one end of capacitor C2; the source of MOSFET M1 is connected to the input VIN; the source of MOSFET M1 is connected to the source of M1; the source of MOSFET M4 is connected to the source of M1; the source of MOSFET M4 is connected to the source of M1; the source of MOSFET M5 is connected to the source of M1; the source of MOSFET M4 ... One end of capacitor C1 is connected to the source of M2 and the gates of M3 and M4. The gate of M2 is connected to one end of capacitor C2, the drain of M3 and M4, and the gate of M2. The drain of M2 is connected to the source of M3 and the input VIN. The source of MOSFET M2 is connected to one end of capacitor C1, the source of M1, and the gates of M3 and M4. The gate of M2 is connected to one end of capacitor C2, the drain of M3 and M4, and the gate of M1. The drain of M2 is connected to the source of M4 and M7 and the drain of M5. The other end of capacitor C2 is connected to CLK, and the other end of C1 is connected to CLK_N. The drain of transistor M6 and the source of M8 are connected to VOUT.

[0015] Preferably, the stimulation current generating circuit includes a reference current generating circuit and an IDAC current rudder. The reference current generating circuit is used to generate a reference current, and the IDAC current rudder is used to proportionally replicate the reference current with a required amplitude through a control signal to generate stimulation currents of different magnitudes.

[0016] Preferably, it also includes a SAD ADC, wherein the SAD ADC includes a comparator electrically connected to one end of the energy storage capacitor and the output of the digital circuit; the digital circuit is also used to generate a reference voltage, and the comparator is used to compare the voltage of the energy storage capacitor with the reference voltage, and adjust the magnitude of the stimulation voltage according to the comparison result.

[0017] Preferably, the control signal is used to control the conduction duration and conduction sequence of switches A, B, C, and D, and the output stage circuit generates stimulation currents with different stimulation waveforms, including:

[0018] In the first step of the sequence, switches A, B, C, and D are all open;

[0019] In the second step of the sequence, switches A and D are turned on, while switches B and C are turned off, forming a positive stimulation current.

[0020] In the third step of the sequence, switches A, B, C, and D are all turned off;

[0021] In the fourth step, switches A and D are disconnected, while switches B and C are turned on, forming a reverse stimulation current.

[0022] In the fifth step of the sequence, switches A and B are disconnected, while switches C and D are connected, causing the electrodes on the human biological tissue to short-circuit to ground.

[0023] Preferably, the control signal is also used to control the conduction duration and conduction sequence of the voltage switch, switch A, switch B, switch C, switch D, charging switch, and discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms, including:

[0024] The voltage switch is always on;

[0025] During the pre-charging phase, switch B and the charging switch are turned on, and the stimulation voltage bypasses the biological tissue to charge the energy storage capacitor to reach the specified voltage.

[0026] In the first phase, all switches are off;

[0027] In the second stage, switch C and charging switch are turned on, and the energy storage capacitor is stimulated by voltage discharge.

[0028] In the third stage, all switches are turned off;

[0029] In the fourth stage, switch A and the charging switch are turned on, and the stimulation voltage charges the energy storage capacitor to a specified value through the biological tissue.

[0030] In the fifth stage, switches C and D are turned on, and the electrodes on the human biological tissue are short-circuited to ground.

[0031] The discharge switch is used to release energy when the voltage of the energy storage capacitor exceeds a specified value.

[0032] Preferably, it also includes a high-side gate voltage control circuit, whose input is used to receive control signals and whose output is connected to multiple switches of the stimulation voltage generation circuit;

[0033] The high-side gate voltage control circuit includes PMOS transistors PM1, PM2 and PM3, NMOS transistors NM1, NM2 and NM3, resistors R1 and R2, diodes D1 and D2, and capacitor C.

[0034] The gate of NOMS transistor NM1 is connected to the control signal CLKN, its source is connected to one end of resistor R1, and its drain is connected to the drain and gate of PMOS transistor PM1 and the gate of PM2. The gate of NOMS transistor NM2 is connected to the control signal CLK, its source is connected to one end of resistor R2, and its drain is connected to the drain of PM2 and the cathode of diode D2. The drain of NOMS transistor NM3 is connected to the sources of PM1 and PM2, and its source is connected to the anode of diode D1. The gate output voltage V... PS ;

[0035] The drain of PMOS transistor PM1 is connected to the gates of PM1 and PM2, as well as the drain of NM1. Its source is connected to the source of PM2 and the drain of NM3, and its gate is connected to the gate of PM2. The source of PMOS transistor PM2 is connected to the drain of PM1 and the drain of NM3. Its gate is connected to both the gate and drain of PM1, and its drain is connected to the drain of NM2 and the cathode of diode D2. The drain of PMOS transistor PM3 is connected to one end of capacitor C and the other end of resistors R1 and R2. Its source is connected to the cathode of diode D2 and the other end of capacitor C. The gate output voltage V... PS The other ends of resistors R1 and R2 are connected to one end of capacitor C and the drain of PM3.

[0036] Preferably, it also includes a level conversion circuit, which is used to convert the control signal into an analog domain voltage.

[0037] Compared with the prior art, the above-mentioned at least one technical solution adopted by the present invention can achieve the following beneficial effects:

[0038] This invention combines voltage stimulation with related circuitry for current stimulation, proposing an output stage circuit capable of outputting stimulation voltage and current. This output stage includes a voltage switch, A switch, B switch, C switch, D switch, charging switch, discharging switch, energy storage capacitor, and reference resistor. Furthermore, it proposes a digital circuit that generates a control signal containing stimulation waveforms with specific frequencies, amplitudes, pulse widths, intervals, and frequencies. This control signal controls the conduction duration and sequence of switches A, B, C, and D. The output stage circuit can generate stimulation currents with different stimulation waveforms and, by controlling the conduction duration and sequence of the voltage switch, A switch, B switch, C switch, D switch, charging switch, and discharging switch, can generate stimulation voltages with different waveforms. This invention enables electrical stimulation in different modes and with different waveforms, achieving diversified stimulation therapy. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the stimulation generation circuit of the present invention;

[0041] Figure 2 This is a schematic diagram of the stimulation voltage generating circuit of the present invention;

[0042] Figure 3This is a schematic diagram of the output stage circuit of the present invention;

[0043] Figure 4 This is a diagram showing the stimulation voltage output under load conditions according to the present invention;

[0044] Figure 5 This is a timing diagram of the output stage circuit of the present invention;

[0045] in, Figure 5 (a): The first timing diagram, Figure 5 (b): The second timing diagram, Figure 5 (c): The third timing diagram, Figure 5 (d): The fourth timing diagram, Figure 5 (e): The fifth timing diagram;

[0046] Figure 6 This is a schematic diagram of the high-side switch driving circuit of the present invention;

[0047] in, Figure 6 (a): High-side switch drive circuit, Figure 6 (b): Schematic diagram of the output signal switching of the high-side switch drive circuit;

[0048] Figure 7 This is a system schematic diagram of the impedance measurement circuit of the present invention;

[0049] Figure 8 A schematic diagram comparing constant current stimulation and constant voltage stimulation performed by the stimulation generation circuit of the present invention.

[0050] in, Figure 8 (a): Results of constant current stimulation Figure 8 (b): Results of constant pressure stimulation. Detailed Implementation

[0051] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0052] To address the shortcomings of existing technologies, this invention proposes a stimulation generation circuit for a neurostimulator, comprising:

[0053] The overall structure of the neurostimulator of the present invention is as follows: Figure 1As shown, it consists of six parts: a digital circuit (Stimulation Digital Control Unit, StiDCU), a level shifting circuit, a stimulation voltage generation circuit, a stimulation current generation circuit, an output stage circuit, and a comparator. The control signal from the digital circuit is converted into an analog voltage by the subsequent level shifting circuit and then enters the stimulation current generation circuit, output stage circuit, and comparator for control. When the stimulation generation circuit receives a stimulation command from the external control unit (MCU), the StiDCU stimulation begins, the START control signal is set to 1, and the stimulation generation circuit starts generating a stimulation waveform and reference voltage with a specific frequency, amplitude, pulse width, interval, and number of pulses according to the pre-programmed results of the StiDCU. This waveform is converted into current or voltage stimulation by controlling the switch of the output stage circuit before reaching the target organism, ensuring current neutralization within the organism. The stimulation circuit automatically enters a standby state after setting the stimulation waveform. Furthermore, it can be terminated early via the STOP signal line to ensure the safety of stimulation during long-term, long-range electrical stimulation.

[0054] In this embodiment, the digital circuit achieves precise control of the stimulation current and stimulation voltage through on-chip digital control logic.

[0055] The stimulation current generation circuit consists of a reference current generation circuit and an IDAC current rudder. The reference current generation circuit generates a reference current, and the IDAC current rudder replicates the reference current to the required amplitude before it reaches the output stage, thus saving power consumption of this module. The reference current is applied to the biological tissue through the output stage circuit for stimulation therapy. Voltage stimulation is also implemented in the output stage circuit, but it uses capacitive discharge stimulation, and the switching control method is different from that of current stimulation.

[0056] In this embodiment, the reference current generation circuit generates a reference current for constant current stimulation through a bias reference. The IDAC current rudder achieves adjustable constant current stimulation amplitude through an 8-bit current digital-to-analog converter control circuit.

[0057] The stimulation voltage generation circuit uses a two-stage cross-coupled charge pump to generate a voltage three times the reference voltage, thus ensuring voltage margin under high bioimpedance stimulation conditions. This stimulation circuit can be easily expanded to multiple pathways, increasing the flexibility of multi-point stimulation. The high-voltage generation circuit structure of this invention is as follows: Figure 2 As shown, the circuit includes a first charge pump circuit and a second charge pump circuit. The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2, and the second charge pump circuit includes transistors M5-M8, capacitors C3 and C4. The internal connections of the first and second charge pump circuits are identical.

[0058] The first charge pump circuit includes transistors M1-M4, capacitors C1 and C2. The source of MOSFET M3 is connected to the drain of M1 and the input VIN. Its drain is connected to the gates of M1 and M2, one end of capacitor C2, and the drain of M4. Its gate is connected to the gate of M4, the source of M1 and M2, and one end of capacitor C1. The source of MOSFET M4 is connected to the drains of M2 and M5 and the source of M7. Its drain is connected to one end of capacitor C2, the drain of M3, and the gates of M1 and M2. Its drain is connected to the drain of M3, the gates of M1 and M2, and one end of capacitor C2. The source of MOSFET M1 is connected to one end of capacitor C1, the source of M2, and the gates of M3 and M4. Its gate is connected to one end of capacitor C2, the drains of M3 and M4, and the gate of M2. Its drain is connected to the source of M3 and the input VIN. The source of MOSFET M2 is connected to one end of capacitor C1, the source of M1, and the gates of M3 and M4. Its gate is connected to one end of capacitor C2, the drains of M3 and M4, and the gate of M1. Its drain is connected to the sources of M4 and M7, and the drain of M5. The other end of capacitor C2 is connected to CLK, and the other end of C1 is connected to CLK_N. The drain of transistor M6 and the source of transistor M8 are connected to VOUT.

[0059] To ensure the driving and load capacity of the stimulation circuit, the output voltage needs to be boosted to 15V using a two-stage charge pump. The charge pump employs a cross-coupled structure, using alternating two-phase charging to supply power while reducing the transistor's on-resistance through gate voltage bootstrapping, thus guaranteeing the stimulation and load capacity of the output stage. The two sides of the circuit alternately charge the output capacitor C, and the output capacitor also alternately supplies power to the load. The advantage of this approach is that the output voltage does not drop significantly while the output capacitor continuously supplies power to the load, and the output voltage ripple is relatively small. MOS transistors are used instead of diodes as switches in the circuit to reduce the on-state voltage drop and minimize losses during voltage output. The circuit uses two non-overlapping clock signals for control to reduce losses caused by clock alternation time and improve the conversion efficiency of the charge pump system.

[0060] The stimulator output stage circuit of the present invention is as follows: Figure 3The diagram shows an H-bridge switch array, using high-voltage, high-current power LDMOS transistors to generate current in both directions. Specifically, it includes a voltage switch (STI-V), switch A, switch B, switch C, switch D, a charging switch, a discharging switch, an energy storage capacitor, and a reference resistor. A current source is obtained by replicating the stimulation current using a current mirror. This current source needs to be driven by the stimulation voltage during use. One end of the voltage switch is connected to the output of the stimulation voltage generation circuit. The other end of the voltage switch is connected to one end of switches A and B. The other end of switch A is connected to the human biological tissue and one end of switch C. The other end of switch B is connected to the human biological tissue and one end of switch D. One end of switches C and D is connected to the human biological tissue, and the other end is connected to the reference resistor. One end of the charging switch is connected to the human biological tissue, the other end of switch B, and one end of switch D. The other end is connected to one end of the energy storage capacitor and one end of the discharging switch. The other ends of the energy storage capacitor, the discharging switch, and the reference resistor are all grounded.

[0061] In this embodiment, a current mirror is added to the H-bridge, whose input is the generated stimulation current, which, after being copied, becomes a current source. To enable the output circuit to achieve both voltage and current stimulation capabilities and ensure zero charge accumulation during stimulation, this invention combines the H-bridge circuit commonly used for current stimulation output with a switching circuit for voltage stimulation. In current stimulation applications, the output stage only uses a portion of the H-bridge output circuit, controlled by four switches (A, B, C, and D), while the other switches remain open. Alternating current stimulation is achieved through digitally controlled switches. In voltage stimulation applications, the voltage switch is always on, and stimulation is controlled by six switches (A, B, C, D, Charge, and Discharge).

[0062] Under load conditions, current stimulation is applied, and the high-voltage output of the charge pump is as follows: Figure 4 As shown. At this time, the output voltage amplitude of the charge pump is 14.3V, which is still within the error range. There is some ripple in the output node voltage, which is caused by the switching of the charge pump and does not affect the output of the stimulation voltage and stimulation current.

[0063] The overall stimulation behavior is controlled by digital logic circuits. The control method of digital circuits is to change the output value of the IDAC current steering wheel, the conduction duration of the stimulation switch, and the conduction sequence by using a lookup table, so as to regulate the stimulation amplitude, stimulation period, and stimulation quantity. Specific controllable quantities are shown in Table 1.

[0064] Table 1

[0065]

[0066] The stimulation timing diagram of the output stage circuit of this invention is as follows: Figure 5As shown, the electrical stimulation of the organism is completed in five steps. In the first step, all switches are turned off. In the second step, the upper left and lower right switches are turned on to form a positive stimulation current. In the third step, the upper left and lower right switches are turned off again. In the fourth step, the upper right and lower left switches are turned on to form a reverse stimulation current from electrode B to electrode A. In the fifth step, the lower left and lower right switches are turned on, and electrodes a and b are short-circuited to ground.

[0067] In voltage stimulation mode, voltage stimulation consists of five stages similar to current stimulation, plus a pre-charge stage. During the pre-charge stage, switches B and Charge are turned on, allowing the power supply to bypass the biological tissue and directly charge the energy storage capacitor to the specified voltage. In voltage stimulation, the first and third stages are idle, with both switches open; in the second stage, switches C and Charge are turned on, and the energy storage capacitor undergoes voltage discharge stimulation; in the fourth stage, switches A and Charge are turned on, and the power supply charges the energy storage capacitor to the specified value via the biological tissue; in the fifth stage, switches C and D are turned on, short-circuiting the electrodes to ground. The Discharge switch is used to discharge the energy storage capacitor when its voltage exceeds the specified value.

[0068] This invention also provides a high-side switch driving circuit that uses a source follower method to control the high-voltage side power switch and prevent gate-source breakdown. The structure of the high-side switch driving circuit of this invention is as follows: Figure 6 As shown, the array includes PMOS transistors PM1, PM2, and PM3, NOMS transistors NM1, NM2, and NM3, resistors R1 and R2, diodes D1 and D2, and capacitor C. The gate of NOMS transistor NM1 is connected to the control signal CLKN, its source is connected to one end of resistor R1, and its drain is connected to the drain and gate of PMOS transistors PM1 and PM2. The gate of NOMS transistor NM2 is connected to the control signal CLK, its source is connected to one end of resistor R2, and its drain is connected to the drain of PM2 and the cathode of diode D2. The drain of NOMS transistor NM3 is connected to the sources of PM1 and PM2, and its source is connected to the anode of diode D1. The gate output voltage V... PS The drain of PMOS transistor PM1 is connected to the gates of PM1 and PM2, as well as the drain of NM1. Its source is connected to the source of PM2 and the drain of NM3. Its gate is connected to the gate of PM2. The source of PMOS transistor PM2 is connected to the drain of PM1 and the drain of NM3. Its gate is connected to the gate and drain of PM1. Its drain is connected to the drain of NM2 and the cathode of diode D2. The drain of PMOS transistor PM3 is connected to one end of capacitor C and the other end of resistors R1 and R2. Its source is connected to the cathode of diode D2 and the other end of capacitor C. The gate output voltage V... PS The other ends of resistors R1 and R2 are connected to one end of capacitor C and the drain of PM3.

[0069] The main structure of the high-side switch drive circuit consists of a switch control circuit composed of PM1, PM2, PM3, NM1, NM2, and NM3. The gate of NM1 is connected to the control signal CLKN, and the gate of NM2 is connected to the control signal CLK. The gates of PM1 and PM2 are connected as current mirrors, PM1 is a current source transistor, and the gates of PM3 and NM3 are connected to the high-side input terminal VPS of the H-bridge. When CLKN is high, PM1, PM2, and PM3 are turned on, NM3 and NM2 are turned off, and current flows along the green CON_P HIGH line, resulting in an output node voltage VPS. CONP For V PS +V GSP3 At this time, the high-side control is turned off; when CLK is high, PM1, PM2, PM3, and NM1 are turned off, while NM2 and NM3 are turned on, and current flows along the red CON_PLOW line, resulting in an output node voltage VCONP of V. PS -V GSN3 -V D1 -V D2 At this time, the signal controls the high-side to open. V CONP The capacitor C connected to the terminal accumulates charge during the off-state cycle of the high-side signal control and discharges charge during the on-state cycle. The charging and discharging rates are changed by altering the values ​​of resistors R1 and R2. In this example, R2 is five times the value of R1. The rise and fall speeds of the switch control signal are shown in the figure. To prevent the upper and lower switches on one side of the H-bridge from conducting simultaneously and causing a short circuit between the source and ground.

[0070] The invention also includes a comparator electrically connected to one end of the energy storage capacitor and the output of the digital circuit, used to compare the voltage of the energy storage capacitor with a reference voltage, and to adjust the magnitude of the stimulation voltage according to the comparison result.

[0071] Furthermore, the present invention also provides an impedance measurement circuit (SAR ADC). The impedance measurement circuit is connected after the output stage circuit, and calculates the impedance value of the biological tissue by quantizing the acquired biovoltage signal and combining it with the input stimulation signal.

[0072] The impedance measurement circuit structure block diagram of the present invention is as follows: Figure 7As shown, the input and output stage circuits are connected to sample the voltage across the stimulated biological tissue. A reference resistor is located below the output stage circuit; its voltage is also measured, with the measurement sequence internally controlled. The output is connected to a digital terminal for processing, and the impedance of the organism is then calculated. The SAR ADC in this invention differs from the traditional continuous sampling and continuous output mode, employing a single-measurement, single-conversion mode. That is, when no measurement is being performed, the SAR ADC continuously samples the input signal, with the default sampling point set at a common-mode voltage Vcm equal to 0.9V. When a measurement of the electrodes of the stimulation circuit is required, the sampling point is pre-switched to a high or low point of the H-bridge according to the stimulation logic and sampling continues. When the SAR ADC receives a measurement enable signal, sampling ends and an A / D conversion is performed. The 10-bit digital result of this conversion is latched into a register, and the ADC is reset. After the reset, there is no dynamic loss.

[0073] A SAR ADC includes a measurement gating circuit, a capacitor array, a comparator, and SAR control logic circuitry. Figure 7 The three main parts are sampling control, the SAR core, and registers. The gating circuit controls the sampling voltage. The capacitor array, comparator, and SAR control logic circuit belong to the SAR core, which is the actual functional module of the ADC. The SAR core is a traditional ADC structure. Registers store the sampling results. The SAR ADC is multiplexed for the measurement of impedance of multiple bioelectrodes. The control signal CH_SEL selects stimulation channel 1 or stimulation channel 2, and the SEL_VR signal generated by the digital circuit selects the positive or negative electrode in the channel, thus completing the selection of the stimulation electrode. The SAR ADC operates in the 1.8V voltage domain, while the stimulation circuit operates in the 15V voltage domain. After channel selection, a voltage attenuation circuit is needed for voltage domain conversion. The SAR ADC only performs quantization when a quantization command is present; otherwise, it is in a dormant and off state, adapting to the sparse impedance measurement command characteristics.

[0074] Figure 8 The output results of constant current stimulation and constant voltage stimulation were compared. Figure 8 (a) represents the output result of the constant current stimulus. Figure 8 (b) represents the output result of constant pressure stimulation. Compared with the latter, the former is less dependent on the load, the current remains basically unchanged during the output process, the output is more stable and safe, and it is easier to accurately control the stimulation intensity; the latter is more dependent on the load, and it will change with the load and stimulation time, resulting in lower intensity stability and making it suitable for strong stimuli with lower precision requirements.

[0075] In summary, the neural stimulation circuit proposed in this invention provides both constant current and constant voltage stimulation modes, offering a wide stimulation range and precise and diverse stimulation waveforms. It eliminates the risk of stimulation dead zones and allows for the measurement of stimulation electrode impedance to optimize and adjust the stimulation scheme. Compared to traditional instruments used for spinal cord stimulation, this invention emphasizes miniaturization, intelligence, low power consumption, enhanced safety, and closed-loop feedback control design concepts.

[0076] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0077] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A stimulation generation circuit for a neurostimulator, characterized by, The application relates to a stimulation circuit for generating a stimulation signal for a human body biological tissue, comprising the following parts: a digital circuit for generating a control signal containing a stimulation waveform with specific frequency, amplitude, pulse width, interval and times; a stimulation current generating circuit for generating stimulation current with different sizes; a stimulation voltage generating circuit for generating stimulation voltage with set size; an output stage circuit including a voltage switch, an A switch, a B switch, a C switch, a D switch, a charging switch, a discharging switch, an energy storage capacitor and a reference resistor; one end of the voltage switch is connected with the output end of the stimulation voltage generating circuit, the other end is connected with one end of the A switch and the B switch, the other end of the A switch is connected with the human body biological tissue and one end of the C switch, the other end of the B switch is connected with the human body biological tissue and one end of the D switch; one end of the C switch and the D switch is connected with the human body biological tissue, the other end is connected with the reference resistor; one end of the charging switch is connected with the human body biological tissue, the other end of the B switch and one end of the D switch, the other end is connected with one end of the energy storage capacitor and one end of the discharging switch, the other end of the energy storage capacitor and the discharging switch and the other end of the reference resistor are grounded; a current source is obtained by copying the stimulation current through a current mirror, the stimulation current is applied to the A switch and the B switch through the current source, the control signal is used for controlling the conduction time and the conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation current with different stimulation waveforms; the control signal is also used for controlling the conduction time and the conduction sequence of the voltage switch, the A switch, the B switch, the C switch, the D switch, the charging switch and the discharging switch, and the output stage circuit generates stimulation voltage with different stimulation waveforms.

2. A stimulation generating circuit for a neurostimulator as defined in claim 1, characterized in that The stimulation voltage generating circuit comprises a first charge pump circuit and a second charge pump circuit, the first charge pump circuit comprises transistors M1-M4, a capacitor C1 and a capacitor C2, the second charge pump circuit comprises transistors M5-M8, a capacitor C3 and a capacitor C4; the connection modes inside the first charge pump circuit and the second charge pump circuit are the same. The first charge pump circuit comprises transistors M1-M4, a capacitor C1 and a capacitor C2; the source of MOS transistor M3 is connected with the drain of M1 and the input VIN, the drain is connected with the gate of M1 and M2, one end of the capacitor C2 and the drain of M4, the gate is connected with the gate of M4, the source of M1 and M2 and one end of the capacitor C1; the source of MOS transistor M4 is connected with the drain of M2 and M5 and the source of M7, the drain is connected with one end of the capacitor C2, the drain of M3 and the gate of M1 and M2, the drain is connected with the drain of M3, the gate of M1 and M2 and one end of the capacitor C2; the source of MOS transistor M1 is connected with one end of the capacitor C1, the source of M2 and the gate of M3 and M4, the gate is connected with one end of the capacitor C2, the drain of M3 and M4 and the gate of M2, the drain is connected with the source of M3 and the input VIN; the source of MOS transistor M2 is connected with one end of the capacitor C1, the source of M1 and the gate of M3 and M4, the gate is connected with one end of the capacitor C2, the drain of M3 and M4 and the gate of M1, the drain is connected with the source of M4 and M7 and the drain of M5; the other end of the capacitor C2 is connected with CLK, the other end of C1 is connected with CLK_N; the drain of transistor M6 and the source of M8 are connected with VOUT.

3. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, The stimulation current generating circuit comprises a reference current generating circuit and an IDAC current steering, the reference current generating circuit is used for generating a reference current, the IDAC current steering is used for proportionally copying the reference current with a required amplitude through a control signal, and different sizes of stimulation currents are generated.

4. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, Further comprising a SADADC, the SADADC comprises a comparator, the comparator is electrically connected with one end of an energy storage capacitor and an output end of a digital circuit; the digital circuit is further used for generating a reference voltage, and the comparator is used for comparing the voltage of the energy storage capacitor and the reference voltage, and adjusting the size of the stimulation voltage according to the comparison result.

5. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, The control signal is used for controlling the conduction time and conduction sequence of the A switch, the B switch, the C switch and the D switch, and the output stage circuit generates stimulation currents with different stimulation waveforms, including: In the first step sequence, the A switch, the B switch, the C switch and the D switch are all disconnected; In the second step sequence, the A switch and the D switch are turned on, the B switch and the C switch are turned off, and a forward stimulation current is formed; In the third step sequence, the A switch, the B switch, the C switch and the D switch are all disconnected; In the fourth step sequence, the A switch and the D switch are turned off, the B switch and the C switch are turned on, and a reverse stimulation current is formed; In the fifth step sequence, the A switch and the B switch are turned off, the C switch and the D switch are turned on, and the electrode on the human biological tissue is short-circuited to the ground.

6. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, The control signal is further used for controlling the conduction time and conduction sequence of the voltage switch, the A switch, the B switch, the C switch, the D switch, the charging switch and the discharging switch, and the output stage circuit generates stimulation voltages with different stimulation waveforms, including: The voltage switch is always turned on; In the pre-charging phase, the B switch and the charging switch are turned on, the stimulation voltage bypasses the biological tissue to charge the energy storage capacitor to reach a specified voltage; In the first stage, all switches are disconnected; In the second stage, the C switch and the charging switch are turned on, and the energy storage capacitor is discharged to stimulate voltage; In the third stage, all switches are turned off; In the fourth stage, the A switch and the charging switch are turned on, and the stimulating voltage is charged to a specified value on the energy storage capacitor through the biological tissue; In the fifth stage, the C switch and the D switch are turned on, and the electrodes on the human biological tissue are short-circuited to the ground; The discharge switch is used to discharge the energy storage capacitor when the voltage is higher than the specified value.

7. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, The high-side gate voltage control circuit includes PMOS tubes PM1, PM2 and PM3, NOMS tubes NM1, NM2 and NM3, resistors R1 and R2, diodes D1 and D2, and a capacitor C. The level conversion circuit is used to convert the control signal into an analog domain voltage. The gate of the NMOS transistor NM1 is connected with the control signal CLKN, the source is connected with one end of the resistor R1, and the drain is connected with the drain and gate of the PMOS transistor PM1 and the gate of the PM2. The gate of the NMOS transistor NM2 is connected with the control signal CLK, the source is connected with one end of the resistor R2, and the drain is connected with the drain of the PM2 and the cathode of the diode D2. The drain of the NMOS transistor NM3 is connected with the sources of the PM1 and PM2, the source is connected with the anode of the diode D1, and the gate outputs the voltage V PS . The drain of PMOS transistor PM1 is connected with the gate of PM1 and PM2 and the drain of NM1, the source is connected with the source of PM2 and the drain of NM3, and the gate is connected with the gate of PM2; the source of PMOS transistor PM2 is connected with the drain of PM1 and the drain of NM3, the gate is connected with the gate and drain of PM1, and the drain is connected with the drain of NM2 and the cathode of diode D2; the drain of PMOS transistor PM3 is connected with one end of capacitor C and the other end of resistors R1 and R2, the source is connected with the cathode of diode D2 and the other end of capacitor C, and the gate outputs voltage V PS ; the other end of resistors R1 and R2 is connected with one end of capacitor C and the drain of PM3.

8. A stimulation generating circuit for a neurostimulator as recited in claim 1, wherein, ​

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