Dynamic range enhancement circuit, chip, analog-to-digital conversion module and electronic equipment

Abstract

The invention relates to the technical field of electronic circuits, and provides a dynamic range enhancement circuit, a dynamic range enhancement chip, an analog-to-digital conversion module and electronic equipment. The dynamic range enhancement circuit is connected between a digital signal output end and an analog gain receiving end of an analog-to-digital conversion circuit, and comprises an instruction output unit, a state control unit and a compensation counting unit. The instruction output unit can determine the mode of performing gain operation on the analog signal corresponding to the digital signal. The state control unit outputs corresponding pulses to the compensation counting unit according to the determined gain operation mode, the compensation counting unit outputs corresponding analog gains to the analog gain receiving end according to received pulse signals, dynamic two-way gain operation is provided for analog signals corresponding to digital signals, and the analog signals corresponding to the digital signals are converted into analog signals corresponding to the digital signals. Therefore, the analog-to-digital conversion circuit can process a wider signal amplitude range, and the application range of the analog-to-digital conversion circuit is widened.

Description

Technical Field

[0001] The present application belongs to the field of electronic circuit technology, and in particular relates to a dynamic range enhancement circuit, a dynamic range enhancement chip, an analog-to-digital conversion module and an electronic device. Background Art

[0002] As electronic devices become more and more intelligent, the requirements for the data processing capabilities of electronic devices are also increasing. For example, electronic devices are required to have voice recognition capabilities. If electronic devices are required to have voice transmission and reception and voice recognition capabilities, they need to have analog-to-digital conversion functions. That is, the analog signal corresponding to the voice is converted into an analog-to-digital signal to obtain a digital signal that can be processed by the machine. Because in the process of analog-to-digital conversion, if the amplitude of the analog signal is too large or too small, the digital signal obtained by the analog-to-digital conversion will be unusable. Therefore, in the process of analog-to-digital conversion, it is necessary to consider the dynamic range (Dynamic Range, DR) of the analog-to-digital conversion circuit or the analog-to-digital conversion module. This important indicator.

[0003] Dynamic range refers to the ratio of the maximum signal amplitude to the minimum signal amplitude that the analog-to-digital conversion circuit can process. The larger the dynamic range value, the wider the signal amplitude range that the analog-to-digital conversion circuit can process. Therefore, the dynamic range directly affects the application scope of the analog-to-digital conversion circuit. Therefore, a solution that can enhance the dynamic range of the analog-to-digital conversion circuit is urgently needed to broaden the application scope of the analog-to-digital conversion circuit. Summary of the invention

[0004] The purpose of this application is to provide a dynamic range enhancement circuit, a dynamic range enhancement chip, an analog-to-digital conversion module and an electronic device, aiming to provide a solution that can enhance the dynamic range of the analog-to-digital conversion circuit and broaden the scope of application of the analog-to-digital conversion circuit.

[0005] A first aspect of an embodiment of the present application provides a dynamic range enhancement circuit, connected between a digital signal output terminal of an analog-to-digital conversion circuit and an analog gain receiving terminal, the dynamic range enhancement circuit comprising:

[0006] An instruction output unit, configured to obtain a digital signal from the digital signal output terminal, and output a first instruction when a voltage value represented by the digital signal is less than a first preset threshold, and output a second instruction when a voltage value represented by the digital signal is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold;

[0007] A state control unit, configured to output a first pulse signal according to the first instruction, and output a second pulse signal according to the second instruction;

[0008] The compensation counting unit is used to increase the current compensation value when the first pulse signal is received and the current compensation value meets the increase-value condition, and output the analog gain to the analog gain receiving end based on the increased compensation value; when the second pulse signal is received and the current compensation value meets the decrease-value condition, the current compensation value is decreased, and output the analog gain to the analog gain receiving end based on the decreased compensation value.

[0009] A second aspect of an embodiment of the present application provides a dynamic range enhancement chip, including the dynamic range enhancement circuit provided by the first aspect.

[0010] A third aspect of the embodiments of the present application provides an analog-to-digital conversion module, including an analog-to-digital conversion circuit;

[0011] It also includes the dynamic range enhancement circuit provided by the first aspect, or includes the dynamic range enhancement chip provided by the second aspect.

[0012] The fourth aspect of the embodiments of the present application provides an electronic device, including the dynamic range enhancement circuit provided by the first aspect, or the dynamic range enhancement chip provided by the second aspect, or the analog-to-digital conversion module provided by the third aspect.

[0013] Compared with the prior art, the embodiment of the present invention has the following beneficial effects: the above-mentioned dynamic range enhancement circuit is connected between the digital signal output terminal and the analog gain receiving terminal of the analog-to-digital conversion circuit, and includes an instruction output unit, a state control unit, and a compensation counting unit. The instruction output unit is used to obtain a digital signal from the digital signal output terminal. If the voltage value represented by the digital signal is less than the first preset threshold value, it indicates that the analog signal corresponding to the digital signal needs to be gain-amplified, and then the first instruction is output. If the voltage value represented by the digital signal is greater than the second preset threshold value, it indicates that the analog signal corresponding to the digital signal needs to be gain-reduced, and then the second instruction is output. The state control unit is used to output a first pulse signal according to the first instruction, and a second pulse signal is output according to the second instruction. Then, the compensation counting unit is used to increase the current compensation value when the first pulse signal is received and the current compensation value meets the increase-value condition, and then the analog gain is output to the analog gain receiving terminal based on the increased compensation value. When the second pulse signal is received and the current compensation value meets the decrease-value condition, the current compensation value is decreased, and then the analog gain is output to the analog gain receiving terminal based on the decreased compensation value, so as to achieve gain amplification or gain reduction of the corresponding analog signal based on the digital signal. The solution of the present application can determine the way to perform gain operation on the analog signal corresponding to the digital signal by comparing the voltage value represented by the digital signal with the first preset threshold value, and comparing the voltage value represented by the digital signal with the second preset threshold value through the instruction output unit. The state control unit outputs the corresponding pulse to the compensation counting unit according to the determined gain operation mode, and the compensation counting unit outputs the corresponding analog gain to the analog gain receiving end according to the received first pulse signal or second pulse signal, which can provide dynamic bidirectional gain operation for the analog signal corresponding to the digital signal, so that the analog-to-digital conversion circuit can process a wider signal amplitude range, effectively enhance the dynamic range of the analog-to-digital conversion circuit, and thus broaden the scope of application of the analog-to-digital conversion circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a structural schematic diagram of a dynamic range enhancement circuit and an analog-to-digital conversion circuit in the prior art;

[0015] Figure 2 A schematic diagram of the structure of a dynamic range enhancement circuit provided in an embodiment of the present application;

[0016] Figure 3 A specific structure diagram of a gain compensation circuit provided in an embodiment of the present application Figure 1 ;

[0017] Figure 4 A specific structure diagram of a gain compensation circuit provided in an embodiment of the present application Figure 2 ;

[0018] Figure 5 for Figure 3 or Figure 4 The specific structure of the first comparison unit is shown in FIG. Figure 1 ;

[0019] Figure 6 for Figure 3 or Figure 4 The specific structure of the first comparison unit is shown in FIG. Figure 2 ;

[0020] Figure 7 for Figure 3 or Figure 4 The specific structure of the second comparison unit in FIG. Figure 1 ;

[0021] Figure 8 for Figure 3 or Figure 4 The specific structure of the second comparison unit in FIG. Figure 2 ;

[0022] Fig. 9 A schematic structural diagram of a dynamic range enhancement circuit provided by another embodiment of the present application;

[0023] Fig.10 A schematic diagram of an application of a dynamic range enhancement circuit provided in an embodiment of the present application Figure 1 ;

[0024] Fig.11 A schematic diagram of an application of a dynamic range enhancement circuit provided in an embodiment of the present application Figure 2 ;

[0025] Fig.12 A schematic diagram of the structure of a dynamic range enhancement chip provided in an embodiment of the present application;

[0026] Fig.13 A schematic diagram of the structure of an analog-to-digital conversion module provided in an embodiment of the present application;

[0027] Fig.14 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0029] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0030] It should be understood that the orientation or position relationship indicated by terms such as "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0031] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0032] Currently, many electronic devices on the market have analog-to-digital conversion functions, such as mobile phones, tablets, Bluetooth headsets, etc. In the analog-to-digital conversion process, the dynamic range of the analog-to-digital conversion circuit needs to be considered. Among them, the dynamic range refers to the ratio of the maximum signal amplitude that the analog-to-digital conversion circuit can process to the minimum signal amplitude. The larger the dynamic range of the analog-to-digital conversion circuit, the wider the signal amplitude range that the analog-to-digital conversion circuit can process. Therefore, the dynamic range directly affects the scope of application of the analog-to-digital conversion circuit.

[0033] Figure 1 FIG. 1 shows a schematic diagram of the structure of a dynamic range enhancement circuit and an analog-to-digital conversion circuit in the prior art. Figure 1As shown, in some existing schemes, when analog-to-digital conversion is performed on an analog signal, a dynamic range enhancement circuit is provided on the basis of an analog-to-digital conversion circuit, so that when the analog signal needs to be adjusted in gain, the dynamic range enhancement circuit provides an analog gain to an analog gain control unit (Programmable Gain Amplifier, PGA). At the same time, the dynamic range enhancement circuit also provides a digital compensation gain corresponding to the analog gain to the compensation gain calculation unit, so that after the analog gain control unit adjusts the analog signal according to the analog gain, the adjusted analog signal is converted into a digital signal to be adjusted through the analog-to-digital conversion unit, and the compensation gain calculation unit can be used to perform gain compensation on the digital signal to be adjusted according to the digital compensation gain corresponding to the analog gain, so that the correspondence between the output digital signal and the analog signal can be more accurate. Here, the dynamic range enhancement circuit is usually referred to as DRE or DRE unit, and the analog gain control unit can also be referred to as PGA or PGA unit. However, in order to ensure that the analog gain and the digital compensation gain correspond to each other, an inherent adjustment ratio is usually configured in the dynamic range enhancement circuit, so that two groups of analog signals with large amplitude differences are easily generated, and the same group of analog gain and digital compensation gain are adapted. That is, it is impossible to flexibly adapt to the conversion requirements of analog signals with different amplitude ranges, which affects the application scope of the analog-to-digital conversion circuit.

[0034] In order to solve the above technical problems, the embodiment of the present application provides a dynamic range enhancement circuit, which is connected between the digital signal output terminal and the analog gain receiving terminal of the analog-to-digital conversion circuit, and includes an instruction output unit, a state control unit and a compensation counting unit. The instruction output unit is used to obtain a digital signal from the digital signal output terminal. If the voltage value represented by the digital signal is less than the first preset threshold value, it indicates that the analog signal corresponding to the digital signal needs to be gain-amplified, and then the first instruction is output. If the voltage value represented by the digital signal is greater than the second preset threshold value, it indicates that the analog signal corresponding to the digital signal needs to be gain-reduced, and then the second instruction is output. The state control unit is used to output a first pulse signal according to the first instruction, and a second pulse signal is output according to the second instruction. Then, the compensation counting unit is used to increase the current compensation value when the first pulse signal is received and the current compensation value meets the increase-value condition, and then the analog gain is output to the analog gain receiving terminal based on the increased compensation value, and when the second pulse signal is received and the current compensation value meets the decrease-value condition, the current compensation value is decremented, and then the analog gain is output to the analog gain receiving terminal based on the decremented compensation value, so as to achieve gain amplification or gain reduction of the corresponding analog signal based on the digital signal. The solution of the present application can determine the way to perform gain operation on the analog signal corresponding to the digital signal by comparing the voltage value represented by the digital signal with the first preset threshold value, and comparing the voltage value represented by the digital signal with the second preset threshold value through the instruction output unit. The state control unit outputs the corresponding pulse to the compensation counting unit according to the determined gain operation mode, and the compensation counting unit outputs the corresponding analog gain to the analog gain receiving end according to the received first pulse signal or second pulse signal, which can provide dynamic bidirectional gain operation for the analog signal corresponding to the digital signal, so that the analog-to-digital conversion circuit can process a wider signal amplitude range, effectively enhance the dynamic range of the analog-to-digital conversion circuit, and thus broaden the scope of application of the analog-to-digital conversion circuit.

[0035] In addition, since the compensation counting unit outputs the corresponding analog gain to the analog gain receiving end according to the received first pulse signal or the second pulse signal, under the action of the analog gain, the amplitude of the analog signal to be converted is maintained within a more appropriate range, so the efficiency of analog-to-digital conversion is higher. In order to ensure that the digital signal obtained by analog-to-digital conversion is not distorted, while the compensation counting unit outputs the corresponding analog gain to the analog gain receiving end according to the received first pulse signal or the second pulse signal, it can also provide a corresponding compensation coefficient to the digital gain compensation unit based on the analog gain, so that the digital gain compensation unit can perform gain compensation on the digital signal to be adjusted obtained by analog-to-digital conversion according to the compensation coefficient. That is, by providing the corresponding compensation coefficient to the digital gain compensation unit, the gain compensation corresponds to the analog gain, so that the linearity between the compensated digital signal and the analog signal can be kept consistent.

[0036] See also Figure 2 , Figure 2 A schematic diagram of the structure of a dynamic range enhancement circuit provided by an embodiment of the present application is shown. For ease of explanation, only the parts related to this embodiment are shown, which are described in detail as follows:

[0037] exist Figure 2 In the embodiment, the dynamic range enhancement circuit 100 is connected between the digital signal output terminal 111 and the analog gain receiving terminal 112 of the analog-to-digital conversion circuit 110. The dynamic range enhancement circuit 100 includes: an instruction output unit 10, a state control unit 20 and a compensation counting unit 30.

[0038] The instruction output unit 10 is used to obtain a digital signal from the digital signal output terminal 111, and output a first instruction when the voltage value represented by the digital signal is less than a first preset threshold value, and output a second instruction when the voltage value represented by the digital signal is greater than a second preset threshold value; wherein the first preset threshold value is less than the second preset threshold value.

[0039] The state control unit 20 is used to output a first pulse signal according to a first instruction, and output a second pulse signal according to a second instruction.

[0040] The compensation counting unit 30 is used to increase the current compensation value when a first pulse signal is received and the current compensation value meets the increase-value condition, and output the analog gain to the analog gain receiving terminal 112 based on the increase-value compensation value; when a second pulse signal is received and the current compensation value meets the decrease-value condition, the current compensation value is decreased, and output the analog gain to the analog gain receiving terminal 112 based on the decrease-value compensation value.

[0041] In this embodiment, since the dynamic range enhancement circuit 100 is connected between the digital signal output terminal 111 of the analog-to-digital conversion circuit 110 and the analog gain receiving terminal 112, the digital signal obtained after the analog-to-digital conversion circuit 110 performs analog-to-digital conversion on the analog signal can be received, and the analog gain receiving terminal 112 can provide the analog-to-digital conversion circuit 110 with a compensation value of the analog gain. Here, the digital signal generally refers to a signal obtained after the analog-to-digital conversion circuit 110 performs analog-to-digital conversion on the analog signal. In practical applications, the analog signal can be an analog signal received by the electronic device where the analog-to-digital conversion circuit 110 is located, an analog signal sent by other electronic devices, or an analog signal generated by the electronic device itself. Accordingly, the digital signal obtained after the analog-to-digital conversion of the analog signal can be a response output by the electronic device itself, or the digital signal can be sent to other electronic devices, which is not limited here.

[0042] It should be noted that by using the instruction output unit 10 to obtain a digital signal from the digital signal output terminal 111, the voltage value representing the digital signal can be compared with the first preset threshold and the second preset threshold, respectively. Here, the first preset threshold can be used to describe the minimum voltage value that the digital signal is allowed to use. That is, if the voltage value representing the digital signal is less than the first preset threshold, it means that the signal amplitude of the digital signal is too small, which is not conducive to subsequent signal processing and affects the efficiency of analog-to-digital conversion. Therefore, it is necessary to perform positive gain compensation, that is, gain amplification, on the analog signal corresponding to the digital signal. The second preset threshold can be used to describe the maximum voltage value that the digital signal is allowed to use. That is, if the voltage value representing the digital signal is greater than the second preset threshold, it means that the digital signal has been distorted, so it is necessary to reduce the gain of the analog signal corresponding to the digital signal.

[0043] In addition, in actual applications, when the compensation counting unit 30 outputs the analog gain to the analog gain receiving terminal 112, the performance is likely to drop slightly at the moment of switching the output analog gain. Therefore, in order to prevent frequent switching, the second preset threshold can also be used as a hysteresis range value for gain switching, which can prevent the phenomenon of frequent gain switching when the voltage value represented by the digital signal fluctuates slightly near the first preset threshold, thereby enhancing the overall stability of the dynamic range circuit.

[0044] In a specific implementation, the instruction output unit 10 may include a comparison circuit composed of a comparator, which is used to compare the voltage value represented by the digital signal with the first preset threshold, and to compare the voltage value represented by the digital signal with the second preset threshold.

[0045] It is understandable that when performing analog-to-digital conversion on an analog signal, a known analog-to-digital conversion method is usually used, such as pulse code modulation to digitize the analog signal. Specifically, in the analog-to-digital conversion process, the analog signal can be sampled according to a specific time sampling interval, and then the sampled samples can be quantized to obtain sample values ​​(i.e., sampled voltage values), for example, the samples are calculated according to a certain algorithm to obtain decimal values. Then, by encoding the sample values, for example, converting the sample values ​​from decimal values ​​to binary values, the binary values ​​corresponding to each group of sample values ​​can represent the voltage value of the sample. Here, since the numerical signal and the binary value can be converted to each other, the binary data corresponding to the digital signal can be used to represent the sample value, i.e., the sampled voltage value. Based on this, in all embodiments of the present application, the voltage value represented by the digital signal can be understood as the voltage value represented by the binary value corresponding to the digital signal. In addition, the digital signal is a discrete signal based on the sampling time interval, so there is a certain time interval between two adjacent groups of digital signals, and the sample values ​​(i.e., sampled voltage values) corresponding to different sampling moments can be distinguished.

[0046] As an example, since the first preset threshold can be used to describe the minimum voltage value allowed for the digital signal to be used, and the second preset threshold can be used to describe the maximum voltage value allowed for the digital signal to be used, the comparison circuit in the instruction output unit 10 includes at least two reference terminals, which are respectively used to provide the voltage of the first preset threshold and the voltage of the second preset threshold.

[0047] Figure 3 The specific structure of a gain compensation circuit provided in an embodiment of the present application is shown in FIG. Figure 1 .like Figure 3 As shown, as an embodiment, the instruction output unit 10 includes: a first comparing unit 11 and a second comparing unit 12 .

[0048] The first comparison unit 11 is used to compare the voltage value represented by the digital signal with a first preset threshold value, and output a first instruction when the voltage value represented by the digital signal is smaller than the first preset threshold value.

[0049] The second comparison unit 12 is used to compare the voltage value represented by the digital signal with a second preset threshold value, and output a second instruction when the voltage value represented by the digital signal is greater than the second preset threshold value.

[0050] Here, since the first preset threshold value can be used to describe the minimum voltage value that the digital signal is allowed to use, the first preset threshold value can be regarded as a threshold value in a specific implementation. Because the second preset threshold value and the first preset threshold value can be combined to describe the voltage value range that the digital signal is allowed to use, for the analog-to-digital conversion circuit 110, the second preset threshold value can be obtained by adding a set hysteresis value to the threshold value. That is, the second preset threshold value can be equal to the sum of the first preset threshold value and the hysteresis value.

[0051] In a specific implementation, the first preset threshold and hysteresis value may be configured according to the specific performance and conversion requirements of the analog-to-digital conversion circuit 110. Once the first preset threshold and hysteresis value are determined, the second preset threshold may be determined.

[0052] It should be noted that since analog-to-digital conversion of analog signals is a continuous process, gain amplification or gain reduction of analog signals is a continuous process. In the process of gain reduction of analog signals, when the amplitude of the analog signal gradually decreases from large to small, the comparison threshold value (first preset threshold) can be used to determine whether to enter the gain amplification state. In the process of gain amplification of analog signals, when the signal gradually increases from small to large, the second preset threshold is compared to determine whether to enter the gain reduction state. Here, the hysteresis value of the difference between the second preset threshold and the first preset threshold is intended to filter out small fluctuations in the analog signal, thereby avoiding frequent switching of states.

[0053] As an embodiment, the instruction output unit 10 outputs only one instruction in one instruction output cycle, that is, when outputting the first instruction, the second instruction is no longer output until a new digital signal is received. Alternatively, when outputting the second instruction, the first instruction is no longer output until a new digital signal is received.

[0054] As another embodiment, the instruction output unit 10 can simultaneously output an instruction and a second instruction in one instruction output cycle. Accordingly, when the state control unit 20 receives the first instruction and the second instruction at the same time, it only responds to the second instruction, that is, it prohibits responding to the first instruction.

[0055] It should be noted that in actual applications, under interference conditions, due to drastic changes in the signal, there is a memory logic in the analog-to-digital conversion circuit 110, and the instruction output unit 10 can also trigger the first instruction and the second instruction at the same time. Here, when the first instruction and the second instruction are triggered at the same time, in order to avoid over-saturated gain amplification of the analog signal, the state control unit 20 only responds to the second instruction.

[0056] In all embodiments of the present application, the state control unit 20 switches to the corresponding gain operation state by responding to the corresponding instruction. That is, when the state control unit 20 receives a first instruction, it enters a gain amplification operation state by responding to the first instruction, and when the state control unit 20 receives a second instruction, it enters a gain reduction operation state by responding to the second instruction.

[0057] like Figure 3 As shown, as an embodiment, the state control unit 20 includes: a state controller 21, which is used to output a first pulse signal according to a preset gain period according to a first instruction, and output a second pulse signal according to a preset gain period according to a second instruction.

[0058] In this embodiment, the state control unit 20 is pre-configured with a preset gain cycle, and within one gain cycle, the state control unit 20 only works in one working state, that is, within this one gain cycle, the state control unit 20 only outputs one pulse signal until the working state of the state control unit 20 is switched.

[0059] As an embodiment, the state controller 21 is also used to, when outputting a first pulse signal according to a first instruction according to a preset gain period, if the compensation value after appreciation is greater than the compensation threshold, stop outputting the first pulse signal; and when outputting a second pulse signal according to a second instruction according to a preset gain period, if the compensation value after subtraction is equal to 0, stop outputting the second pulse signal.

[0060] In this embodiment, the compensation threshold is used to describe the maximum value of the compensation value. When the increased compensation value is greater than the compensation threshold, it means that the analog signal is gain-amplified using the increased compensation value, which may cause the amplified analog signal to be saturated, thereby causing the digital signal after analog-to-digital conversion to be distorted or unusable. When the reduced compensation value is equal to 0, it means that the analog signal will no longer be gain-amplified in the next gain cycle, and there is no need to output the second pulse signal.

[0061] In a specific implementation, when the state controller 21 outputs the first pulse signal according to the first instruction according to the preset gain cycle, if the compensation value after the increase is greater than the compensation threshold, it can exit the working state of gain amplification, enter the idle state, and maintain the idle state, thereby stopping the output of the first pulse signal. Similarly, when the state controller 21 outputs the second pulse signal according to the second instruction according to the preset gain cycle, if the compensation value after the decrease is equal to 0, it can exit the working state of gain reduction, enter the idle state, and maintain the idle state, thereby stopping the output of the second pulse signal.

[0062] In all embodiments of the present application, the first pulse signal is used to instruct the compensation counting unit 30 to increase the current compensation value when the current compensation value meets the increase-value condition, and output the analog gain based on the increased compensation value to the analog gain receiving terminal 112. The second pulse signal is used to instruct the compensation counting unit 30 to decrease the current compensation value when the current compensation value meets the decrease-value condition, and output the analog gain based on the decreased compensation value to the analog gain receiving terminal 112. Here, the compensation counting unit 30 only outputs one set of analog gains to the analog gain receiving terminal 112 within a preset gain period.

[0063] In a specific implementation, the increment condition refers to the maximum gain value that the analog gain receiving terminal 112 can respond to, and is also the maximum gain value that the analog-to-digital conversion circuit 110 can provide. If the current compensation value is not the maximum gain value, it is determined that the current compensation value meets the increment condition, and then the current compensation value is incremented, and the analog gain is output to the analog gain receiving terminal 112 based on the incremented compensation value. The decrement condition refers to the maximum gain value that the analog gain receiving terminal 112 does not respond to, which can be 0. That is, if the current compensation value is greater than 0, it means that the current compensation value can also be decremented, that is, it is determined that the current compensation value meets the decrement condition, and then the current compensation value is decremented, and the analog gain is output to the analog gain receiving terminal 112 based on the decremented compensation value.

[0064] like Figure 3 As shown, as an embodiment, the compensation counting unit 30 includes:

[0065] The compensation counter 31 is used to increase the current compensation value when a first pulse signal is received and the current compensation value is less than the compensation threshold, and output the analog gain to the analog gain receiving terminal 112 according to the increased compensation value and the preset compensation value; and to decrement the current compensation value when a second pulse signal is received and the current compensation value is greater than 0, and output the analog gain to the analog gain receiving terminal 112 according to the decremented compensation value and the preset compensation value.

[0066] In this embodiment, the preset compensation value refers to the initial gain of the gain amplification of the analog signal, and the preset compensation gain value may be equal to or greater than 0. The analog gain is output to the analog gain receiving terminal 112 according to the increased compensation value and the preset compensation value, or the analog gain is output to the analog gain receiving terminal 112 according to the reduced compensation value and the preset compensation value, and the increased compensation value and the preset compensation value are summed, or the reduced compensation value and the preset compensation value are summed to obtain the analog gain acting on the analog gain receiving terminal 112.

[0067] In specific implementation, the compensation counter 31 also has the function of an adder, that is, the compensation value after increment is added to the preset compensation value to obtain the analog gain. Alternatively, the compensation value after decrement is added to the preset compensation value to obtain the analog gain.

[0068] Figure 4 The specific structure of a gain compensation circuit provided in an embodiment of the present application is shown in FIG. Figure 2 .

[0069] like Figure 4 As shown, as an embodiment, the instruction output unit 10 further includes:

[0070] The first filtering unit 13 is used for obtaining the digital signal to be processed from the digital signal output terminal 111 , filtering the digital signal to be processed, and outputting the obtained digital signal to the first comparing unit 11 and the second comparing unit 12 .

[0071] In this embodiment, the digital signal to be processed generally refers to the digital signal to be filtered output by the analog-to-digital conversion circuit 110. In practical applications, since the digital signal to be processed output by the analog-to-digital conversion circuit 110 has a large DC offset, the first filtering unit 13 can be used to perform offset filtering.

[0072] In a specific implementation, the first filtering unit 13 may include a high-pass filter, for example, a first-order / second-order / high-order IIR filter, or a FIR filter. The cutoff frequency of the high-pass filter may be set by using a register.

[0073] by Figure 3 or Figure 4 Based on the example of Figure 5 Shows Figure 3 or Figure 4 The specific structure of the first comparison unit is shown in FIG. Figure 1 .

[0074] like Figure 5 As shown, as an embodiment, the first comparison unit 11 includes:

[0075] The first comparator D1 compares the voltage value represented by the digital signal with a first preset threshold value, and outputs a first electrical signal when the voltage value represented by the digital signal is less than the first preset threshold value.

[0076] The cycle counter Q performs a counting operation according to the first electrical signal, and outputs a first instruction when the counting result is equal to a threshold.

[0077] In this embodiment, the first comparator D1 is used to compare the voltage value represented by the digital signal, that is, the absolute value of the digital signal, with the threshold value represented by the first preset threshold value. When the absolute value of the digital signal is less than the threshold value, a hit valid signal, that is, the first electrical signal, is output.

[0078] In a specific implementation, the first electrical signal controls the cycle counter Q to count, that is, within the corresponding counting period set by the cycle counter Q, each time the first electrical signal is detected, the count value of the cycle counter Q is increased by 1, and if the first electrical signal is not received, the count value of the cycle counter Q is cleared. When the count value of the cycle counter Q reaches the threshold, the first instruction is output.

[0079] Here, the purpose of counting by the cycle counter Q is to ensure that the voltage value, that is, the amplitude, that truly represents the digital signal can be counted. In addition, the counting period set by the cycle counter Q is longer than the period of the digital signal. If within the counting period set by the cycle counter Q, the voltage values ​​represented by all digital signals are less than the first preset threshold, it means that the amplitude of the collected digital signal is less than the threshold value, and the analog signal needs to be gain amplified.

[0080] Figure 6 Shows Figure 3 or Figure 4 The specific structure of the first comparison unit is shown in FIG. Figure 2 .and Figure 5 The embodiment shown differs in that Figure 6 In the embodiment, the first comparison unit 11 further includes:

[0081] The first de-jitter branch 1101 is used to perform a de-jitter operation on the first electrical signal.

[0082] In this embodiment, considering that external signal interference and other reasons may cause abnormal signal mutation, a first de-jitter branch 1101 is also configured in the first comparison unit 11. Figure 6 As shown, the first de-jitter branch 1101 is arranged between the first comparator D1 and the cycle counter Q, and can perform a de-jitter operation on the first electrical signal, that is, remove the burst interference signal that may exist in the first electrical signal.

[0083] by Figure 3 or Figure 4 Based on the example of Figure 7 Shows Figure 3 or Figure 4 The specific structure of the second comparison unit in FIG. Figure 1 .like Figure 7 As shown, as an embodiment, the second comparison unit 12 includes:

[0084] The second comparator D2 is used to compare the voltage value represented by the digital signal with a second preset threshold value, and output a second electrical signal when the voltage value represented by the digital signal is greater than the second preset threshold value.

[0085] The edge detection branch 1201 is used to output a second instruction according to the second electrical signal.

[0086] In this embodiment, the second comparator D2 compares the voltage value represented by the output digital signal with the second preset threshold, and outputs the second electrical signal when the voltage value represented by the digital signal is greater than the second preset threshold.

[0087] Figure 8 Shows Figure 3 or Figure 4 The specific structure of the first comparison unit is shown in FIG. Figure 2 .and Figure 7 The embodiment shown differs in that Figure 8 In the embodiment, the second comparison unit 12 further includes:

[0088] The second de-jitter branch 1202 is used to perform a de-jitter operation on the second electrical signal.

[0089] Similar to the first de-jitter branch, in this embodiment, the second de-jitter branch 1202 is configured between the second comparator D2 and the edge detection branch 1201, and can de-jitter the second electrical signal, that is, remove the burst interference signal that may exist in the second electrical signal.

[0090] It is easy to understand that, in the process of performing analog-to-digital conversion on an analog signal using the analog-to-digital conversion circuit 110, if the analog signal is gain-amplified and the gain-amplified analog signal is converted into a digital signal to be adjusted, it is necessary to perform gain compensation on the digital signal to be adjusted to restore the signal content, thereby avoiding signal distortion. Based on this, when it is determined that the analog signal needs to be gain-amplified based on attribute information such as the signal strength or signal assignment of the analog signal, the digital signal to be adjusted obtained by the analog-to-digital conversion can be gain-compensated to restore the signal content.

[0091] Fig. 9 FIG. 2 shows a schematic diagram of a dynamic range enhancement circuit provided by another embodiment of the present application. Fig. 9 As shown, as an embodiment, the dynamic range enhancement circuit 100 further includes: a coefficient conversion unit 40 , a delay and phase control unit 50 , and a digital gain compensation unit 60 .

[0092] The coefficient conversion unit 40 is used to output the target compensation gain according to the increased compensation value or the decreased compensation value. The delay and phase control unit 50 is used to output the compensation coefficient according to the target compensation gain. The digital gain compensation unit 60 is used to perform gain compensation on the digital signal to be adjusted according to the compensation coefficient and output the compensated digital signal to the digital signal output terminal.

[0093] In this embodiment, the coefficient conversion unit 40 converts the compensation value after the increment or the compensation value after the decrement into a corresponding gain coefficient, that is, a target compensation gain. The delay and phase control unit 50 outputs the compensation coefficient to the digital gain compensation unit 60 according to the target compensation gain. Here, the digital gain compensation unit 60 can perform gain compensation on the digital signal to be adjusted obtained by analog-to-digital conversion according to the compensation coefficient. That is, by providing the corresponding compensation coefficient to the digital gain compensation unit 60, the gain compensation corresponds to the analog gain, so that the linearity between the compensated digital signal and the analog signal can be kept consistent. In a specific implementation, the digital gain compensation unit 60 can calculate the compensated digital signal corresponding to the digital signal to be adjusted by multiplication, shifting, addition and other methods.

[0094] Fig.10 The following is a schematic diagram showing an application of a dynamic range enhancement circuit provided by an embodiment of the present application. Figure 1 . Fig.11 The following is a schematic diagram showing an application of a dynamic range enhancement circuit provided by an embodiment of the present application. Figure 2 .like Fig.10 and Fig.11 As shown in the figure, the digital downsampling filter is a necessary device for analog-to-digital conversion. The front-end sigma-delta operates at a very high sampling rate (MHz level) and needs to be reduced to a low sampling rate (target sampling rate, kHz level). A digital downsampling filter is needed to filter out the folding noise. When adjusting the gain, two places will be adjusted, one is the PGA and the other is the digital compensation gain, and both will be issued at the same time (based on the same judgment conditions). The PGA gain and compensation gain take effect immediately, but the sigma-delta and digital downsampling filter behind the PGA will have a relatively large delay, and the amplitude change of the input digital signal transmitted to the digital gain compensator will be delayed accordingly. During this delay time, the digital gain compensator actually makes an incorrect compensation, which will cause large noise. Therefore, it is necessary to make a delay and phase adjustment to the compensation gain to adapt it to the delay and phase characteristics of the sigma-delta circuit and the downsampling rate filter to eliminate this noise.

[0095] In a specific implementation, the delay and phase control unit 50 can be composed of two parts. The first part is an integer delay device, which can usually be implemented by a shift register to realize the delay of an integer number of sampling points. The second part is a fractional delay device, which can be implemented by a FIR, IIR, all-pass filter, etc. to realize the delay of a fractional number of sampling points.

[0096] Fig.12 FIG. 2 shows a schematic diagram of the structure of a dynamic range enhancement chip provided in an embodiment of the present application. Fig.12 As shown, the dynamic range enhancement chip 200 includes the dynamic range enhancement circuit 100 provided in any one of the embodiments of the present application.

[0097] It is understandable that in Fig.12 In the embodiment shown, due to the improvements and specific implementations related to the present application, Figures 2 to 11 The corresponding embodiments are described in detail, so they will not be described again here.

[0098] Fig.13 FIG. 1 shows a schematic diagram of the structure of an analog-to-digital conversion module provided in an embodiment of the present application. Fig.13 As shown, the analog-to-digital conversion module 300 includes the dynamic range enhancement circuit 100 or the dynamic range enhancement chip 200 provided in any one of the embodiments of the present application.

[0099] It is understandable that in Fig.13 In the embodiment shown, due to the improvements and specific implementations related to the present application, Figures 2 to 12 The corresponding embodiments are described in detail, so they will not be described again here.

[0100] Fig.14 FIG. 1 is a schematic diagram showing the structure of an electronic device provided by an embodiment of the present application. Fig.14 As shown, the electronic device 400 includes the dynamic range enhancement circuit 100, or the dynamic range enhancement chip 200, or the analog-to-digital conversion module 300 provided in any one of the embodiments of the present application.

[0101] It is easy to understand that the electronic device 400 provided in this embodiment can be any electronic product with analog-to-digital conversion function. For example, mobile terminals such as mobile phones and tablet computers. Another example is a product with voice interaction function such as a voice robot and smart speakers. Another example is a wearable device with audio signal receiving and transmitting function such as a smart bracelet, a phone watch, and a wireless headset.

[0102] It is understandable that in Fig.14 In the embodiment shown, due to the improvements and specific implementations related to the present application, Figures 2 to 13 The corresponding embodiments are described in detail, so they will not be described again here.

[0103] Those skilled in the art can clearly understand that for the convenience and simplicity of description, only the division of the above-mentioned functional units and modules is used as an example. In actual applications, the above-mentioned functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The above-mentioned integrated unit can be implemented in the form of hardware or in the form of software functional units.

[0104] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A dynamic range enhancement circuit, characterized in that: Connected between the digital signal output terminal of the analog-to-digital conversion circuit and the analog gain receiving terminal, the dynamic range enhancement circuit includes: an instruction output unit, configured to obtain a digital signal from the digital signal output terminal, and output a first instruction when a voltage value represented by the digital signal is less than a first preset threshold, and output a second instruction when a voltage value represented by the digital signal is greater than a second preset threshold; wherein the first preset threshold is less than the second preset threshold; A state control unit, configured to output a first pulse signal according to the first instruction, and output a second pulse signal according to the second instruction; The compensation counting unit is used to increase the current compensation value when the first pulse signal is received and the current compensation value meets the increase-value condition, and output the analog gain to the analog gain receiving end based on the increased compensation value; when the second pulse signal is received and the current compensation value meets the decrease-value condition, the current compensation value is decreased, and output the analog gain to the analog gain receiving end based on the decreased compensation value.

2. The dynamic range enhancement circuit according to claim 1, characterized in that: The instruction output unit comprises: A first comparison unit, configured to compare the voltage value represented by the digital signal with the first preset threshold value, and output a first instruction when the voltage value represented by the digital signal is less than the first preset threshold value; The second comparison unit is used to compare the voltage value represented by the digital signal with the second preset threshold value, and output a second instruction when the voltage value represented by the digital signal is greater than the second preset threshold value.

3. The dynamic range enhancement circuit according to claim 2, characterized in that: The instruction output unit also includes: The first filtering unit is used to obtain the digital signal to be processed from the digital signal output terminal, filter the digital signal to be processed, and output the obtained digital signal to the first comparing unit and the second comparing unit.

4. The dynamic range enhancement circuit according to claim 2, characterized in that: The first comparison unit comprises: a first comparator, for comparing the voltage value represented by the digital signal with the first preset threshold value, and outputting a first electrical signal when the voltage value represented by the digital signal is less than the first preset threshold value; The cycle counter performs a counting operation according to the first electrical signal, and outputs a first instruction when the counting result is equal to a threshold.

5. The dynamic range enhancement circuit according to claim 4, characterized in that: The first comparison unit further includes: The first de-jitter branch is used to perform a de-jitter operation on the first electrical signal.

6. The dynamic range enhancement circuit according to claim 2, characterized in that: The second comparison unit comprises: A second comparator, used for comparing the voltage value represented by the digital signal with the second preset threshold value, and outputting a second electrical signal when the voltage value represented by the digital signal is greater than the second preset threshold value; The edge detection branch is used to output a second instruction according to the second electrical signal.

7. The dynamic range enhancement circuit according to claim 6, characterized in that: The second comparison unit further includes: The second de-jitter branch is used to perform a de-jitter operation on the second electrical signal.

8. The dynamic range enhancement circuit according to claim 1, characterized in that: The state control unit comprises: A state controller is used to output a first pulse signal according to a preset gain period according to the first instruction, and to output a second pulse signal according to the preset gain period according to the second instruction.

9. The dynamic range enhancement circuit according to claim 8, characterized in that: The state controller is also used to, when outputting a first pulse signal according to the first instruction according to a preset gain period, stop outputting the first pulse signal if the compensation value after the increase is greater than the compensation threshold; and when outputting a second pulse signal according to the second instruction according to the preset gain period, stop outputting the second pulse signal if the compensation value after the decrease is equal to 0.

10. The dynamic range enhancement circuit according to claim 9, characterized in that: The compensation counting unit comprises: The compensation counter is used to increase the current compensation value when the first pulse signal is received and the current compensation value is less than the compensation threshold, and output the analog gain to the analog gain receiving end according to the increased compensation value and the preset compensation value; when the second pulse signal is received and the current compensation value is greater than 0, decrement the current compensation value, and output the analog gain to the analog gain receiving end according to the decremented compensation value and the preset compensation value.

11. The dynamic range enhancement circuit according to any one of claims 1 to 10, characterized in that: The dynamic range enhancement circuit further includes: A coefficient conversion unit, configured to output a target compensation gain according to the increased compensation value or the decreased compensation value; A delay and phase control unit, configured to output a compensation coefficient according to the target compensation gain; The digital gain compensation unit is used to perform gain compensation on the digital signal to be adjusted according to the compensation coefficient, and output the compensated digital signal to the digital signal output terminal.

12. A dynamic range enhancement chip, characterized in that: The invention comprises the dynamic range enhancement circuit as claimed in any one of claims 1 to 11.

13. An analog-to-digital conversion module, characterized in that: include: Analog-to-digital conversion circuit; It also includes the dynamic range enhancement circuit as described in any one of claims 1 to 11, or includes the dynamic range enhancement chip as described in claim 12.

14. An electronic device, characterized in that: The electronic device includes the dynamic range enhancement circuit according to any one of claims 1 to 11, or includes the dynamic range enhancement chip according to claim 12, or includes the analog-to-digital conversion module according to claim 13.

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