A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide and a preparation method thereof

Abstract

The present invention provides a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide and a preparation method thereof, including a substrate, an N-type gallium oxide epitaxial layer, a first P-type nickel oxide layer, a second P-type nickel oxide layer, a dielectric layer, an N-type gallium oxide heavily doped region, a cathode metal layer, and an anode metal layer. The first P-type nickel oxide layer forms a PN junction with the N-type gallium oxide epitaxial layer. By means of longitudinal depletion assisting lateral depletion, while improving the breakdown voltage, the carrier concentration in the epitaxial layer can be appropriately increased, so that the on-resistance is reduced. The second P-type nickel oxide layer is short-circuited with the anode metal layer. On the one hand, the potential difference between the overall P-type nickel oxide and the N-type gallium oxide is increased, the auxiliary effect of longitudinal depletion is enhanced, and the surface electric field is balanced; on the other hand, the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is more conducive to alleviating the electric field concentration at the anode edge. Therefore, the device can achieve a lower on-resistance and withstand a higher reverse breakdown voltage.

Description

Technical Field

[0001] The present invention relates to the technical field of power semiconductors, in particular to a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide and a preparation method thereof. Background Art

[0002] The lateral structure of a power device jointly bears the reverse bias voltage through its lateral voltage withstand structure and longitudinal voltage withstand structure. When the electric field peak value of a certain part reaches the critical breakdown electric field, the device breaks down. However, the surface of the drift region of the lateral power device is not as close to the ideal diode as the longitudinal junction in the body under the influence of the two-dimensional electric field, resulting in the surface field of the device reaching the critical breakdown electric field prior to the longitudinal field. Therefore, the lateral structure of the power device has a lower voltage withstand capacity compared to the vertical structure of the power device. The RESURF (Reduce Surface Field) technology can significantly improve the voltage withstand capacity of the lateral power device by using the longitudinal junction to assist the lateral depletion and reshaping the surface electric field distribution of the drift region.

[0003] In β -Ga2O3, due to the self-compensation effect based on Ga and O vacancies and the large effective mass of holes caused by the flat valence band, there is currently a lack of effective P-type doping in gallium oxide. To improve the voltage withstand capacity of the gallium oxide lateral Schottky barrier diode (LSBD) by means of the RESURF technology, it is necessary to provide a longitudinal PN junction to assist the lateral depletion. Therefore, how to make the RESURF technology play a role in the gallium oxide LSBD has become a difficult point. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide and a preparation method thereof, which can effectively suppress the surface electric field peak value on the anode side, achieve a lower on-resistance, withstand a higher reverse breakdown voltage, and thus obtain a gallium oxide LSBD device with excellent performance.

[0005] To achieve the above purpose, the present invention adopts the following technical solution: A high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide, comprising a substrate (1), an N-type gallium oxide epitaxial layer (2), a first P-type nickel oxide layer (3), a second P-type nickel oxide layer (4), a dielectric layer (5), an N-type gallium oxide heavily doped region (6), a cathode metal layer (7), and an anode metal layer (8) which are stacked in sequence;

[0006] The stacked substrates (1) and the N-type gallium oxide epitaxial layer (2) are stacked in sequence from bottom to top; the first P-type nickel oxide layer (3) is embedded at the top of the N-type gallium oxide epitaxial layer (2); the second P-type nickel oxide layer (4) is deposited on the top of the N-type gallium oxide epitaxial layer (2), the right side of the second P-type nickel oxide layer (4) is short-circuited with the anode metal layer (8), and the lower surface of the second P-type nickel oxide layer (4) is in partial contact with the upper surface of the first P-type nickel oxide layer (3) to form a double-layer P-type nickel oxide structure; the dielectric layer (5) covers the upper surfaces of the second P-type nickel oxide layer (4), part of the first P-type nickel oxide layer (3), and part of the N-type gallium oxide epitaxial layer (2); the upper surface of the N-type gallium oxide heavily doped region (6) is in contact with the cathode metal layer (7), the lower surface of the N-type gallium oxide heavily doped region (6) is in contact with the upper surface of the N-type gallium oxide epitaxial layer (2), and the remaining regions of the N-type gallium oxide epitaxial layer (2) are lightly doped; the right side of the cathode metal layer (7) is in contact with the dielectric layer (5); the left side of the anode metal layer (8) is in contact with the second P-type nickel oxide layer (4) and the dielectric layer (5).

[0007] In a preferred embodiment, the substrate (1) is an alumina hetero-substrate or an iron-doped gallium oxide homo-high-resistance substrate.

[0008] In a preferred embodiment, the thickness of the N-type gallium oxide epitaxial layer (2) is 0.2 - 1.2 μm, and the electron concentration is 10 16 ~5.0×10 17 cm -3 ; the electron concentration of the N-type gallium oxide heavily doped region (6) is 10 18 ~10 20 cm -3 .

[0009] In a preferred embodiment, the thickness of the first P-type nickel oxide layer (3) is 0.02 - 0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 , the distance from the cathode metal layer is 1 - 5 μm, and the distance from the anode metal layer is 0.1 - 3 μm.

[0010] In a preferred embodiment, the thickness of the second P-type nickel oxide layer (4) is 0.02 - 0.4 μm, and the hole concentration is 10 17 ~10 20 cm -3 , and it is higher than the first P-type nickel oxide layer (3), and the distance from the cathode metal layer is 3 - 8 μm.

[0011] In a preferred embodiment, the dielectric layer (5) serves to isolate air and protect the device, and is made of alumina, silicon nitride or silicon dioxide material.

[0012] In a preferred embodiment, the cathode metal layer (7) is made of Ti metal.

[0013] In a preferred embodiment, the material of the anode metal layer (8) is selected from Au, Ni, Pt, Cu or TiN.

[0014] The present invention also provides a method for manufacturing a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, and manufactures the above-mentioned high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, including the following steps:

[0015] Step 1) Perform a pretreatment on the substrate (1) to remove surface stains;

[0016] Step 2) Epitaxially grow an N-type gallium oxide epitaxial layer (2) on the pretreated substrate (1);

[0017] Step 3) Spin-coat a photoresist on the sample surface and form an opening pattern by using a standard photolithography process;

[0018] Step 4) Etch the gallium oxide epitaxial layer (2) by using a reactive ion etching process according to the opening pattern;

[0019] Step 5) Grow nickel oxide on the sample surface and strip the photoresist to form a first P-type nickel oxide layer (3);

[0020] Step 6) Spin-coat a photoresist on the sample surface and form an opening pattern by using a standard photolithography process;

[0021] Step 7) Grow nickel oxide on the sample surface and strip the photoresist to form a second P-type nickel oxide layer (4);

[0022] Step 8) Epitaxially grow a dielectric layer (5) on the surface after the growth of the second P-type nickel oxide layer (4) is completed;

[0023] Step 9) Spin-coat a photoresist on the sample surface and form a cathode opening pattern by using a standard photolithography process;

[0024] Step 10) Etch the dielectric layer (5) by using a reactive ion etching process according to the cathode opening pattern until reaching the upper surface of the N-type gallium oxide epitaxial layer (2);

[0025] Step 11) Form an N-type gallium oxide heavily doped region (6) on the upper surface of the gallium oxide epitaxial layer (2) exposed by etching by using an ion implantation process;

[0026] Step 12) Deposit metal by evaporation or sputtering process, and strip the photoresist to form the cathode metal layer (7);

[0027] Step 13) Spin-coat photoresist on the sample surface, and form the opening pattern at the anode by using the standard photolithography process;

[0028] Step 14) According to the opening pattern at the anode, etch the dielectric layer (5) by using the reactive ion etching process until reaching the upper surface of the gallium oxide epitaxial layer (2);

[0029] Step 15) Deposit metal by evaporation or sputtering process, and strip the photoresist to form the anode metal layer (8).

[0030] In a preferred embodiment, in step 2), an N-type gallium oxide epitaxial layer (2) is epitaxially grown on the pre-treated substrate (1) by using the hydride vapor phase epitaxy (HVPE) or metal-organic chemical vapor deposition (MOCVD) process.

[0031] Compared with the prior art, the present invention has the following beneficial effects: The present invention proposes a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide with different hole concentrations. By forming a PN junction structure between the first P-type nickel oxide layer and the N-type gallium oxide epitaxial layer, while giving full play to the advantages of the RESURF technology, the carrier concentration of the N-type gallium oxide epitaxial layer can be appropriately increased; then, by short-circuiting the second P-type nickel oxide layer with the anode, the inter-junction potential difference of the longitudinal PN junction formed by the overall P-type nickel oxide region and the N-type gallium oxide region is increased, further enhancing the role of longitudinal depletion assisting lateral depletion and improving the device breakdown voltage; moreover, its hole concentration is higher than that of the first P-type nickel oxide layer, and it has a strong dispersion effect on the anode electric field lines, effectively suppressing the electric field peak on the anode side, so that the gallium oxide LSBD device can obtain a higher reverse breakdown voltage with a lower on-resistance. Description of the Drawings

[0032] Figure 1 is a schematic diagram of the structure of a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide according to a preferred embodiment of the present invention;

[0033] Figure 2 is a specific process preparation diagram of a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide according to a preferred embodiment of the present invention;

[0034] Figure 3 is a diagram showing the breakdown voltage relationship between a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide according to a preferred embodiment of the present invention and a conventional gallium oxide lateral Schottky barrier diode;

[0035] Figure 4It is a comparison diagram of the surface electric field distribution in the drift region when a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide and a conventional-structured gallium oxide lateral Schottky barrier diode break down, which is a preferred embodiment of the present invention;

[0036] Figure 5 It is a forward characteristic relationship diagram of a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide and a conventional-structured gallium oxide lateral Schottky barrier diode, which is a preferred embodiment of the present invention;

[0037] Reference numerals: 1 - substrate, 2 - N-type gallium oxide epitaxial layer, 3 - first P-type nickel oxide layer, 4 - second P-type nickel oxide layer, 5 - dielectric layer, 6 - N-type gallium oxide heavily doped region, 7 - cathode metal layer, 8 - anode metal layer. Detailed implementation manners

[0038] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0039] It should be noted that the following detailed description is exemplary and is intended to provide further description of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present application belongs.

[0040] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary implementation manners according to the present application; as used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0041] A high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide, refer to Figures 1-5, including a substrate 1, an N-type gallium oxide epitaxial layer 2, a first P-type nickel oxide layer 3, a second P-type nickel oxide layer 4, a dielectric layer 5, an N-type gallium oxide heavily doped region 6, a cathode metal layer 7, and an anode metal layer 8 which are stacked; the stacked substrate 1 and the N-type gallium oxide epitaxial layer 2 are stacked in sequence from bottom to top; the first P-type nickel oxide layer 3 is embedded at the top of the N-type gallium oxide epitaxial layer 2; the second P-type nickel oxide layer 4 is deposited on the top of the N-type gallium oxide epitaxial layer 2, the right side of the second P-type nickel oxide layer 4 is short-circuited with the anode metal layer 8, and the lower surface of the second P-type nickel oxide layer 4 is in partial contact with the upper surface of the first P-type nickel oxide layer 3 to form a double-layer P-type nickel oxide structure; the dielectric layer 5 covers the upper surfaces of the second P-type nickel oxide layer 4, a part of the first P-type nickel oxide layer 3, and a part of the N-type gallium oxide epitaxial layer 2; the upper surface of the N-type gallium oxide heavily doped region 6 is in contact with the cathode metal layer 7, the lower surface of the N-type gallium oxide heavily doped region 6 is in contact with the upper surface of the N-type gallium oxide epitaxial layer 2, and the remaining region of the N-type gallium oxide epitaxial layer 2 is lightly doped; the right side of the cathode metal layer 7 is in contact with the dielectric layer 5; the left side of the anode metal layer 8 is in contact with the second P-type nickel oxide layer 4 and the dielectric layer 5; the substrate 1 is an alumina or iron-doped gallium oxide high-resistance substrate; the thickness of the N-type gallium oxide epitaxial layer 2 is 0.2 - 1.2 μm, and the electron concentration is 10 16 ~5.0×10 17 cm -3 , and the electron concentration of the N-type gallium oxide heavily doped region 6 is 10 18 ~10 20 cm -3 ; the thickness of the first P-type nickel oxide layer 3 is 0.02 - 0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 , the distance from the cathode metal layer is 1 - 5 μm, and the distance from the anode metal layer is 0.1 - 3 μm; the thickness of the second P-type nickel oxide layer 4 is 0.02 - 0.4 μm, and the hole concentration is 10 17 ~10 20 cm -3 , and it is higher than the first P-type nickel oxide layer 3, and the distance from the cathode metal layer is 3 - 8 μm; the dielectric layer 5 is made of alumina, hafnium oxide, silicon nitride, or silicon dioxide; the cathode metal layer 7 is made of Ti metal; the material of the anode metal layer 8 is selected from Au, Ni, Pt, Cu, or TiN.

[0042] Referring to Figure 2 , the present invention prepares a high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide, and gives the following embodiments:

[0043] Example, preparing a gallium oxide epitaxial layer with a thickness of 0.5 μm and an electron concentration of 2.4×10 17 cm -3 ; the first P-type nickel oxide layer has a thickness of 0.2 μm, a hole concentration of 7×10 17 cm -3 , a spacing of 4 μm from the cathode metal layer, and a spacing of 0.1 μm from the anode metal layer; the second P-type nickel oxide layer has a thickness of 0.1 μm, a hole concentration of 1.8×10 18 cm -3 and a spacing of 7.6 μm from the cathode metal layer, a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide.

[0044] Step 1) Immerse the alumina substrate 1 with a thickness of 500 μm into acetone solution, absolute ethanol solution and deionized water in sequence for ultrasonic cleaning, and blow-dry the cleaned alumina substrate 1 with nitrogen. Then, perform heat treatment on the cleaned and blow-dried alumina substrate 1 to remove surface contaminants.

[0045] Step 2) Use the MOCVD process to epitaxially grow a gallium oxide epitaxial layer 2 with a thickness of 0.5 μm and an electron concentration of 2.4×10 17 cm -3 .

[0046] Step 3) Spin-coat photoresist on the sample surface, use the standard photolithography process to form an opening pattern, and according to the opening pattern, use the reactive ion etching process to etch the gallium oxide epitaxial layer 2, with an etching depth of 0.2 μm.

[0047] Step 4) Use magnetron sputtering to grow a layer of nickel oxide with a thickness of 0.2 μm and a hole concentration of 7×10 17 cm -3 , and strip the photoresist to form the first P-type nickel oxide layer 3.

[0048] Step 5) Spin-coat photoresist on the sample surface, use the standard photolithography process to form an opening pattern, and according to the opening pattern, use magnetron sputtering to grow a layer of nickel oxide with a thickness of 0.1 μm and a hole concentration of 1.8×10 18 cm -3 , and strip the photoresist to form the second P-type nickel oxide layer 4.

[0049] Step 6) Epitaxially grow an alumina dielectric layer 5 with a thickness of 0.2 μm on the surface after the growth of the second P-type nickel oxide layer 4 is completed.

[0050] Step 7) Spin-coat photoresist on the sample surface, use the standard photolithography process to form a cathode metal opening pattern; according to the cathode metal opening pattern, use the reactive ion etching process to etch the alumina dielectric layer 5 until reaching the upper surface of the N-type gallium oxide epitaxial layer 2.

[0051] Step 8) An ion implantation process is used on the upper surface of the etched and exposed gallium oxide epitaxial layer 2 to form a heavily doped region 6 with an electron concentration of 10 20 cm -3 .

[0052] Step 9) A layer of metal is deposited by electron beam evaporation, and the photoresist is stripped to form a cathode metal layer 7.

[0053] Step 10) Photoresist is spin-coated on the sample surface, and a standard photolithography process is used to form an opening pattern at the anode. According to the opening pattern at the anode, a reactive ion etching process is used to etch the alumina dielectric layer 5 until reaching the upper surface of the gallium oxide epitaxial layer 2.

[0054] Step 11) An ion implantation process is used on the upper surface of the etched and exposed gallium oxide epitaxial layer 2 to form an N-type gallium oxide heavily doped region 6;

[0055] Step 12) A metal is deposited by evaporation or sputtering, and the photoresist is stripped to form a cathode metal layer 7;

[0056] Step 13) Photoresist is spin-coated on the sample surface, and a standard photolithography process is used to form an opening pattern at the anode;

[0057] Step 14) According to the opening pattern at the anode, a reactive ion etching process is used to etch the dielectric layer 5 until reaching the upper surface of the gallium oxide epitaxial layer 2;

[0058] Step 15) A layer of metal is deposited by electron beam evaporation, and the photoresist is stripped to form an anode metal layer 8.

[0059] More specifically, the pretreatment in Step 1) includes successively immersing the substrate 1 in acetone solution, anhydrous ethanol solution, and deionized water for ultrasonic cleaning for 5 - 15 min each, drying the cleaned substrate 1 with nitrogen, and then heat-treating the dried and cleaned substrate 1 to remove surface contaminants.

[0060] More specifically, in Step 2), an N-type gallium oxide epitaxial layer 2 is epitaxially grown on the pretreated substrate 1 by hydride vapor phase epitaxy (HVPE) or metalorganic chemical vapor deposition (MOCVD) process.

[0061] More specifically, in Steps 12) and 15), a metal layer is deposited by using one or more methods including magnetron sputtering, thermal evaporation, and electron beam evaporation.

[0062] More specifically, in steps 3), 6), 9), and 13), the specific method of spin coating is as follows: using a spin coater, set the rotation speed to 1000 - 3000 rpm / min, and the spin coating time to 5 - 30 s; finally, pre-bake at a temperature of 60 - 150 °C for 60 - 120 s.

[0063] The overall technical solution of the present invention mainly has two points. One is the double-layer P-type nickel oxide with different hole concentrations. The first P-type nickel oxide layer is located below the top of the N-type gallium oxide epitaxial layer, forming a PN junction structure with the N-type gallium oxide epitaxial layer, thereby effectively utilizing the RESURF technology to reduce the surface electric field in the form of longitudinal depletion assisting transverse depletion, improve the breakdown voltage of the device, and the carrier concentration of the N-type gallium oxide epitaxial layer can be appropriately increased to reduce the on-resistance of the device. In addition, there is a certain distance between the right side of the first P-type nickel oxide layer and the anode, which can prevent the device from experiencing premature breakdown in the nickel oxide region; the second P-type nickel oxide layer is deposited above the top of the N-type gallium oxide epitaxial layer and is short-circuited with the anode on the right side. Its hole concentration is higher than that of the first P-type nickel oxide layer, and it has a strong dispersing effect on the electric field lines at the anode edge, effectively suppressing the electric field peak on the anode side and further balancing the surface electric field. The second point is that the second P-type nickel oxide layer is short-circuited with the anode, and its lower surface is in partial contact with the upper surface of the first P-type nickel oxide layer, increasing the inter-junction potential difference between the overall P-type nickel oxide region and the N-type gallium oxide region, further enhancing the effect of longitudinal depletion assisting transverse depletion, and achieving higher breakdown voltage of the device.

[0064] The above content is a further detailed description of the present invention in combination with specific preferred embodiments. It cannot be determined that the specific implementation of the present invention is only limited to these descriptions. For those of ordinary skill in the technical field to which the present invention belongs, without departing from the concept of the present invention, several simple deductions or substitutions can still be made, which should all be regarded as belonging to the protection scope of the present invention.

[0065] Working principle of the present invention: The device performance is improved by introducing a double-layer P-type nickel oxide with different hole concentrations. Among them, the first P-type nickel oxide layer is located below the top of the N-type gallium oxide epitaxial layer, forming a vertical PN junction structure with the N-type gallium oxide epitaxial layer, so as to effectively utilize the RESURF technology, in the form of vertical depletion assisting horizontal depletion, reduce the surface electric field, improve the breakdown voltage of the device. At the same time, the carrier concentration of the N-type gallium oxide epitaxial layer can be appropriately increased to reduce the on-resistance of the device; in addition, the right side of the first P-type nickel oxide layer is kept at a certain distance from the anode, which can avoid premature breakdown of the device in the nickel oxide region; the second P-type nickel oxide layer is deposited above the top of the N-type gallium oxide epitaxial layer, the right side is short-circuited with the anode, and the lower surface is in partial contact with the upper surface of the first P-type nickel oxide layer, increasing the inter-junction potential difference between the overall P-type nickel oxide region and the N-type gallium oxide region, further enhancing the effect of vertical depletion assisting horizontal depletion, and realizing higher breakdown voltage of the device; moreover, the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, and it has a stronger dispersing effect on the electric field lines at the anode edge, effectively suppressing the electric field peak on the anode side and further balancing the surface electric field; therefore, this device can withstand a higher reverse breakdown voltage with a lower on-resistance, thus obtaining a gallium oxide LSBD device with excellent performance.

[0066] Figure 3 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is 7×10 17 cm -3 is given, and the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is 1.8×10 18 cm -3 . The comparison of the breakdown voltage relationship between the high-breakdown-voltage gallium oxide lateral Schottky barrier diode realized by short-circuiting with the anode and the conventional-structured gallium oxide lateral Schottky barrier diode is shown. According to Figure 3 It can be seen that the breakdown voltage of the conventional gallium oxide lateral Schottky barrier diode without a nickel oxide layer is only 1215 V, and the breakdown voltage of the high-breakdown-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide reaches 3039 V, and the breakdown voltage of the device has increased by 150%.

[0067] Figure 4 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is 7×10 17 cm -3 is given, and the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, which is 1.8×10 18 cm -3 . The comparison diagram of the drift region surface electric field distribution when the high-breakdown-voltage gallium oxide lateral Schottky barrier diode realized by short-circuiting with the anode and the conventional-structured gallium oxide lateral Schottky barrier diode break down is shown. According to Figure 4It can be seen that the surface of the drift region of a conventional gallium oxide lateral Schottky barrier diode without a nickel oxide layer is mainly composed of a Schottky junction and an N + The N junction region bears the electric field. The high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide enables more regions on the surface of the drift region to jointly bear the electric field, making the electric field distribution more uniform and greatly improving the breakdown voltage capability of the gallium oxide lateral Schottky barrier diode.

[0068] Figure 5 The hole concentration of the first P-type nickel oxide layer in the embodiment of the present invention is given as 7×10 17 cm -3 , the hole concentration of the second P-type nickel oxide layer is higher than that of the first P-type nickel oxide layer, being 1.8×10 18 cm -3 , and the comparison of the forward characteristics between the high-voltage gallium oxide lateral Schottky barrier diode realized by short-circuiting with the anode and the conventional gallium oxide lateral Schottky barrier diode structure is shown. According to Figure 5 It can be seen that the specific on-resistance of a conventional gallium oxide lateral Schottky barrier diode without a nickel oxide layer is 17.4 mΩ·cm 2 , and the specific on-resistance of the high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide is 7.7 mΩ·cm 2 , and the specific on-resistance of the device is reduced by 56%.

Claims

1. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, characterized in that, It includes a substrate (1), an N-type gallium oxide epitaxial layer (2), a first P-type nickel oxide layer (3), a second P-type nickel oxide layer (4), a dielectric layer (5), an N-type gallium oxide heavily doped region (6), a cathode metal layer (7), and an anode metal layer (8) which are stacked. The stacked substrate (1) and the N-type gallium oxide epitaxial layer (2) are stacked in sequence from bottom to top; the first P-type nickel oxide layer (3) is embedded at the top of the N-type gallium oxide epitaxial layer (2); the second P-type nickel oxide layer (4) is deposited on the top of the N-type gallium oxide epitaxial layer (2), the right side of the second P-type nickel oxide layer (4) is short-circuited with the anode metal layer (8), and the lower surface of the second P-type nickel oxide layer (4) is in partial contact with the upper surface of the first P-type nickel oxide layer (3) to form a double-layer P-type nickel oxide structure; the dielectric layer (5) covers the upper surfaces of the second P-type nickel oxide layer (4), a part of the first P-type nickel oxide layer (3), and a part of the N-type gallium oxide epitaxial layer (2); the upper surface of the N-type gallium oxide heavily doped region (6) is in contact with the cathode metal layer (7), the lower surface of the N-type gallium oxide heavily doped region (6) is in contact with the upper surface of the N-type gallium oxide epitaxial layer (2), and the rest of the N-type gallium oxide epitaxial layer (2) is lightly doped; the right side of the cathode metal layer (7) is in contact with the dielectric layer (5); the left side of the anode metal layer (8) is in contact with the second P-type nickel oxide layer (4) and the dielectric layer (5). The thickness of the N-type gallium oxide epitaxial layer (2) is 0.2 - 1.2 μm, and the electron concentration is 10 16 ~5.0×10 17 cm -3 , and the electron concentration of the N-type gallium oxide heavily doped region (6) is 10 18 ~10 20 cm -3 ; The thickness of the first P-type nickel oxide layer (3) is 0.02 to 0.4 μm, and the hole concentration is 10 17 ~10 19 cm -3 , the distance from the cathode metal layer is 1 to 5 μm, and the distance from the anode metal layer is 0.1 to 3 μm; The thickness of the second P-type nickel oxide layer (4) is 0.02 to 0.4 μm, and the hole concentration is 10 17 ~10 20 cm -3 , which is higher than that of the first P-type nickel oxide layer (3), and the distance from the cathode metal layer is 3 to 8 μm.

2. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that, The substrate (1) is an alumina hetero-substrate or an iron-doped gallium oxide homo high-resistance substrate.

3. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that, The dielectric layer (5) serves to isolate air and protect the device, and is made of alumina, silicon nitride, or silicon dioxide material.

4. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that, The cathode metal layer (7) is made of Ti metal.

5. A high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 1, characterized in that, The material of the anode metal layer (8) is selected from Au, Ni, Pt, Cu, or TiN.

6. A preparation method of a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide, characterized in that A high-voltage gallium oxide lateral Schottky barrier diode realized by using a double-layer P-type nickel oxide as described in any one of the above claims 1-5 is prepared, including the following steps: Step 1) Pretreat the substrate (1) to remove surface stains. Step 2) Epitaxially grow an N-type gallium oxide epitaxial layer (2) on the pretreated substrate (1). Step 3) Spin-coat photoresist on the sample surface and form an opening pattern by using a standard photolithography process. Step 4) Etch the N-type gallium oxide epitaxial layer (2) according to the opening pattern by using a reactive ion etching process. Step 5) Grow nickel oxide on the sample surface and strip the photoresist to form the first P-type nickel oxide layer (3). Step 6) Spin-coat photoresist on the sample surface and form an opening pattern by using a standard photolithography process. Step 7) Grow nickel oxide on the sample surface and strip the photoresist to form the second P-type nickel oxide layer (4). Step 8) Epitaxially grow a dielectric layer (5) on the surface after the growth of the second P-type nickel oxide layer (4) is completed. Step 9) Spin-coat photoresist on the sample surface and form a cathode opening pattern by using a standard photolithography process. Step 10) Etch the dielectric layer (5) according to the cathode opening pattern by using a reactive ion etching process until reaching the upper surface of the N-type gallium oxide epitaxial layer (2). Step 11): An N-type gallium oxide heavily doped region (6) is formed on the upper surface of the etched and exposed N-type gallium oxide epitaxial layer (2) by ion implantation process; Step 12): Metal is deposited by evaporation or sputtering process, and the photoresist is stripped to form a cathode metal layer (7); Step 13): Photoresist is spin-coated on the sample surface, and an anode opening pattern is formed by standard photolithography process; Step 14): According to the anode opening pattern, the dielectric layer (5) is etched by reactive ion etching process until reaching the upper surface of the N-type gallium oxide epitaxial layer (2); Step 15): Metal is deposited by evaporation or sputtering process, and the photoresist is stripped to form an anode metal layer (8).

7. The preparation method of a high-voltage gallium oxide lateral Schottky barrier diode realized by using double-layer P-type nickel oxide according to claim 6, characterized in that, In step 2), an N-type gallium oxide epitaxial layer (2) is epitaxially grown on the pre-treated substrate (1) by hydride vapor phase epitaxy (HVPE) or metal organic chemical vapor deposition (MOCVD) process.

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