A low-cost heat-enhanced gallium nitride schottky barrier diode and a preparation method thereof

Abstract

The application discloses a low-cost heat-enhanced gallium nitride Schottky barrier diode and a preparation method thereof. The diode comprises a transmission layer, a drift layer arranged on the lower surface of the transmission layer, a positive electrode arranged on the middle area of the lower surface of the drift layer, a negative electrode arranged on the middle area of the upper surface of the transmission layer, a first dielectric layer arranged on the lower surface of the remaining drift layer and the sidewall and part of the lower surface of the positive electrode, a second dielectric layer arranged on the upper surface of the remaining transmission layer and the sidewall and part of the upper surface of the negative electrode, a part of a positive electrode thickening layer arranged on the lower surface of the first dielectric layer and the lower surface of the remaining negative electrode, another part of the positive electrode thickening layer exposed to the first dielectric layer, a heat dissipation substrate arranged on the lower surface of the positive electrode thickening layer and a negative electrode thickening layer arranged on the upper surface of part of the second dielectric layer and the upper surface of the remaining negative electrode. The application realizes a full-vertical gallium nitride Schottky barrier diode with greater forward current and higher heat dissipation capacity.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductors, and particularly relates to a low-cost heat-enhanced gallium nitride Schottky barrier diode and a preparation method. BACKGROUND

[0002] Gallium nitride (GaN) material has excellent characteristics such as a large band gap, a high breakdown field strength, a high electron mobility and a high thermal conductivity, and a device made of the gallium nitride material has excellent performances such as a strong withstand voltage, a small on-resistance, a fast switching speed, a high frequency and a high temperature resistance, which cannot be achieved by traditional silicon-based materials, and meets the needs of people under the rapid development of modern high-tech. A GaN-based Schottky barrier diode is a device for controlling conduction and turn-off through a Schottky barrier formed by metal and semiconductor contact, is a basic device in a power conversion system, and is widely used in circuits such as switching power supplies, frequency converters and inverters, and rapidly develops along with emerging fields such as 5G communication and wireless fast charging.

[0003] A traditional quasi-vertical planar structure GaN Schottky barrier diode has a lateral current path, and current is concentrated to the edge due to the lateral resistance of the path, resulting in a current crowding effect, and this phenomenon will become more serious as the area of the anode metal increases. In addition, current passes through the surface of the material layer, and defects on the surface of the material can trap electrons or holes as traps, thereby reducing the effective conductive carriers and directly reducing the forward conduction current of the device. However, a GaN Schottky barrier diode with a full vertical current path has a higher requirement for heat dissipation due to a larger forward current density, and a large power density is generated in high-power applications, resulting in local high temperature, and the heat dissipation surface of the full vertical device is mainly concentrated on the bottom electrode, and the heat needs to be effectively dissipated in the substrate and the packaging material to ensure stable operation and service life of the device.

[0004] In summary, the traditional quasi-vertical planar structure GaN Schottky barrier diode will have a reduced forward conduction current due to the influence of the current crowding effect and the material surface defects, and the GaN Schottky barrier diode with a full vertical current path needs to have better heat dissipation performance due to a larger forward current. Therefore, research and development of a heat-enhanced GaN-based Schottky barrier diode with higher current and lower cost have become one of the important research directions at home and abroad, and it is an urgent problem to realize a GaN Schottky barrier diode with high forward current, low on-resistance, low preparation cost and heat-enhanced performance. SUMMARY

[0005] In order to solve the above problems in the prior art, the application provides a low-cost heat-enhanced gallium nitride Schottky barrier diode and a preparation method. The technical problem to be solved by the application is solved through the following technical scheme.

[0006] In a first aspect, embodiments of the present application provide a low-cost heat-enhanced gallium nitride Schottky barrier diode, which comprises a transport layer, a drift layer, an anode electrode, a first dielectric layer, an anode electrode thickening layer, a heat dissipation substrate, a cathode electrode, a second dielectric layer and a cathode electrode thickening layer, wherein

[0007] The drift layer is arranged on the lower surface of the transport layer.

[0008] The anode electrode is arranged on the middle region of the lower surface of the drift layer.

[0009] The cathode electrode is arranged on the middle region of the upper surface of the transport layer.

[0010] The first dielectric layer is arranged on the remaining lower surface of the drift layer, and the sidewall and part of the lower surface of the anode electrode.

[0011] The second dielectric layer is arranged on the remaining upper surface of the transport layer, and the sidewall and part of the upper surface of the cathode electrode.

[0012] Part of the anode electrode thickening layer is arranged on the lower surface of the first dielectric layer, and the remaining lower surface of the cathode electrode, and the other part of the anode electrode thickening layer is exposed to the first dielectric layer.

[0013] The heat dissipation substrate is arranged on the lower surface of the anode electrode thickening layer.

[0014] The cathode electrode thickening layer is arranged on part of the upper surface of the second dielectric layer, and the remaining upper surface of the cathode electrode.

[0015] In an embodiment of the present application, the thickness of the anode electrode thickening layer is 0.5 μm to 10 μm.

[0016] In an embodiment of the present application, the heat dissipation substrate is a SiC substrate, a Si / Al2O3 substrate with deposited diamond film or a polycrystalline diamond substrate.

[0017] In an embodiment of the present application, the thickness of the heat dissipation substrate is 50 μm to 150 μm.

[0018] In an embodiment of the present application, the thickness of the cathode electrode thickening layer is 0.5 μm to 10 μm.

[0019] In a second aspect, embodiments of the present application provide a preparation method of a low-cost heat-enhanced gallium nitride Schottky barrier diode, which comprises:

[0020] Obtaining an epitaxial wafer comprising a substrate layer, a nucleation layer, a transport layer and a drift layer stacked in order from bottom to top;

[0021] Forming an anode electrode on the upper surface of the drift layer.

[0022] depositing dielectric material on the upper surface of the drift layer and the anode electrode, and etching a dielectric opening above the anode electrode to form a first dielectric layer;

[0023] forming an anode electrode thickening layer on the upper surface of the anode electrode and the first dielectric layer;

[0024] obtaining a heat dissipation substrate, and permanently bonding the anode electrode thickening layer and the heat dissipation substrate;

[0025] performing a film reversal process on the device structure after permanent bonding, and etching away the substrate layer and the nucleation layer;

[0026] forming a cathode electrode on the upper surface of the transmission layer, and the cathode electrode is directly above the anode electrode;

[0027] depositing dielectric material on the upper surface of the transmission layer and the cathode electrode, and etching a dielectric opening above the cathode electrode to form a second dielectric layer;

[0028] forming a cathode electrode thickening layer on the upper surface of the cathode electrode and part of the second dielectric layer;

[0029] etching the dielectric layer on one side until the upper surface of the anode electrode thickening layer, so that the anode electrode thickening layer is exposed to the first dielectric layer; wherein, after etching, the anode electrode is located in the middle region of the lower surface of the drift layer.

[0030] In an embodiment of the present application, forming an anode electrode thickening layer on the upper surface of the anode electrode and the first dielectric layer comprises:

[0031] forming an anode electrode thickening layer with a thickness of 0.5 μm to 10 μm on the upper surface of the anode electrode and the first dielectric layer by electroplating process.

[0032] In an embodiment of the present application, the obtained heat dissipation substrate is a SiC substrate, a Si / Al2O3 substrate with deposited diamond film, or a polycrystalline diamond substrate.

[0033] In an embodiment of the present application, before permanently bonding the anode electrode thickening layer and the heat dissipation substrate, further comprising:

[0034] electroplating the same metal as the anode electrode thickening layer on the heat dissipation substrate.

[0035] In an embodiment of the present application, forming a cathode electrode thickening layer on the upper surface of the cathode electrode and part of the second dielectric layer comprises:

[0036] A cathode thickening layer with a thickness of 0.5-10 microns is formed on the upper surface of the cathode electrode and part of the second dielectric layer by electroplating.

[0037] The present application has the following advantages:

[0038] The low-cost heat-enhanced gallium nitride Schottky barrier diode provided by the present application innovatively prepares an anode electrode at the bottom of a drift layer, and introduces an anode thickening layer and a heat dissipation substrate, thereby realizing a full-vertical structure gallium nitride Schottky barrier diode with a wider conductive channel, larger forward current and higher heat dissipation capacity, avoiding the phenomenon that the forward current of a traditional quasi-vertical planar structure gallium nitride Schottky barrier diode is reduced due to current crowding effect, effectively solving the heat dissipation problem of the full-vertical structure gallium nitride Schottky barrier diode caused by a large power density, and guaranteeing the reliability, service life and low cost of the device. Compared with the traditional hetero-substrate quasi-vertical planar structure gallium nitride Schottky barrier diode, the thick and weakly conductive substrate layer is peeled off, the anode thickening layer makes up for the deficiency that a large on-resistance is easily generated if the electrode is directly prepared at the bottom of the substrate layer, and the heat dissipation substrate solves the support problem after the substrate layer of the device is peeled off. In general, the embodiment of the present application improves the forward current density and reduces the on-resistance of the full-vertical structure gallium nitride Schottky barrier diode, and the introduced heat dissipation substrate improves the heat dissipation performance of the device. The full-vertical structure gallium nitride Schottky barrier diode with the heat dissipation substrate further promotes the application of the gallium nitride Schottky barrier diode in the high-frequency, high-voltage and high-power field with the advantages of large current, heat enhancement and low cost.

[0039] The present application will be further described in detail below with reference to the accompanying drawings and embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0040] Figure 1 is a structure schematic diagram of a low-cost heat-enhanced gallium nitride Schottky barrier diode provided by the embodiment of the present application;

[0041] Figure 2 is a preparation method flowchart of a low-cost heat-enhanced gallium nitride Schottky barrier diode provided by the embodiment of the present application;

[0042] Figures 3a to 3j is a structure schematic diagram corresponding to the preparation process of a low-cost heat-enhanced gallium nitride Schottky barrier diode provided by the embodiment of the present application.

[0043] MARKED FOR EXPLANATION:

[0044] 1-substrate layer; 2-nucleation layer; 3-conduction layer; 4-drift layer; 5-anode electrode; 6-first dielectric layer; 7-anode thickening layer; 8-heat dissipation substrate; 9-cathode electrode; 10-second dielectric layer; 11-cathode thickening layer. DETAILED DESCRIPTION

[0045] The application will be described in further detail below with reference to specific embodiments, but the embodiments of the application are not limited thereto.

[0046] In a first aspect, referring to Figure 1 The embodiment of the application provides a low-cost heat-enhanced gallium nitride Schottky barrier diode, which comprises a transmission layer 3, a drift layer 4, a positive electrode 5, a first dielectric layer 6, a positive electrode thickening layer 7, a heat dissipation substrate 8, a negative electrode 9, a second dielectric layer 10 and a negative electrode thickening layer 11; wherein,

[0047] The drift layer 4 is arranged on the lower surface of the transmission layer 3;

[0048] The positive electrode 5 is arranged on the middle region of the lower surface of the drift layer 4;

[0049] The negative electrode 9 is arranged on the middle region of the upper surface of the transmission layer 3;

[0050] The first dielectric layer 6 is arranged on the lower surface of the remaining drift layer 4, and the sidewall and part of the lower surface of the positive electrode 5;

[0051] The second dielectric layer 10 is arranged on the upper surface of the remaining transmission layer 3, and the sidewall and part of the upper surface of the negative electrode 9;

[0052] Part of the positive electrode thickening layer 7 is arranged on the lower surface of the first dielectric layer 6 and the lower surface of the remaining negative electrode 9, and another part of the positive electrode thickening layer 7 is exposed to the first dielectric layer 6;

[0053] The heat dissipation substrate 8 is arranged on the lower surface of the positive electrode thickening layer 7;

[0054] The negative electrode thickening layer 11 is arranged on part of the upper surface of the second dielectric layer 10 and the upper surface of the remaining negative electrode 9.

[0055] The transmission layer 3 and the drift layer 4 are both made of GaN, the transmission layer 3 is n-type heavily doped GaN, the thickness is 0.5-5 μm, the silicon doping concentration is 1×10 18 cm -3 -1×10 20 cm -3 The heavily doped transmission layer 3 can relieve lattice mismatch stress and reduce on-resistance, the drift layer 4 is n-type lightly doped GaN drift layer, the thickness is 0.1-10 μm, the silicon doping concentration is 1×10 15 cm -3 -5×10 17 cm -3The light-doped drift layer 4 makes the distribution of the electric field in the device more uniform, and ensures a high breakdown voltage; the material of the first dielectric layer 6 and the second dielectric layer 10 includes one or more of Al2O3, SiO2 and SiN.

[0056] The embodiment of the present application selects Ni / Au (50nm / 150nm) metal, Pt / Au (50nm / 150nm) metal, W / Au (50nm / 150nm) metal or Mo / Au (50nm / 150nm) metal as the anode 5 of the gallium nitride Schottky barrier diode, because: the metals Ni, Pt, W and Mo can form high-quality Schottky contact on the surface of the GaN material due to their excellent adhesion; meanwhile, the introduction of the Au layer not only effectively improves the conductivity of the diode; and because of the chemical inertness of Au, the oxidation of the lower metal (Ni, Pt, W, Mo) is prevented, and the reliability of the device is enhanced. Finally, a good Schottky contact is formed between the anode 5 and the transmission layer 3.

[0057] The embodiment of the present application selects Ti / Al / Ni / Au (20nm / 140nm / 50nm / 40nm) metal as the cathode 10 of the gallium nitride Schottky barrier diode, because: the metal Ti with a lower work function is selected as the contact layer, which is conducive to the formation of an ideal ohmic contact at the Au half-contact interface, and reduces the contact resistance; the metal Al optimizes the interface bonding effect by promoting the solid-phase reaction between N atoms and Ti atoms; the metal Ni acts as a barrier layer to prevent interpenetration between different metal layers; the metal Au is used to protect the lower metal from oxidation, and enhances the reliability of the device. Finally, a good ohmic contact is formed between the cathode 10 and the transmission layer 3.

[0058] The material of the anode thickening layer 7 of the embodiment of the present application is not limited, and can be Ti / Au metal, for example, to thicken the anode 5, and the thickness of the anode thickening layer 7 is 0.5μm-10μm. Meanwhile, the material of the cathode thickening layer 11 is not limited, and can be Ti / Au metal, for example, to thicken the cathode 10, and the thickness of the cathode thickening layer 12 is 0.5μm-10μm. To facilitate the application of bias voltage, the anode thickening layer 7 of the embodiment of the present application is exposed to the first dielectric layer 6. The anode thickening layer 7 and the cathode thickening layer 11 are used to apply bias voltage to the low-cost thermal-enhanced gallium nitride Schottky barrier diode.

[0059] The thickness of the heat dissipation substrate 8 is 50-150 μm; the material of the heat dissipation substrate 8 is SiC substrate, Si / Al2O3 substrate with deposited diamond film or polycrystalline diamond substrate. The full vertical structure has the advantages of greater forward current and higher current density, but the heat dissipation problem caused by greater power density is solved by the heat dissipation substrate 8 which is made of high-thermal-conductivity material and can effectively improve the heat dissipation capacity of the device, thus facilitating industrialization. The surface of the heat dissipation substrate 8 bonded with the thickened anode electrode layer 7 is provided with the same metal as the thickened anode electrode layer 7, so that good bonding effect is achieved between the heat dissipation substrate 8 and the thickened anode electrode layer 7.

[0060] In summary, the low-cost heat-enhanced gallium nitride Schottky barrier diode provided by the embodiment of the application innovatively prepares the anode electrode 5 at the bottom of the drift layer 4, and introduces the thickened anode electrode layer 7 and the heat dissipation substrate 8, so that the full vertical structure gallium nitride Schottky barrier diode with wider conductive channel, greater forward current and higher heat dissipation capacity is realized, the phenomenon of reduced forward current caused by current crowding effect of the traditional quasi-vertical planar structure gallium nitride Schottky barrier diode is avoided, the heat dissipation problem caused by greater power density of the full vertical structure gallium nitride Schottky barrier diode is effectively solved by the heat dissipation substrate 8, the reliability, service life and low cost of the device are ensured, and compared with the traditional hetero-substrate quasi-vertical planar structure gallium nitride Schottky barrier diode, the thick and weakly conductive substrate layer is peeled off, the thickened anode electrode layer 7 makes up for the deficiency that a large on-resistance is easily generated if the electrode is directly prepared at the bottom of the substrate layer, and the heat dissipation substrate 8 solves the support problem after the substrate layer of the device is peeled off. In general, the embodiment of the application is the full vertical structure gallium nitride Schottky barrier diode, the forward current density is improved, the on-resistance is reduced, the heat dissipation performance of the device is improved by introducing the heat dissipation substrate, and the full vertical structure gallium nitride Schottky barrier diode with the heat dissipation substrate further promotes the application of the gallium nitride Schottky barrier diode in the high-frequency, high-voltage and high-power field with the advantages of large current, heat enhancement and low cost.

[0061] In the second aspect, referring to Figure 2 , the embodiment of the application provides a preparation method of a low-cost heat-enhanced gallium nitride Schottky barrier diode.

[0062] S10, an epitaxial wafer including a substrate layer 1, a nucleation layer 2, a transport layer 3 and a drift layer 4 stacked in order from bottom to top is obtained.

[0063] In the embodiment of the application, the epitaxial wafer is obtained as Figure 3aThe shown epitaxial wafer includes, from bottom to top, a substrate layer 1, a nucleation layer 2, a transport layer 3 and a drift layer 4. The material of the substrate layer 1 is Si or sapphire, and the production technology is mature and the cost is low; the material of the nucleation layer 2 is one or more of AlN, AlGaN and GaN, and the thickness is 30 nm to 90 nm; the transport layer 3 is n-type heavily doped GaN, the thickness is 0.5 μm to 5 μm, the silicon doping concentration is 1 x 10 18 cm -3 to 1 x 10 20 cm -3 ; the drift layer 4 is n-type lightly doped GaN drift layer, the thickness is 0.1 μm to 10 μm, the silicon doping concentration is 1 x 10 15 cm -3 to 5 x 10 17 cm -3 . The epitaxial wafer can be obtained by MOCVD (Metal-organic Chemical Vapor Deposition) epitaxial growth, or can be an epitaxial wafer directly obtained with the existing structure.

[0064] Next, the epitaxial wafer is subjected to organic cleaning to remove the surface oxide layer. Specifically, first, the epitaxial wafer is soaked in an acetone solution and subjected to ultrasonic cleaning for 5 minutes to remove organic contaminants on the surface of the epitaxial wafer; then, the epitaxial wafer is placed in an isopropyl alcohol solution and subjected to ultrasonic cleaning for 5 minutes to effectively remove residual acetone on the surface of the epitaxial wafer, and then the epitaxial wafer is placed in deionized water to wash and remove isopropyl alcohol residues attached to the surface of the epitaxial wafer, and finally the surface of the epitaxial wafer is blown dry with high-purity nitrogen to ensure that the epitaxial wafer has no residual liquid; then, the surface oxide layer of the epitaxial wafer is removed, the epitaxial wafer is placed in a BOE (Buffered Oxide Etch) solution with a concentration of 1:7 for 30 seconds, then washed with a large amount of deionized water, and finally the deionized water on the surface of the epitaxial wafer is blown dry with high-purity nitrogen, completing the entire cleaning process of the epitaxial wafer. The cleaning of the epitaxial wafer is a necessary process before the device is prepared, which can reduce the interference of oxidation and contamination on the subsequent process of the device and the influence on the performance of the device.

[0065] S20, forming a positive electrode 5 on the upper surface of the drift layer 4.

[0066] The embodiment of the present application performs uniform coating, baking, exposure and development on the upper surface of the drift layer 4, defines a positive electrode area on the middle position of the upper surface of the drift layer 4, and then grows a Ni / Au (50nm / 150nm) metal, Pt / Au (50nm / 150nm) metal, W / Au (50nm / 150nm) metal or Mo / Au (50nm / 150nm) metal layer on the positive electrode area by using an electron beam evaporation technology, and then removes residual coating and excess metal by organic cleaning to form a positive electrode 5 as shown in Figure 3b The positive electrode 5 forms a Schottky contact with the drift layer 4. In order to reduce the influence of Au half-contact interface state and inhibit reverse leakage, the epitaxial wafer with the positive electrode 5 is subjected to an annealing treatment at 450℃ for 5min in a nitrogen atmosphere.

[0067] S30, deposits a dielectric material on the upper surface of the drift layer 4 and the positive electrode 5, and etches a dielectric opening above the positive electrode 5 to form a first dielectric layer 6.

[0068] The embodiment of the present application deposits a 20nm-thick Al2O3, SiO2 or SiN dielectric material on the upper surface of the drift layer 4 and the sidewall and upper surface of the positive electrode 5 by using a PECVD (Plasma Enhanced Chemical Vapor Deposition) process to perform passivation treatment on the surface of the device structure obtained in S20, reduces the influence of surface state on the device performance, and effectively prevents the surface of the epitaxial wafer from being polluted by external impurities. After the deposition of the first dielectric layer 6, a dry etching is performed on the positive electrode area by using a RIE (Reactive Ion Etching) process, the etching gas is F-based gas such as CF4 and SF6, and part of the first dielectric layer 6 is etched away to form a necessary positive electrode contact hole on the upper surface of the first dielectric layer 6 as shown in Figure 3c .

[0069] S40, forms a positive electrode thickening layer 7 on the upper surface of the positive electrode 5 and the first dielectric layer 6.

[0070] The device structure obtained in S30 is sequentially soaked in acetone and isopropyl alcohol solution, and is ultrasonically cleaned for 5 minutes respectively, and then is rinsed with deionized water and dried with high-purity nitrogen; after cleaning, a positive electrode thickening layer 7 with a thickness of 0.5 μm to 10 μm is formed on the upper surface of the first dielectric layer 6 and the upper surface of the positive electrode 5 by using an electroplating process: in the electroplating tank, by controlling the current density, temperature and solution composition and other process parameters, the thickness and uniformity of the metal layer are accurately controlled, the positive electrode of the positive electrode area is thickened to the required thickness, defects in the deposition process are eliminated by annealing, the crystallization quality of the metal layer is increased, and the positive electrode thickening layer 7 with a thickness of 0.5 μm to 10 μm is obtained, as shown in Figure 3d .

[0071] S50, obtain the heat dissipation substrate 8, and permanently bond the positive electrode thickening layer 7 and the heat dissipation substrate 8.

[0072] The embodiment of the application first obtains the heat dissipation substrate 8, and the obtained heat dissipation substrate 8 is a SiC substrate, a Si / Al2O3 substrate deposited with a diamond film or a polycrystalline diamond substrate. Then, the same metal as the positive electrode thickening layer 7 is electroplated on the heat dissipation substrate 8 by using an electroplating process; and the surface of the heat dissipation substrate 8 on which the metal is electroplated is permanently bonded to the upper surface of the positive electrode thickening layer 7 by using a bonding technology, and the obtained device structure is as shown in Figure 3e . More specifically: the obtained heat dissipation substrate 8 is cleaned, and after cleaning, the same metal as the positive electrode thickening layer 7 is electroplated on the surface of the heat dissipation substrate 8 bonded with the positive electrode thickening layer 7 by using an electroplating process, and the metal ensures that the heat dissipation substrate 8 and the positive electrode thickening layer 7 are well bonded, and then the positive electrode thickening layer 7 and the surface of the heat dissipation substrate 8 electroplated with the metal are heated to a temperature higher than the recrystallization temperature of the heat dissipation substrate 8 by using a bonding technology, the local metal plastically deforms, and the metal is combined between the metal contact interfaces by diffusion and bonding through the external applied pressure.

[0073] S60, the device structure after permanent bonding is developed, and the substrate layer 1 and the nucleation layer 2 are etched.

[0074] The embodiment of the present application firstly carries out film reversal processing on the whole device structure obtained in S50; then, etching is carried out on the substrate layer 1: when the substrate layer 1 is a Si substrate, a mechanical grinding process is adopted to rapidly reduce the thickness of the substrate layer 1, and then deep silicon etching is adopted to completely remove the substrate layer; when the substrate layer 1 is an Al2O3 substrate, a laser stripping technique is adopted to remove the substrate layer. Finally, ICP (Inductively Couple Plasma) technology is adopted to accurately etch the nucleation layer 2; during the etching process, a mixed gas of Cl2 / BCl3 is adopted to etch the material, the flow rate of Cl2 is 10 sccm, the flow rate of BCl3 is 25 sccm, the ICP power is 150 W, the RF power is 50 W, and the material etching rate is about 55 nm / min, and then nitrogen gas is used for drying, so as to ensure the etching selectivity and the accurate removal of the material. Finally, high-purity nitrogen gas is used to dry the device structure with the removed substrate layer 1 and nucleation layer 2, so as to ensure that the surface is free of residual liquid or pollutants. Figure 3f The device structure with the removed substrate layer 1 and nucleation layer 2 is subjected to drying treatment, so as to ensure that the surface is free of residual liquid or pollutants.

[0075] S70, a cathode 9 is formed on the upper surface of the transport layer 3, and the cathode 9 is located directly above the anode 5.

[0076] The embodiment of the present application carries out glue uniformizing, glue baking, exposure and development on the upper surface of the transport layer 3, defines a cathode region on the middle position of the upper surface of the transport layer 3, adopts electron beam evaporation technology to grow Ti / Al / Ni / Au (20 nm / 140 nm / 50 nm / 40 nm) metal in the cathode region, and then removes residual glue and excess metal through organic cleaning, so as to form the cathode 9 as shown in Figure 3g The cathode 9 forms ohmic contact with the transport layer 3, and the cathode 9 is located directly above the anode 5. In order to reduce the influence of Au half-contact interface state and inhibit reverse leakage, the device structure with the formed cathode 10 is subjected to 850℃ 5min annealing treatment in a nitrogen atmosphere, so as to form a good ohmic contact.

[0077] S80, a dielectric material is deposited on the upper surface of the transport layer 3 and the cathode 9, and a dielectric opening is etched on the cathode 9, so as to form a second dielectric layer 10.

[0078] The embodiment of the present application uses PECVD process to deposit a layer of Al2O3, SiO2 or SiN dielectric material with a thickness of 20 nm on the upper surface of the transport layer 3 and the sidewall and upper surface of the cathode 9, so as to carry out passivation treatment on the surface of the transport layer 3 and the cathode 9, reduce the influence of surface state on the performance of the device, and effectively prevent the surface of the transport layer 3 from being polluted by external impurities. After the deposition of the second dielectric layer 10 is completed, RIE process is adopted to carry out dry etching on the cathode region, so as to open necessary electrode contact holes on the second dielectric layer 10 as shown in Figure 3h .

[0079] S90, forming a cathode thickening layer 11 on the upper surface of the cathode 9 and the partial second dielectric layer 10.

[0080] The device structure obtained in S80 is sequentially soaked in acetone and isopropyl alcohol solution, respectively ultrasonic cleaning for 5 minutes, then washed with deionized water and dried with high-purity nitrogen. After cleaning, an electroplating process is used to form a cathode thickening layer 11 with a thickness of 0.5-10 μm on the upper surface of the cathode 9 and the upper surface of the partial second dielectric layer 10: in the electroplating tank, by controlling the current density, temperature and solution composition and other process parameters, the thickness and uniformity of the metal layer are accurately controlled, and the metal electrode area is thickened to the required thickness. Defects in the deposition process are eliminated by annealing to increase the crystalline quality of the metal layer, obtaining a cathode thickening layer 11 with a thickness of 0.5-10 μm, as shown in FIG. 5. Figure 3i

[0081] S100, etching the dielectric layer 10 on one side until the upper surface of the anode thickening layer 7, so that the anode thickening layer 7 is exposed to the first dielectric layer 6; wherein after etching, the anode 5 is located in the middle region of the lower surface of the drift layer 4.

[0082] The embodiment of the application etches the dielectric layer 10 on one end of the device obtained in S90 until the upper surface of the anode thickening layer 7 using ICP technology, so that the anode thickening layer 7 is exposed to the first dielectric layer 6, facilitating the application of bias voltage to the low-cost thermal enhancement gallium nitride Schottky barrier diode through the anode thickening layer 7. During etching, a mixture of Cl2 / BCl3 is used to etch the material, the flow rate of Cl2 is 10 sccm, the flow rate of BCl3 is 25 sccm, the ICP power is 150 W, the RF power is 50 W, and the material etching rate is about 55 nm / min. Finally, the etched epitaxial wafer is cleaned with an organic solvent, and then dried with nitrogen to ensure that there is no residual liquid or contaminants on the surface.

[0083] The preparation method of the low-cost thermal enhancement gallium nitride Schottky barrier diode provided by the embodiment of the application can utilize traditional silicon substrates or sapphire substrates and epitaxial wafers grown by gallium nitride nucleation technology during the preparation process, avoiding the use of high-cost gallium nitride homogeneous substrates. This not only effectively reduces the device preparation cost, but also solves the current crowding effect of traditional hetero-substrate quasi-vertical planar structure gallium nitride Schottky barrier diodes, which is conducive to industrial application.

[0084] For the second aspect of the preparation method embodiment, the description is relatively simple because it is basically similar to the first aspect of the structure embodiment, and the relevant parts are described in the part of the first aspect of the structure embodiment.​

[0085] In the description of the application, it is to be understood that the terms "first", "second", etc. are used only for descriptive purposes and not to connote or imply a relative importance or an implied preference of the indicated technical features. Thus, a feature defined with "first", "second" can include one or more of the features implicitly or explicitly. In the description of the application, the meaning of "a plurality" is two or more, unless otherwise expressly specified.

[0086] Although the present application has been described in connection with various embodiments thereof, it will be understood that other modifications will be apparent to those skilled in the art in view of the foregoing description, that such modifications are intended to fall within the scope of the application, and that this application can be practiced otherwise than as specifically described. In this description, the word "comprising" does not exclude other components or steps, and the word "a" or "an" does not exclude a plurality. In the description, some measures are described as being implemented in one embodiment, but this does not exclude that the measures are implemented in another embodiment. Although some measures are described as being implemented in one embodiment, this does not exclude that the measures are implemented in another embodiment.

[0087] The above description is further to the application in connection with specific preferred embodiments, and cannot be deemed to limit the specific implementation of the application to these descriptions. For those skilled in the art, without departing from the concept of the application, a number of simple deductions or replacements can be made, which should be regarded as falling within the protection scope of the application.

Claims

1. A low-cost thermally enhanced gallium nitride Schottky barrier diode, characterized in that: The diode comprises a transmission layer (3), a drift layer (4), an anode electrode (5), a first dielectric layer (6), an anode electrode thickening layer (7), a heat dissipation substrate (8), a cathode electrode (9), a second dielectric layer (10) and a cathode electrode thickening layer (11); wherein, The drift layer (4) is arranged on the lower surface of the transmission layer (3); The anode electrode (5) is arranged in the middle area of ​​the lower surface of the drift layer (4); The cathode electrode (9) is arranged in the middle area of ​​the upper surface of the transmission layer (3); The first dielectric layer (6) is arranged on the lower surface of the remaining drift layer (4), as well as the side wall and a portion of the lower surface of the anode electrode (5); The second dielectric layer (10) is arranged on the upper surface of the remaining transmission layer (3), as well as the side wall and a portion of the upper surface of the cathode electrode (9); A portion of the anode electrode thickening layer (7) is disposed on the lower surface of the first dielectric layer (6), and the remaining portion is disposed on the lower surface of the cathode electrode (9), and another portion of the anode electrode thickening layer (7) is exposed on the first dielectric layer (6); The heat dissipation substrate (8) is arranged on the lower surface of the anode electrode thickening layer (7); The cathode electrode thickening layer (11) is arranged on a portion of the upper surface of the second dielectric layer (10) and the upper surface of the remaining cathode electrode (9).

2. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the anode electrode thickening layer (7) is 0.5 μm to 10 μm.

3. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The heat dissipation substrate (8) is a SiC substrate, a Si / Al2O3 substrate on which a diamond film is deposited, or a polycrystalline diamond substrate.

4. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the heat dissipation substrate (8) is 50 μm to 150 μm.

5. The low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 1, characterized in that: The thickness of the cathode electrode thickening layer (11) is 0.5 μm to 10 μm.

6. A method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode, characterized in that: The preparation method comprises: Obtaining an epitaxial wafer comprising a substrate layer (1), a nucleation layer (2), a transmission layer (3), and a drift layer (4) stacked sequentially from bottom to top; forming an anode electrode (5) on the upper surface of the drift layer (4); Depositing a dielectric material on the upper surfaces of the drift layer (4) and the anode electrode (5), and etching a dielectric opening above the anode electrode (5) to form a first dielectric layer (6); forming an anode electrode thickening layer (7) on the upper surfaces of the anode electrode (5) and the first dielectric layer (6); Obtaining a heat dissipation substrate (8), and permanently bonding the anode electrode thickening layer (7) to the heat dissipation substrate (8); Flipping the permanently bonded device structure, and etching away the substrate layer (1) and the nucleation layer (2); A cathode electrode (9) is formed on the upper surface of the transmission layer (3), and the cathode electrode (9) is located directly above the anode electrode (5); Depositing a dielectric material on the upper surface of the transmission layer (3) and the cathode electrode (9), and etching a dielectric opening above the cathode electrode (9) to form a second dielectric layer (10); forming a cathode electrode thickening layer (11) on the upper surface of the cathode electrode (9) and a portion of the second dielectric layer (10); The dielectric layer (10) on one side is etched until the upper surface of the anode thickening layer (7), so that the anode thickening layer (7) is exposed on the first dielectric layer (6); wherein, after etching, the anode electrode (5) is located in the middle area of ​​the lower surface of the drift layer (4).

7. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: An anode electrode thickening layer (7) is formed on the upper surface of the anode electrode (5) and the first dielectric layer (6), comprising: An electroplating process is used to form an anode thickening layer (7) with a thickness of 0.5 μm to 10 μm on the upper surfaces of the anode electrode (5) and the first dielectric layer (6).

8. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: The heat dissipation substrate (8) obtained is a SiC substrate, a Si / Al2O3 substrate with a diamond film deposited thereon, or a polycrystalline diamond substrate.

9. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: Before permanently bonding the anode electrode thickening layer (7) to the heat dissipation substrate (8), the method further comprises: The same metal as the anode electrode thickening layer (7) is electroplated on the heat dissipation substrate (8).

10. The method for preparing a low-cost thermally enhanced gallium nitride Schottky barrier diode according to claim 6, characterized in that: A cathode electrode thickening layer (11) is formed on the upper surface of the cathode electrode (9) and a portion of the second dielectric layer (10), comprising: An electroplating process is used to form a cathode electrode thickening layer (11) with a thickness of 0.5 μm to 10 μm on the upper surface of the cathode electrode (9) and part of the second dielectric layer (10).

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