Miniature light emitting diode and display device

Abstract

The invention discloses a miniature light emitting diode and a display device, and relates to the technical field of semiconductor display. The micro light-emitting diode comprises an epitaxial structure and an insulating layer, wherein the epitaxial structure comprises a first semiconductor layer, a second semiconductor layer and a light-emitting layer clamped between the first semiconductor layer and the second semiconductor layer; a convex lens structure protruding towards the side, away from the light-emitting layer, of the first semiconductor layer is integrally formed on the first semiconductor layer. The insulating layer covers the side wall of the first semiconductor layer to the side wall of the second semiconductor layer; an opening is formed in the portion, corresponding to the convex lens structure, of the insulating layer, and the convex lens structure protrudes out of the opening. The light-emitting angle of the micro light-emitting diode can be reduced, and the display performance is improved.

Description

Technical Field

[0001] The present application relates to the field of semiconductor display technology, and more specifically to micro light emitting diodes and display devices. Background Art

[0002] Micro LED has the characteristics of small size, high integration, and self-luminescence. Compared with LCD and OLED displays, Micro LED has great advantages in brightness, resolution, contrast, energy consumption, life, response speed, and thermal stability, and has extensive and important commercial application value. For example, in the display fields of AR (Augmented Reality), VR (Virtual Reality), wearable devices, head-up display systems (HUD: Head up Display, also known as automotive head-up display systems), micro projection, 3D printing, etc., it has been regarded by the industry as the ultimate solution for AR near-eye display.

[0003] Micro LED display technology refers to the use of self-luminous micron-sized LEDs as luminous pixel units, assembling these pixel units on a driving panel to form a high-density LED array, thereby achieving luminous display.

[0004] Currently, the industry has fully launched the development of micro light emitting diodes. However, the existing micro light emitting diodes have poor display performance when applied to Micro LED displays. Summary of the invention

[0005] In view of this, in order to solve the above technical problems, the present application provides a micro light emitting diode and a display device.

[0006] To achieve the above objectives, the present application provides a micro light emitting diode, which includes an epitaxial structure and an insulating layer.

[0007] The epitaxial structure includes a first semiconductor layer, a second semiconductor layer, and a light-emitting layer sandwiched between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is integrally formed with a convex lens structure protruding toward a side of the first semiconductor layer away from the light-emitting layer. The insulating layer covers the sidewall of the first semiconductor layer to the sidewall of the second semiconductor layer. An opening is formed in a portion of the insulating layer corresponding to the convex lens structure, and the convex lens structure protrudes from the opening.

[0008] In order to solve the above technical problems, another technical solution adopted by the present application is to provide a display device, which includes a driving substrate and a pixel unit. The pixel unit is a micro light emitting diode, and a plurality of micro light emitting diodes are distributed in an array on the driving substrate, and the micro light emitting diodes are the above-mentioned micro light emitting diodes.

[0009] A core isolation groove is formed between the first semiconductor layers of two adjacent micro-LEDs. The core isolation groove extends from between the first semiconductor layers of the two adjacent micro-LEDs along a side direction of the first semiconductor layer toward the light-emitting layer to below the second semiconductor layer to separate the second semiconductor layers of the two adjacent micro-LEDs. The insulating layer of the micro-LED extends at least along the sidewall of the core isolation groove.

[0010] Beneficial effects: Different from the prior art, the present application has at least two technical effects. On the one hand, by converging the light emitted by the light-emitting layer through the formed convex lens structure, the light-emitting angle of the micro-light-emitting diode can be improved, thereby reducing the light crosstalk between different pixel units. On the other hand, compared with the separate molding of the convex lens structure and the first semiconductor layer, the convex lens structure in the present application is formed integrally by the first semiconductor layer, which can eliminate the alignment deviation between the lens and the pixel, and is beneficial to improving the external quantum efficiency (External Quantum Efficiency, EQE) and simplifying the preparation process of the micro-light-emitting diode, thereby helping to improve the finished product yield of the micro-light-emitting diode. Combining the above two aspects, the micro-light-emitting diode of the present application has better display performance, can be better applied to the field of near-eye display, and improve the image quality of the displayed image incident to the human eye. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 is a cross-sectional schematic diagram of the display device of the present application;

[0012] Figure 2 yes Figure 1 A magnified schematic diagram of the middle area A;

[0013] Figure 3 It corresponds to Figure 1 SEM photo of area A in the middle;

[0014] Figure 4 yes Figure 2 Dimensioning diagram of

[0015] Figures 5 to 10 It is a cross-sectional schematic diagram corresponding to each preparation process of the display device of the present application.

[0016] Description of reference numerals:

[0017] 10-display device; 100-driving substrate; 110-conductive via; 200-pixel unit; 200a-micro light emitting diode; 300-core particle isolation groove; 400-bonding layer; 410-first bonding sublayer; 420-second bonding sublayer; 500-growth substrate; H-height direction;

[0018] 210-epitaxial structure; 211-first semiconductor layer; 212-second semiconductor layer; 213-light-emitting layer; 220-insulating layer; 221-opening; 230-first conductive layer; 240-second conductive layer; 21-convex lens structure; 22-first outer edge; 23-table body; 30-core particle;

[0019] θ1-first tilt angle; T-projection plane; S1-projection area of ​​the second semiconductor layer; S2-projection area of ​​the light-emitting layer (also the second projection area); S3-projection area of ​​the first semiconductor layer; S4-projection area of ​​the convex lens structure; S5-first projection area; d1-diameter of the bottom surface of the second semiconductor layer; d2-diameter of the bottom surface of the convex lens structure; h1-first spacing; h2-height of the epitaxial structure. DETAILED DESCRIPTION

[0020] In order to enable those skilled in the art to better understand the technical solution of the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Obviously, the described implementation methods are only part of the implementation methods of the present application, rather than all the implementation methods. Based on the implementation methods in the present application, all other implementation methods obtained by ordinary technicians in the field without making creative work are within the scope of protection of the present application.

[0021] See also Figure 1 The display device 10 of the present application includes a driving substrate 100 and a pixel unit 200. The pixel unit 200 is a micro-light emitting diode 200a. A plurality of micro-light emitting diodes 200a are distributed in an array on the driving substrate 100. The driving substrate 100 is provided with a conductive through hole 110. The conductive through hole 110 is electrically connected to the corresponding micro-light emitting diode 200a. The micro-light emitting diode 200a can be electrically bonded to the corresponding conductive through hole 110 through a bonding layer 400.

[0022] Combination Figure 1 See also Figure 2 The micro light emitting diode 200 a includes an epitaxial structure 210 and an insulating layer 220 .

[0023] The epitaxial structure 210 includes a first semiconductor layer 211, a second semiconductor layer 212, and a light emitting layer 213 sandwiched between the first semiconductor layer 211 and the second semiconductor layer 212. The first semiconductor layer 211 is integrally formed with a convex lens structure 21 that protrudes toward the side of the first semiconductor layer 211 away from the light emitting layer 213. The insulating layer 220 covers the sidewall of the first semiconductor layer 211 to the sidewall of the second semiconductor layer 212. An opening 221 is formed in the portion of the insulating layer 220 corresponding to the convex lens structure 21, and the convex lens structure 21 protrudes from the opening 221.

[0024] Through the above method, there are at least two technical effects. On the one hand, through the convergence effect of the formed convex lens structure 21 on the light emitted by the light-emitting layer 213, the light-emitting angle of the micro-light-emitting diode 200a can be increased, thereby reducing the light crosstalk between different pixel units 200. On the other hand, compared with the separate molding of the convex lens structure 21 and the first semiconductor layer 211, the convex lens structure 21 in the present application is formed integrally by the first semiconductor layer 211, which can eliminate the alignment deviation between the lens and the pixel, and is beneficial to improving the external quantum efficiency (External Quantum Efficiency, EQE) and simplifying the preparation process of the micro-light-emitting diode 200a, thereby helping to improve the finished product yield of the micro-light-emitting diode 200a. Combining the above two aspects, the micro-light-emitting diode 200a of the present application has better display performance, can be better applied to the field of near-eye display, and improve the image quality of the displayed image incident to the human eye.

[0025] See also Figure 1-Figure 2 , wherein a core isolation groove 300 is formed between the first semiconductor layers 211 of two adjacent micro-LEDs 200a. The core isolation groove 300 extends from between the first semiconductor layers 211 of the two adjacent micro-LEDs 200a along the first semiconductor layer 211 toward the light-emitting layer 213 to below the second semiconductor layer 212 to separate the second semiconductor layers 212 of the two adjacent micro-LEDs 200a. The insulating layer 220 of the micro-LED 200a at least extends along the sidewall of the core isolation groove 300.

[0026] In the above manner, the core particle isolation groove 300 can be used to insulate and separate the light-emitting layer 213 and the second semiconductor layer 212 of two adjacent pixel units 200, thereby avoiding or reducing the mutual adhesion between the two adjacent pixel units 200, and further avoiding or reducing the optical crosstalk formed by the light of the two adjacent pixel units 200 in the adhesion area.

[0027] It should be understood that the electrical properties of the first semiconductor layer 211 and the second semiconductor layer 212 are opposite. In the following embodiments, the first semiconductor layer 211 may be a P-type semiconductor layer and the second semiconductor layer 212 may be an N-type semiconductor layer, but the invention is not limited thereto. By way of example and not limitation, in an alternative embodiment of the following embodiments, the first semiconductor layer 211 may be an N-type semiconductor layer and the second semiconductor layer 212 may be a P-type semiconductor layer.

[0028] Optionally, the first semiconductor layer 211 is a P-type semiconductor layer, and the P-type semiconductor layer is used to provide holes to the light-emitting layer 213 under the action of a power source. Optionally, the P-type semiconductor layer includes a P-type doped nitride layer, a phosphide layer or an arsenide layer. The P-type doped nitride layer, the phosphide layer or the arsenide layer may include one or more P-type impurities of group II elements. The P-type impurity may be one of Mg, Zn, Be or a combination thereof. The P-type semiconductor layer may be a single-layer structure or a multi-layer structure, and the multi-layer structure has different compositions.

[0029] Optionally, the second semiconductor layer 212 is an N-type semiconductor layer, which is used to provide electrons to the light-emitting layer 213 under the action of a power source. Optionally, the N-type semiconductor layer includes an N-type doped nitride layer, a phosphide layer or an arsenide layer. The N-type doped nitride layer may include one or more N-type impurities of group IV elements. The N-type impurity may be one of Si, Ge, Sn or a combination thereof.

[0030] Optionally, in one example, the light emitting layer 213 may be a quantum well structure (Quantum Well, referred to as QW). In another example, the light emitting layer 213 (or active layer, active layer) may be a multiple quantum well (multiple quantum wells, referred to as MQWs) structure in which quantum well layers and quantum barrier layers are alternately stacked. For example, the light emitting layer 213 may include a multiple quantum well structure of GaN / AlGaN, InAlGaN / InAlGaN, InGaN / AlGaN, GaInP / AlGaInP, GaInP / AlInP or InGaAs / AlInGaAs. It should be understood that the light emitting layer 213 may be a single quantum well structure or a multiple quantum well structure. In order to improve the luminous efficiency of the light emitting layer 213, it can be achieved by changing the depth of the quantum well, the number of layers of the paired quantum wells and quantum barriers, the thickness and / or other characteristics in the light emitting layer 213.

[0031] Optionally, the material of the insulating layer 220 may be one of SiO 2 , Si 3 N 4 , TiO 2 , Ti 2 O 3 , Ti 3 O 5 , Ta 2 O 5 , ZrO 2 , or a combination of these materials.

[0032] Furthermore, combined with Figure 1 and Figure 3 See also Figure 2The outer edge of the convex lens structure 21 that is close to the side of the light-emitting layer 213 and extends around the height direction H of the light-emitting layer 213 is the first outer edge 22. The opening 221 exposes the first outer edge 22, or the opening 221 is flush with the first outer edge 22. In this way, the convex lens structure 21 can be effectively exposed to the first opening 221, so that the light emitted from the side of the convex lens structure 21 away from the light-emitting layer 213 can avoid the insulating layer 220, so as to reduce or avoid the absorption or reflection of the emitted light by the insulating layer 220, thereby improving the light extraction efficiency of the micro light-emitting diode 200a.

[0033] By way of example and not limitation, Figure 2 See also Figure 3 The side of the first semiconductor layer 211 facing the light emitting layer 213 is a flat surface, and the side of the first semiconductor layer 211 facing away from the light emitting layer 213 is a curved surface. In this way, light incident from the flat side of the first semiconductor layer 211 can be converged when emitted from the curved side of the second semiconductor layer 212, which is beneficial to reduce the light emission angle of the micro diode.

[0034] It should be understood that the curved surface formed by the side of the so-called first semiconductor layer 211 away from the light-emitting layer 213 is not necessarily a smooth curved surface. It may be a convex lens surface formed by a plurality of sub-planes, a plurality of sub-curved surfaces, or an interlaced arrangement of sub-curved surfaces and sub-planes, which has the function of converging the light emitted by the light-emitting layer 213 toward the side of the first semiconductor layer 211 away from the light-emitting layer 213.

[0035] It should be noted that the so-called "convergence" in the present application can be understood as converting the light with a first light-emitting angle emitted by the light-emitting layer 213 and incident on the first semiconductor layer 211 into light with a second light-emitting angle emitted from the side of the first semiconductor layer 211 facing away from the light-emitting layer 213 through the convex lens structure 21, wherein the second light-emitting angle is smaller than the first light-emitting angle.

[0036] Optionally, in one example, combined with Figure 2 , Figure 3 See also Figure 4 The epitaxial structure 210 gradually shrinks from the second semiconductor layer 212 to the end of the convex lens structure 21 away from the light emitting layer 213. This is beneficial for the convex lens structure 21 to gather the light emitted by the light emitting layer 213.

[0037] Optionally, combined Figure 2 , Figure 3 See also Figure 4In another example, the projection area S1 of the orthographic projection of the second semiconductor layer 212 on the projection plane T, the projection area S2 of the orthographic projection of the light emitting layer 213 on the projection plane T, the projection area S3 of the orthographic projection of the first semiconductor layer 211 on the projection plane T, and the projection area S4 of the orthographic projection of the convex lens structure 21 on the projection plane T decrease in sequence. The projection plane T is a plane perpendicular to the thickness direction of the light emitting layer 213.

[0038] Further, see Figure 2 In addition to the convex lens structure 21 , the first semiconductor layer 211 further includes a platform portion 23 integrated with the convex lens structure 21 . The platform portion 23 is located between the convex lens structure 21 and the light emitting layer 213 .

[0039] The sidewalls of the stage 23, the sidewalls of the light-emitting layer 213, and the sidewalls of the second semiconductor layer 212 are connected to form a sidewall of the combined structure of the stage 23, the light-emitting layer 213, and the second semiconductor layer 212. The sidewalls of the combined structure of the stage 23, the light-emitting layer 213, and the second semiconductor layer 212 have a first inclination angle θ1 relative to a predetermined reference plane (not shown). The predetermined reference plane is a plane perpendicular to the thickness direction of the light-emitting layer 213, and the first inclination angle θ1 is 60° to 89° (for example, 60°, 75°, 80°, 89°).

[0040] It should be noted that the first inclination angle θ1 may be negatively correlated with the minimum effective insulation isolation spacing between two adjacent pixel units 200. Specifically, the larger the first inclination angle θ1, the smaller the minimum effective insulation isolation spacing between two adjacent pixels. Therefore, the spacing between two adjacent pixels can be configured to be smaller by setting the first inclination angle to be larger.

[0041] Alternatively, if Figure 2 As shown, the first outer edge 22 is further formed as the outer edge of the side of the stage 23 close to the convex lens structure 21, so that the part where the stage 23 and the convex lens structure 21 are connected to each other has the first outer edge 22 as the common outer edge of the two. In this way, the light emitted from the stage 23 can be received by the convex lens structure 21 to a large extent, and then converged by the convergence effect of the convex lens structure 21 and emitted to the side of the convex lens structure 21 away from the stage 23.

[0042] Optionally, combined Figure 2 See also Figure 4, the orthographic projection of the portion of the convex lens structure 21 protruding outside the opening 221 on the projection plane T has a first projection area S5, and the orthographic projection of the light-emitting layer 213 on the projection plane T has a second projection area S2. Wherein, the projection plane T is a plane perpendicular to the thickness direction of the light-emitting layer 213, and the ratio of the first projection area S5 to the second projection area S2 is 0.179 to 0.982 (for example, 0.179, 0.482, 0.500, 0.634, 0.982). In this way, by reasonably setting the ratio of the first projection area S5 to the second projection area T, the display device 10 can provide a clearer and brighter display image to the human eye when applied to the field of near-eye display.

[0043] Optionally, the first projection area S5 is 0.37 um 2 Up to 12.34um 2 , the second projection surface T area is 0.78um 2 Up to 12.56um 2 .

[0044] Specifically, combined Figure 2 See also Figure 4 , looking down at the micro-LED 200a from the side of the first semiconductor layer 211 away from the light-emitting layer 213, the epitaxial structure 210 is circular. If the diameter of the bottom surface of the second semiconductor layer 212 is denoted as d1, the height of the epitaxial structure 210 is denoted as h2, the first tilt angle is denoted as θ1, the bottom surface diameter of the convex lens structure 21 is denoted as d2, the second projection area is denoted as S2, the first projection area is denoted as S5, and the ratio of the first projection area S5 to the second projection area S2 is denoted as k, then S5 is less than or equal to S4 and the dimensional data of the micro-LED 200a can be shown in Table 1 below.

[0045] Table 1: Dimensional data table of various examples of micro-LEDs.

[0046] project d1 h2 θ1 d2 S2 S5 k Example 1 2 1 60 0.845299462 3.14 0.560906976 0.178632795 Example 2 3 1 60 1.845299462 7.065 2.673027131 0.378347789 Example 3 4 1 60 2.845299462 12.56 6.355147286 0.505983064 Example 4 3 2 60 0.690598923 7.065 0.374387595 0.052991875 Example 5 4 2 60 1.690598923 12.56 2.243627905 0.178632795 Example 6 1 1 89 0.96508987 0.785 0.731147789 0.931398457 Example 7 2 1 89 1.96508987 3.14 3.031338885 0.965394549 Example 8 3 1 89 2.96508987 7.065 6.901529981 0.976861993 Example 9 4 1 89 3.96508987 12.56 12.34172108 0.982621105 Example 10 1 2 89 0.93017974 0.785 0.679208964 0.865234349 Example 11 2 2 89 1.93017974 3.14 2.924591156 0.931398457 Example 12 3 2 89 2.93017974 7.065 6.739973349 0.953994812 Example 13 4 2 89 3.93017974 12.56 12.12535554 0.965394549

[0047] As shown in Table 1 above, the units of d1, h2 and d2 are all "um", the unit of θ1 is "°", and the units of S2 and S5 are all "um 2 ". " Among them, Examples 1 to 13 in Table 1 represent different embodiments of the micro-light emitting diode 200a. In order to clearly explain the meaning of the table, the size data of Example 1 in one row is described in more detail below.

[0048] The micro-LED 200a of Example 1 has d1 of 2 um, h2 of 1 um, θ1 of 60°, d2 of 0.845299462 um, and S2 of 3.14 um. 2 , S4 is 0.560906976um 2, k is 0.178632795. In this way, the display device 10 can provide a clearer and brighter display image to the human eye when applied in the field of near-eye display.

[0049] Of course, it should be noted that the embodiments of the products listed in Table 1 above are not limitations of the present invention. In other embodiments, one or more values ​​of the micro-LED 200a may not be the values ​​listed in Table 1.

[0050] Furthermore, combined with Figure 2 See also Figure 4 , there is a first spacing h1 between the end of the convex lens structure 21 away from the light-emitting layer 213 and the opening 221 in the thickness direction of the light-emitting layer 213, and the first spacing h1 is 0.5um to 2um (for example, 0.5um, 1um, 2um). Such a first spacing h1 of 0.5um to 2um combined with a ratio of the first projection area S5 to the second projection area T of 0.179 to 0.982 enables the display device 10 to be used in the field of near-eye display, so that the converged light can provide a clear and bright display image at the human eye.

[0051] Further, see Figure 1-Figure 2 The micro light emitting diode 200 a includes a first conductive layer 230 and a second conductive layer 240 .

[0052] The first conductive layer 230 is a transparent conductive layer and covers the portion of the convex lens structure 21 protruding from the opening 221 to be electrically connected to the first semiconductor layer 211. The first conductive layer 230 of the plurality of micro-LEDs 200a distributed in the array further extends along the groove wall of the core particle isolation groove 300 and covers the insulating layer 220 to be electrically connected to each other as a whole to form a common electrode. The second conductive layer 240 is formed on the side of the second semiconductor layer 212 away from the light-emitting layer 213 and is electrically connected to the second semiconductor layer 212. The core particle isolation groove 300 extends to the second conductive layer 240 that insulates and separates two adjacent micro-LEDs 200a.

[0053] In the above manner, the second conductive layer 240 can be used to independently control the lighting and extinguishing of the corresponding micro light emitting diode 200 a.

[0054] Optionally, the second conductive layer 240 may be a metal conductive layer or a transparent conductive layer. The material of the metal conductive layer may be one of silver, gold, chromium, copper, platinum, tin, nickel, titanium, aluminum, or a combination of these elements. The material of the transparent conductive layer may be indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZNO), cadmium tin oxide (CTO), indium oxide (InO), indium (In) doped zinc oxide (ZNO), aluminum (Al) doped zinc oxide (ZNO), gallium (Ga) doped zinc oxide (ZNO), or any combination thereof.

[0055] Optionally, the thickness of the insulating layer 220 is 500 angstroms to 10,000 angstroms (eg, 500 angstroms, 3,000 angstroms, 6,000 angstroms, 8,564 angstroms, 10,000 angstroms), so as to form good insulation protection for the peripheral side of the light emitting layer 213 of the epitaxial structure 210 .

[0056] Optionally, the thickness of the first conductive layer 230 is 200 angstroms to 3000 angstroms (eg, 200 angstroms, 890 angstroms, 1250 angstroms, 2000 angstroms, or 3000 angstroms).

[0057] Combination Figure 1-Figure 2 , see 5 to Fig.10 The present application further provides a method for preparing a display device 10 for preparing the above-mentioned display device 10. The method comprises steps S110 to S160.

[0058] Step S110 : Separately forming a driving substrate and an epitaxial structure.

[0059] The drive substrate 100 is formed as follows.

[0060] See also Figure 5 , the driving substrate 100 is provided with a plurality of conductive through holes 110 for subsequent electrical conduction with the epitaxial structure 210. A first bonding sublayer 410 is provided on a surface of one side of the driving substrate 100. In one example, the driving substrate 100 is a silicon-based CMOS driving backplane. The first bonding sublayer 410 is a metal layer formed by evaporation.

[0061] The steps of forming the epitaxial structure 210 are as follows.

[0062] like Figure 5 As shown, an epitaxial structure 210 is formed on a surface of one side of a growth substrate 500. Above the growth substrate 500, the epitaxial structure 210 includes, from bottom to top, a first semiconductor layer 211, a light-emitting layer 213 (quantum well layer, MQWs), and a second semiconductor layer 212. A second conductive layer 240 is formed on a side of the second semiconductor layer 212 away from the light-emitting layer 213. A second bonding sublayer 420 is formed on a side of the second conductive layer 240 away from the second semiconductor layer 212.

[0063] Step S120: bonding the drive substrate to the epitaxial structure through the first bonding sublayer and the second bonding sublayer, and removing the growth substrate of the epitaxial structure.

[0064] contrast Figure 5 See also Figure 6, the driving substrate 100 is bonded to the epitaxial structure 210 through the first bonding sublayer 410 and the second bonding sublayer 420 , and the growth substrate 500 of the epitaxial structure 210 is removed. The first bonding sublayer 410 and the second bonding sublayer 420 are bonded to form a bonding layer 400 .

[0065] Step S130: etching the epitaxial structure, the second conductive layer and the bonding layer to separate and form a plurality of core particles distributed in an array on the driving substrate and to form a convex lens structure protruding toward the side of the first semiconductor layer away from the light emitting layer.

[0066] contrast Figure 6 See also Figure 7 The core isolation groove 300 separates the stacked structure composed of the epitaxial structure 210 , the second conductive layer 240 and the bonding layer 400 into a plurality of cores 30 distributed in an array on the driving substrate 100 .

[0067] The core particle 30 includes an epitaxial structure 210 remaining after etching, a second conductive layer 240 and a bonding layer 400. The first semiconductor layer 211 of the core particle 30 is integrally formed with a convex lens structure 21 protruding toward a side of the first semiconductor layer 211 away from the light emitting layer 213.

[0068] Step S140 : forming an insulating layer on the driving substrate to cover the plurality of core particles and to cover the driving substrate, the sidewalls of the core particles, and the tops of the core particles.

[0069] contrast Figure 7 See also Figure 8 An insulating layer 220 is formed on the driving substrate 100 to cover the plurality of chiplets 30 and to cover the driving substrate 100 , the sidewalls of the chiplets 30 , and the tops of the chiplets 30 .

[0070] Step S150: etching a portion of the insulating layer corresponding to the convex lens structure to form an opening, so that the convex lens structure at least partially protrudes from the opening.

[0071] contrast Figure 8 See also Fig. 9 , a portion of the insulating layer 220 corresponding to the convex lens structure 21 is etched to form an opening 221 , so that the convex lens structure 21 at least partially protrudes from the opening 221 .

[0072] Step S160: forming a first conductive layer 230 covering the plurality of core particles and the convex lens structure and the insulating layer.

[0073] contrast Fig. 9 See also Fig.10 , forming a first conductive layer 230 covering the plurality of core particles 30 and covering the convex lens structure 21 and the insulating layer 220 .

[0074] The above are only implementation methods of the present application, and are not intended to limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A micro light emitting diode, characterized in that: The micro light emitting diode comprises: An epitaxial structure, comprising a first semiconductor layer, a second semiconductor layer, and a light-emitting layer sandwiched between the first semiconductor layer and the second semiconductor layer; wherein the first semiconductor layer is integrally formed with a convex lens structure protruding toward a side of the first semiconductor layer away from the light-emitting layer; and an insulating layer covering the sidewall of the first semiconductor layer to the sidewall of the second semiconductor layer; an opening is formed in a portion of the insulating layer corresponding to the convex lens structure, and the convex lens structure protrudes from the opening.

2. The light emitting diode according to claim 1, characterized in that: The outer edge of the convex lens structure on a side close to the light-emitting layer is a first outer edge; the opening exposes the first outer edge, or the opening is flush with the first outer edge.

3. The micro light emitting diode according to claim 1, characterized in that: A side surface of the first semiconductor layer facing the light emitting layer is a plane, and a side surface of the first semiconductor layer facing away from the light emitting layer is a curved surface.

4. The micro light emitting diode according to claim 1 or 2, characterized in that: The epitaxial structure gradually shrinks from the second semiconductor layer to the end of the convex lens structure away from the light-emitting layer; Alternatively, the projection area of ​​the orthographic projection of the second semiconductor layer on the projection plane, the projection area of ​​the orthographic projection of the light-emitting layer on the projection plane, the projection area of ​​the orthographic projection of the first semiconductor layer on the projection plane and the projection area of ​​the orthographic projection of the convex lens structure on the projection plane decrease successively; wherein the projection plane is a plane perpendicular to the thickness direction of the light-emitting layer.

5. The micro light emitting diode according to claim 1, characterized in that: In addition to the convex lens structure, the first semiconductor layer also includes a platform portion integrated with the convex lens structure; the platform portion is located between the convex lens structure and the light-emitting layer; Among them, the side wall of the table portion, the side wall of the light-emitting layer and the side wall of the second semiconductor layer are connected to form a side wall of a combined structure of the table portion, the light-emitting layer and the second semiconductor layer; the side wall of the combined structure of the table portion, the light-emitting layer and the second semiconductor layer has a first inclination angle relative to a predetermined reference plane, the predetermined reference plane is a plane perpendicular to the thickness direction of the light-emitting layer, and the first inclination angle is 60° to 89°.

6. The micro light emitting diode according to claim 1, characterized in that: The orthographic projection of the portion of the convex lens structure protruding out of the opening on the projection plane has a first projection area, and the orthographic projection of the light-emitting layer on the projection plane has a second projection area; The projection plane is a plane perpendicular to the thickness direction of the light-emitting layer, and the ratio of the first projection area to the second projection area is 0.179 to 0.

982.

7. The micro light emitting diode according to claim 1, characterized in that: There is a first distance between the end of the convex lens structure away from the light-emitting layer and the opening in the thickness direction of the light-emitting layer, and the first distance is 0.5um to 2um.

8. A display device, characterized in that: The display device comprises a driving substrate and a pixel unit, wherein the pixel unit is a micro light emitting diode, a plurality of the micro light emitting diodes are distributed in an array on the driving substrate, and the micro light emitting diodes are the micro light emitting diodes according to any one of claims 1 to 7; Among them, a core isolation groove is formed between the first semiconductor layers of two adjacent micro-light emitting diodes; the core isolation groove extends from between the first semiconductor layers of the two adjacent micro-light emitting diodes along the first semiconductor layer toward the light-emitting layer to below the second semiconductor layer to separate the second semiconductor layers of the two adjacent micro-light emitting diodes; the insulating layer of the micro-light emitting diode extends at least along the side wall of the core isolation groove.

9. The display device according to claim 8, characterized in that: The thickness of the insulating layer is 500 angstroms to 10,000 angstroms.

10. The display device according to claim 8, characterized in that: The micro light emitting diode comprises: A first conductive layer, which is a transparent conductive layer and covers the portion of the convex lens structure protruding from the opening to be electrically connected to the first semiconductor layer; the first conductive layers of the plurality of micro-LEDs distributed in an array further extend along the groove wall of the core particle isolation groove and cover the insulating layer to be electrically connected to each other as a whole to form a common electrode; and a second conductive layer formed on a side of the second semiconductor layer away from the light emitting layer and electrically connected to the second semiconductor layer; the core particle isolation groove extends to insulate and separate the second conductive layer of two adjacent micro-LEDs.

11. The display device according to claim 10, characterized in that: The second conductive layer includes a reflective metal layer, and the thickness of the second conductive layer is 1000 angstroms to 10000 angstroms.

12. The display device according to claim 10, characterized in that: The thickness of the first conductive layer is 200 angstroms to 3000 angstroms.

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