Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel is provided with a display area and a non-display area, and the display panel comprises a substrate; the isolation structure is arranged on one side of the substrate and located in the display area and the non-display area, a plurality of isolation openings are defined by the isolation structure, the isolation structure is provided with at least one concave part, the isolation openings are located in the display area, and the concave parts are located in the non-display area. The at least one sunken part is sunken towards the substrate from one side, deviating from the substrate, of the isolation structure; and a plurality of light-emitting devices, wherein at least part of the light-emitting devices are located in the isolation openings. The sunken part can relieve the stress in the isolating membrane group, so that the problem that the adjacent membrane layers in the non-display area are easy to be abnormal is solved.

Description

Technical Field

[0001] The present invention relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light-Emitting Diode (OLED) is an organic thin film electroluminescent device. It has attracted great attention and is widely used in electronic display products due to its advantages such as low power consumption, high brightness, wide viewing angle, high contrast and flexible display.

[0003] However, there are still anomalies between the film layers of current display panels. Summary of the invention

[0004] The object of the present invention is to provide a display panel and a display device to solve the abnormal phenomenon of the film layer in the current display panel.

[0005] To achieve the above object, the present invention provides a display panel, the display panel having a display area and a non-display area connected to the display area. The display panel comprises a substrate, an isolation structure and a plurality of light-emitting devices. The isolation structure is provided on one side of the substrate and has at least one recessed portion, the plurality of isolation openings are located in the display area, the at least one recessed portion is located in the non-display area, and the at least one recessed portion is recessed from the side of the isolation structure away from the substrate toward the substrate. At least part of the light-emitting device is located in the isolation opening.

[0006] Further, the substrate includes a driving layer and a pixel defining layer. The driving layer is arranged on one side of the substrate, located in the display area and the non-display area, and includes at least one power signal line, and the at least one power signal line is located in the non-display area. The pixel defining layer is arranged on the side of the driving layer away from the substrate, located in the display area and the non-display area, the pixel defining layer encloses a plurality of pixel openings and has at least one first via hole, the plurality of pixel openings are located in the display area, and are connected to the corresponding isolation openings, the at least one first via hole is located in the non-display area, the portion of the surface of the at least one power signal line away from the substrate is exposed from the at least one first via hole, the portion of the isolation structure extends into the at least one first via hole, and is electrically connected to the at least one power signal line. Preferably, the driving layer also includes a flat layer, arranged between the at least one power signal line and the pixel defining layer, the flat layer has at least one second via hole, and the orthographic projection of the at least one first via hole on the substrate is located within the orthographic projection of the at least one second via hole on the substrate. Preferably, the at least one first via hole comprises a plurality of first via holes, the at least one second via hole comprises a plurality of second via holes, and the plurality of first via holes and the plurality of second via holes are arranged in one-to-one correspondence. Preferably, the material of the planar layer comprises an organic material. Preferably, the isolation structure is located on a side of the pixel defining layer facing away from the substrate. Preferably, the pixel defining layer covers a side of the planar layer facing the at least one first via hole.

[0007] Further, the orthographic projection of the at least one recessed portion on the substrate is outside the orthographic projection range of the at least one first via hole on the substrate. Preferably, the at least one first via hole includes a plurality of first via holes, the at least one recessed portion includes one or more recessed portions, and the recessed portion is arranged between two adjacent first via holes.

[0008] Further, the orthographic projection of the recessed portion on the substrate is located within the orthographic projection of the pixel defining layer on the substrate. Preferably, the orthographic projection of the recessed portion on the substrate is located within the orthographic projection of the flat layer on the substrate.

[0009] Further, the recessed portion does not penetrate the isolation structure. Preferably, the isolation structure has a first surface facing the pixel defining layer, and the bottom wall of the recessed portion is located on a side of the first surface facing away from the substrate.

[0010] Further, the recessed portion passes through the isolation structure. Preferably, a portion of the surface of the pixel defining layer facing away from the substrate is exposed from the recessed portion. Preferably, the pixel defining layer has a plurality of third vias, and the third vias are connected to the corresponding recessed portions. Preferably, the plurality of third vias and the plurality of recessed portions are arranged in a one-to-one correspondence. Preferably, a portion of the surface of the flat layer facing away from the substrate is exposed from the third via. Preferably, in a cross section perpendicular to the substrate, the width of the third via is smaller than the width of the recessed portion.

[0011] Further, the orthographic projection of the at least one recessed portion on the substrate is located within the orthographic projection range of the at least one first via hole on the substrate. Preferably, the at least one first via hole includes a plurality of first via holes, and the at least one recessed portion includes a plurality of recessed portions, and in a cross section perpendicular to the substrate, the width of the recessed portion is smaller than the width of the first via hole. Preferably, the orthographic projection of the recessed portion on the substrate is located within the orthographic projection range of the corresponding first via hole on the substrate.

[0012] Further, the plurality of recessed portions include adjacent first recessed portions and second recessed portions, and a portion of an orthographic projection of the pixel defining layer on the substrate is located between an orthographic projection of the first recessed portion on the substrate and an orthographic projection of the second recessed portion on the substrate. Preferably, the plurality of recessed portions and the plurality of first vias are arranged in a one-to-one correspondence. Preferably, the recessed portion passes through the isolation structure. Preferably, a portion of the surface of the at least one power signal line facing away from the side of the substrate is exposed from the recessed portion. Preferably, the recessed portion does not pass through the isolation structure. Preferably, the isolation structure has a second surface facing the pixel defining layer, and the bottom wall of the recessed portion is located on the side of the second surface facing away from the substrate.

[0013] Further, the orthographic projections of at least two of the recessed portions on the substrate are located within the orthographic projection range of the same first via hole on the substrate. Preferably, the recessed portion penetrates the isolation structure. Preferably, a portion of the surface of the at least one power signal line facing away from the substrate is exposed from the recessed portion. Further, the at least one recessed portion includes a plurality of recessed portions, and the spacing between two adjacent recessed portions is not greater than 200 nanometers.

[0014] Further, the isolation structure includes a support layer and a barrier layer. The support is provided on one side of the substrate. The barrier layer is provided on the side of the support layer away from the substrate, and the orthographic projection of the barrier layer on the substrate covers the orthographic projection of the support layer on the substrate. Preferably, the at least one recessed portion is recessed to a first depth from the side of the isolation structure away from the substrate toward the substrate, and in a cross section perpendicular to the substrate, the barrier layer has a first film thickness, and the first depth is greater than the first film thickness. Preferably, the at least one recessed portion penetrates the barrier layer. Preferably, the at least one recessed portion is recessed to a second depth from the side of the support layer away from the substrate toward the substrate, and the support layer has a second film thickness, and the second depth is less than or equal to the second film thickness. Preferably, the material of the support layer includes aluminum, and / or the material of the barrier layer includes titanium.

[0015] Further, the isolation structure includes an isolation portion and an overlap portion. The isolation portion is located in the display area, and the isolation portion encloses the plurality of isolation openings. The overlap portion is located in the non-display area, and the at least one recessed portion is disposed on the overlap portion. Preferably, the isolation portion and the overlap portion are an integrated structure.

[0016] The present invention further provides a display device, which includes the display panel as described above.

[0017] The advantages of the present invention are: a display panel and a display device of the present invention relieve stress in the isolation structure by setting a recessed portion in the non-display area of ​​the display panel, thereby solving the problem of abnormalities that are prone to occur between adjacent film layers in the non-display area and improving the reliability of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0019] Figure 1 A schematic diagram of partitions of a display panel in an embodiment of the present invention;

[0020] Figure 2 is a schematic diagram of a layered structure of a display panel in a display area in an embodiment of the present invention;

[0021] Figure 3 is a schematic diagram of a layered structure of a display panel in a non-display area in an embodiment of the present invention;

[0022] Figure 4is a schematic diagram of a layered structure of a display panel in a non-display area in an embodiment of the present invention;

[0023] Figure 5 is a schematic diagram of a layered structure of a display panel in a non-display area in another embodiment of the present invention;

[0024] Figure 6 is a schematic diagram of a layered structure of a display panel in a non-display area in another embodiment of the present invention;

[0025] Figure 7 is a schematic diagram of a layered structure of a display panel in a non-display area in another embodiment of the present invention;

[0026] Figure 8 FIG. 4 is a schematic diagram of a layered structure of a display panel in a non-display area in another embodiment of the present invention.

[0027] The components in the figure are shown as follows:

[0028] Display panel 1; Display area AA;

[0029] Non-display area NA; substrate 10;

[0030] Driving layer 11; Conductive layer 12;

[0031] Flat layer 13; Power data line 14;

[0032] Pixel defining layer 20; Pixel opening 21

[0033] A first via hole 23;

[0034] Isolation structure 30; Isolation portion 30A;

[0035] Overlapping portion 30B; Supporting layer 31;

[0036] Barrier layer 32; Isolation opening 33;

[0037] A first surface 34; A second surface 35;

[0038] Light emitting device 40; First electrode 41;

[0039] Light-emitting layer 42; Second electrode 43;

[0040] Recessed portion 50; First recessed portion 50A;

[0041] A second recessed portion 50B; a first opening 51;

[0042] The second opening 52; The first via hole 60;

[0043] The second via hole 70 ; The third via hole 80 . DETAILED DESCRIPTION

[0044] The following describes the preferred embodiments of the present invention with reference to the drawings in the specification to prove that the present invention can be implemented. The embodiments of the invention can fully introduce the present invention to those skilled in the art, making its technical content clearer and easier to understand. The present invention can be embodied through many different forms of embodiments of the invention, and the protection scope of the present invention is not limited to the embodiments mentioned in the text.

[0045] In related display technologies, in order to achieve high resolution and colorization of OLED (Organic Light-Emitting Diode), and to better solve the problems of low resolution of OLED electrode film layer and low device yield, an electrode isolation structure is introduced, that is, a metal mask is not used in device preparation, but an isolation structure is made on the driving layer before evaporating the organic film and the metal electrode layer, and different pixels of the device are separated by the isolation structure to realize a pixel array. However, the inventors found in actual production that the problem of film peeling often occurs in the non-display area of ​​the display panel.

[0046] Example 1

[0047] Based on the technical problems raised by the above-mentioned related display technologies, a display panel 1 is provided in an embodiment of the present invention. Figure 1 As shown, the display panel 1 has a display area AA and a non-display area NA connected to the display area AA. The display area AA is used to present a display image, and is provided with a plurality of light-emitting devices 40, each of which can be lit up by control, and the light-emitting device 40 located on the outermost side is considered to be the boundary between the display area AA and the non-display area NA. When the plurality of light-emitting devices 40 include both non-virtual light-emitting devices and virtual light-emitting devices, the non-virtual light-emitting device located on the outermost side is considered to be the boundary between the display area AA and the non-display area NA. The non-display area NA is arranged around the display area AA, and is provided with a plurality of signal routings. The devices in the display area AA are electrically connected to the bonding component through the signal routings, so as to obtain the control signal output by the bonding component, and light up the corresponding light-emitting device 40 according to the control signal. Among them, the bonding component can include at least one of electronic devices such as a flexible printed circuit (FPC) and a driver chip.

[0048] like Figure 2 and Figure 3As shown in , the display panel 1 includes a substrate 10, an isolation structure 30 and a plurality of light-emitting devices 40. The isolation structure 30 is arranged on one side of the substrate 10, and includes an isolation portion 30A located in the display area AA and an overlap portion located in the non-display area NA, wherein the isolation portion 30A and the overlap portion 30B are an integrated structure; the isolation portion 30A encloses a plurality of isolation openings 33 in the display area AA, which are used to block the vapor deposition material and disconnect the vapor deposition materials in the adjacent isolation openings 33, thereby isolating the plurality of light-emitting devices 40; the overlap portion 30B is provided with a plurality of recessed portions 50 in the non-display area NA, which are used to solve the Peeling problem between the isolation structure 30 and the adjacent film layer. At least part of the light-emitting device 40 is arranged in the corresponding isolation opening 33, and the light-emitting device 40, as an independent light-emitting unit, can be turned on or off according to the corresponding display signal under the drive of the substrate 10. (The composition, preparation, etc. of the isolation structure 30 mentioned below are described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072 , CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, CN117500332A for reference. )

[0049] Furthermore, the display panel 1 also includes a driving layer 11, which is arranged on one side of the substrate 10 and is located in the display area AA and the non-display area NA. In the display area AA, the driving layer 11 is provided with a plurality of thin film transistors arranged in an array, and the thin film transistors are used to control the conduction of the corresponding circuit, and each light-emitting device 40 is electrically connected to at least one thin film transistor. The driving layer 11 also includes a conductive layer 12. The conductive layer 12 includes at least one power signal line, which is located in the non-display area NA and is used to provide a power signal to the light-emitting device 40 in the display area AA. The conductive layer 12 also includes other signal routing lines for transmitting signals, such as data signal lines, compensation signal lines, etc. In the conductive layer 12, one end of at least some of the signal routing lines is located in the display area AA and is electrically connected to the thin film transistors located in the display area AA; the other ends of these signal routing lines are from the display area AA to the non-display area NA and are electrically connected to the bonding components. The signal routing in the conductive layer 12 is used to transmit the signal output by the bonding component to the corresponding thin film transistor. The thin film transistor turns on the corresponding circuit according to the received signal, and then lights up the corresponding light-emitting device 40 to display the image. At the same time, the bonding component can also realize the conversion of the display screen by sending different display signals.

[0050] In the driving layer 11, two adjacent conductive film layers can be isolated and insulated by setting at least one insulating layer, so as to prevent the circuit in the substrate 10 from short-circuiting. Furthermore, in addition to preventing the circuit from short-circuiting, different insulating layers can also have other functions, such as: a flat layer 13 for flattening the surface of the substrate 10, and the flat layer 13 is located between the power signal line and the isolation structure 30. The material of the insulating layer may include at least one of an inorganic material or an organic material, and the materials of different insulating layers may be different. Among them, the material of the flat layer 13 includes an organic material.

[0051] The display panel 1 further includes a pixel defining layer 20 disposed on the side of the driving layer 11 away from the substrate 10. The pixel defining layer 20 is located in the display area AA and the non-display area NA, and the pixel defining layer 20 encloses a plurality of pixel openings 21 in the display area AA, and at least a portion of the light emitting device 40 is disposed in the pixel openings 21. The isolation structure 30 is disposed on the side of the pixel defining layer 20 away from the substrate 10, and its isolation openings 33 located in the display area AA are connected to the corresponding pixel openings 21, so that the material in the light emitting device 40 can be evaporated in the pixel openings 21.

[0052] The light-emitting device 40 includes a first electrode 41, a light-emitting layer 42, and a second electrode 43. The first electrode 41 is arranged on one side of the driving layer 11, and the first electrode 41 is located between the pixel defining layer 20 and the driving layer 11, and part of its surface is exposed in the corresponding pixel opening 21. The light-emitting layer 42 is arranged in the corresponding pixel opening 21, which covers the exposed surface of the first electrode 41 in the corresponding pixel opening 21, and extends from the surface of the first electrode 41 to the side of the pixel defining layer 20 away from the substrate 10. The second electrode 43 is stacked and arranged on the side of the light-emitting layer 42 away from the substrate 10, and extends from the surface of the light-emitting layer 42 away from the substrate 10 to the surface of the isolation structure 30 facing the isolation opening 33, so that the second electrode 43 overlaps the isolation structure 30. The first electrode 41 of the light-emitting device 40 is electrically connected to the thin film transistor in the substrate 10, and the second electrode 43 thereof is electrically connected to the power signal line through the isolation structure 30. After being turned on, the first electrode 41 and the second electrode 43 respectively transmit electrons and holes to the light-emitting layer 42, and the electrons and holes combine in the light-emitting layer 42 to form excitons, thereby converting electrical energy into light energy, prompting the light-emitting layer 42 to emit light, and lighting up the corresponding light-emitting device 40.

[0053] Specifically, the isolation structure 30 includes a support layer 31 and a barrier layer 32, and the support layer 31 and the barrier layer 32 surround the isolation opening 33. The support layer 31 is arranged on the side of the pixel defining layer 20 away from the substrate 10, and the barrier layer 32 is stacked and arranged on the side of the support layer 31 away from the substrate 10. The material of the support layer 31 includes a conductive material, and the material of the barrier layer 32 includes a metal material; preferably, the material of the support layer 31 can be aluminum, and the material of the barrier layer 32 can be titanium.

[0054] Further, in the isolation opening 33, the coverage area of ​​the second electrode 43 is larger than the coverage area of ​​the light emitting layer 42, that is, the orthographic projection of the light emitting layer 42 on the substrate 10 is located within the orthographic projection range of the second electrode 43 on the substrate 10, and the second electrode 43 extends from the light emitting layer 42 to the side wall of the support layer 31, thereby facilitating the electrical connection between the second electrode 43 and the support layer 31, and the second electrode 43 can obtain a power signal through the support layer 31. Among them, the cross-sectional profile of the support layer 31 located between two adjacent pixel openings 21 is a trapezoid, and the width of the support layer 31 on the side close to the barrier layer 32 is smaller than the width on the side close to the substrate 10, so as to facilitate the climbing of the second electrode 43 and reduce the difficulty of overlapping between the second electrode 43 and the support layer 31.

[0055] One end of the blocking layer 32 facing the isolation opening 33 protrudes from the supporting layer 31, that is, the orthographic projection of the blocking layer 32 on the substrate 10 covers the orthographic projection of the supporting layer 31 on the substrate 10, and the orthographic projection area of ​​the blocking layer 32 on the substrate 10 is larger than the orthographic projection area of ​​the supporting layer 31 on the substrate 10, so that the blocking layer 32 can completely cover the supporting layer 31, and thus when preparing the light-emitting layer 42, the material of the light-emitting layer 42 can be prevented from being evaporated onto the supporting layer 31. When preparing the second electrode 43, the evaporation angle of the second electrode 43 material can be adjusted to make the coverage area of ​​the second electrode 43 larger than the coverage area of ​​the light-emitting layer 42, so as to form the light-emitting layer 42 and the second electrode 43 with different coverage areas, thereby improving the overlap yield between the second electrode 43 and the supporting layer 31.

[0056] like Figure 3 As shown in , in the non-display area NA, the isolation structure 30 is provided with a plurality of (i.e., at least two) recessed portions 50, the pixel defining layer 20 is provided with a plurality of (i.e., at least two) first vias 60, and the planar layer 13 is provided with a plurality of (i.e., at least two) second vias 70. Among them, the first via 60 penetrates the pixel defining layer 20, the second via 70 penetrates the planar layer 13, and the first via 60 and the second via 70 are arranged one-to-one, that is, the first via 60 on the substrate 10 is located within the orthographic projection range of the corresponding second via 70 on the substrate 10. The support layer 31 in the isolation structure 30 is electrically connected to the power signal line in the conductive layer 12 through the first via 60 and the second via 70, and the VSS power signal is transmitted through the power signal line. Further, the pixel defining layer 20 covers the surface of the planar layer 13 away from the conductive layer 12 and the side of the planar layer 13 facing the first via 60. At least one recessed portion 50 is provided between two adjacent first via holes 60 and second via holes 70, and the recessed portion 50 penetrates the isolation structure 30, and the orthographic projection of the recessed portion 50 on the substrate 10 is located outside the orthographic projection range of the first via hole 60 and the second via hole 70 on the substrate 10, that is, the orthographic projection of the recessed portion 50 on the substrate 10 is located within the orthographic projection range of the pixel defining layer 20 on the substrate 100 and the orthographic projection range of the flat layer 13 on the substrate 10. The spacing between two adjacent recessed portions 50 is less than or equal to 200 nanometers, and the width of the first via hole 60 and the second via hole 70 is less than 200 nanometers. For example, the spacing between two adjacent recessed portions 50 may be 150 nanometers, 100 nanometers, or 50 nanometers, and the width of the first via hole 60 and the second via hole 70 may be 150 nanometers, 100 nanometers, or 50 nanometers.

[0057] like Figure 3 or Figure 4As shown in , the recessed portion 80 is recessed from the side of the isolation structure 30 away from the substrate 10 to the substrate 10, and the depth of the recessed portion is a first depth d1. In the cross section perpendicular to the substrate 10, the barrier layer 32 has a first film thickness T1, and the first depth d1 is greater than the first film thickness T1, that is, the recessed portion 80 penetrates the barrier portion 32. The recessed portion 50 is recessed from the side of the support layer 31 away from the substrate 10 to the substrate 10 to a second depth d2, the support layer 31 has a second film thickness T2, and the second depth d2 is less than or equal to the second film thickness T2, that is, the recessed portion 50 may penetrate or not penetrate the isolation structure 30.

[0058] Specifically, each recessed portion 50 includes a first opening 51 and a second opening 52 communicating with the first opening 51. The first opening 51 is located on a side of the support layer 31 facing away from the substrate 10. Figure 3 and Figure 4 As shown in FIG. 5 , the depth of the first opening 51 (ie, the second depth d2) is less than or equal to the thickness of the support layer 31 (ie, the second film thickness T2), that is, the first opening 51 can be as shown in FIG. Figure 3 As shown in FIG. 1 , the support layer 31 is embedded on the surface facing away from the substrate 10, or as shown in FIG. Figure 4 , the first opening 51 completely penetrates the support layer 31. The isolation structure 30 has a first surface 34 facing the pixel defining layer 20. When the first opening 51 penetrates the support layer 31, the bottom wall of the first opening 51 and the first surface 34 are located in the same plane, so that part of the surface of the pixel defining layer 20 on the side away from the substrate 10 is exposed in the recessed portion 50. When the first opening 51 does not penetrate the support layer 31, the bottom wall of the recessed portion 50 is not coplanar with the first surface 34 and is located on the side of the first surface 34 away from the substrate 10. The second opening 52 penetrates the barrier layer 32, and the orthographic projection of the second opening 52 on the substrate 10 is located within the orthographic projection range of the first opening 51 on the substrate 10, so that the second opening 52 can be connected with the first opening 51. Preferably, the depth of the first opening 51 is less than the thickness of the support layer 31, so that the recessed portion 50 does not penetrate the support layer 31, and a part of the support layer 31 can be retained at the bottom of the recess 50. Retaining more support layer material can reduce the overall resistance value of the support layer 31, thereby reducing the power consumption of the display panel 1.

[0059] In order to meet the overlap requirement between the support layer 31 and the power signal line, a large-area support layer 31 is prepared in the non-display area NA. However, peeling is likely to occur between the film layer (such as the barrier layer 32) prepared in the subsequent process and the large-area support layer 31, thereby causing abnormalities in the film layer in the non-display area NA. Therefore, in an embodiment of the present invention, a recessed portion 50 is provided in the non-display area NA to relieve stress in the support layer 31 and the barrier layer 32, thereby solving the peeling problem between the large-area support layer 31 in the non-display area NA and the film layer prepared in the subsequent process, and improving the bonding effect between the support layer 31 in the non-display area NA and other film layers.

[0060] It can be understood that in other embodiments of the present invention, only one recessed portion 50 may be provided in the isolation structure 30. By providing a single recessed portion 50, the problem of peeling easily occurring between the large-area support layer 31 in the non-display area NA and the film layer prepared in the subsequent process can be solved. Therefore, this embodiment does not specifically limit the number of recessed portions 50, that is, the number of recessed portions 50 can be one, or two or more.

[0061] Further, the recessed portion 50 can be prepared simultaneously with the isolation opening 33 in the display area AA, so the maximum width of the second opening 52 in the recessed portion 50 is smaller than the minimum width of the first opening 51, that is, the orthographic projection of the second opening 52 on the substrate 10 is located within the orthographic projection range of the first opening 51 on the substrate 10, and the orthographic projection area of ​​the second opening 52 on the substrate 10 is smaller than the orthographic projection area of ​​the first opening 51 on the substrate 10. At the same time, the cross-sectional shape of the first opening 51 in the thickness direction of the display panel 1 is a trapezoid, and the width of the first opening 51 at one end close to the substrate 10 is smaller than the width at the end away from the substrate 10.

[0062] Furthermore, in other embodiments of the present invention, a display panel 1 is provided, such as Figure 5 As shown in , the display panel 1 also includes a plurality of third via holes 80, and the third via holes 80 penetrate the pixel defining layer 20, so that a portion of the surface of the flat layer 13 facing away from the substrate 10 is exposed from the third via holes 80. The plurality of third via holes 80 and the plurality of recessed portions 50 are arranged in a one-to-one correspondence, and the third via holes 80 are connected to the corresponding recessed portions 50. In a cross section perpendicular to the substrate 10, the width of the third via hole 80 is smaller than the width of the recessed portion 50. The layered structure of the display panel 1 is similar to the display panel 1 provided in the embodiment of the present invention, so no further details will be given here. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0063] The present invention also provides a display device in an embodiment, which may be an OLED display device, comprising the display panel 1 as described above. The display device may be any display device with a display function, such as a mobile phone, a notebook computer, a tablet computer, and the like.

[0064] In the display panel and display device provided by the embodiments of the present invention, a recessed portion is provided in the isolation structure in the non-display area NA, thereby relieving stress in the isolation structure, thereby solving the problem of peeling between adjacent film layers of the isolation structure and improving the reliability of the display panel.

[0065] On the other hand, based on the technical problems raised by the above-mentioned related display technologies, another embodiment of the present invention also provides a display panel 1. Figure 1 As shown, the display panel 1 has a display area AA and a non-display area NA connected to the display area AA. The display area AA is used to present a display image, and is provided with a plurality of light-emitting devices 40, each of which can be lit up by control. The non-display area NA is arranged around the display area AA, and is provided with a plurality of signal wirings. The devices in the display area AA are electrically connected to the bonding component through the signal wirings, so as to obtain the control signal output by the bonding component, and light up the corresponding light-emitting device 40 according to the control signal. Among them, the bonding component may include at least one of electronic devices such as a flexible printed circuit (FPC) and a driver chip.

[0066] The display panel 1 provided in the embodiment of the present invention comprises a substrate 10, an isolation structure 30 and a plurality of light emitting devices 40. In the display area AA, the layered structure of the display panel 1 in the embodiment of the present invention is similar to the layered structure of the display panel 1 provided in the above embodiment of the present invention, so no further details will be given.

[0067] like Figure 6As shown in , in the non-display area NA, the isolation structure 30 is provided with a plurality of (i.e., at least two) recessed portions 50, the pixel defining layer 20 has at least one first via hole 60, and the planar layer 13 is provided with at least one second via hole 70. Among them, the first via hole 60 penetrates the pixel defining layer 20, the second via hole 70 penetrates the planar layer 13, and the first via hole 60 and the second via hole 70 are arranged in a one-to-one correspondence, that is, the first via hole 60 on the substrate 10 is located within the orthographic projection range of the corresponding second via hole 70 on the substrate 10. The support layer 31 in the isolation structure 30 is electrically connected to the power signal line in the conductive layer 12 through the first via hole 60 and the second via hole 70, and the VSS power signal is transmitted through the power signal line. Further, the pixel defining layer 20 covers the surface of the planar layer 13 away from the conductive layer 12 and the side of the planar layer 13 facing the second via hole 70. The plurality of recessed portions 50 and the plurality of first vias 60 and the plurality of second vias 70 are arranged in a one-to-one correspondence, and each of the first vias 60 and the second vias 70 is provided with a recessed portion 50, that is, the orthographic projection of the recessed portion 50 on the substrate 10 is located within the orthographic projection range of the first vias 60 and the second vias 70 on the substrate 10. In a cross section perpendicular to the substrate 10, the width of the recessed portion 50 is smaller than the width of the first vias 60 and the second vias 70, thereby ensuring that a portion of the support layer 31 can extend into the first vias 60 and the second vias 70 to be electrically connected to the conductive layer 12. The spacing between two adjacent recessed portions 50 is less than or equal to 200 nanometers, and the spacing between two adjacent second vias 70 is less than 200 nanometers, for example, the spacing between two adjacent recessed portions 50 may be 150 nanometers, 100 nanometers or 50 nanometers, and the width between two adjacent second vias 70 may be 150 nanometers, 100 nanometers or 50 nanometers. Furthermore, the plurality of recessed portions 50 include adjacent first recessed portions 50A and second recessed portions 50B, and a portion of the orthographic projection of the pixel defining layer 20 on the substrate 10 is located between the orthographic projection of the first recessed portion 50A on the substrate 10 and the orthographic projection of the second recessed portion 50B on the substrate 10.

[0068] like Figure 6 or Figure 7 As shown in , the recessed portion 80 is recessed from the side of the isolation structure 30 away from the substrate 10 to the substrate 10, and the depth of the recessed portion is a first depth d1. In the cross section perpendicular to the substrate 10, the barrier layer 32 has a first film thickness T1, and the first depth d1 is greater than the first film thickness T1, that is, the recessed portion 80 penetrates the barrier portion 32. The recessed portion 50 is recessed from the side of the support layer 31 away from the substrate 10 to the substrate 10 to a second depth d2, the support layer 31 has a second film thickness T2, and the second depth d2 is less than or equal to the second film thickness T2, that is, the recessed portion 50 may penetrate or not penetrate the isolation structure 30.

[0069] Specifically, each recessed portion 50 includes a first opening 51 and a second opening 52 communicating with the first opening 51. The first opening 51 is located on a side of the support layer 31 facing away from the substrate 10. Figure 6 and Figure 7 As shown in FIG. 5 , the depth of the first opening 51 (ie, the second depth d2) is less than or equal to the thickness of the support layer 31 (ie, the second film thickness T2), that is, the first opening 51 can be as shown in FIG. Figure 6 As shown in FIG. 1 , the support layer 31 is embedded on the surface facing away from the substrate 10, or as shown in FIG. Figure 7 , the first opening 51 completely penetrates the support layer 31. The isolation structure 30 has a first surface 34 facing the power signal line. When the first opening 51 penetrates the support layer 31, the bottom wall of the first opening 51 and the second surface 35 are located in the same plane, so that part of the surface of the power signal line on the side away from the substrate 10 is exposed in the recessed portion 50. When the first opening 51 does not penetrate the support layer 31, the bottom wall of the recessed portion 50 is not coplanar with the first surface 34 and is located on the side of the second surface 35 away from the substrate 10. The second opening 52 penetrates the barrier layer 32, and the orthographic projection of the second opening 52 on the substrate 10 is located within the orthographic projection range of the first opening 51 on the substrate 10, so that the second opening 52 can be connected with the first opening 51. Preferably, the depth of the first opening 51 is less than the thickness of the support layer 31, so that the recessed portion 50 does not penetrate the support layer 31, and a part of the support layer 31 can be retained at the bottom of the recess 50. Retaining more support layer material can reduce the overall resistance value of the support layer 31, thereby reducing the power consumption of the display panel 1.

[0070] Furthermore, in the display panel 1 provided in other embodiments of the present invention, as Figure 8 As shown in , at least two recessed portions 50 can be set in the same first via hole 60 and the second via hole 70, that is, the orthographic projections of at least two recessed portions 50 on the substrate 10 are located within the orthographic projection range of the same first via hole 60 and the second via hole 70 on the substrate 10, and the width of the recessed portion 50 is smaller than the width of the second via hole 70. The layered structure of the display panel 1 is similar to the display panel 1 provided in the embodiment of the present invention, so it will not be described in detail here. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0071] In order to meet the overlap requirements between the supporting layer 31 and the conductive layer 12, a large-area supporting layer 31 is usually prepared in the non-display area NA. However, peeling problems are prone to occur between the film layer (such as the blocking layer 32) prepared in the subsequent process and the large-area supporting layer 31, thereby causing abnormalities in the film layer in the non-display area NA. Therefore, in an embodiment of the present invention, a recessed portion 50 is provided in the non-display area NA to relieve the stress in the supporting layer 31 and the blocking layer 32, thereby solving the peeling problem between the large-area supporting layer 31 in the non-display area NA and the film layer prepared in the subsequent process, and improving the bonding effect between the supporting layer 31 in the non-display area NA and other film layers.

[0072] In the display panel and display device provided by the embodiments of the present invention, a recessed portion is formed in the isolation film group located in the non-display area NA, thereby relieving stress in the isolation structure, thereby solving the problem of peeling between adjacent film layers of the isolation structure and improving the reliability of the display panel.

[0073] Although the present invention is described herein with reference to specific embodiments, it should be understood that these embodiments are merely examples of the principles and applications of the present invention. It should therefore be understood that many modifications may be made to the exemplary embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that the various dependent claims and features described herein may be combined in a manner different from that described in the original claims. It should also be understood that features described in conjunction with individual embodiments may be used in other described embodiments.

Claims

1. A display panel, characterized in that: The display panel has a display area and a non-display area, and the display panel includes: substrate; an isolation structure, disposed on one side of the substrate, located in the display area and the non-display area, the isolation structure encloses a plurality of isolation openings and has at least one recessed portion, the plurality of isolation openings are located in the display area, the at least one recessed portion is located in the non-display area, and the at least one recessed portion is recessed toward the substrate from a side of the isolation structure away from the substrate; A plurality of light emitting devices are provided, at least parts of the light emitting devices are located in the isolation openings.

2. The display panel according to claim 1, wherein: The display panel comprises: A driving layer, arranged on one side of the substrate, located in the display area and the non-display area, comprising at least one power signal line, wherein the at least one power signal line is located in the non-display area; a pixel defining layer, arranged on a side of the driving layer away from the substrate, located in the display area and the non-display area, the pixel defining layer enclosing a plurality of pixel openings and having at least one first via hole, the plurality of pixel openings being located in the display area and being connected to the corresponding isolation openings, the at least one first via hole being located in the non-display area, a portion of a surface of the at least one power signal line away from the substrate being exposed from the at least one first via hole, a portion of the isolation structure extending into the at least one first via hole and being electrically connected to the at least one power signal line; Preferably, the driving layer further comprises a planar layer, which is provided between the at least one power signal line and the pixel defining layer, the planar layer having at least one second via hole, and the orthographic projection of the at least one first via hole on the substrate is located within the orthographic projection of the at least one second via hole on the substrate; Preferably, the at least one first via hole comprises a plurality of first via holes, the at least one second via hole comprises a plurality of second via holes, and the plurality of first via holes and the plurality of second via holes are arranged in one-to-one correspondence; Preferably, the material of the planar layer comprises an organic material; Preferably, the isolation structure is located on a side of the pixel defining layer away from the substrate; Preferably, the pixel defining layer covers a side surface of the planar layer facing the at least one first via hole.

3. The display panel according to claim 2, wherein: The orthographic projection of the at least one recessed portion on the substrate is located outside the orthographic projection range of the at least one first via hole on the substrate; Preferably, the at least one first via hole includes a plurality of first via holes, the at least one recessed portion includes one or more recessed portions, and the recessed portion is disposed between two adjacent first via holes.

4. The display panel according to claim 3, wherein: The orthographic projection of the recessed portion on the substrate is located within the orthographic projection of the pixel defining layer on the substrate; Preferably, the orthographic projection of the recessed portion on the substrate is located within the orthographic projection of the flat layer on the substrate.

5. The display panel according to claim 3, wherein: The recessed portion does not penetrate the isolation structure; Preferably, the isolation structure has a first surface facing the pixel defining layer, and the bottom wall of the recessed portion is located on a side of the first surface facing away from the substrate.

6. The display panel according to claim 3, wherein: The recessed portion penetrates through the isolation structure; Preferably, a portion of the surface of the pixel defining layer facing away from the substrate is exposed from the recessed portion; Preferably, the pixel defining layer has a plurality of third via holes, and the third via holes are connected to the corresponding recessed portions; Preferably, the plurality of third via holes and the plurality of recessed portions are arranged in one-to-one correspondence; Preferably, a portion of the surface of the flat layer facing away from the substrate is exposed from the third via hole; Preferably, in a cross section perpendicular to the substrate, a width of the third via hole is smaller than a width of the recessed portion.

7. The display panel according to claim 2, wherein: The orthographic projection of the at least one recessed portion on the substrate is located within the orthographic projection range of the at least one first via hole on the substrate; Preferably, the at least one first via hole comprises a plurality of first via holes, the at least one recess comprises a plurality of recesses, and in a cross section perpendicular to the substrate, a width of the recess is smaller than a width of the first via hole; Preferably, the orthographic projection of the recessed portion on the substrate is located within the orthographic projection range of the corresponding first via hole on the substrate.

8. The display panel according to claim 7, wherein: The plurality of recessed portions include adjacent first recessed portions and second recessed portions, and a portion of an orthographic projection of the pixel defining layer on the substrate is located between an orthographic projection of the first recessed portion on the substrate and an orthographic projection of the second recessed portion on the substrate; Preferably, the plurality of recessed portions and the plurality of first via holes are arranged in one-to-one correspondence; Preferably, the recessed portion passes through the isolation structure; Preferably, a portion of the surface of the at least one power signal line facing away from the substrate is exposed from the recessed portion; Preferably, the recessed portion does not penetrate the isolation structure; Preferably, the isolation structure has a second surface facing the pixel defining layer, and the bottom wall of the recessed portion is located on a side of the second surface facing away from the substrate.

9. The display panel according to claim 7, wherein: The orthographic projections of at least two of the recessed portions on the substrate are located within the orthographic projection range of the same first via hole on the substrate; Preferably, the recessed portion passes through the isolation structure; Preferably, a portion of the surface of the at least one power signal line that is away from the substrate is exposed from the recessed portion.

10. The display panel according to claim 1, wherein: The at least one recessed portion includes a plurality of recessed portions, and a distance between two adjacent recessed portions is no greater than 200 nanometers.

11. The display panel according to claim 1, wherein: The isolation structure comprises: A support layer, disposed on one side of the substrate; A barrier layer is provided on a side of the support layer away from the substrate, wherein the orthographic projection of the barrier layer on the substrate covers the orthographic projection of the support layer on the substrate; Preferably, the at least one recessed portion is recessed into the substrate by a first depth from a side of the isolation structure away from the substrate, and in a cross section perpendicular to the substrate, the barrier layer has a first film thickness, and the first depth is greater than the first film thickness; Preferably, the at least one recess penetrates the barrier layer; Preferably, the at least one recessed portion is recessed to a second depth from a side of the support layer away from the substrate toward the substrate, the support layer has a second film thickness, and the second depth is less than or equal to the second film thickness; Preferably, the material of the support layer includes aluminum, and / or the material of the barrier layer includes titanium.

12. The display panel according to claim 1, wherein: The isolation structure comprises: An isolation portion, located in the display area, the isolation portion encloses the plurality of isolation openings; An overlapping portion, located in the non-display area, and the at least one recessed portion is disposed on the overlapping portion; Preferably, the isolation portion and the overlapping portion are an integrated structure.

13. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-12.

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