Light-emitting display device

Abstract

Disclosed is a light emitting display device including: a substrate including a first sub-pixel and a second sub-pixel; a first insulating layer on the substrate; a first anode at the first sub-pixel including a first lower electrode and a first upper electrode on the first insulating layer; a second anode at a second sub-pixel including a second lower electrode and a second upper electrode spaced apart from each other by a first insulating layer; a first electrode pattern at the non-emission region and spaced apart from the first lower electrode, and including the same layer as the first lower electrode; and a second electrode pattern spaced apart from the second lower electrode to overlap the first electrode pattern, and including the same layer as the second lower electrode. A first vertical distance from an upper surface of the substrate to an upper surface of the first electrode pattern may be greater than a second vertical distance from the upper surface of the substrate to an upper surface of the first upper electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0145519, filed on October 27, 2023, which is incorporated herein by reference as if fully set forth herein. Technical Field

[0003] The present disclosure relates to a light emitting display device, and more particularly, to a light emitting display device that can prevent leakage current from flowing to adjacent sub-pixels and prevent a gap from occurring between adjacent sub-pixels. Background Art

[0004] As society enters the information age, the field of display devices that visually display electrical information signals is rapidly developing. Therefore, various display devices, such as liquid crystal displays (LCDs) and organic light emitting diode (OLED) displays, have been developed and applied to various fields.

[0005] Among them, the light-emitting display device includes a light-emitting element as a self-luminous element and does not require any separate light source used in a non-luminous element, thereby making it possible to reduce weight and thickness.

[0006] The light emitting element includes an intermediate layer between a first electrode and a second electrode, and emits light by applying an electric field between the first electrode and the second electrode.

[0007] In such a light-emitting display device including these light-emitting elements, some of a plurality of sub-pixels may emit light due to leakage current flowing from adjacent sub-pixels. Summary of the invention

[0008] Accordingly, the present disclosure is directed to a light emitting display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.

[0009] An object of the present disclosure is to provide a light-emitting display device that can prevent leakage current from flowing to adjacent sub-pixels.

[0010] Another object of the present disclosure is to provide a light-emitting display device that can prevent a gap from occurring between adjacent sub-pixels while completely disconnecting a path through which a leakage current flows between adjacent sub-pixels.

[0011] Additional advantages, purposes and features of the present disclosure will be set forth in part in the following description, and in part will become apparent to those of ordinary skill in the art upon review of the following, or may be learned from the practice of the present disclosure. The purposes and other advantages of the present disclosure may be realized and obtained by the structures particularly pointed out in the written description and claims and the accompanying drawings herein.

[0012] The light-emitting display device according to the present disclosure may have an electrode pattern formed in the same layer as the lower electrode of the anode of the sub-pixel in the non-light-emitting area between the light-emitting areas of adjacent sub-pixels, and thus a step is generated between the non-light-emitting area and the light-emitting area. Therefore, in the light-emitting display device according to the present disclosure, because the intermediate layer and the first dummy pattern are located at different heights, even if there is an area where the intermediate layer and the first dummy pattern contact each other, the intermediate layer and the corresponding layers in the first dummy pattern can be prevented from contacting each other, and therefore, leakage current between adjacent sub-pixels can be prevented from flowing through the common layer in the intermediate layer, which is formed by deposition using a common mask.

[0013] In addition, the light-emitting display device according to the contents of the present disclosure has an undercut formed under the electrode pattern in contact with the first virtual pattern, and the first virtual pattern is formed as the same layer as the intermediate layer between adjacent sub-pixels, thereby preventing the occurrence of gaps between the intermediate layer in the light-emitting area and the first virtual pattern in the non-light-emitting area.

[0014] To achieve these objectives and other advantages, and in accordance with the purposes of the present disclosure, as embodied and broadly described herein, a light-emitting display device may include: a substrate including a first sub-pixel and a second sub-pixel, each sub-pixel having a light-emitting region and a non-light-emitting region; a first insulating layer on the substrate; a first anode at the first sub-pixel including a first lower electrode and a first upper electrode above the first insulating layer; a second anode at the second sub-pixel including a second lower electrode and a second upper electrode, the second lower electrode and the second upper electrode being spaced apart from each other by the first insulating layer interposed therebetween; a first electrode pattern disposed at the non-light-emitting region, spaced apart from the first lower electrode and including the same layer as the first lower electrode; and a second electrode pattern spaced apart from the second lower electrode, overlapping the first electrode pattern and including the same layer as the second lower electrode. A first vertical distance from an upper surface of the substrate where the first electrode pattern and the second electrode pattern overlap each other to an upper surface of the first electrode pattern may be greater than a second vertical distance from an upper surface of the substrate to an upper surface of the first upper electrode at the light-emitting region.

[0015] A light-emitting display device according to an embodiment of the present disclosure may include: a substrate including first to third sub-pixels, each sub-pixel having a light-emitting region and a non-light-emitting region; first to third lower electrodes on the substrate, which overlap with the light-emitting regions of the first to third sub-pixels, respectively; a first insulating layer above the substrate; a first electrode pattern above the first insulating layer, which overlaps with the non-light-emitting region between the respective light-emitting regions of the first to third sub-pixels; a second insulating layer between the first insulating layer and the substrate; a second electrode pattern overlapping the first electrode pattern, the second electrode pattern being disposed between the first insulating layer and the second insulating layer, the second electrode pattern being spaced apart from the second lower electrode; and a third electrode pattern overlapping the first electrode pattern and the second electrode pattern, being disposed between the second insulating layer and the substrate, the third electrode pattern being spaced apart from the third lower electrode. The first insulating layer may have a groove, the groove being configured to partially overlap with an edge of the first electrode pattern.

[0016] A light-emitting display device according to an embodiment of the present disclosure may include: a substrate having a plurality of light-emitting regions and a non-light-emitting region between the plurality of light-emitting regions; a plurality of anodes respectively arranged at the plurality of light-emitting regions, each anode including a lower electrode and an upper electrode, wherein the lower electrode in a certain light-emitting region is located at a different vertical position from the lower electrode of an adjacent light-emitting region; a first insulating layer on the lower electrode of at least one anode among the plurality of anodes; and an electrode pattern on the first insulating layer at the non-light-emitting region between the plurality of light-emitting regions, the electrode pattern being horizontally spaced apart from the lower electrode, respectively. The lower surface of the electrode pattern may have a higher vertical position than the lower surface of the upper electrode at each of the plurality of light-emitting regions.

[0017] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated in and constitute a part of this application. The accompanying drawings illustrate embodiments of the present disclosure and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0019] Figure 1A is a plan view of a light emitting display device according to a first embodiment of the present disclosure;

[0020] Figure 1B yes Figure 1A an enlarged plan view of a portion of

[0021] Figure 2 It is along Figure 1A A cross-sectional view taken along line II';

[0022] Figure 3 It is along Figure 1B A cross-sectional view taken along line II-II';

[0023] Figure 4 It is shown Figure 2 A cross-sectional view of a variation of

[0024] Figure 5A is a plan view of a light emitting display device according to a second embodiment of the present disclosure;

[0025] Figure 5B yes Figure 5A an enlarged plan view of a portion of

[0026] Figure 6 It is along Figure 5A A cross-sectional view taken along line III-III';

[0027] Fig. 7A is a plan view of a light emitting display device according to a third embodiment of the present disclosure;

[0028] Figure 7B yes Fig. 7A an enlarged plan view of a portion of

[0029] Figure 8 It is along Fig. 7A A cross-sectional view taken along line IV-IV'; and

[0030] 9A to 9H It shows the manufacturing Figure 2 A cross-sectional view of the process of the light-emitting display device is shown. DETAILED DESCRIPTION

[0031] With reference to the accompanying drawings, the advantages and features of the present disclosure and methods for implementing the same will be clearly understood according to the following preferred embodiments. However, the present disclosure is not limited to these embodiments and may be implemented in different forms. These embodiments are presented only to provide a thorough and complete understanding of the disclosed context and to fully inform those skilled in the art of the technical concept of the present disclosure, and the embodiments of the present disclosure are limited only by the scope of the claims.

[0032] The shapes, sizes, proportions, angles, numbers, etc. shown in the drawings for illustrating various embodiments of the present disclosure are provided for illustration only, and the present disclosure is not limited to the contents shown in the drawings. Where possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. In the following description, a detailed description of the technology or configuration related to the present disclosure may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure.

[0033] When terms such as "including," "having," and "comprising" are used throughout the disclosure, additional components may be present unless "only" is used. Components described in the singular include plural components unless specifically stated otherwise.

[0034] Even if there is no additional specific description of the components included in the embodiments of the present disclosure, the components included in the embodiments of the present disclosure should be construed to include an error range.

[0035] When describing various embodiments of the present disclosure, when terms describing positional relationships such as "on," "above," "below," and "close to" are used, at least one intermediate element may be present between two elements unless "immediately" or "directly" is also used.

[0036] When describing various embodiments of the present disclosure, when using terms related to a time relationship such as "after," "subsequently," "next," and "before," discontinuous cases may be included unless "immediately" or "directly" is also used.

[0037] When describing various embodiments of the present disclosure, terms such as "first" and "second" may be used to describe various components, but these terms are intended only to distinguish identical or similar components from one another. Therefore, throughout the disclosure, unless otherwise specifically mentioned, a "first" component may be identical to a "second" component within the technical concept of the present disclosure.

[0038] The terms “first horizontal axis direction”, “second horizontal axis direction”, and “vertical axis direction” should not be interpreted only as a geometric relationship in which the relationship between each other is perpendicular, but have a wider range of directions as long as the configuration of the present disclosure can function functionally.

[0039] The term "at least one" should be understood to include all possible combinations of one or more related items. For example, "at least one of the first, second, and third items" means each of the first, second, or third items, and any combination of two or more of the first, second, and third items.

[0040] The features of various embodiments of the present disclosure may be partially or completely coupled or combined with each other, and may interoperate with each other in various ways and be driven technically. The embodiments of the present disclosure may be performed independently of each other, or may be performed together in an interrelated manner.

[0041] When adding reference numerals to components in each figure, the same components may have the same reference numerals as much as possible even if they are shown in different figures. In addition, for ease of explanation, the scales of the components shown in the drawings have a scale different from the actual scale, and are therefore not limited to the scales shown in the drawings.

[0042] Hereinafter, exemplary examples of a light emitting display device according to an embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0043] Figure 1A is a plan view of a light emitting display device according to a first embodiment of the present disclosure, and Figure 1B yes Figure 1A An enlarged plan view of a portion of the. Figure 2 It is along Figure 1A A cross-sectional view taken along line II'. Figure 3 It is along Figure 1B A cross-sectional view taken along line II-II'.

[0044] Reference Figure 1A and Figure 1B According to the first embodiment of the present disclosure, the light-emitting display device may include a plurality of sub-pixels including a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3, each of the plurality of sub-pixels having a light-emitting area EA on a substrate 10, and a step area HA between the light-emitting areas of each sub-pixel.

[0045] A plurality of sub-pixels may be defined by gate lines and data lines that cross each other to form a matrix in an active area on the substrate 10. The first to third sub-pixels SP1, SP2, and SP3 may form one pixel and be regularly arranged on the substrate 10. For example, the first to third sub-pixels SP1, SP2, and SP3 are arranged to be spaced apart from each other in the row direction, and each of the pixels formed by the first to third sub-pixels SP1, SP2, and SP3 may be repeatedly arranged in the row direction and the column direction. That is, a plurality of first sub-pixels SP1 may be arranged in the column direction, a plurality of second sub-pixels SP2 may be spaced apart from the first sub-pixel SP1 in the row direction and arranged in the column direction parallel to the first sub-pixel SP1, and a plurality of third sub-pixels SP3 may be spaced apart from the second sub-pixel SP2 in the row direction and arranged in the column direction parallel to the second sub-pixel SP2. However, the present disclosure is not limited thereto, and the first to third sub-pixels SP1, SP2, and SP3 may be arranged in various arrangements.

[0046] Such a substrate 10 may be a glass or flexible plastic substrate. For example, when the substrate 10 is a plastic substrate, it may include polyimide or polyamide. In one embodiment, the substrate 10 may have an inorganic layer between polyimide films.

[0047] Each of the first to third sub-pixels SP1, SP2, and SP3 may include an emission area EA. Each emission area EA of the first to third sub-pixels SP1, SP2, and SP3 may emit light of different colors. For example, the emission area EA corresponding to the first sub-pixel SP1 may emit red light, the emission area EA corresponding to the second sub-pixel SP2 may emit green light, and the emission area EA corresponding to the third sub-pixel SP3 may emit blue light. In this case, the emission area EA corresponding to the third sub-pixel SP3 may emit light having the shortest color wavelength compared to the other emission areas EA1 and EA2. However, the present disclosure is not limited thereto, and the plurality of sub-pixels may also include sub-pixels that emit white light.

[0048] The step area HA may be disposed in the non-light emitting area NEA between the light emitting areas EA of each sub-pixel. The step area HA may have a higher step than the light emitting area EA because more layers are stacked in the step area HA than in the light emitting area EA. Therefore, the step area HA may be deposited on the entire substrate 10 for the intermediate layer 270a ( Figure 2 ) and materials for cathode 280a ( Figure 2 That is, the intermediate layer 270a and the cathode 280a on the light emitting area EA, and the first dummy pattern 270b ( Figure 2 ) and the second dummy pattern 280b ( Figure 2 middle) can be separated from each other by the step area HA.

[0049] To this end, the step area HA according to the first embodiment may be provided with a first electrode pattern 251c, a second electrode pattern 253c, and a third electrode pattern 255c on the substrate 10. The first to third electrode patterns 251c, 253c, and 255c may be sequentially arranged in a direction away from the substrate 10, and may overlap with each other. Here, the third electrode pattern 255c located at the uppermost end of the substrate 10 may have a greater width than each of the first electrode pattern 251c and the second electrode pattern 253c. In addition, the first electrode pattern 251c and the second electrode pattern 253c according to the first embodiment may have the same width. In addition, the first electrode pattern 251c and the second electrode pattern 253c may be located in an area where the third electrode pattern 255c is provided. Therefore, the step area HA may be defined as an area overlapping with the first to third electrode patterns 251c, 253c, and 255c and provided with the third electrode pattern 255c.

[0050] The step area HA may be disposed between the first to third sub-pixels SP1, SP2, and SP3 that emit light of different colors. If each of the first to third sub-pixels SP1, SP2, and SP3 is arranged in the column direction, the step area HA may be disposed between the respective sub-pixels SP1, SP2, and SP3 along the column direction. However, the present disclosure is not limited thereto, and the position of the step area HA may vary depending on the arrangement structure of the first to third sub-pixels SP1, SP2, and SP3. For example, if the sub-pixels that emit light of different colors are arranged vertically in the row direction and the column direction, the step area HA may be disposed between different sub-pixels along the row direction and the column direction.

[0051] Both ends of the step region HA in the column direction may be spaced apart from other step regions HA. That is, in the present disclosure, the step region HA may be disposed between sub-pixels emitting light of different colors to prevent leakage current between adjacent sub-pixels, and in this case, the step region HA may be formed discontinuously. Therefore, in the present disclosure, the cathode 280a configured to supply common power to the sub-pixels SP1, SP2, and SP3 may be integrally formed on the entire surface of the substrate 10 by deposition using a common mask.

[0052] In addition, the step area HA may be disposed to be spaced apart from the light emitting area EA of each of the first to third sub-pixels SP1, SP2, and SP3. In addition, a trench T may be disposed between the light emitting area EA of each of the sub-pixels SP1, SP2, and SP3 and the step area HA. ​​The trench T according to the first embodiment may have an area at least overlapping with the step area HA. ​​In addition, the area where the trench T overlaps with the step area HA may be disposed along an edge of the step area HA facing the light emitting area EA.

[0053] although Figure 1B The trench T is shown not to overlap with the bank 260, but depending on the process method, the trench T may overlap with the bank 260. In this case, the trench T may have a region overlapping with an edge of the bank 260 facing the step area HA. ​​In addition, the trench T may be provided along the bank 260 substantially around the light emitting area EA to separate the light emitting areas EA from each other.

[0054] The bank 260 may be disposed along the edge of the emission area EA. In addition, the bank 260 may overlap at least the contact hole CH. In this way, the emission area EA may be defined as a region exposed by the bank 260. In addition, the contact hole CH may be disposed in the emission area EA.

[0055] Reference Figure 2 The light-emitting display device according to the first embodiment of the present disclosure may include a transistor TFT, a light-emitting element connected to the transistor TFT, a bank 260 configured to expose a light-emitting area EA of the light-emitting element, and a sealing layer 290 in each of the first to third sub-pixels SP1, SP2, and SP3 on the substrate 10. In addition, the light-emitting display device according to the first embodiment of the present disclosure may have first to third electrode patterns 251c, 253c, and 255c, a first dummy pattern 270b, and a second dummy pattern 280b in the non-light-emitting area NEA between the light-emitting areas EA.

[0056] The substrate 10 may have a plurality of sub-pixels SP1, SP2, and SP3. The plurality of sub-pixels SP1, SP2, and SP3 may include a light-emitting area EA that actually emits light, and a non-light-emitting area NEA that does not emit light around the light-emitting area EA. In the present disclosure, the total thickness of the components between the substrate 10 and the first dummy pattern 270b corresponding to the non-light-emitting area NEA is greater than the total thickness of the components between the substrate 10 and the intermediate layer 270a corresponding to the light-emitting area EA, and the light-emitting display device may include a step area HA in the non-light-emitting area NEA.

[0057] The transistor TFT may be provided in each of the sub-pixels SP1, SP2, and SP3 on the substrate 10. Figure 3 The transistor TFT includes an active layer 31, a gate electrode 41 overlapping a channel region of the active layer 31, and a source electrode 51 and a drain electrode 53 connected to both sides of the active layer 31, wherein a gate insulating film 20b is interposed between the gate electrode 41 and the channel region of the active layer 31.

[0058] The active layer 31 of the transistor TFT has a source region and a drain region on both sides of the channel region. Each of the source region and the drain region is formed by a semiconductor material injected with n-type or p-type impurities. The channel region overlapping the gate electrode 41 can be formed by a semiconductor material not injected with n-type or p-type impurities.

[0059] The gate electrode 41 of the transistor TFT may be arranged to have the same width as the channel region of the active layer 31 so as to overlap the channel region of the active layer 31, with the gate insulating film 20b interposed therebetween. For example, the gate electrode 41 may be a single layer or multiple layers formed of at least one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), or copper (Cu), or an alloy thereof. The gate insulating film 20b may be formed of an inorganic insulating material, for example, may be silicon oxide (SiO x ) film, silicon nitride (SiN x ) film, silicon oxynitride (SiO x N y ) film or a multilayer film thereof.

[0060] The light shielding layer 21 on the substrate 10 may be disposed below the active layer 31 to overlap at least the channel region of the active layer 31 of the transistor TFT. The light shielding layer 21 prevents external light from penetrating the substrate 10 and being transmitted to the transistor TFT. For example, the light shielding layer 21 may be formed as a single layer of a metal material such as molybdenum (Mo), titanium (Ti), aluminum neodymium (AlNd), aluminum (Al) or chromium (Cr) or an alloy thereof, or may be formed as a multilayer structure using the same.

[0061] The buffer film 20a on the light shielding layer 21 is provided to cover the light shielding layer 21. For example, the buffer film 20a may be formed using silicon oxide (SiO x ) or silicon nitride (SiN x ) of a single layer structure or a multi-layer structure.

[0062] The interlayer insulating film 20c on the gate insulating film 20b may include a source contact hole and a drain contact hole configured to expose each of the source region and the drain region of the active layer 31, and may be provided to cover the gate electrode 41. For example, the interlayer insulating film 20c may be formed of an inorganic insulating material. For example, the interlayer insulating film 20c may be formed of silicon oxide (SiO x ) film, silicon nitride (SiNx ) film or silicon oxynitride (SiO x N y ) film, or formed into a multi-layer structure using it.

[0063] The source electrode 51 and the drain electrode 53 may be provided as the same layer on the interlayer insulating film 20c. The source electrode 51 and the drain electrode 53 are connected to the source region and the drain region of the active layer 31 through the source contact hole and the drain contact hole, respectively. For example, the source electrode 51 and the drain electrode 53 may be formed as a single layer formed of a metal material such as molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (ND), copper (Cu) or an alloy thereof, or formed as a multilayer structure using the same.

[0064] A passivation layer 20d may be provided on the interlayer insulating film 20c to cover the transistor TFT. Therefore, the transistor TFT may be protected by the passivation layer 20d. For example, the passivation layer 20d is a type of inorganic insulating film and may be provided as silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or silicon oxynitride (SiO x N y ) single layer or multiple layers of film.

[0065] A planarization layer may be provided on the passivation layer 20d. The planarization layer may have a thickness sufficient to flatten the surface steps on the upper portion of the transistor TFT, and may include an organic insulating film. In an embodiment of the present disclosure, the planarization layer may be replaced by the passivation layer 20d. The planarization layer may protect the transistor TFT. For example, the planarization layer may be selected from one of photoacrylic acid, polyimide, benzocyclobutene resin, and acrylate. In some cases, the planarization layer may be formed as a plurality of layers. In an embodiment of the present disclosure, the passivation layer 20d may be omitted.

[0066] In the light-emitting display device according to the embodiment of the present disclosure, the first lower electrode 251a and the first electrode pattern 251c at the light-emitting area EA may be positioned above the transistor array 20. And the first lower electrode 251a and the first electrode pattern 251c at the light-emitting area EA may be positioned on the same uppermost surface of the transistor array 20. Therefore, each base surface at the first vertical distance d1, the second vertical distance d2, and the third vertical distance d3 from the upper surface of the substrate 10 hereinafter may be the same uppermost surface of the transistor array 20. Herein, the vertical distance from the upper surface of the substrate to the upper surface of the passivation layer 20d may be the same at the light-emitting area EA and the non-light-emitting area NEA.

[0067] Reference Figure 2 and Figure 3 A light emitting element including a stacked structure of an anode 251, 253 or 255, an intermediate layer 270a and a cathode 280a may be disposed in each of the light emitting regions EA on the transistor array 20 including a buffer film 20a, a gate insulating film 20b, an interlayer insulating film 20c, a passivation layer 20d and a planarization layer. The first to third electrode patterns 251c, 253c and 255c, the first dummy pattern 270b and the second dummy pattern 280b may be disposed in the non-light emitting region NEA between the light emitting regions EA, corresponding to the step region HA spaced apart from the light emitting region EA.

[0068] A first anode 251, a second anode 253, and a third anode 255 corresponding to the first subpixel SP1, the second subpixel SP2, and the third subpixel SP3, respectively, may be disposed on the transistor array 20. The first anode 251 may include a first lower electrode 251a and a first upper electrode 251b, the second anode 253 may include a second lower electrode 253a and a second upper electrode 253b, and the third anode 255 may include a third lower electrode 255a and a third upper electrode 255b. The lower electrodes 251a, 253a, and 255a of the first to third anodes 251, 253, and 255 may have higher reflectivity than the upper electrodes 251b, 253b, and 255b, respectively. Here, generally, the lower electrodes 251a, 253a and 255a of the first to third anodes 251, 253 and 255 may have a higher reflectivity than the upper electrodes 251b, 253b and 255b, respectively, and may have a greater thickness than the upper electrodes 251b, 253b and 255b, respectively, so as to adjust the resonance distance with the cathode 280a. For example, the lower electrodes 251a, 253a and 255a may be formed of silver (Ag), aluminum (Al), magnesium (Mg), calcium (Ca) or an alloy thereof to have a thickness sufficient to reflect incident light. The upper electrodes 253b, 253b and 255b may be formed of a transparent conductive film including a material having a relatively high work function value, such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0069] Insulating layers having different thicknesses may be interposed between the lower electrodes 251a, 253a, and 255a and the upper electrodes 251b, 253b, and 255b, so that the first to third anodes 251, 253, and 255 may have different resonance distances corresponding to the first to third sub-pixels SP1, SP2, and SP3 emitting light of different colors, respectively. For example, the first anode 251 may configure the first sub-pixel SP1 to emit red light, the second anode 253 may configure the second sub-pixel SP2 to emit green light, and the third anode 255 may configure the third sub-pixel SP3 to emit blue light.

[0070] The first insulating layer 230 and the second insulating layer 240 interposed between the first to third lower electrodes 251a, 253a, and 255a and the first to third upper electrodes 251b, 253b, and 255b of the first to third anodes 251, 253, and 255 may be formed of one type of inorganic insulating film and / or one type of organic insulating film. Among them, at least the second insulating layer 240 is one type of inorganic insulating film and may be made of silicon oxide (SiO x ) film, silicon nitride (SiN x ) film or silicon oxynitride (SiO x N y The insulating layer formed of the inorganic insulating film has a characteristic of being formed along the step of the component, so that the step between the light emitting area EA and the non-light emitting area NEA can be maintained.

[0071] The first lower electrode 251a of the first anode 251 may be disposed on the upper surface of the transistor array 20. In addition, in each of the non-emission areas NEA between the adjacent sub-pixels SP1, SP2, and SP3, a first electrode pattern 251c of the same layer as the first lower electrode 251a may be disposed on the upper surface of the transistor array 20. Here, the first lower electrode 251a and the first electrode pattern 251c may be spaced apart from each other. Figure 3 In each of the second subpixel SP2 and the third subpixel SP3, a connection electrode 243 of the same layer as the first lower electrode 251a may be provided on the upper surface of the transistor array 20. The connection electrode 243 may be configured to connect the second anode 253 or the third anode 255 of each of the second subpixel SP2 and the third subpixel SP3 to the corresponding transistor.

[0072] The first upper electrode 251b of the first anode 251 may be spaced apart from the first lower electrode 251a by the first insulating layer 230 and the second insulating layer 240 interposed therebetween. That is, the first upper electrode 251b may be disposed on the second insulating layer 240.

[0073] The second lower electrode 253a of the second anode 253 may be disposed on the upper surface of the first insulating layer 230. In addition, in each of the non-emission areas NEA between the adjacent sub-pixels SP1, SP2, and SP3, a second electrode pattern 253c of the same layer as the second lower electrode 253a may be disposed on the upper surface of the first insulating layer 230. Here, the second lower electrode 253a and the second electrode pattern 253c may be spaced apart from each other. In addition, the second width W2 of the second electrode pattern 253c may be the same as the first width W1 of the first electrode pattern 251c, and the first electrode pattern 251c and the second electrode pattern 253c may overlap each other. Referring to Figure 3In each of the first subpixel SP1 and the third subpixel SP3, a connection electrode 241 of the same layer as the second lower electrode 253a may be provided on the upper surface of the first insulating layer 230. The connection electrode 241 may be configured to connect the first anode 251 or the third anode 255 of each of the first subpixel SP1 and the third subpixel SP3 to the corresponding transistor.

[0074] The second upper electrode 253b of the second anode 253 may be spaced apart from the second lower electrode 253a by the second insulating layer 240 interposed therebetween. That is, the second upper electrode 253b may be disposed on the second insulating layer 240.

[0075] The third lower electrode 255a of the third anode 255 may be disposed on the upper surface of the second insulating layer 240. In addition, in each of the non-emission areas NEA between the adjacent sub-pixels SP1, SP2, and SP3, a third electrode pattern 255c of the same layer as the third lower electrode 255a may be disposed on the upper surface of the second insulating layer 240. Here, the third lower electrode 255a and the third electrode pattern 255c may be spaced apart from each other. In addition, a third width W3 of the third electrode pattern 255c may be greater than the first width W1 of the first electrode pattern 251c and the second width W2 of the second electrode pattern 253c, and may overlap both the first electrode pattern 251c and the second electrode pattern 253c.

[0076] The third upper electrode 255b of the third anode 255 may contact the third lower electrode 255a without an insulating layer interposed therebetween. However, the present disclosure is not limited thereto, and an insulating layer may be further disposed between the third lower electrode 255a and the third upper electrode 255b to adjust the resonance distance.

[0077] The material for the cathode 280a facing the anode 251, 253 and 255 may be disposed on the intermediate layer 270a and the first dummy pattern 270b over the entire surface of the substrate 10. The light-emitting display device according to the present disclosure has an undercut UC in the step area HA in the non-light-emitting area NEA, and therefore, the material for the cathode 280a may be divided into the cathode 280a overlapping the light-emitting area EA and the second dummy pattern 280b overlapping the step area HA, and may be included in the third dummy pattern 201 between the light-emitting area EA and the step area HA. ​​The cathode 280a of the present disclosure may be formed as a transflective electrode that transmits a portion of light and reflects another portion of light. The cathode 280a may have a lower transmittance than the upper electrodes 251b, 253b and 255b, and a higher transmittance than the lower electrodes 251a, 253a and 255a. For example, the cathode 280a may be formed of silver (Ag), aluminum (Al), magnesium (Mg), calcium (Ca), or an alloy thereof to have a thickness sufficient to transmit light.

[0078] In the light emitting area EA, a microcavity effect may occur between the anodes 251, 253, and 255 and the cathode 280a. The first to third lower electrodes 251a, 253a, and 255a of the first to third anodes 251, 253, and 255 may be formed as reflective electrodes, the first to third upper electrodes 251b, 253b, and 255b may be formed as transparent electrodes, and the cathode 280a may be formed as a transmissive reflective electrode. In this case, a portion of the light emitted from the intermediate layer 270a may travel toward the cathode 280a, and another portion of the light may pass through the first to third upper electrodes 251b, 253b, and 255b and travel toward the first to third lower electrodes 251a, 253a, and 255a. Light from the intermediate layer 270a traveling in the direction of the first to third lower electrodes 251a, 253a, and 255a may be reflected by the first to third lower electrodes 251a, 253a, and 255a and travel in the direction of the cathode 280a, and a portion of the light may be reflected again and travel in the direction of the first to third lower electrodes 251a, 253a, and 255a. In this way, as reflection and re-reflection are repeated between the first to third lower electrodes 251a, 253a, and 255a and the cathode 280a, a microcavity effect in which light is amplified may occur. Light from the intermediate layer 270a amplified by the microcavity effect may improve the luminous efficiency of the light-emitting display device.

[0079] As described above, the first to third electrode patterns 251c, 253c, and 255c formed in the same layer as the first to third lower electrodes 251a, 253a, and 255a may be disposed in the non-emission area NEA. The first to third electrode patterns 251c, 253c, and 255c may overlap each other while being spaced apart from the first to third lower electrodes 251a, 253a, and 255a, respectively. In addition, the region in which the first to third electrode patterns 251c, 253c, and 255c are disposed is defined as a step area HA. ​​The second vertical distance d2 from the upper surface of the transistor array 20 to the upper surface of the third electrode pattern 255c in contact with the first dummy pattern 270b at the step area HA may be greater than the first vertical distance d1 from the upper surface of the transistor array 20 to the upper surface of each of the anodes 251, 253, and 255 in contact with the intermediate layer 270a at the emission area EA. In addition, due to the vertical distance from the upper surface of the substrate 10 to the upper surface of the transistor array 20 at the light-emitting area EA and the step area HA, the vertical distance from the upper surface of the substrate where the third electrode pattern 255c contacts the first virtual pattern 270b to the upper surface of the third electrode pattern 255c can be greater than the vertical distance from the upper surface of the substrate to each of the upper surfaces of the anodes 251, 253, 253 at the light-emitting area.

[0080] The step area HA may be defined in the non-emission area NEA between the adjacent sub-pixels SP1 , SP2 , and SP3 , and may be spaced apart from the adjacent emission area EA.

[0081] The trench T may be disposed between the step region HA and the light emitting region EA adjacent thereto. In addition, the trench T may be formed around the light emitting region EA of each of the sub-pixels SP1, SP2, and SP3. A third vertical distance d3 from the upper surface of the transistor array 20 to a portion of the surface of the second insulating layer 240 located closest to the transistor array 20 may be smaller than the first vertical distance d1. Such a trench T may cut off a portion of the intermediate layer 270a at the edge of the light emitting region EA of each of the plurality of sub-pixels SP1, SP2, and SP3.

[0082] The groove T between the step area HA and the adjacent light emitting area EA may overlap at least with the edge of the step area HA. ​​An undercut UC may be provided under the third electrode pattern 255c in the groove T overlapping the step area HA. ​​The undercut UC having a step on the side of the structure may completely separate the components deposited on the structure. Therefore, the light emitting display device according to the present disclosure may completely separate the material of the intermediate layer 270a in the light emitting area EA from the first dummy pattern 270b in the step area HA by the undercut UC provided at the edge of the step area HA.

[0083] If the groove T does not include the undercut UC, the material for the intermediate layer 270a includes a large amount of organic material, and therefore, a gap may appear between the organic materials of the adjacent sub-pixels SP1, SP2, and SP3, and the gap may collapse as the intermediate layer 270a and the first dummy pattern 270b become thicker. When the gap collapses, in each sub-pixel SP1, SP2, and SP3, the intermediate layer 270a and the first dummy pattern 270b are not formed to have a constant thickness, and the organic material moves toward the groove T, resulting in different densities of the intermediate layer 270a between the respective sub-pixels SP1, SP2, and SP3, resulting in different light-emitting characteristics, and resulting in uneven light emission that may be recognized as stains. However, in the present disclosure, the undercut UC is provided in the groove T, and therefore, the first dummy pattern 270b on the third electrode pattern 255c can be completely separated from the intermediate layer 270a in the light-emitting area EA, and the appearance of the gap can be prevented.

[0084] In addition, among the first to third electrode patterns 251c, 253c, and 255c, the third electrode pattern 255c in contact with the first dummy pattern 270b may be provided to have a wider width than the first electrode pattern 251c and the second electrode pattern 253c. Therefore, an undercut UC may be easily formed between the second insulating layer 240 and the second electrode pattern 253c under the third electrode pattern 255c.

[0085] The material for the intermediate layer 270a may be disposed on the anodes 251, 253, and 255 and the bank 260 over the entire area of ​​the substrate 10 through a common mask. The light-emitting display device according to the present disclosure has an undercut UC in the step area HA of the non-light-emitting area NEA, so that the material for the intermediate layer 270a may be divided into the intermediate layer 270a overlapping the light-emitting area EA, the first dummy pattern 270b overlapping the step area HA, and the third dummy pattern 201 overlapping the area between the light-emitting area EA and the step area HA. ​​At least the intermediate layer 270a and the first dummy pattern 270b may be formed as the same layer. Specifically, the intermediate layer 270a and the first dummy pattern 270b may include a light-emitting unit having a tandem structure, the tandem structure including a first stack 271a or 271b having a first light-emitting layer EML1 and a second light-emitting layer EML2, respectively, and a charge generation layer (CGL) 273a or 273b disposed between the first stack 271a or 271b and the second stack 275a or 275b. The tandem structure is not limited to the above-mentioned two stack structures, and may include a plurality of stacks, such as three or more stacks. In some cases, the intermediate layer 270a and the first dummy pattern 270b may be formed by a single stack of organic layers including a plurality of layers, the plurality of layers including a hole injection layer HIL, a hole transport layer HTL, a light-emitting layer EML1 or EML2, an electron transport layer ETL, and an electron injection layer EIL.

[0086] Here, the first light emitting layer EML1 and the second light emitting layer EML2 in the plurality of stacks may be light emitting layers emitting light of the same color, i.e., any one of red light, green light, and blue light, and may be disposed in each of some sub-pixels among the plurality of sub-pixels SP1, SP2, and SP3. The plurality of layers of the intermediate layer 270a other than the first light emitting layer EML1 and the second light emitting layer EML2 may be disposed over the entire surface of the substrate 10 by a common mask. Alternatively, when white light is emitted by the first light emitting layer EML1 and the second light emitting layer EML2 in a double stack structure or a light emitting layer in a multi-stack structure including three or more stacks, each of the light emitting layers may be disposed over the entire surface of the substrate 10 by a common mask in the same manner as the other layers of the intermediate layer 270a.

[0087] The charge generation layers 273a and 273b may be formed into a double-layer structure including an n-type charge generation layer and a p-type charge generation layer. The n-type charge generation layer and the p-type charge generation layer of the charge generation layers 273a and 273b may include an n-type dopant and a p-type dopant, respectively. For example, the n-type dopant may include a metal dopant such as lithium (Li) or ytterbium (Yb), and when the n-type charge generation layer is formed together in a plurality of sub-pixels SP1, SP2, and SP3, the metal dopant may cause an increase in charge mobility and thus cause leakage current between adjacent sub-pixels. In addition to the n-type charge generation layer, the layer of the intermediate layer 270a including a material having a high charge mobility may cause leakage current.

[0088] However, the layer of the intermediate layer 270a of the present disclosure is not continuously deposited between adjacent sub-pixels SP1, SP2 and SP3, but can be respectively divided into the intermediate layer 270a in the emission area EA and the first virtual pattern 270b in the step area HA by the groove T including the undercut UC in the step area HA.

[0089] In particular, in the light-emitting display device according to the present disclosure, the height from the substrate 10 to the upper electrodes 251b, 253b, and 255b in the light-emitting area and the height from the substrate to the third electrode pattern 255c in the step area HA may be different from each other. Therefore, even if the upper portion of the side surface of the intermediate layer 270a and the upper portion of the side surface of the first dummy pattern 270b contact each other, different layers of the intermediate layer 270a and the first dummy pattern 270b may contact each other because the light-emitting area EA and the step area HA have different heights. Therefore, the light-emitting display device according to the present disclosure can completely prevent leakage current from flowing through the common layer between adjacent sub-pixels SP1, SP2, and SP3.

[0090] Meanwhile, a sealing layer 290 may be disposed on the cathode 280a and the second dummy pattern 280b. The sealing layer 290 may be disposed to cover all active areas and inactive areas. The sealing layer 290 prevents oxygen and moisture from penetrating into the light-emitting element, thereby improving the life of the light-emitting display device. For example, the sealing layer 290 may be formed by stacking one or more pairs of inorganic encapsulation films and organic encapsulation films, or may be formed by stacking a filling material and a counter substrate on the substrate 10.

[0091] The embankment 260 may be disposed on the second insulating layer 240 to cover the edge of each of the first to third upper electrodes 251b, 253b, and 255b. The embankment 260 may prevent the reduction of luminous efficiency caused by the concentration of current on the edge of the end of the first to third upper electrodes 251b, 253b, and 255b. The embankment 260 may be formed of a thin inorganic insulating film and may be locally disposed at the edge of each of the first to third upper electrodes 251b, 253b, and 255b. However, the present disclosure is not limited thereto and may be formed of an organic insulating film thicker than the inorganic insulating film.

[0092] Figure 4 It is shown Figure 2 Hereinafter, description of the same configuration as that of the previous embodiment will be omitted.

[0093] Reference Figure 4 ,and Figure 2 Compared with the embodiment shown in the figure, only two layers of electrode patterns 453c and 455c may be provided in the non-emission area NEA. The second electrode pattern 453c and the third electrode pattern 455c may be formed as the same layer as the second lower electrode 453a and the third lower electrode 455a, respectively. The second electrode pattern 453c and the third electrode pattern 455c may be formed in the same process as the second lower electrode 453a and the third lower electrode 455a, respectively. The second electrode pattern 453c and the third electrode pattern 455c may have the same thickness as the second lower electrode 453a and the third lower electrode 455a, and the second lower electrode 453a and the third lower electrode 455a have a greater thickness than the upper electrodes 451b, 453b and 455b so as to have a high reflectivity. That is, even if only two layers of the second electrode pattern 453c and the third electrode pattern 455c are stacked in the non-emission area NEA, the emission area EA and the step area HA may have different vertical distances from the substrate 10.

[0094] Specifically, a second vertical distance d2 from the upper surface of the transistor array 20 to the upper surface of the third electrode pattern 455c in contact with the first dummy pattern 470b in the step area HA may be greater than a first vertical distance d1 from the upper surface of the transistor array 20 to the upper surface of each of the anodes 451, 453, and 455 in contact with the intermediate layer 470a in the emission area EA. Figure 4In the light-emitting display device of the present disclosure of the embodiment shown, only due to the difference between the first vertical distance d1 in the light-emitting area EA and the second vertical distance d2 in the non-light-emitting area NEA, the same components in the layer forming the intermediate layer 470a and the layer forming the first dummy pattern 470b can be located at different heights. Therefore, the light-emitting display device can have an effect of preventing leakage current from flowing between adjacent sub-pixels SP1, SP2, and SP3.

[0095] The trench T may be disposed between the step region HA and the light emitting region EA adjacent thereto. In addition, the trench T may be formed around the light emitting region EA of each of the sub-pixels SP1, SP2, and SP3. A third vertical distance d3 from the upper surface of the transistor array 20 to a portion of the surface of the second insulating layer 440 located closest to the transistor array 20 may be smaller than the first vertical distance d1.

[0096] Figure 5A is a plan view of a light emitting display device according to a second embodiment of the present disclosure, and Figure 5B yes Figure 5A An enlarged plan view of a portion of the. Figure 6 It is along Figure 5A A cross-sectional view taken along line III-III'.

[0097] Reference FIG. 5A to FIG. 6 , in the light-emitting display device according to the second embodiment, the first electrode pattern to the third electrode pattern 351c, 353c and 355c may have different widths. Specifically, the third width W3 of the third electrode pattern 355c contacting the first dummy pattern 370b formed as the same layer as the intermediate layer 370a may be greater than the first width W1 of the first electrode pattern 351c and the second width W2 of the second electrode pattern 353c. In addition, the second width W2 of the second electrode pattern 353c may be greater than the first width W1 of the first electrode pattern 351c. In this way, the first electrode pattern to the third electrode pattern 351c, 353c and 355c may have a narrower width as they become closer to the transistor array 20 or the substrate 10. In addition, in the same manner as the first embodiment, the first electrode pattern to the third electrode pattern 351c, 353c and 355c may overlap each other while being spaced apart from the first lower electrode 351a, 353a and 355a, respectively.

[0098] In the same manner as the modification of the first embodiment, among the first to third electrode patterns 351 c , 353 c , and 355 c , only one of the first electrode pattern 351 c and the second electrode pattern 353 c may be provided.

[0099] Fig. 7Ais a plan view of a light emitting display device according to a third embodiment of the present disclosure, and Figure 7B yes Fig. 7A An enlarged plan view of a portion of the. Figure 8 It is along Fig. 7A A cross-sectional view taken along line IV-IV'.

[0100] Reference FIG. 7A to FIG. 8 In the light-emitting display device according to the third embodiment, the first to third widths W1, W2, and W3 of the first to third electrode patterns 151c, 153c, and 155c may be the same. In addition, in the same manner as the first embodiment, the first to third electrode patterns 151c, 153c, and 155c may overlap each other while being spaced apart from the first to third lower electrodes 151a, 153a, and 155a, respectively.

[0101] In the light-emitting display device according to the third embodiment, the trench T does not include an undercut. That is, compared with the first and second embodiments, the light-emitting display device according to the third embodiment may not have an undercut UC under the third electrode pattern 155c. Compared with the previous embodiments, in the light-emitting display device according to the third embodiment, the trench T may be configured so that both the first insulating layer 130 and the second insulating layer 140 are removed, and the surface of the transistor array 20 is exposed to a region that does not overlap with the step region HA of the non-light-emitting area NEA.

[0102] Therefore, in the light-emitting display device according to the third embodiment, some portions of the first dummy pattern 170b on the third electrode pattern 155c and the intermediate layer 170a on each of the first to third anodes 151, 153, and 155 may contact each other, while some other portions may be separated from each other. By providing the trench T, the material of the first stack 171a for the intermediate layer 170a may be separated into the first stack 171a in the light-emitting area EA, the first layer 170b in the step area HA, and the third dummy pattern 101 in the non-light-emitting area NEA that does not overlap with the step area HA. ​​As the intermediate layer 170a becomes thicker, the gap between the intermediate layer 170a and the first dummy pattern 170b collapses, and therefore, the charge generation layer 173a of the intermediate layer 170a and the second layer 173b of the first dummy pattern 170b may be close to the non-light-emitting area NEA between the step area HA and the light-emitting area EA. However, in the light-emitting display device of the present disclosure, since the second vertical distance d2 from the upper surface of the transistor array 20 to the upper surface of the third electrode pattern 155c in the step area HA is greater than the first vertical distance d1 from the upper surface of the transistor array 20 to the upper surface of each of the first to third upper electrodes 151b, 153b, and 155b, the charge generation layer 173a of the intermediate layer 170a and the second layer 173b of the first dummy pattern 170b may not contact each other. Although the second stack 175a of the intermediate layer 170a and the third layer 175b of the first dummy pattern 170b may contact each other, due to the step between the light-emitting area EA and the step area HA, the layers contacting each other may be layers having different configurations. Therefore, in the light-emitting display device according to the contents of the present disclosure, since one layer having a higher charge mobility than other layers is located at different heights in the light-emitting area EA and the step area HA due to the step between the light-emitting area EA and the step area HA, even if there is an area where the intermediate layer 170a and the first virtual pattern 170b contact each other, the intermediate layer 170a and the first virtual pattern 170b are in contact so that the common layer is discontinuous, and therefore, leakage current through the common layer between adjacent sub-pixels can be completely prevented.

[0103] If the second stack 175 a of the intermediate layer 170 a and the third layer 175 b of the first dummy pattern 170 b contact each other, the cathode 180 on the intermediate layer 170 a may be continuously disposed on the entire substrate 10 .

[0104] 9A to 9H It shows the manufacturing Figure 2 A cross-sectional view of the process of the light-emitting display device is shown.

[0105] Reference Fig.9A, a transistor TFT may be formed in each of the plurality of sub-pixels SP1, SP2, and SP3. A transistor array 20 including a plurality of transistor TFTs and a plurality of insulating layers between insulating films may be formed on the plurality of transistor TFTs, which flattens the steps of the plurality of transistor TFTs. Thereafter, a first lower electrode 251a overlapping the emission area EA of the first sub-pixel SP1, and a first electrode pattern 251c spaced apart from the first lower electrode 251a to correspond to the non-emission area NEA of the adjacent sub-pixels SP1, SP2, and SP3 may be formed on the transistor array 20 through a mask process.

[0106] Next, refer to Fig. 9B , the first insulating layer 230 may be formed on the transistor array 20 over the entire area of ​​the substrate 10, and the transistor array 20 is provided with the first lower electrode 251a and the first electrode pattern 251c formed thereon. The first insulating layer 230 may be formed of an inorganic insulating material so that the step caused by the first lower electrode 251a and the first electrode pattern 251c on the transistor array 20 may be maintained. Therefore, a vertical distance d11 from the upper surface of the transistor array 20 to the upper surface of the first insulating film 230 in the light emitting area EA may be the same as a vertical distance d12 from the upper surface of the transistor array 20 to the upper surface of the first insulating film 230 in the region overlapping with the first electrode pattern 251c, and may be greater than a vertical distance d13 from the upper surface of the transistor array 20 to the upper surface of the first insulating film 230 in the region not overlapping with the first lower electrode 251a and the first electrode pattern 251c.

[0107] Afterwards, refer to Fig. 9C A second lower electrode 253a overlapping the light emitting area EA of the second sub-pixel SP2 and a second electrode pattern 253c spaced apart from the second lower electrode 253a to correspond to the non-light emitting area NEA may be formed on the first insulating film 230 by a mask process. Here, the second electrode pattern 253c may overlap the first electrode pattern 251c, and the second width W2 of the second electrode pattern 253c may be the same as the first width W1 of the first electrode pattern 251c.

[0108] Afterwards, refer to Fig.9D, the second insulating material 240a is disposed on the first insulating layer 230 over the entire area of ​​the substrate 10, and the first insulating layer 230 is provided with the second lower electrode 253a and the second electrode pattern 253c formed thereon. The second insulating material 240a may be formed of an inorganic material so that a step caused by the second lower electrode 253a and the second electrode pattern 253c on the first insulating layer 230 may be maintained. Therefore, a vertical distance d21 from the upper surface of the transistor array 20 to the upper surface of the second insulating material 240a in the light emitting area EA may be smaller than a vertical distance d22 from the upper surface of the transistor array 20 to the upper surface of the second insulating material 240a in the region overlapping with the first electrode pattern 251c, and may be larger than a vertical distance d23 from the upper surface of the transistor array 20 to the upper surface of the second insulating material 240a in the region not overlapping with the first lower electrode 251a and the first electrode pattern 251c.

[0109] Afterwards, refer to Fig.9E , a third lower electrode 255a overlapping the light emitting area EA of the third sub-pixel SP3 and a third electrode pattern 255c spaced apart from the third lower electrode 255a to correspond to the non-light emitting area NEA may be formed on the second insulating material 240a by a mask process. Here, the third electrode pattern 255c may overlap the first electrode pattern 251c and the second electrode pattern 253c, and a third width W3 of the third electrode pattern 255c may be greater than the first width W1 of the first electrode pattern 251c and the second width W2 of the second electrode pattern 253c, respectively. In addition, a region in the non-light emitting area NEA where the third electrode pattern 255c is formed may be defined as a step region HA.

[0110] Afterwards, refer to Fig.9F , a first upper electrode 251b overlapping with the first lower electrode 251a of the first sub-pixel SP1, a second upper electrode 253b overlapping with the second lower electrode 253a of the second sub-pixel SP2, and a third upper electrode 255b overlapping with the third lower electrode 255a of the third sub-pixel SP3 may be formed on the second insulating material 240a. Here, a vertical distance d31 from the upper surface of the transistor array 20 to the upper surfaces of the upper electrodes 251b, 253b, and 255b in the emission area EA may be smaller than a vertical distance d32 from the upper surface of the transistor array 20 to the upper surface of the third electrode pattern 255c in the step area HA, and may be greater than a vertical distance d33 from the upper surface of the transistor array 20 to the upper surface of the second insulating material 240a in the region not overlapping with the first lower electrode 251a and the first electrode pattern 251c.

[0111] Afterwards, refer to Figure 9G, the second insulating layer 240 having an undercut UC below the third electrode pattern 255c can be formed by over-etching the second insulating material 240a in contact with the third electrode pattern 255c. Therefore, a vertical distance d43 from the upper surface of the transistor array 20 to the upper surface of the second insulating layer 240 in the region not overlapping the first lower electrode 251a and the first electrode pattern 251c can be greater than Fig.9F That is, the vertical distance d33 shown is short. Figure 9H The middle) can be made deeper through an over-etching process.

[0112] Afterwards, refer to Figure 9H , the material for the intermediate layer 270a and the material for the cathode 280a may be sequentially disposed on the second insulating layer 240, and the second insulating layer 240 is provided with upper electrodes 251b, 253b, and 255b and a third electrode pattern 255c. At this time, due to the height difference and undercut UC between the light emitting area EA and the step area HA from the transistor array 20, the material for the intermediate layer 270a may be completely divided into the intermediate layer 270a and the first dummy pattern 270b in the light emitting area EA and the step area HA, respectively. Similarly, the material for the cathode 280a may be completely divided into the cathode 280a and the second dummy pattern 280b in the light emitting area EA and the step area HA, respectively.

[0113] In the above embodiment, the first sub-pixel SP1 and the third sub-pixel SP3 may be arranged at opposite positions to each other. That is, at the first sub-pixel SP1, the lower electrode and the upper electrode are in contact with each other, and at the third sub-pixel SP3, there are the first insulating layer and the second insulating layer between the lower electrode and the upper electrode. Among the first to third sub-pixels, the vertical distance between the lower electrode and the upper electrode at the third sub-pixel SP3 is the largest.

[0114] A light-emitting display device according to an embodiment of the present disclosure may include: a substrate including a first sub-pixel and a second sub-pixel, each sub-pixel having a light-emitting region and a non-light-emitting region; a first insulating layer on the substrate; a first anode at the first sub-pixel including a first lower electrode and a first upper electrode above the first insulating layer; a second anode at the second sub-pixel including a second lower electrode and a second upper electrode, the second lower electrode and the second upper electrode being spaced apart from each other by the first insulating layer interposed therebetween; a first electrode pattern disposed at the non-light-emitting region, spaced apart from the first lower electrode and including the same layer as the first lower electrode; and a second electrode pattern spaced apart from the second lower electrode, overlapping the first electrode pattern and including the same layer as the second lower electrode. A first vertical distance from an upper surface of the substrate where the first electrode pattern and the second electrode pattern overlap each other to an upper surface of the first electrode pattern may be greater than a second vertical distance from an upper surface of the substrate to an upper surface of the first upper electrode at the light-emitting region.

[0115] In the light emitting display device according to one embodiment of the present disclosure, the second electrode pattern may have a smaller width than the first electrode pattern.

[0116] According to one embodiment of the present disclosure, a light-emitting display device may further include: a third sub-pixel on the substrate, spaced apart from each of the first sub-pixel and the second sub-pixel; a second insulating layer between the substrate and the first insulating layer; a third anode at the third sub-pixel, the third anode including a third lower electrode and a third upper electrode, the third lower electrode and the third upper electrode being spaced apart from each other by the first insulating layer and the second insulating layer interposed therebetween; and a third electrode pattern spaced apart from the third lower electrode, overlapping with the first electrode pattern and the second electrode pattern, and including the same layer as the third lower electrode.

[0117] In the light emitting display device according to one embodiment of the present disclosure, the third electrode pattern may have a smaller width than the first electrode pattern.

[0118] In the light emitting display device according to one embodiment of the present disclosure, the second electrode pattern may have a smaller width than the first electrode pattern; and the third electrode pattern may have a smaller width than the second electrode pattern.

[0119] In the light emitting display device according to one embodiment of the present disclosure, the width of the first insulating layer at a region in contact with the first electrode pattern may be smaller than the width of the first electrode pattern.

[0120] The light-emitting display device according to one embodiment of the present disclosure may further include: an intermediate layer and a cathode on each of the first to third anodes; a first dummy pattern on the first electrode pattern, formed as the same layer as the intermediate layer; and a second dummy pattern on the first dummy pattern, formed as the same layer as the cathode. The intermediate layer and the first dummy pattern may be spaced apart from each other.

[0121] The light-emitting display device according to one embodiment of the present disclosure may further include: an intermediate layer and a cathode sequentially disposed on the first anode, the second anode and the first electrode pattern. The intermediate layer may include a plurality of layers, the plurality of layers including at least one layer having a higher charge mobility than other layers; and at least one layer of the plurality of layers of the intermediate layer may have a discontinuous region in the non-light-emitting region.

[0122] In the light-emitting display device according to one embodiment of the present disclosure, a third vertical distance from the upper surface of the substrate to the uppermost surface of the first insulating layer at an area not overlapping the third electrode pattern in the non-light-emitting area may be smaller than the second vertical distance.

[0123] In the light emitting display device according to one embodiment of the present disclosure, the first insulating layer may include an inorganic insulating material.

[0124] In the light emitting display device according to one embodiment of the present disclosure, the first lower electrode may have a higher reflectivity than the first upper electrode, and the second lower electrode may have a higher reflectivity than the second upper electrode.

[0125] In the light emitting display device according to one embodiment of the present disclosure, the first lower electrode may have a greater thickness than the first upper electrode, and the second lower electrode may have a greater thickness than the second upper electrode.

[0126] According to one embodiment of the present disclosure, a light-emitting display device may further include: a third sub-pixel on the substrate, spaced apart from each of the first sub-pixel and the second sub-pixel; a second insulating layer between the substrate and the first insulating layer; and a third anode at the third sub-pixel, the third anode including a third lower electrode and a third upper electrode, the third lower electrode and the third upper electrode being spaced apart from each other by the first insulating layer and the second insulating layer inserted therebetween.

[0127] A light-emitting display device according to an embodiment of the present disclosure may include: a substrate including first to third sub-pixels, each sub-pixel having a light-emitting region and a non-light-emitting region; first to third lower electrodes on the substrate, which overlap with the light-emitting regions of the first to third sub-pixels, respectively; a first insulating layer above the substrate; a first electrode pattern above the first insulating layer, which overlaps with the non-light-emitting region between the respective light-emitting regions of the first to third sub-pixels; a second insulating layer between the first insulating layer and the substrate; a second electrode pattern overlapping the first electrode pattern, the second electrode pattern being disposed between the first insulating layer and the second insulating layer, the second electrode pattern being spaced apart from the second lower electrode; and a third electrode pattern overlapping the first electrode pattern and the second electrode pattern, being disposed between the second insulating layer and the substrate, the third electrode pattern being spaced apart from the third lower electrode. The first insulating layer may have a groove, the groove being configured to partially overlap with an edge of the first electrode pattern.

[0128] In the light emitting display device according to one embodiment of the present disclosure, the second electrode pattern may have a smaller width than the first electrode pattern.

[0129] In the light emitting display device according to one embodiment of the present disclosure, the third electrode pattern may have a smaller width than the second electrode pattern.

[0130] In the light emitting display device according to one embodiment of the present disclosure, the first insulating layer may include an inorganic insulating material.

[0131] The light-emitting display device according to one embodiment of the present disclosure may further include first to third upper electrodes respectively located on the first to third lower electrodes. Each of the first to third upper electrodes may have a higher transmittance than a corresponding one of the first to third lower electrodes.

[0132] A light-emitting display device according to an embodiment of the present disclosure may include: a substrate having a plurality of light-emitting regions and a non-light-emitting region between the plurality of light-emitting regions; a plurality of anodes respectively arranged at the plurality of light-emitting regions, each anode including a lower electrode and an upper electrode, wherein the lower electrode in a certain light-emitting region is located at a different vertical position from the lower electrode of an adjacent light-emitting region; a first insulating layer on the lower electrode of at least one anode among the plurality of anodes; and an electrode pattern on the first insulating layer at the non-light-emitting region between the plurality of light-emitting regions, the electrode pattern being horizontally spaced apart from the lower electrode, respectively. The lower surface of the electrode pattern may have a higher vertical position than the lower surface of the upper electrode at each of the plurality of light-emitting regions.

[0133] In the light emitting display device according to one embodiment of the present disclosure, the electrode pattern may be provided at the same layer as a lower electrode of an anode at a light emitting region emitting light of the shortest wavelength among a plurality of light emitting regions.

[0134] In the light emitting display device according to one embodiment of the present disclosure, an upper surface of the first insulating layer between the upper electrode and the electrode pattern may be lower than a lower surface of the upper electrode.

[0135] As is apparent from the above description, the light emitting display device according to the present disclosure has the following effects.

[0136] First, the light-emitting display device according to the contents of the present disclosure has an electrode pattern of at least two layers in the same layer as the lower electrode of the adjacent sub-pixel in the non-light-emitting area of ​​the adjacent sub-pixel, and thus can prevent the intermediate layer in the light-emitting area and the corresponding layer of the first virtual pattern in the non-light-emitting area from contacting each other, thereby preventing leakage current from flowing through the common layer between the adjacent sub-pixels.

[0137] Second, the light-emitting display device according to the present disclosure has an undercut in the insulating layer below the electrode pattern in contact with the first virtual pattern, and thus the intermediate layer and the first virtual pattern can be completely separated from each other between adjacent sub-pixels, thereby preventing gaps from appearing between the intermediate layer and the first virtual pattern between adjacent sub-pixels.

[0138] Third, the light-emitting display device according to the present disclosure has an electrode pattern formed in the same layer as the lower electrode in the non-light-emitting region without adding a separate mask, and thus even if an electrode pattern for forming a step region is added, a separate process may not be required.

[0139] Fourth, the light-emitting display device according to the present disclosure has an electrode pattern formed in the same layer as the lower electrode in the non-light-emitting area without any separate process, and thus the energy required to manufacture the light-emitting display device can be reduced. Therefore, the light-emitting display device according to the present disclosure has an environmental, social and governance (ESG) effect in terms of environmental friendliness and process optimization.

[0140] It will be apparent to those skilled in the art that various modifications and variations can be made in the present disclosure without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure is intended to cover modifications and variations of the present disclosure as long as they are within the scope of the appended claims and their equivalents.

Claims

1. A light-emitting display device, comprising: A substrate including a first sub-pixel and a second sub-pixel, each sub-pixel having a light-emitting region and a non-light-emitting region; a first insulating layer on the substrate; a first anode at the first subpixel, comprising a first lower electrode and a first upper electrode above the first insulating layer; a second anode at the second sub-pixel, comprising a second lower electrode and a second upper electrode, the second lower electrode and the second upper electrode being spaced apart from each other by a first insulating layer interposed therebetween; a first electrode pattern disposed at the non-light emitting region, which is spaced apart from the first lower electrode and includes the same layer as the first lower electrode; as well as a second electrode pattern spaced apart from the second lower electrode, overlapping the first electrode pattern and including the same layer as the second lower electrode, Wherein, a first vertical distance from the upper surface of the substrate where the first electrode pattern and the second electrode pattern overlap each other to the upper surface of the first electrode pattern is greater than a second vertical distance from the upper surface of the substrate to the upper surface of the first upper electrode at the light emitting area.

2. The light-emitting display device according to claim 1, wherein: The second electrode pattern has a smaller width than the first electrode pattern.

3. The light-emitting display device according to claim 1, further comprising: a third sub-pixel on the substrate spaced apart from each of the first sub-pixel and the second sub-pixel; a second insulating layer between the substrate and the first insulating layer; a third anode at the third subpixel, the third anode comprising a third lower electrode and a third upper electrode, the third lower electrode and the third upper electrode being spaced apart from each other by a first insulating layer and a second insulating layer interposed therebetween; as well as A third electrode pattern spaced apart from the third lower electrode overlaps the first electrode pattern and the second electrode pattern and includes the same layer as the third lower electrode.

4. The light-emitting display device according to claim 3, wherein: The third electrode pattern has a smaller width than the first electrode pattern.

5. The light emitting display device according to claim 3, wherein: The second electrode pattern has a smaller width than the first electrode pattern; and The third electrode pattern has a smaller width than the second electrode pattern.

6. The light-emitting display device according to claim 1, wherein: A width of the first insulating layer at a region contacting the first electrode pattern is smaller than a width of the first electrode pattern.

7. The light-emitting display device according to claim 3, further comprising: an intermediate layer and a cathode on each of the first to third anodes; a first dummy pattern on the first electrode pattern, formed as the same layer as the intermediate layer; as well as a second dummy pattern on the first dummy pattern, which is formed in the same layer as the cathode, Wherein, the intermediate layer and the first dummy pattern are spaced apart from each other.

8. The light-emitting display device according to claim 1, further comprising: An intermediate layer and a cathode are sequentially arranged on the first anode, the second anode and the first electrode pattern, wherein: The intermediate layer includes a plurality of layers, the plurality of layers including at least one layer having a higher charge mobility than other layers; and The at least one layer among the plurality of layers of the intermediate layer has a discontinuous region in the non-light emitting region.

9. The light-emitting display device according to claim 3, wherein: A third vertical distance from the upper surface of the substrate to the uppermost surface of the first insulating layer at a region of the non-light emitting region that does not overlap the third electrode pattern is smaller than the second vertical distance.

10. The light-emitting display device according to claim 1, wherein: The first insulating layer includes an inorganic insulating material.

11. The light-emitting display device according to claim 1, wherein: The first lower electrode has a higher reflectivity than the first upper electrode, and the second lower electrode has a higher reflectivity than the second upper electrode.

12. The light-emitting display device according to claim 1, wherein: The first lower electrode has a greater thickness than the first upper electrode, and the second lower electrode has a greater thickness than the second upper electrode.

13. The light-emitting display device according to claim 1, further comprising: a third sub-pixel on the substrate spaced apart from each of the first sub-pixel and the second sub-pixel; a second insulating layer between the substrate and the first insulating layer; as well as A third anode at the third sub-pixel includes a third lower electrode and a third upper electrode, and the third lower electrode and the third upper electrode are spaced apart from each other by the first insulating layer and the second insulating layer interposed therebetween.

14. A light-emitting display device, comprising: A substrate including first to third sub-pixels, each sub-pixel having a light-emitting region and a non-light-emitting region; The first lower electrode to the third lower electrode on the substrate overlap with the light emitting areas of the first sub-pixel to the third sub-pixel respectively; a first insulating layer above the substrate; A first electrode pattern on the first insulating layer, which overlaps with a non-luminous region between each luminous region of the first sub-pixel to the third sub-pixel; a second insulating layer between the first insulating layer and the substrate; a second electrode pattern overlapping the first electrode pattern, the second electrode pattern being disposed between the first insulating layer and the second insulating layer, and the second electrode pattern being spaced apart from the second lower electrode; as well as a third electrode pattern, the third electrode pattern overlapping the first electrode pattern and the second electrode pattern, disposed between the second insulating layer and the substrate, the third electrode pattern being spaced apart from the third lower electrode, The first insulating layer has a groove, and the groove is configured to partially overlap with an edge of the first electrode pattern.

15. The light emitting display device according to claim 14, wherein: The second electrode pattern has a smaller width than the first electrode pattern.

16. The light emitting display device according to claim 15, wherein: The third electrode pattern has a smaller width than the second electrode pattern.

17. The light emitting display device according to claim 14, wherein: The first insulating layer includes an inorganic insulating material.

18. The light-emitting display device according to claim 14, further comprising: a first upper electrode to a third upper electrode respectively located on the first lower electrode to the third lower electrode, Each of the first to third upper electrodes has a higher transmittance than a corresponding one of the first to third lower electrodes.

19. A light-emitting display device, comprising: a substrate having a plurality of light-emitting regions and a non-light-emitting region between the plurality of light-emitting regions; A plurality of anodes are respectively arranged at the plurality of light-emitting regions, each anode comprising a lower electrode and an upper electrode, wherein the lower electrode in a certain light-emitting region is located at a different vertical position from the lower electrode in an adjacent light-emitting region; a first insulating layer on a lower electrode of at least one anode of the plurality of anodes; and electrode patterns on the first insulating layer at non-light emitting regions between the plurality of light emitting regions, the electrode patterns being horizontally spaced apart from the lower electrodes, respectively; Wherein, a lower surface of the electrode pattern has a higher vertical position than a lower surface of the upper electrode at each of the plurality of light emitting regions.

20. The light emitting display device according to claim 19, wherein: The electrode pattern is provided at the same layer as a lower electrode of an anode at a light emitting region emitting light of the shortest wavelength among the plurality of light emitting regions.

21. The light-emitting display device according to claim 19, wherein: An upper surface of the first insulating layer between the upper electrode and the electrode pattern is lower than a lower surface of the upper electrode.

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