Display panel, preparation method thereof and display device

Abstract

The invention provides a display panel and a preparation method thereof and a display device, and relates to the technical field of display, and the display panel comprises a substrate, a first conductive layer and a filling layer. A connecting layer and a flat layer covering the connecting layer are arranged on one side of the substrate, the flat layer is provided with a via hole, and at least part of the connecting layer is exposed out of the via hole; the first conductive layer is arranged on the surface of the side, away from the connecting layer, of the flat layer, the first conductive layer comprises a plurality of first conductive units arranged at intervals, and at least part of the first conductive units are located in the via holes and connected with the connecting layer; the filling layer is arranged on the side, away from the substrate, of the first conductive layer and comprises a plurality of filling units, and at least parts of the filling units are located in the via holes. According to the display panel provided by the invention, the use performance of the display device can be improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and more specifically, relates to a display panel and a preparation method thereof, and a display device. Background Art

[0002] Currently, flat panel display devices have the advantages of high image quality, power saving, small thickness and wide application range, and are widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc.

[0003] However, the performance and process performance of current display devices need to be improved. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a display panel and a method for manufacturing the same, and a display device, so as to improve the performance / process performance of the display device.

[0005] To achieve the above purpose, the technical solution adopted in this application is:

[0006] In a first aspect, a display panel is provided, comprising: a substrate, a first conductive layer and a filling layer. A connection layer and a flat layer covering the connection layer are arranged on one side of the substrate, the flat layer is provided with a via hole, and the via hole exposes at least part of the connection layer; the first conductive layer is arranged on a surface of a side of the flat layer away from the connection layer, the first conductive layer comprises a plurality of first conductive units arranged at intervals, at least part of the first conductive units are located in the via hole and connected to the connection layer; the filling layer is arranged on a side of the first conductive layer away from the substrate, the filling layer comprises a plurality of filling units, and at least part of the filling units are located in the via hole.

[0007] Through the above technical solution, the filling layer includes multiple filling units, at least part of the filling units are located in the vias, and the filling units can fill at least part of the space of the vias, which can avoid the film layer or device on the side of the first conductive layer away from the substrate from forming a large depression at the via, avoid adverse effects on the film layer or device on the side of the first conductive layer away from the substrate, and help improve performance.

[0008] Therefore, the display panel provided by the present application can improve the performance of the display device.

[0009] In some embodiments, the display panel provided in the present application further includes a pixel definition layer, and at least a portion of the pixel definition layer is located on a side of the filling layer facing away from the substrate.

[0010] In some embodiments, the pixel definition layer includes a first pixel definition layer and a second pixel definition layer sequentially disposed in a direction away from the substrate;

[0011] The second pixel definition layer is located on a side of the filling layer away from the substrate, or, along a direction away from the substrate, the filling layer is located between the first pixel definition layer and the second pixel definition layer.

[0012] In some embodiments, the first conductive unit includes a first electrode, the pixel definition layer has a pixel opening, and the pixel opening exposes a portion of the first electrode.

[0013] In some embodiments, the display panel provided in the present application further includes an isolation structure, which encloses an isolation opening, and an orthographic projection of the via hole on the substrate overlaps with an orthographic projection of the isolation structure on the substrate.

[0014] Optionally, the display panel provided in the present application also includes a pixel definition layer, the isolation structure is located on the side of the pixel definition layer facing away from the substrate, the first conductive unit includes a first electrode, the pixel definition layer has a pixel opening, the pixel opening exposes a portion of the first electrode, and the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate.

[0015] In some embodiments, the first pixel definition layer and the second pixel definition layer are made of different materials;

[0016] And / or, the material of the first pixel definition layer includes one of silicon oxide and silicon nitride, and the material of the second pixel definition layer includes the other of silicon oxide and silicon nitride;

[0017] and / or, an orthographic projection of the first pixel definition layer on the substrate coincides with an orthographic projection of the second pixel definition layer on the substrate;

[0018] And / or, the orthographic projection of the filling layer on the substrate is located within the orthographic projection range of the via hole on the substrate.

[0019] In some embodiments, the filling layer is located between the first pixel definition layer and the second pixel definition layer in a direction away from the substrate, the first pixel definition layer includes a first portion and a second portion that are connected, at least a portion of an orthographic projection of the via hole on the substrate is located within the orthographic projection range of the first portion of the first pixel definition layer on the substrate, the orthographic projection of the second portion of the first pixel definition layer on the substrate does not overlap with the orthographic projection of the via hole on the substrate, and the filling layer is located on a side of the first portion of the first pixel definition layer away from the substrate;

[0020] Wherein, the distance between the surface of the filling layer on one side facing away from the substrate and the substrate is greater than or equal to the distance between the surface of the second part of the first pixel definition layer on one side facing away from the substrate and the substrate;

[0021] Alternatively, the distance between the substrate and the surface of the filling layer facing away from the substrate is smaller than the distance between the substrate and the surface of the second portion of the first pixel definition layer facing away from the substrate.

[0022] In some embodiments, the filling layer is located on a side of the pixel definition layer facing the substrate, and at least a portion of the orthographic projection of the via hole on the substrate is located within the orthographic projection range of the filling layer on the substrate.

[0023] In some embodiments, the first conductive unit includes a third part and a fourth part, at least a portion of the orthographic projection of the via on the substrate is located within the orthographic projection range of the third part on the substrate, the orthographic projection of the fourth part on the substrate does not overlap with the orthographic projection of the via on the substrate, and a distance between the surface of the side of the filling layer facing away from the substrate and the substrate is greater than or equal to a distance between the surface of the side of the fourth part of the first conductive unit facing away from the substrate and the substrate.

[0024] Optionally, the orthographic projection of the third portion of the first conductive unit on the substrate is located within the orthographic projection range of the filling layer on the substrate.

[0025] In some embodiments, the first conductive unit includes a third part and a fourth part, at least a portion of the orthographic projection of the via on the substrate is located within the orthographic projection range of the third part on the substrate, the orthographic projection of the fourth part on the substrate does not overlap with the orthographic projection of the via on the substrate, and a spacing distance between a side surface of the filling layer facing away from the substrate and the substrate is smaller than a spacing distance between a side surface of the fourth part of the first conductive unit facing away from the substrate and the substrate.

[0026] Optionally, the orthographic projection of the filling layer on the substrate is located within the orthographic projection range of the third part of the first conductive unit on the substrate.

[0027] In some embodiments, along a direction away from the substrate, a size of the via gradually increases in a direction parallel to the substrate.

[0028] In some embodiments, the material of the filling layer is the same as that of the planarizing layer.

[0029] Optionally, the material of the planar layer includes an organic material.

[0030] Optionally, the material of the planar layer includes polyimide.

[0031] In some embodiments, the display panel provided by the present application further includes:

[0032] The light-emitting unit, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the light-emitting unit on the substrate;

[0033] A first encapsulation layer, the first encapsulation layer is located on a side of the light-emitting unit away from the substrate, and an orthographic projection of the light-emitting unit on the substrate is located within the orthographic projection range of the first encapsulation layer on the substrate;

[0034] The material of the filling layer is the same as that of the first encapsulation layer.

[0035] Optionally, the material of the first encapsulation layer includes an inorganic material.

[0036] Optionally, the material of the first encapsulation layer includes one of silicon oxide and silicon nitride.

[0037] In a second aspect, the present application provides a method for preparing a display panel, the method comprising:

[0038] Providing a substrate, disposing a connection layer and a flat layer covering the connection layer on one side of the substrate, wherein the flat layer is provided with a via hole, and the via hole exposes at least a portion of the connection layer;

[0039] A first conductive layer is prepared on one side of the substrate, wherein the first conductive layer includes a plurality of first conductive units arranged at intervals, and at least part of the first conductive units are located in the via holes and connected to the connection layer;

[0040] A filling layer is prepared on a side of the first conductive layer facing away from the substrate, and at least a portion of the filling layer is located in the via hole and fills at least a portion of the via hole.

[0041] In some embodiments, the preparation method provided by the present application further comprises:

[0042] A pixel definition layer is prepared, wherein at least a portion of the pixel definition layer is located on a side of the filling layer facing away from the substrate.

[0043] In some embodiments, preparing a pixel definition layer includes:

[0044] A pixel definition layer is prepared on the side of the filling layer facing away from the substrate.

[0045] Optionally, the pixel definition layer includes a first pixel definition layer and a second pixel definition layer which are sequentially arranged in a direction away from the substrate.

[0046] In some embodiments, the pixel definition layer includes a first pixel definition layer and a second pixel definition layer, and preparing the pixel definition layer includes:

[0047] Prepare a first pixel definition layer on a side of the first conductive layer facing away from the substrate;

[0048] preparing a second pixel definition layer on a side of the filling layer facing away from the substrate;

[0049] Preparing a filling layer on a side of the first conductive layer facing away from the substrate comprises:

[0050] A filling layer is prepared on the side of the first pixel definition layer facing away from the substrate.

[0051] In some embodiments, the first conductive unit includes a first electrode. After preparing the pixel definition layer, the preparation method provided by the present application further includes:

[0052] An isolation structure is prepared on a side of the pixel definition layer facing away from the substrate, and the isolation structure surrounds and forms an isolation opening;

[0053] A pixel opening is formed in the pixel definition layer, wherein the pixel opening exposes a portion of the first electrode;

[0054] A light-emitting unit and a first encapsulation layer are prepared.

[0055] Optionally, the preparation method provided in the present application further includes: preparing a second encapsulation layer on a side of the first encapsulation layer facing away from the substrate;

[0056] Optionally, the preparation method provided in the present application further includes: preparing a third encapsulation layer on a side of the second encapsulation layer facing away from the substrate.

[0057] In some embodiments, the isolation opening includes a first isolation opening, a second isolation opening, and a third isolation opening, the light-emitting unit includes a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit, the first encapsulation layer includes a first encapsulation portion, a second encapsulation portion, and a third encapsulation portion, and preparing the light-emitting unit and the first encapsulation layer includes:

[0058] Prepare a first light-emitting unit and a first packaging portion, wherein the orthographic projection of the first light-emitting unit on the substrate overlaps with the orthographic projection of the first isolation opening on the substrate, and the orthographic projection of the first light-emitting unit on the substrate is located within the orthographic projection range of the first packaging portion on the substrate;

[0059] Prepare a second light-emitting unit and a second packaging part, wherein the orthographic projection of the second light-emitting unit on the substrate overlaps with the orthographic projection of the second isolation opening on the substrate, and the orthographic projection of the second light-emitting unit on the substrate is located within the orthographic projection range of the second packaging part on the substrate;

[0060] A third light emitting unit and a third packaging part are prepared, wherein the orthographic projection of the third light emitting unit on the substrate overlaps with the orthographic projection of the third isolation opening on the substrate, and the orthographic projection of the third light emitting unit on the substrate is located within the orthographic projection range of the third packaging part on the substrate.

[0061] In a third aspect, the present application further provides a display device, the display device comprising the display panel of any of the above embodiments. The display device provided by the present application comprises the same or similar technical effects as any of the above embodiments, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0062] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0063] Figure 1 A schematic diagram of the planar structure of a display panel provided in an embodiment of the present application;

[0064] Figure 2 For along Figure 1 One of the cross-sectional structural diagrams along the AA line;

[0065] Figure 3 For along Figure 1 The second cross-sectional structure diagram of the AA line;

[0066] Figure 4 For along Figure 1 The third cross-sectional structure diagram of the AA line;

[0067] Figure 5 For along Figure 1 The fourth cross-sectional structure diagram of the AA line;

[0068] Figure 6 for Figure 1 A partial enlarged view of point B in the middle;

[0069] Figure 7 For along Figure 6 One of the cross-sectional structural diagrams of the CC line;

[0070] Figure 8 For along Figure 6 The second cross-sectional structure diagram of the CC line;

[0071] Fig. 9 A top view of the first conductive unit provided in an embodiment of the present application;

[0072] Fig.10 For along Figure 6 The third cross-sectional structure diagram of the CC line;

[0073] Fig.11 For along Figure 6 Sectional structure diagram of CC line in the middle (IV);

[0074] Fig.12 For along Figure 6 Sectional structure diagram of CC line in the middle (5);

[0075] Fig.13 For along Figure 6 Sectional structure diagram of CC line in the middle (VI);

[0076] Fig.14 For along Figure 6 Sectional structure diagram of CC line No. 7;

[0077] Fig.15 For along Figure 6 Sectional structure diagram of CC line No. 8;

[0078] Fig.16 A top view of the structure of the first pixel definition layer provided in an embodiment of the present application;

[0079] Fig.17 For along Figure 6 Sectional structure diagram of CC line in the middle, No.9;

[0080] Fig.18 For along Figure 6 Sectional structure diagram of CC line 10;

[0081] Fig.19 One of the structural schematic diagrams of the display panel provided in the embodiment of the present application during the preparation process;

[0082] Fig. 20 The second structural schematic diagram of the display panel during the preparation process provided by the embodiment of the present application;

[0083] Fig.21 The third structural schematic diagram of the display panel during the preparation process provided by the embodiment of the present application;

[0084] Fig. 22 For along Figure 6 Cross-sectional structural diagram of the middle DD line;

[0085] Fig.23 One of the flow diagrams of the preparation method provided in the embodiment of the present application;

[0086] Fig.24 The second schematic diagram of the preparation method provided in the embodiment of the present application;

[0087] Fig.25 The third flow chart of the preparation method provided in the embodiment of the present application.

[0088] Among them, the reference numerals in the figure are:

[0089] 100-display panel; 10-substrate; 11-flat layer; 12-connecting layer; 20-first conductive unit; 21-third part; 22-fourth part; 30-pixel definition layer; 31-first pixel definition layer; 311-first part; 312-second part; 32-second pixel definition layer; 40-isolation structure; 401-first isolation opening; 402-second isolation opening; 403-third isolation opening; 41-base part; 42-support part; 43-eaves part; 50-light-emitting layer; 51-first light-emitting layer; 52-second light-emitting layer; 53-third light-emitting layer; 60-second electrode; 71-first encapsulation layer; 72-second encapsulation layer; 73-third encapsulation layer; 80-filling layer. DETAILED DESCRIPTION

[0090] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0091] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0092] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0093] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0094] See also Figure 1 In this embodiment, a display panel 100 is provided. The display panel 100 may be an organic light-emitting diode (OLED) display panel 100 or a micro light-emitting diode (MicroLight Emitting Diode, Micro LED / μLED) display panel 100 .

[0095] The display panel 100 provided in the embodiment of the present application further includes a substrate 10 . The substrate 10 includes a display area AA and a non-display area NA. The non-display area NA surrounds at least a portion of the display area AA.

[0096] A connection layer 12 and a flat layer 11 covering the connection layer 12 are provided on one side of the substrate 10. The flat layer 11 is provided with vias, and the vias expose at least a portion of the connection layer 12 so that the connection layer 12 is connected to other film layers. For example, the connection layer 12 can be a metal layer, and the connection layer 12 can be arranged at intervals or on the entire surface, depending on the function and location of the vias.

[0097] See also Figure 2 The inventors found that the film layer or device on the side of the flat layer 11 facing away from the substrate 10 will produce a large depression at the via hole, which will have an adverse effect on the performance, and the display panel 100 will have a poor use effect, thereby affecting the performance of the display device.

[0098] Please also read Figure 3 , Figure 4 and Figure 5 In order to solve the above technical problems, the embodiment of the present application provides a display panel 100, which further includes a first conductive layer, which is disposed on a surface of the planar layer 11 away from the connection layer 12. The first conductive layer includes a plurality of first conductive units 20 disposed at intervals, at least some of the first conductive units 20 are located in the via holes, and at least some of the first conductive units 20 are connected to the connection layer 12. In this way, signals can be transmitted or conduction can be conducted between the first conductive units 20 and the connection layer 12.

[0099] Optionally, the connection layer 12 may be located in the display area AA or in the non-display area NA. Correspondingly, the via hole may be located in the display area AA or in the non-display area NA.

[0100] The display panel 100 provided in the embodiment of the present application further includes a filling layer 80, which is disposed on the side of the first conductive layer away from the substrate 10, and includes a plurality of filling units, at least part of which is located in the via hole. In this way, the filling unit can fill at least part of the space of the via hole, which can prevent the film layer or device on the side of the first conductive layer away from the substrate 10 from forming a large depression at the via hole, which can alleviate or even eliminate the adverse effects on the film layer or device on the side of the first conductive layer away from the substrate 10, and is conducive to improving the performance.

[0101] Therefore, the display panel 100 provided in the embodiment of the present application can improve the performance of the display device.

[0102] Optionally, the size of the via hole in a direction parallel to the substrate 10 gradually increases in a direction away from the substrate 10. This facilitates the processing of the via hole and facilitates the arrangement of the filling layer 80 in the via hole.

[0103] Optionally, the material of the filling layer 80 is the same as that of the flat layer 11 . This facilitates the preparation of the filling layer 80 using the material of the flat layer 11 .

[0104] Exemplarily, the material of the planar layer 11 includes an organic material.

[0105] Exemplarily, the material of the planar layer 11 includes polyimide.

[0106] Please continue reading Figure 3 and Figure 4 In some embodiments, the first conductive unit 20 includes a third portion 21 and a fourth portion 22, at least part of the orthographic projection of the via on the substrate 10 is located within the orthographic projection range of the third portion 21 on the substrate 10, the orthographic projection of the fourth portion 22 on the substrate 10 does not overlap with the orthographic projection of the via on the substrate 10, and the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is greater than or equal to the spacing distance between the side surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10.

[0107] Optionally, the orthographic projection of the third portion 21 of the first conductive unit 20 on the substrate 10 is located within the orthographic projection range of the filling layer 80 on the substrate 10 .

[0108] In this way, the filling layer 80 and the third portion 21 of the first conductive unit 20 can fill the entire space of the via hole, thereby preventing the film layer or device on the side of the first conductive layer away from the substrate 10 from forming a large depression at the via hole.

[0109] See also Figure 3 For example, the distance between the surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is greater than the distance between the surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 .

[0110] It can be understood that the film layer or device on the side of the first conductive layer facing away from the substrate 10 will protrude in the direction away from the substrate 10 at the via, but compared with the film layer or device on the side of the first conductive layer facing away from the substrate 10 forming a larger depression at the via, the impact on the performance is smaller.

[0111] In addition, the difference between the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 and the spacing distance between the side surface of the fourth part 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 can be controlled within a predetermined range to prevent the film layer or device on the side of the first conductive layer facing away from the substrate 10 from protruding a large size in the direction away from the substrate 10 at the via.

[0112] See also Figure 4 For example, the distance between the surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is equal to the distance between the surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 .

[0113] Please continue reading Figure 5In some embodiments, the first conductive unit 20 includes a third portion 21 and a fourth portion 22, at least part of the orthographic projection of the via on the substrate 10 is located within the orthographic projection range of the third portion 21 on the substrate 10, the orthographic projection of the fourth portion 22 on the substrate 10 does not overlap with the orthographic projection of the via on the substrate 10, and the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is smaller than the spacing distance between the side surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10.

[0114] Optionally, the orthographic projection of the filling layer 80 on the substrate 10 is located within the orthographic projection range of the third portion 21 of the first conductive unit 20 on the substrate 10 .

[0115] In this way, the filling layer 80 and the third portion 21 of the first conductive unit 20 can fill part of the space of the via hole, which can reduce the size of the recess formed at the via hole by the film layer or device on the side of the first conductive layer away from the substrate 10, thereby alleviating the impact on the performance of the display device.

[0116] In some embodiments, the display panel 100 provided in the present application further includes a pixel definition layer 30, and at least a portion of the pixel definition layer 30 is located on a side of the filling layer 80 away from the substrate 10. The via hole may be the display area AA, and in order to avoid a large depression on the side of the pixel definition layer 30 away from the substrate 10, at least a portion of the filling unit of the filling layer 80 is located in the via hole, and the filling unit fills at least a portion of the space of the via hole.

[0117] Optionally, the pixel definition layer 30 may be a single layer or multiple layers.

[0118] Exemplarily, the pixel definition layer 30 is a single layer, and the filling layer 80 is located on a side of the pixel definition layer 30 facing the substrate 10 .

[0119] Exemplarily, the pixel definition layer 30 is a multi-layer structure, and the filling layer 80 is located on a side of the pixel definition layer 30 facing the substrate 10 .

[0120] Exemplarily, the pixel definition layer 30 is a multi-layer structure, for example, the pixel definition layer 30 is a two-layer structure, and the filling layer 80 is located between the two pixel definition layers 30 in a direction away from the substrate 10 .

[0121] Optionally, the filling layer 80 is located on the side of the pixel definition layer 30 facing the substrate 10, and at least part of the orthographic projection of the via hole on the substrate 10 is located within the orthographic projection of the filling layer 80 on the substrate 10. The pixel definition layer 30 may be a single layer or multiple layers.

[0122] For example, the pixel definition layer 30 includes a first pixel definition layer 31 and a second pixel definition layer 32 sequentially arranged in a direction away from the substrate 10 , and the second pixel definition layer 32 is located on a side of the filling layer 80 away from the substrate 10 .

[0123] For example, along a direction away from the substrate 10 , the filling layer 80 is located between the first pixel definition layer 31 and the second pixel definition layer 32 .

[0124] In some embodiments, the first pixel definition layer 31 and the second pixel definition layer 32 are made of different materials. In this way, the first pixel definition layer 31 and the second pixel definition layer 32 have different etching selectivities, and in the same etching process, it is not easy to cause significant damage to the first pixel definition layer 31 and the second pixel definition layer 32 at the same time, which can improve the protection effect of the pixel definition layer 30 on the film layer facing the substrate 10.

[0125] Optionally, the material of the first pixel definition layer 31 includes one of silicon oxide and silicon nitride, and the material of the second pixel definition layer 32 includes the other of silicon oxide and silicon nitride.

[0126] Optionally, the orthographic projection of the first pixel definition layer 31 on the substrate 10 coincides with the orthographic projection of the second pixel definition layer 32 on the substrate 10 .

[0127] Optionally, the orthographic projection of the filling layer 80 on the substrate 10 is located within the orthographic projection range of the via hole on the substrate 10 .

[0128] Please also read Figure 6 and Figure 7 In some embodiments, the display panel 100 provided in the embodiment of the present application further includes an isolation structure 40, the isolation structure 40 encloses an isolation opening, and the orthographic projection of the via hole on the substrate 10 overlaps with the orthographic projection of the isolation structure 40 on the substrate 10. Among them, the composition and preparation of the isolation structure 40 are described in patents CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 099419, PCT / CN2024 / 099072, Further description is provided in CN117979755A, CN117998900A, CN117062489A, CN117580403A, CN116583155A, CN116669477A, ​​CN117396039A, CN116669480A, CN116600606A, and CN117500332A for reference.

[0129] The inventors discovered that when the orthographic projection of the via on the substrate 10 overlaps with the orthographic projection of the isolation structure 40 on the substrate 10, a large depression is easily generated in the isolation structure 40 on the side facing away from the substrate 10. In the subsequent process of preparing the display panel 100, the chemical solution is likely to cause the depression of the isolation structure 40 to rupture, causing internal damage to the isolation structure 40 and affecting the performance of the isolation structure 40, such as the overlapping effect between the isolation structure 40 and the light-emitting unit.

[0130] Optionally, the isolation structure 40 includes a base portion 41, a support portion 42 and an eave portion 43 which are stacked in sequence along a direction away from the substrate 10. A larger depression is easily generated on the side of the eave portion 43 away from the substrate 10. In the subsequent process of preparing the display panel 100, the chemical liquid may easily cause the depression of the eave portion 43 to rupture, and the chemical liquid may damage the support portion 42.

[0131] Please also read Figure 8 , Fig. 9 , Fig.10 , Fig.11 , Fig.12 , Fig.13 , Fig.14 , Fig.15 , Fig.16 , Fig.17 and Fig.18 In order to prevent the isolation structure 40 from having a large depression at the via hole, the display panel 100 provided in the embodiment of the present application uses the filling unit of the filling layer 80 to fill the via hole. In this way, the display panel 100 provided in the embodiment of the present application can prevent the depression of the isolation structure 40 from being broken in the subsequent process, avoid internal damage to the isolation structure 40, and improve the performance of the isolation structure 40, thereby improving the performance of the display panel 100 and the display device.

[0132] For example, please refer to Figure 8 , Fig. 9 , Fig.10 , Fig.12 and Fig.13 In some embodiments, the first conductive unit 20 includes a third portion 21 and a fourth portion 22, at least part of the orthographic projection of the via on the substrate 10 is located within the orthographic projection range of the third portion 21 on the substrate 10, the orthographic projection of the fourth portion 22 on the substrate 10 does not overlap with the orthographic projection of the via on the substrate 10, and the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is greater than or equal to the spacing distance between the side surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10.

[0133] Optionally, at least a portion of the fourth portion 22 is disposed around the third portion 21 .

[0134] Optionally, the orthographic projection of the third portion 21 of the first conductive unit 20 on the substrate 10 is located within the orthographic projection range of the filling layer 80 on the substrate 10 .

[0135] In this way, the filling layer 80 and the third portion 21 of the first conductive unit 20 can fill the entire space of the via hole, thereby preventing the film layer or device on the side of the first conductive layer away from the substrate 10 from forming a large depression at the via hole.

[0136] Please also read Figure 8 and Fig.12 For example, the distance between the surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is greater than the distance between the surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 .

[0137] It can be understood that the film layer or device on the side of the first conductive layer facing away from the substrate 10 will protrude in the direction away from the substrate 10 at the via, but compared with the film layer or device on the side of the first conductive layer facing away from the substrate 10 forming a larger depression at the via, the impact on the performance is smaller.

[0138] In addition, the difference between the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 and the spacing distance between the side surface of the fourth part 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 can be controlled within a predetermined range to prevent the film layer or device on the side of the first conductive layer facing away from the substrate 10 from protruding a large size in the direction away from the substrate 10 at the via.

[0139] Please also read Fig.10 and Fig.13 For example, the distance between the surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is equal to the distance between the surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10 .

[0140] Please also read Fig.11 and Fig.14 In some embodiments, the first conductive unit 20 includes a third portion 21 and a fourth portion 22, at least part of the orthographic projection of the via on the substrate 10 is located within the orthographic projection range of the third portion 21 on the substrate 10, the orthographic projection of the fourth portion 22 on the substrate 10 does not overlap with the orthographic projection of the via on the substrate 10, and the spacing distance between the side surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is smaller than the spacing distance between the side surface of the fourth portion 22 of the first conductive unit 20 facing away from the substrate 10 and the substrate 10.

[0141] Optionally, the orthographic projection of the filling layer 80 on the substrate 10 is located within the orthographic projection range of the third portion 21 of the first conductive unit 20 on the substrate 10 .

[0142] In this way, the filling layer 80 and the third portion 21 of the first conductive unit 20 can fill part of the space of the via hole, which can reduce the size of the recess formed at the via hole by the film layer or device on the side of the first conductive layer away from the substrate 10, thereby alleviating the impact on the performance of the display device.

[0143] Please also read Fig.15 , Fig.16 , Fig.17 and Fig.18 In some embodiments, the pixel definition layer 30 includes a first pixel definition layer 31 and a second pixel definition layer 32, and the filling layer 80 is located between the first pixel definition layer 31 and the second pixel definition layer 32 in a direction away from the substrate 10. The first pixel definition layer 31 includes a first portion 311 and a second portion 312 connected, at least part of the orthographic projection of the via hole on the substrate 10 is located within the orthographic projection range of the first portion 311 of the first pixel definition layer 31, the orthographic projection of the second portion 312 of the first pixel definition layer 31 on the substrate 10 does not overlap with the orthographic projection of the via hole on the substrate 10, and the filling layer 80 is located on the side of the first portion 311 of the first pixel definition layer 31 away from the substrate 10.

[0144] Optionally, at least a portion of the second portion 312 is disposed around the first portion 311 .

[0145] It can be understood that the filling layer 80 can fill the via hole together with the first conductive layer.

[0146] See also Fig.15 Optionally, a distance between a surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is greater than a distance between a surface of the second portion 312 of the first pixel definition layer 31 facing away from the substrate 10 and the substrate 10 .

[0147] See also Fig.17 Optionally, the distance between the surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is equal to the distance between the surface of the second portion 312 of the first pixel definition layer 31 facing away from the substrate 10 and the substrate 10;

[0148] See also Fig.18 Optionally, a distance between a surface of the filling layer 80 facing away from the substrate 10 and the substrate 10 is smaller than a distance between a surface of the second portion 312 of the first pixel definition layer 31 facing away from the substrate 10 and the substrate 10 .

[0149] In some embodiments, the first conductive unit 20 includes a first electrode, the pixel definition layer 30 has a pixel opening, and the pixel opening exposes a portion of the first electrode. Optionally, the isolation structure 40 is located on a side of the pixel definition layer 30 away from the substrate 10, and the orthographic projection of the pixel opening on the substrate 10 is located within the orthographic projection range of the isolation opening on the substrate 10.

[0150] Please also read Fig.19 , Fig. 20 and Fig.21 It can be understood that the display panel 100 provided in the embodiment of the present application further includes a light-emitting unit, and the orthographic projection of the pixel opening on the substrate 10 is located within the orthographic projection range of the light-emitting unit on the substrate 10. The light-emitting unit includes a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit, and the isolation openings formed by the isolation structure 40 include a first isolation opening 401, a second isolation opening 402, and a third isolation opening 403. The orthographic projection of the first light-emitting unit on the substrate 10 overlaps with the orthographic projection of the first isolation opening 401 on the substrate 10, the orthographic projection of the second light-emitting unit on the substrate 10 overlaps with the orthographic projection of the second isolation opening 402 on the substrate 10, and the orthographic projection of the third light-emitting unit on the substrate 10 overlaps with the orthographic projection of the third isolation opening 403 on the substrate 10.

[0151] The light-emitting unit includes a light-emitting layer 50 and a second electrode 60 sequentially arranged in a direction away from the substrate 10, and the light-emitting layer 50 can be connected to the first electrode through a pixel opening. It can be understood that the light-emitting layer 50 of the first light-emitting unit is a first light-emitting layer 51, the light-emitting layer 50 of the second light-emitting unit is a second light-emitting layer 52, and the light-emitting layer 50 of the third light-emitting unit is a third light-emitting layer 53.

[0152] See also Fig. 22 The display panel 100 provided in the embodiment of the present application further includes a first encapsulation layer 71, which is located on the side of the light-emitting unit away from the substrate 10, and the orthographic projection of the light-emitting unit on the substrate 10 is located within the orthographic projection range of the first encapsulation layer 71 on the substrate 10, and the material of the filling layer 80 is the same as that of the first encapsulation layer 71. In this way, the filling layer 80 can be prepared using the material of the first encapsulation layer 71.

[0153] Optionally, the material of the first encapsulation layer 71 includes an inorganic material.

[0154] Optionally, the material of the first encapsulation layer 71 includes one of silicon oxide and silicon nitride.

[0155] Optionally, the first encapsulation layer 71 includes a first encapsulation part, a second encapsulation part and a third encapsulation part, the orthographic projection of the first light-emitting unit on the substrate 10 is located inside the orthographic projection range of the first encapsulation part on the substrate 10, the orthographic projection of the second light-emitting unit on the substrate 10 is located inside the orthographic projection range of the second encapsulation part on the substrate 10, and the orthographic projection of the second light-emitting unit on the substrate 10 is located within the orthographic projection range of the second encapsulation part on the substrate 10.

[0156] Optionally, see Fig. 22In some embodiments, the display panel 100 provided in the embodiment of the present application may further include a second encapsulation layer 72 and a third encapsulation layer 73, the second encapsulation layer 72 is located on the side of the first encapsulation layer 71 away from the substrate 10, and the third encapsulation layer 73 is located on the side of the second encapsulation layer 72 away from the substrate 10.

[0157] Optionally, the first encapsulation layer 71 may be an inorganic encapsulation layer formed by chemical vapor deposition (CVD) and patterning.

[0158] Optionally, the second encapsulation layer 72 may be made by ink jet printing (IJP).

[0159] Optionally, the third encapsulation layer 73 may be an inorganic encapsulation layer formed by chemical vapor deposition (CVD).

[0160] Optionally, the display panel 100 provided in the present application may further include other film layers, and the other film layers are located on the side of the third encapsulation layer 73 away from the substrate 10. The other film layers may include polarizing films, optically clear adhesives (OCA), and the like.

[0161] Please also read Figure 8 , Fig.10 , Fig.11 , Fig.12 , Fig.13 , Fig.14 , Fig. 22 and Fig.23 The present application also provides a method for preparing a display panel 100, the method comprising:

[0162] S1 , providing a substrate 10 , the substrate 10 comprising a connection layer 12 and a planar layer 11 covering the connection layer 12 , the planar layer 11 being provided with a via hole, and the via hole exposing at least a portion of the connection layer 12 .

[0163] S2 , preparing a first conductive layer on one side of the substrate 10 , the first conductive layer comprising a plurality of first conductive units 20 arranged at intervals, at least some of the first conductive units 20 being located in the via holes and connected to the connection layer 12 .

[0164] S3, preparing a filling layer 80 on a side of the first conductive layer facing away from the substrate 10, wherein at least a portion of the filling layer 80 is located in the via hole and fills at least a portion of the via hole.

[0165] S4, preparing a pixel definition layer 30 on the side of the filling layer 80 facing away from the substrate 10. Optionally, the pixel definition layer 30 is a single layer. Optionally, the pixel definition layer 30 includes a first pixel definition layer 31 and a second pixel definition layer 32 formed in sequence.

[0166] S5 , preparing an isolation structure 40 on the side of the pixel definition layer 30 facing away from the substrate 10 , and the isolation structure 40 surrounds and forms an isolation opening.

[0167] S6, preparing a pixel opening in the pixel definition layer 30, wherein the pixel opening exposes a portion of the first electrode.

[0168] S7, preparing a light-emitting unit and a first encapsulation layer 71.

[0169] S8 , preparing a second encapsulation layer 72 on a side of the first encapsulation layer 71 facing away from the substrate 10 .

[0170] S9 , forming a third encapsulation layer 73 on a side of the second encapsulation layer 72 facing away from the substrate 10 .

[0171] It is understandable that the method for preparing the display panel 100 provided in the embodiment of the present application can prepare the following Figure 8 , Fig.10 , Fig.11 , Fig.12 , Fig.13 and Fig.14 Any display panel 100 shown in .

[0172] Please also read Fig.15 , Fig.17 , Fig.18 , Fig. 22 and Fig.24 The embodiment of the present application also provides another method for preparing the display panel 100, the method comprising:

[0173] S1 , providing a substrate 10 , the substrate 10 comprising a connection layer 12 and a planar layer 11 covering the connection layer 12 , the planar layer 11 being provided with a via hole, and the via hole exposing at least a portion of the connection layer 12 .

[0174] S2 , preparing a first conductive layer on one side of the substrate 10 , the first conductive layer comprising a plurality of first conductive units 20 arranged at intervals, at least part of the first conductive units 20 being located in the via holes and connected to the connection layer 12 .

[0175] S3 , preparing a first pixel definition layer 31 on a side of the first conductive layer facing away from the substrate 10 .

[0176] S4, preparing a filling layer 80 on the side of the first pixel definition layer 31 facing away from the substrate 10, at least a portion of the filling layer 80 is located in the via hole and fills at least a portion of the via hole.

[0177] S5 , preparing a second pixel definition layer 32 on the side of the filling layer 80 facing away from the substrate 10 .

[0178] S6, preparing an isolation structure 40 on the side of the second pixel definition layer 32 facing away from the substrate 10, and the isolation structure 40 surrounds and forms an isolation opening.

[0179] S7, preparing a pixel opening in the pixel definition layer 30, wherein the pixel opening exposes a portion of the first electrode.

[0180] S8, preparing a light-emitting unit and a first encapsulation layer 71.

[0181] S9 , preparing a second encapsulation layer 72 on a side of the first encapsulation layer 71 facing away from the substrate 10 .

[0182] S10 , preparing a third encapsulation layer 73 on a side of the second encapsulation layer 72 facing away from the substrate 10 .

[0183] It is understandable that the method for preparing the display panel 100 provided in the embodiment of the present application can prepare the following Fig.15 , Fig.17 and Fig.18 Any display panel 100 shown in .

[0184] Please also read Fig.19 , Fig. 20 , Fig.21 and Fig.25 In some embodiments, the steps of preparing the light-emitting unit and the first encapsulation layer 71 include:

[0185] S71, preparing a first light-emitting unit and a first packaging part, wherein the orthographic projection of the first light-emitting unit on the substrate 10 overlaps with the orthographic projection of the first isolation opening 401 on the substrate 10, and the orthographic projection of the first light-emitting unit on the substrate 10 is located within the orthographic projection range of the first packaging part on the substrate 10;

[0186] S71, preparing a second light-emitting unit and a second packaging part, wherein the orthographic projection of the second light-emitting unit on the substrate 10 overlaps with the orthographic projection of the second isolation opening 402 on the substrate 10, and the orthographic projection of the second light-emitting unit on the substrate 10 is located within the orthographic projection range of the second packaging part on the substrate 10;

[0187] S73, prepare a third light-emitting unit and a third packaging part, the orthographic projection of the third light-emitting unit on the substrate 10 overlaps with the orthographic projection of the third isolation opening 403 on the substrate 10, and the orthographic projection of the third light-emitting unit on the substrate 10 is located within the orthographic projection range of the third packaging part on the substrate 10.

[0188] An embodiment of the present application also provides a display device, which can be a mobile phone, a television, a tablet computer, a laptop computer, a desktop computer, a vehicle-mounted display terminal, a wearable device, an advertising display device, or other products.

[0189] Optionally, the display device provided in the embodiment of the present application includes the display panel 100 of any of the above embodiments. The display device provided in the embodiment of the present application has the same or similar technical effects as the display panel 100 of any of the above embodiments, which will not be described in detail here.

[0190] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises: A substrate, wherein a connection layer and a flat layer covering the connection layer are provided on one side of the substrate, the flat layer is provided with a via hole, and the via hole exposes at least a portion of the connection layer; A first conductive layer is disposed on a surface of the flat layer away from the substrate, the first conductive layer comprising a plurality of first conductive units disposed at intervals, at least some of the first conductive units are located in the via holes and connected to the connection layer; The filling layer is arranged on a side of the first conductive layer away from the substrate, the filling layer comprises a plurality of filling units, and at least a portion of the filling units are located in the via holes.

2. The display panel according to claim 1, wherein: The display panel further includes a pixel definition layer, at least a portion of which is located on a side of the filling layer away from the substrate.

3. The display panel according to claim 2, wherein: The pixel definition layer comprises a first pixel definition layer and a second pixel definition layer which are sequentially arranged in a direction away from the substrate; The second pixel definition layer is located on a side of the filling layer away from the substrate, or, along a direction away from the substrate, the filling layer is located between the first pixel definition layer and the second pixel definition layer.

4. The display panel according to claim 2, wherein: The first conductive unit includes a first electrode, the pixel definition layer has a pixel opening, and the pixel opening exposes a portion of the first electrode.

5. The display panel according to claim 1, wherein: The display panel further includes an isolation structure, the isolation structure encloses an isolation opening, and an orthographic projection of the via hole on the substrate overlaps with an orthographic projection of the isolation structure on the substrate; Preferably, the display panel also includes a pixel definition layer, the isolation structure is located on a side of the pixel definition layer facing away from the substrate, the first conductive unit includes a first electrode, the pixel definition layer has a pixel opening, the pixel opening exposes a portion of the first electrode, and the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the isolation opening on the substrate.

6. The display panel according to claim 3, wherein: The first pixel definition layer and the second pixel definition layer are made of different materials; And / or, the material of the first pixel definition layer includes one of silicon oxide and silicon nitride, and the material of the second pixel definition layer includes the other of silicon oxide and silicon nitride; and / or, the orthographic projection of the first pixel definition layer on the substrate coincides with the orthographic projection of the second pixel definition layer on the substrate; And / or, the orthographic projection of the filling layer on the substrate is located within the orthographic projection range of the via hole on the substrate.

7. The display panel according to claim 3, wherein: The filling layer is located between the first pixel definition layer and the second pixel definition layer in a direction away from the substrate, the first pixel definition layer includes a first portion and a second portion that are connected, at least a portion of an orthographic projection of the via hole on the substrate is located within the orthographic projection range of the first portion of the first pixel definition layer on the substrate, the orthographic projection of the second portion of the first pixel definition layer on the substrate does not overlap with the orthographic projection of the via hole on the substrate, and the filling layer is located on a side of the first portion of the first pixel definition layer away from the substrate; Wherein, a distance between a surface of the filling layer facing away from the substrate and the substrate is greater than or equal to a distance between a surface of the second portion of the first pixel definition layer facing away from the substrate and the substrate; Alternatively, a distance between a surface of the filling layer facing away from the substrate and the substrate is smaller than a distance between a surface of the second portion of the first pixel definition layer facing away from the substrate and the substrate.

8. The display panel according to claim 2, wherein: The filling layer is located on a side of the pixel definition layer facing the substrate, and at least a portion of the orthographic projection of the via hole on the substrate is located within the orthographic projection range of the filling layer on the substrate.

9. The display panel according to claim 8, wherein: The first conductive unit includes a third part and a fourth part, at least part of the orthographic projection of the via hole on the substrate is located within the orthographic projection range of the third part on the substrate, the orthographic projection of the fourth part on the substrate does not overlap with the orthographic projection of the via hole on the substrate, and the spacing distance between the side surface of the filling layer facing away from the substrate and the substrate is greater than or equal to the spacing distance between the side surface of the fourth part of the first conductive layer facing away from the substrate and the substrate; Preferably, the orthographic projection of the third portion of the first conductive layer on the substrate is located within the orthographic projection range of the filling layer on the substrate.

10. The display panel according to claim 8, wherein: The first conductive unit includes a third portion and a fourth portion, at least a portion of an orthographic projection of the via hole on the substrate is located within the orthographic projection range of the third portion on the substrate, the orthographic projection of the fourth portion on the substrate does not overlap with the orthographic projection of the via hole on the substrate, and a spacing distance between a side surface of the filling layer facing away from the substrate and the substrate is smaller than a spacing distance between a side surface of the fourth portion of the first conductive layer facing away from the substrate and the substrate; Preferably, the orthographic projection of the filling layer on the substrate is located within the orthographic projection range of the third portion of the first conductive layer on the substrate.

11. The display panel according to any one of claims 1 to 10, characterized in that: In a direction parallel to the substrate, a size of the via hole gradually increases in a direction away from the substrate.

12. The display panel according to any one of claims 1 to 10, characterized in that: The material of the filling layer is the same as that of the flat layer; Preferably, the material of the planar layer comprises an organic material; Preferably, the material of the planar layer includes polyimide.

13. The display panel according to claim 4, characterized in that The display panel further includes: A light-emitting unit, wherein the orthographic projection of the pixel opening on the substrate is located within the orthographic projection range of the light-emitting unit on the substrate; A first encapsulation layer, wherein the first encapsulation layer is located on a side of the light-emitting unit away from the substrate, and an orthographic projection of the light-emitting unit on the substrate is located within a range of an orthographic projection of the first encapsulation layer on the substrate; The material of the filling layer is the same as that of the first encapsulation layer; Preferably, the material of the first encapsulation layer comprises an inorganic material; Preferably, the material of the first encapsulation layer includes one of silicon oxide and silicon nitride.

14. A method for preparing a display panel, characterized in that: The preparation method comprises: Providing a substrate, disposing a connection layer and a flat layer covering the connection layer on one side of the substrate, wherein the flat layer is provided with a via hole, and the via hole exposes at least a portion of the connection layer; A first conductive layer is prepared on one side of the substrate, wherein the first conductive layer includes a plurality of first conductive units arranged at intervals, and at least part of the first conductive units are located in the via holes and connected to the connection layer; A filling layer is prepared on a side of the first conductive layer facing away from the substrate, and at least a portion of the filling layer is located in the via hole and fills at least a portion of the via hole.

15. The preparation method according to claim 14, characterized in that: The preparation method further comprises: A pixel definition layer is prepared, wherein at least a portion of the pixel definition layer is located on a side of the filling layer away from the substrate.

16. The preparation method according to claim 15, characterized in that: The preparation of the pixel definition layer comprises: Prepare the pixel definition layer on the side of the filling layer away from the substrate; Preferably, the pixel definition layer comprises a first pixel definition layer and a second pixel definition layer which are sequentially arranged in a direction away from the substrate.

17. The preparation method according to claim 15, characterized in that: The pixel definition layer includes a first pixel definition layer and a second pixel definition layer, and preparing the pixel definition layer includes: preparing the first pixel definition layer on a side of the first conductive layer facing away from the substrate; preparing the second pixel definition layer on a side of the filling layer away from the substrate; The step of preparing a filling layer on a side of the first conductive layer facing away from the substrate comprises: The filling layer is prepared on a side of the first pixel definition layer facing away from the substrate.

18. The preparation method according to claim 15, characterized in that: The first conductive unit includes a first electrode. After the pixel definition layer is prepared, the preparation method further includes: An isolation structure is prepared on a side of the pixel definition layer away from the substrate, wherein the isolation structure encloses and forms an isolation opening; Prepare a pixel opening in the pixel definition layer, wherein the pixel opening exposes a portion of the first electrode; preparing a light-emitting unit and a first encapsulation layer; Preferably, the preparation method further comprises: preparing a second encapsulation layer on a side of the first encapsulation layer facing away from the substrate; Preferably, the preparation method further comprises: preparing a third encapsulation layer on a side of the second encapsulation layer facing away from the substrate.

19. The preparation method according to claim 18, characterized in that: The isolation opening includes a first isolation opening, a second isolation opening, and a third isolation opening, the light-emitting unit includes a first light-emitting unit, a second light-emitting unit, and a third light-emitting unit, the first encapsulation layer includes a first encapsulation part, a second encapsulation part, and a third encapsulation part, and the preparation of the light-emitting unit and the first encapsulation layer includes: Prepare the first light-emitting unit and the first packaging portion, wherein the orthographic projection of the first light-emitting unit on the substrate overlaps with the orthographic projection of the first isolation opening on the substrate, and the orthographic projection of the first light-emitting unit on the substrate is located within the orthographic projection range of the first packaging portion on the substrate; Prepare the second light-emitting unit and the second packaging portion, wherein the orthographic projection of the second light-emitting unit on the substrate overlaps with the orthographic projection of the second isolation opening on the substrate, and the orthographic projection of the second light-emitting unit on the substrate is located within the orthographic projection range of the second packaging portion on the substrate; The third light-emitting unit and the third packaging part are prepared, wherein the orthographic projection of the third light-emitting unit on the substrate overlaps with the orthographic projection of the third isolation opening on the substrate, and the orthographic projection of the third light-emitting unit on the substrate is located within the orthographic projection range of the third packaging part on the substrate.

20. A display device, characterized in that: A display panel comprising any one of claims 1 to 13.

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