Display panel, preparation method thereof and display device

Abstract

The invention discloses a display panel, a preparation method thereof and a display device, and relates to the technical field of display. The display panel comprises a substrate, a pixel defining layer, a first pixel isolation column, a plurality of light emitting units, an electrode patterning layer and a third electrode pattern. And the third electrode pattern is in lap joint with the first edge part of the second electrode pattern exposed out of the electrode patterning layer, and is connected with the first pixel isolation column, so that the first pixel isolation column is used as a cathode auxiliary electrode of the light-emitting unit. Meanwhile, due to the fact that the second electrode pattern of the light-emitting unit is connected with the first pixel isolation column through the third electrode pattern, the second electrode pattern of the light-emitting unit can receive a cathode signal through the first pixel isolation column, and the reliability of cathode signal receiving is improved.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a method for preparing the same, and a display device. Background Art

[0002] With the rapid development of the information age, OLED (Organic Light-Emitting Diode) display technology has gradually become an indispensable part of display technology due to its advantages such as self-luminescence, wide viewing angle, light weight, low energy consumption, and bendability.

[0003] In the related art, in order to reduce the production cost of the display panel, the OLED display panel is prepared by a photolithography process. When the OLED display panel is prepared by the photolithography process, the light-emitting pattern of the light-emitting unit in the OLED display panel does not need to be formed by fine metal mask (FMM) evaporation, but is obtained by coating the entire surface with a light-emitting film and then performing a photolithography process on the light-emitting film. In addition, the cathode pattern of each light-emitting unit in the display panel is independently set, thereby realizing the independent packaging of each light-emitting unit. Summary of the invention

[0004] The present application provides a display panel and a method for manufacturing the same, and a display device. The technical solution is as follows:

[0005] In one aspect, a display panel is provided, the display panel comprising:

[0006] A base substrate, the base substrate comprising a display area;

[0007] A pixel defining layer, the pixel defining layer is located on one side of the base substrate, and the pixel defining layer includes a plurality of pixel openings located in the display area;

[0008] A first pixel isolation column, wherein the first pixel isolation column is located at a side of the pixel defining layer away from the base substrate;

[0009] a plurality of light-emitting units corresponding to the plurality of pixel openings, the light-emitting units comprising a first electrode pattern, a light-emitting pattern, and a second electrode pattern, the first electrode pattern being located on a side of the pixel defining layer close to the base substrate, the pixel opening exposing at least a portion of the first electrode pattern corresponding to the light-emitting unit, the light-emitting pattern being located within the pixel opening and connected to the first electrode pattern, and the second electrode pattern being located on a side of the light-emitting pattern away from the base substrate and connected to the light-emitting pattern;

[0010] an electrode patterned layer, the electrode patterned layer comprising a first patterned portion located in the pixel opening, an orthographic projection of the first patterned portion on the base substrate being located within an orthographic projection of the second electrode pattern on the base substrate, the second electrode pattern comprising a first edge portion, the first edge portion being an edge portion of the second electrode pattern that does not overlap with the first patterned portion;

[0011] and a third electrode pattern, wherein the third electrode pattern is electrically connected to the first edge portion of the second electrode pattern, and the third electrode pattern is electrically connected to the first pixel isolation column.

[0012] Optionally, the third electrode pattern and the electrode patterning layer do not overlap.

[0013] Optionally, the orthographic projection of the first pixel isolation column on the base substrate and the orthographic projection of the pixel opening on the base substrate do not overlap, and the first pixel isolation column comprises: a first isolation portion and a second isolation portion stacked in a direction away from the pixel defining layer, the material of the first isolation portion comprises a conductive material, and the orthographic projection of the first isolation portion on the base substrate is located inside the orthographic projection of the second isolation portion on the base substrate;

[0014] Wherein, the third electrode pattern is electrically connected to the first isolation portion.

[0015] Optionally, the second isolation portion includes a portion of the first isolation portion located on a side away from the base substrate, and a protruding portion extending beyond an edge of the first isolation portion in a plane parallel to the base substrate;

[0016] An orthographic projection of the third electrode pattern on the base substrate overlaps with an orthographic projection of the protruding portion on the base substrate, and the third electrode pattern is in contact and electrically connected with the first isolation portion.

[0017] Optionally, the orthographic projection of the second electrode pattern on the base substrate covers the orthographic projection of the light-emitting pattern on the base substrate; the orthographic projection of the third electrode pattern on the base substrate and the orthographic projection of the light-emitting pattern on the base substrate do not overlap;

[0018] The distance between the orthographic projection of the boundary of the second electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate is greater than the distance between the orthographic projection of the boundary of the first patterned portion on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate;

[0019] The distance between the orthographic projection of the boundary of the second electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate is greater than the distance between the orthographic projection of the boundary of the third electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate.

[0020] Optionally, the orthographic projection of the first pixel isolation column on the base substrate surrounds the orthographic projection of the light emitting unit on the base substrate;

[0021] The third electrode pattern is electrically connected to at least a portion of a first isolation portion surrounding the first pixel isolation column of the light emitting unit.

[0022] Optionally, the shape of the first pixel isolation column surrounding each of the light-emitting units on the base substrate is a closed figure.

[0023] Optionally, at least a portion of the first pixel isolation columns surrounding two adjacent light-emitting units are shared.

[0024] Optionally, the multiple light-emitting units include a first light-emitting unit, a second light-emitting unit and a third light-emitting unit, and the light-emitting colors of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit are different from each other; any one of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit is adjacent to at least one of the other two light-emitting units;

[0025] The orthographic projection of the first pixel isolation column on the base substrate surrounds the orthographic projection of the first light emitting unit on the base substrate, surrounds the orthographic projection of the second light emitting unit on the base substrate, and surrounds the orthographic projection of the third light emitting unit on the base substrate.

[0026] Optionally, any one of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit is arranged adjacent to the other two light-emitting units;

[0027] A portion of the first pixel isolation column surrounding the first light emitting unit and close to the second light emitting unit is shared with a portion of the first pixel isolation column surrounding the second light emitting unit and close to the first light emitting unit;

[0028] A portion of the first pixel isolation column surrounding the first light emitting unit close to the third light emitting unit and a portion of the first pixel isolation column surrounding the third light emitting unit close to the first light emitting unit are shared;

[0029] A portion of the first pixel isolation column surrounding the second light-emitting unit that is close to the third light-emitting unit and a portion of the first pixel isolation column surrounding the third light-emitting unit that is close to the second light-emitting unit are shared, or there is a gap between the first pixel isolation column surrounding the second light-emitting unit and the first pixel isolation column surrounding the third light-emitting unit, and the gap is located in the arrangement direction of the second light-emitting unit and the third light-emitting unit.

[0030] Optionally, the orthographic projections of the first pixel isolation columns surrounding any two adjacent light-emitting units on the base substrate are spaced apart.

[0031] Optionally, the protruding portion of the second isolation portion of the first pixel isolation column that exceeds the edge of the first isolation portion in a plane parallel to the base substrate includes: a first portion on a side close to the light emitting unit, and a second portion on a side away from the light emitting unit;

[0032] A width of an orthographic projection of the first portion on the base substrate is greater than a width of an orthographic projection of the second portion on the base substrate.

[0033] Optionally, the distance between the orthographic projections of the first isolation portion of the first pixel isolation column surrounding two adjacent light-emitting units on the side away from the base substrate on the base substrate is greater than the width of the orthographic projection of the first portion on the base substrate, and greater than the width of the orthographic projection of the second portion on the base substrate.

[0034] Optionally, the pixel opening includes a plurality of pixel sub-openings, and the plurality of pixel sub-openings expose at least a portion of the first electrode pattern of the same light-emitting unit; the display panel further includes: a second pixel isolation column, the orthographic projection of the second pixel isolation column on the base substrate and the orthographic projection of the pixel sub-opening on the base substrate do not overlap, and the orthographic projection of the second pixel isolation column on the base substrate is located between the orthographic projections of adjacent pixel sub-openings on the base substrate;

[0035] The second pixel isolation column comprises: a third isolation portion and a fourth isolation portion stacked in a direction away from the base substrate, wherein the orthographic projection of the third isolation portion on the base substrate is located inside the orthographic projection of the fourth isolation portion on the base substrate;

[0036] The light-emitting unit includes a plurality of light-emitting sub-patterns arranged at intervals, and a plurality of first cathode sub-patterns arranged at intervals, the light-emitting sub-patterns and the first cathode sub-patterns are both located in the corresponding pixel sub-openings, and the third electrode pattern is also electrically connected to the third isolation portion.

[0037] Optionally, the first electrode pattern of the light-emitting unit is an integrated structure, and each of the pixel sub-openings exposes a portion of the first electrode pattern; or, the first electrode pattern of the light-emitting unit includes a plurality of anode sub-patterns that are spaced apart and correspond to the plurality of pixel sub-openings, and each of the pixel sub-openings exposes at least a portion of the corresponding first electrode pattern.

[0038] Optionally, there are a plurality of second pixel isolation columns between the orthographic projections of adjacent pixel sub-openings on the substrate.

[0039] Optionally, the display panel further includes: a plurality of light-emitting circuits corresponding to the plurality of light-emitting units, the light-emitting circuits are connected to the corresponding light-emitting units and constitute light-emitting pixels; the display panel further includes: a plurality of signal lines, the signal lines are connected to the light-emitting circuits and are used to provide driving signals for the light-emitting circuits;

[0040] Wherein, at least part of the orthographic projections of at least part of the plurality of signal lines on the base substrate are located between the orthographic projections of the adjacent pixel sub-openings on the base substrate.

[0041] Optionally, the base substrate further includes a peripheral area surrounding the display area; the display panel further includes: a power supply line at least partially located in the peripheral area, a signal transfer pattern, a fourth electrode pattern and a fifth electrode pattern, the signal transfer pattern and the first electrode pattern are located in the same layer, the fourth electrode pattern and the second electrode pattern are located in the same layer, and the fifth electrode pattern and the third electrode pattern are located in the same layer;

[0042] The signal transfer pattern is connected to the power supply line, the fourth electrode pattern is connected to the signal transfer pattern, the fourth electrode pattern is also electrically connected to the first isolation portion, and the fifth electrode pattern is electrically connected to the fourth electrode pattern.

[0043] Optionally, the electrode patterned layer further includes a second patterned portion located on a side of the fourth electrode pattern away from the base substrate, the fourth electrode pattern includes a second edge portion, and the second edge portion is an edge portion of the fourth electrode pattern that does not overlap with the second patterned portion;

[0044] The fifth electrode pattern is electrically connected to the second edge portion.

[0045] Optionally, an angle between a side surface of the second patterned portion away from the display area and a surface of the second patterned portion close to the base substrate is an acute angle.

[0046] In another aspect, a method for preparing a display panel is provided, the method comprising:

[0047] Obtaining a substrate, wherein the substrate includes a display area;

[0048] Forming a first electrode pattern of a plurality of light-emitting units on one side of the base substrate;

[0049] A pixel defining layer is formed on a side of the first electrode pattern of the plurality of light-emitting units away from the base substrate, wherein the pixel defining layer includes a plurality of pixel openings located in the display area, the plurality of pixel openings correspond to the plurality of light-emitting units, and the pixel openings expose at least a portion of the first electrode pattern of the corresponding light-emitting unit;

[0050] Forming a first pixel isolation column on a side of the pixel defining layer away from the base substrate, wherein the first pixel isolation column is located on a side of the pixel defining layer away from the base substrate;

[0051] forming light-emitting patterns of a plurality of light-emitting units in the plurality of pixel openings, wherein the light-emitting patterns are connected to the first electrode pattern;

[0052] Forming a second electrode pattern of the plurality of light-emitting units on a side of the light-emitting pattern away from the base substrate, wherein the second electrode pattern is connected to the light-emitting pattern;

[0053] forming an electrode patterning layer on a side of the second electrode pattern away from the base substrate, the electrode patterning layer comprising a first patterning portion located in the pixel opening, an orthographic projection of the first patterning portion on the base substrate being located within an orthographic projection of the second electrode pattern on the base substrate, and the second electrode pattern comprising a first edge portion, the first edge portion being an edge portion of the second electrode pattern that does not overlap with the first patterning portion;

[0054] A third electrode pattern is formed, the third electrode pattern being electrically connected to the first edge portion of the second electrode pattern, and the third electrode pattern being electrically connected to the first isolation portion.

[0055] In yet another aspect, a display device is provided, the display device comprising: a power supply component and the display panel as described in the above aspect;

[0056] Wherein, the power supply component is connected to the display panel and is used to supply power to the display panel.

[0057] The beneficial effects of the technical solution provided by this application include at least:

[0058] The present application provides a display panel and a method for manufacturing the same, and a display device, wherein the display panel includes a substrate, a pixel defining layer, a first pixel isolation column, a plurality of light-emitting units, an electrode patterning layer, and a third electrode pattern. The third electrode pattern overlaps the first edge portion of the second electrode pattern exposed by the electrode patterning layer, and is connected to the first pixel isolation column, so that the first pixel isolation column serves as a cathode auxiliary electrode of the light-emitting unit. At the same time, since the second electrode pattern of the light-emitting unit is connected to the first pixel isolation column through the third electrode pattern, the second electrode pattern of the light-emitting unit can receive a cathode signal through the first pixel isolation column, thereby improving the reliability of cathode signal reception. BRIEF DESCRIPTION OF THE DRAWINGS

[0059] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0060] Figure 1 is a partial cross-sectional schematic diagram of a display panel provided in an embodiment of the present application;

[0061] Figure 2 is a top view of a substrate provided in an embodiment of the present application;

[0062] Figure 3 is a partial top view of a display panel provided in an embodiment of the present application;

[0063] Figure 4 It is a flow chart for preparing a light-emitting pattern and an encapsulation film layer of a display panel provided in an embodiment of the present application;

[0064] Figure 5 is a partial top view of another display panel provided in an embodiment of the present application;

[0065] Figure 6 is a partial cross-sectional schematic diagram of another display panel provided in an embodiment of the present application;

[0066] Figure 7 is a structural schematic diagram of another display panel provided in an embodiment of the present application;

[0067] Figure 8 is a schematic diagram of the structure of another display panel provided in an embodiment of the present application;

[0068] Fig. 9 It is a top view of a light-emitting unit, a first pixel isolation column and a second pixel isolation column provided in an embodiment of the present application;

[0069] Fig.10 is a top view of another light-emitting unit provided in an embodiment of the present application, a first pixel isolation column and a second pixel isolation column;

[0070] Fig.11 is a partial top view of a light-emitting unit and a data signal line provided in an embodiment of the present application;

[0071] Fig.12 is a partial cross-sectional schematic diagram of a peripheral area of ​​a display panel provided in an embodiment of the present application;

[0072] Fig.13 is a top view of a first mask opening, a second mask opening, and a third mask opening provided in an embodiment of the present application;

[0073] Fig.14 is a flow chart of a method for preparing a display panel provided in an embodiment of the present application;

[0074] Fig.15 It is a structural schematic diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0075] In order to make the objectives, technical solutions and advantages of the present application clearer, the implementation methods of the present application will be further described in detail below with reference to the accompanying drawings.

[0076] In the display panel in the related art, each light-emitting unit is packaged independently, so the reliability of the cathode pattern of each light-emitting unit in receiving the cathode signal is poor.

[0077] Figure 1 is a partial cross-sectional schematic diagram of a display panel provided in an embodiment of the present application. Figure 1 The display panel 100 includes: a base substrate 101 , a pixel defining layer 102 , a first pixel isolation column 103 , a plurality of light emitting units 104 , a cathode patterned material (CPM) 105 and a third electrode pattern 106 .

[0078] refer to Figure 2 The base substrate 101 includes a display area 101a. The base substrate 101 can carry a plurality of light emitting units 104. The material of the base substrate 101 can be plastic or glass.

[0079] The pixel defining layer 102 is located on one side of the base substrate 101, and the pixel defining layer 102 includes a plurality of pixel openings 102a located in the display area 101a. The pixel defining layer 102 is used to divide the positions of the plurality of light emitting units 104 on the base substrate 101. The plurality of pixel openings 102a can be evenly distributed on the pixel defining layer 102, and the shape of the pixel openings 102a can be circular, rectangular, hexagonal, and rhombus, etc. The embodiment of the present application does not limit the shape of the pixel openings 102a.

[0080] The first pixel isolation column 103 is located on the side of the pixel defining layer 102 away from the base substrate 101. To prevent the first pixel isolation column 103 from affecting the light emitting unit 104, the orthographic projection of the first pixel isolation column 103 on the base substrate 101 and the orthographic projection of the pixel opening 102a on the base substrate 101 may not overlap.

[0081] Optional, reference Figure 1 The first pixel isolation column 103 includes: a first isolation portion 1031 and a second isolation portion 1032 stacked in a direction away from the pixel defining layer 102. The material of the first isolation portion 1031 includes a conductive material, and the orthographic projection of the first isolation portion 1031 on the base substrate 101 is located inside the orthographic projection of the second isolation portion 1032 on the base substrate 101. The material of the second isolation portion 1032 may also include a conductive material or may not include a conductive material, which is not limited in the embodiment of the present application.

[0082] The function of the first pixel isolation column 103 is to break the light-emitting functional layer and the first cathode layer at the boundary of the first pixel isolation column 103 when forming the light-emitting functional layer (used to obtain the light-emitting pattern 1042) and the first cathode layer (used to obtain the second electrode pattern 1043) of the multiple light-emitting units 104, thereby obtaining multiple independent light-emitting patterns 1042 and multiple independent second electrode patterns 1043.

[0083] refer to Figure 1 Although the light-emitting functional layer and the first cathode layer are broken at the boundary of the first pixel isolation column 103, since both layers are evaporated as a whole layer, the surface of the first pixel isolation column 103 away from the base substrate 101 may also have the material of the light-emitting functional layer and the material of the cathode layer. Of course, the material of the light-emitting functional layer and the material of the cathode layer on the surface of the first pixel isolation column 103 away from the base substrate 101 may also be removed by photolithography, which is not limited in the present embodiment. For example Figure 1 The surface of the first pixel isolation column 103 away from the base substrate 101 may be provided with only the material of the light emitting functional layer, but not the material of the cathode layer.

[0084] The plurality of light-emitting units 104 correspond to the plurality of pixel openings 102a, and the light-emitting units 104 include a first electrode pattern 1041, a light-emitting pattern 1042, and a second electrode pattern 1043. The first electrode pattern 1041 is located on a side of the pixel defining layer 102 close to the base substrate 101, and the pixel opening 102a exposes at least a portion of the first electrode pattern 1041 corresponding to the light-emitting unit 104. The light-emitting pattern 1042 is located in the pixel opening 102a and is connected to the first electrode pattern 1041. The second electrode pattern 1043 is located on a side of the light-emitting pattern 1042 away from the base substrate 101 and is connected to the light-emitting pattern 1042. The light-emitting patterns 1042 of the plurality of light-emitting units 104 are independently arranged, and the second electrode patterns 1043 of the plurality of light-emitting units 104 are independently arranged. The material of the second electrode pattern 1043 may be a metal or a metal alloy. For example, the material of the second electrode pattern 1043 includes at least one of magnesium (Mg) and silver (Ag). In consideration of the resistance and the transmittance in the wavelength range of 300 nm to 1100 nm, the thickness of the second electrode pattern 1043 can be less than or equal to 20 nm. The second electrode pattern 1043 can function as a microcavity of the light emitting unit 104 .

[0085] The electrode patterned layer 105 includes a first patterned portion 1051 located within the pixel opening 102a. The orthographic projection of the first patterned portion 1051 on the base substrate 101 is located within the orthographic projection of the second electrode pattern 1043 on the base substrate 101. The second electrode pattern 1043 includes a first edge portion 10431, which is an edge portion of the second electrode pattern 1043 that does not overlap with the first patterned portion 1051. Further, referring to Figure 1 The electrode patterned layer 105 further includes a third patterned portion 1053 located on a side of the first pixel isolation column 103 away from the base substrate 101 .

[0086] The third electrode pattern 106 is electrically connected to the first edge portion 10431 , and the third electrode pattern 106 is electrically connected to the first pixel isolation column 103 . For example, the third electrode pattern 106 is electrically connected to the first isolation portion 1031 of the first pixel isolation column 103 .

[0087] Optionally, the light-emitting unit 104 may have a light-emitting region 104a, and the light-emitting region 104a of the light-emitting unit 104 may be a region where the light-emitting pattern 1042 of the light-emitting unit 104, the first electrode pattern 1041, and the second electrode pattern 1043 are all in contact and can emit light. The region between adjacent light-emitting units 104 may be a non-light-emitting region 104a. The third electrode pattern 106 must be included in the non-light-emitting region 104a. Due to the size of the light-emitting unit 104 and the technical difficulty of the photolithography process itself, the third electrode pattern 106 is located on at least one side of the light-emitting region 104a of the light-emitting unit 104 to overlap at least one side of the first pixel isolation column 103.

[0088] In the embodiment of the present application, the third electrode pattern 106 overlaps the first edge portion 10431 of the second electrode pattern 1043, and is connected to the first isolation portion 1031 of the first pixel isolation column 103, and the first pixel isolation column 103 can be used as a cathode auxiliary electrode of the light-emitting unit 104. In addition, by providing the third electrode pattern 106, it can be ensured that the first isolation portion 1031 can be connected to the second electrode pattern 1043, so that the first isolation portion 1031 plays the role of a cathode auxiliary electrode. At the same time, since the second electrode pattern 1043 of the light-emitting unit 104 is connected to the first isolation portion 1031 through the third electrode pattern 106, the second electrode pattern 1043 can receive signals through the first isolation portion 1031, thereby improving the reliability of signal reception.

[0089] According to the resistance formula, the resistance R satisfies: R=ρ*L / S. Among them, ρ is the resistivity, L is the length of the resistor, and S is the area of ​​the resistor through which the current flows. By setting the third electrode pattern 106, the third electrode pattern 106 can be overlapped with the second electrode pattern 1043 of the light-emitting unit 104 in the non-light-emitting area 104a, so that the first isolation portion 1031 of the first pixel isolation column 103 realizes the function of the cathode auxiliary electrode, which is equivalent to increasing the area of ​​the cathode. According to the above formula, it can be determined that when the resistivity and the length of the resistor are fixed values, the area S increases, and the resistance R decreases. That is, by designing the third electrode pattern 106 so that the first pixel isolation column 103 is used as a cathode auxiliary electrode, the resistance of the cathode can be effectively reduced.

[0090] In the embodiment of the present application, the material of the electrode patterning layer 105 can be a material that can pattern the cathode material within a wavelength range of 300nm (nanometer) to 1100nm. The reason why the electrode patterning layer 105 needs to be designed is that it is necessary to obtain a plurality of patterned second electrode patterns 1043 based on the mutual repulsion between the cathode material and the electrode patterning layer. If a fine metal mask (FMM) is used to prepare a plurality of patterned second electrode patterns 1043, the material of the second electrode pattern 1043 (such as an alloy material such as silver) is at a relatively high temperature, which easily causes the FMM to deform, which is not conducive to mass production.

[0091] Optionally, the material of the electrode patterned layer 105 may be a high-fluorine compound, which has poor compatibility with the cathode material. The electrode patterned layer 105 exposes the first edge portion 10431 of the second electrode pattern 1043, so that when the second cathode layer is formed after the electrode patterned layer 105, the second cathode layer can be formed above the first edge portion 10431 of the second electrode pattern 1043 (i.e., the third electrode pattern 106 is obtained), and the third electrode pattern 106 formed after the electrode patterned layer 105 can overlap with the first edge portion 10431 of the second electrode pattern 1043.

[0092] When preparing the display panel 100, it is necessary to first prepare a first electrode pattern 1041 of a plurality of light-emitting units 104 on the base substrate 101, and then form a pixel defining layer 102 on the side of the first electrode pattern 1041 of the plurality of light-emitting units 104 away from the base substrate 101, and a plurality of pixel openings 102a of the pixel defining layer 102 correspondingly expose the first electrode pattern 1041 of the plurality of light-emitting units 104. Then, a first pixel isolation column 103 is formed on the side of the pixel defining layer 102 away from the base substrate 101, and a light-emitting pattern 1042 of the plurality of light-emitting units 104 and a second electrode pattern 1043 of the plurality of light-emitting units 104 are obtained based on the isolation effect of the first pixel isolation column 103. Then, an electrode patterning layer 105 can be formed by evaporation, and a first patterned portion 1051 of the electrode patterning layer 105 located in the pixel opening 102a exposes a first edge portion 10431 of the second electrode pattern 1043.

[0093] After the electrode patterning layer 105 is formed, the cathode material of the second cathode layer can be evaporated on the side of the electrode patterning layer 105 away from the pixel defining layer 102. Since the compatibility between the cathode material and the material of the electrode patterning layer 105 is very poor, it is difficult for the cathode material to adhere to the material of the electrode patterning layer 105. Therefore, the cathode material can be adhered to the first edge portion 10431 of the first patterned portion 1051 where the second electrode pattern 1043 is exposed, and the cathode material can also be adhered to the first isolation portion 1031 of the first pixel isolation column 103 by controlling the evaporation angle, so that the formed third electrode pattern 106 connects the first isolation portion 1031 and the second electrode pattern 1043.

[0094] In this way, the third electrode pattern 106 can be used to connect the first isolation portion 1031 and the second electrode pattern 1043, so that the first pixel isolation column 103 plays the role of a cathode auxiliary electrode. At the same time, most of the area on the side of the second electrode pattern 1043 away from the base substrate 101 is provided with the electrode patterned layer 105. Since the transmittance of the electrode patterned layer 105 is higher than the transmittance of the cathode material, this structure can also avoid the third electrode pattern 106 being arranged above the second electrode pattern 1043 to affect the transmittance of the display panel.

[0095] Since it is difficult for cathode material to adhere to the electrode patterned layer 105, the electrode patterned layer 105 may have no cathode material adhered to it at all, or may have only a small amount of cathode material adhered to it. In either case, since the transmittance of the electrode patterned layer 105 is very high and there is very little or even no cathode material on the electrode patterned layer 105, this structure avoids affecting the transmittance of the display panel 100 due to the setting of the cathode auxiliary electrode.

[0096] In summary, an embodiment of the present application provides a display panel, which includes a substrate, a pixel defining layer, a first pixel isolation column, a plurality of light-emitting units, an electrode patterning layer, and a third electrode pattern. The third electrode pattern overlaps the first edge portion of the second electrode pattern exposed by the electrode patterning layer, and is connected to the first pixel isolation column, so that the first pixel isolation column serves as a cathode auxiliary electrode of the light-emitting unit. At the same time, since the second electrode pattern of the light-emitting unit is connected to the first pixel isolation column through the third electrode pattern, the second electrode pattern of the light-emitting unit can receive a cathode signal through the first pixel isolation column, thereby improving the reliability of cathode signal reception.

[0097] In the embodiment of the present application, since the material of the electrode patterning layer 105 and the cathode material of the third electrode pattern 106 have poor compatibility, when preparing the third electrode pattern 106, the cathode material of the third electrode pattern 106 is difficult to adhere to the top of the electrode patterning layer 105. That is, the third electrode pattern 106 and the electrode patterning layer 105 do not overlap.

[0098] The non-overlapping of the third electrode pattern 106 and the electrode patterned layer 105 may mean that the third electrode pattern 106 and the electrode patterned layer 105 will not overlap due to direct contact, but in the absence of contact, the orthographic projections of the two may overlap.

[0099] refer to Figure 1 , the second isolation portion 1032 includes a portion 10321 located on one side of the first isolation portion 1031, and a protruding portion 10322 that exceeds the edge of the first isolation portion 1031 in a plane parallel to the base substrate 101. That is, the first pixel isolation column 103 can be an inscribed structure. This can facilitate the breakage of the light-emitting functional layer and the first cathode layer at the edge of the second isolation portion 1032 in the first pixel isolation column 103, so as to ensure the formation of multiple independent light-emitting patterns 1042 and multiple independent second electrode patterns 1043.

[0100] Optionally, in order to make the third electrode pattern 106 and the first isolation portion 1031 of the first pixel isolation column 103 contact and be electrically connected, the orthographic projection of the third electrode pattern 106 on the base substrate 101 and the orthographic projection of the protrusion 10322 of the second isolation portion 1032 that exceeds the first isolation portion 1031 on the base substrate 101 may overlap. Figure 1 In the embodiment, the third electrode pattern 106 is in electrical contact with the sidewall of the first isolation portion 1031 .

[0101] refer to Figure 1 The sidewall of the first isolation portion 1031 may be an arc-shaped sidewall, and the third electrode pattern 106 may contact the arc-shaped sidewall of the first isolation portion 1031. Of course, the sidewall of the first isolation portion 1031 may also be in other shapes, which is not limited in the embodiment of the present application.

[0102] Optional, reference Figure 1 , the dimension a1 of the side of the first isolation portion 1031 close to the base substrate 101 is greater than the dimension a2 of the side of the first isolation portion 1031 far from the base substrate 101. Among the two sides of the first isolation portion 1031 close to and far from the base substrate 101, at least the orthographic projection of the side far from the base substrate 101 on the base substrate 101 is located inside the orthographic projection of the second isolation portion 1032 on the base substrate 101.

[0103] In the embodiment of the present application, since the second electrode pattern 1043 acts as a microcavity of the light-emitting unit 104, the orthographic projection of the second electrode pattern 1043 on the base substrate 101 covers the orthographic projection of the light-emitting pattern 1042 on the base substrate 101. In addition, since the function of the third electrode pattern 106 is to realize the electrical connection between the second electrode pattern 1043 and the first isolation portion 1031, in order to avoid the third electrode pattern 106 from affecting the light-emitting region 104a, the orthographic projection of the third electrode pattern 106 on the base substrate 101 and the orthographic projection of the light-emitting pattern 1042 on the base substrate 101 can be made not to overlap.

[0104] Furthermore, the orthographic projection of the first patterned portion 1051 of the electrode patterned layer 105 on the base substrate 101 covers the orthographic projection of the light emitting pattern 1042 on the base substrate 101, and since the third electrode pattern 106 will not be formed on the first patterned portion 1051, it is possible to avoid the orthographic projection of the third electrode pattern 106 on the base substrate 101 and the orthographic projection of the light emitting pattern 1042 on the base substrate 101 from overlapping. In this case, the orthographic projection of the boundary of the first patterned portion 1051 on the base substrate 101 can be located on the side of the orthographic projection of the boundary of the light emitting pattern 1042 on the base substrate 101 close to the first pixel isolation column 103.

[0105] Optionally, in order to ensure that the third electrode pattern 106 can be connected to the second electrode pattern 1043, it is necessary to make the first patterned portion 1051 of the electrode patterned layer 105 expose the first edge portion 10431 of the second electrode pattern 1043. Figure 1, a distance b1 between an orthographic projection of the second electrode pattern 1043 away from the boundary of the light emitting region 104a on the substrate substrate 101 and an orthographic projection of the light emitting pattern 1042 away from the boundary of the light emitting region 104a on the substrate substrate 101 is greater than a distance b2 between an orthographic projection of the first patterned portion 1051 away from the boundary of the light emitting region 104a on the substrate substrate 101 and an orthographic projection of the light emitting pattern 1042 away from the boundary of the light emitting region 104a on the substrate substrate 101. A distance b1 between an orthographic projection of the second electrode pattern 1043 away from the boundary of the light emitting region 104a on the substrate substrate 101 and an orthographic projection of the light emitting pattern 1042 away from the boundary of the light emitting region 104a on the substrate substrate 101 is greater than a distance b3 between an orthographic projection of the third electrode pattern 106 close to the boundary of the light emitting region 104a on the substrate substrate 101 and an orthographic projection of the light emitting pattern 1042 away from the boundary of the light emitting region 104a on the substrate substrate 101. That is, the boundary of the second electrode pattern 1043 away from the light-emitting area 104a is farther away from the boundary of the light-emitting pattern 1042 away from the light-emitting area 104a relative to the boundary of the first patterned portion 1051 away from the light-emitting area 104a, and the boundary of the second electrode pattern 1043 away from the light-emitting area 104a is farther away from the boundary of the light-emitting pattern 1042 away from the light-emitting area 104a relative to the boundary of the third electrode pattern 106 close to the light-emitting area 104a.

[0106] Optionally, the boundary of the first patterned portion 1051 away from the light-emitting region 104a and the boundary of the third electrode pattern 106 close to the light-emitting region 104a may overlap or may have a gap, which is not limited in the embodiment of the present application. In the case where the boundary of the first patterned portion 1051 away from the light-emitting region 104a and the boundary of the third electrode pattern 106 close to the light-emitting region 104a overlap, b2 may be equal to b3.

[0107] Figure 3 is a partial top view of a display panel provided in an embodiment of the present application. Figure 3 , the orthographic projection of the first pixel isolation column 103 on the base substrate 101 surrounds the orthographic projection of the light emitting unit 104 on the base substrate 101. Accordingly, the orthographic projection of the first isolation portion 1031 included in the first pixel isolation column 103 on the base substrate 101 and the orthographic projection of the second isolation portion 1032 included in the first pixel isolation column 103 on the base substrate 101 both surround the orthographic projection of the light emitting unit 104 on the base substrate 101. That is, the first pixel isolation column 103 can separate adjacent light emitting units 104, thereby avoiding crosstalk between the light of adjacent light emitting units 104, and can improve the display effect of the display panel 100.

[0108] Optional, reference Figure 3, the shape of the orthographic projection of the first pixel isolation column 103 surrounding each light-emitting unit 104 on the base substrate 101 is a closed figure. For example, a ring, that is, for each light-emitting unit 104, the first pixel isolation column 103 around the light-emitting unit 104 can be a ring isolation column. Thus, the third electrode pattern 106 can be electrically connected to at least part of the first isolation portion 1031 of the first pixel isolation column 103. For example, Figure 3 In the embodiment, the orthographic projection of the first pixel isolation column 103 surrounding the light emitting unit 104 on the base substrate 101 is a hexagon. Alternatively, the orthographic projection of the first pixel isolation column 103 surrounding the light emitting unit 104 on the base substrate 101 is other shapes, which are not limited in the embodiment of the present application.

[0109] In the examples of this application, refer to Figure 3 The plurality of light emitting units 104 include a first light emitting unit 104a, a second light emitting unit 104b and a third light emitting unit 104c. The light emitting colors of the first light emitting unit 104a, the second light emitting unit 104b and the third light emitting unit 104c are different from each other. Any light emitting unit 104 of the first light emitting unit 104a, the second light emitting unit 104b and the third light emitting unit 104c is arranged adjacent to at least one light emitting unit 104 of the other two light emitting units 104. Figure 3 The light-emitting area of ​​the light-emitting unit is used to represent the light-emitting unit.

[0110] The orthographic projection of the first pixel isolation column 103 on the base substrate 101 surrounds the orthographic projection of the first light emitting unit 104a on the base substrate 101, surrounds the orthographic projection of the second light emitting unit 104b on the base substrate 101, and surrounds the orthographic projection of the third light emitting unit 104c on the base substrate 101. That is, the first pixel isolation column 103 can be located around any light emitting unit 104 to separate adjacent light emitting units 104 and avoid light crosstalk between adjacent light emitting units 104.

[0111] For example, the first light-emitting unit 104a is a blue (blue, B) light-emitting unit 104-B, and the light-emitting color of the first light-emitting unit 104a is blue, the second light-emitting unit 104b is a red (red, R) light-emitting unit 104-R, and the light-emitting color of the second light-emitting unit 104b is red, and the third light-emitting unit 104c is a green (green, G) light-emitting unit 104-G, and the light-emitting color of the third light-emitting unit 104c is green.

[0112] In the embodiment of the present application, the plurality of light emitting units 104 may include a plurality of first light emitting units 104a, a plurality of second light emitting units 104b and a plurality of third light emitting units 104c. Figure 3Two first light emitting units 104a, two second light emitting units 104b and two third light emitting units 104c are shown.

[0113] Among them, any one of the at least one first light-emitting unit 104a, the at least one second light-emitting unit 104b and the at least one third light-emitting unit 104c is arranged adjacent to the other two light-emitting units 104.

[0114] Optionally, a portion of the first pixel isolation column 103 surrounding the first light emitting unit 104 a that is close to the second light emitting unit 104 b and a portion of the first pixel isolation column 103 surrounding the second light emitting unit 104 b that is close to the first light emitting unit 104 a are shared.

[0115] A portion of the first pixel isolation column 103 surrounding the first light emitting unit 104 a close to the third light emitting unit 104 c and a portion of the first pixel isolation column 103 surrounding the third light emitting unit 104 c close to the first light emitting unit 104 a are shared.

[0116] The portion of the first pixel isolation column 103 surrounding the second light emitting unit 104b close to the third light emitting unit 104c and the portion of the first pixel isolation column 103 surrounding the third light emitting unit 104c close to the second light emitting unit 104b are shared. Alternatively, there is a gap G between the first pixel isolation column 103 surrounding the second light emitting unit 104b and the first pixel isolation column 103 surrounding the third light emitting unit 104c. The gap G is located in the arrangement direction of the second light emitting unit 104b and the third light emitting unit 104c.

[0117] That is, the first pixel isolation column 103 surrounding the first light emitting unit 104a may be partially shared with the first pixel isolation column 103 of the adjacent light emitting unit 104. The first pixel isolation column 103 surrounding the second light emitting unit 104b may be partially shared with the first pixel isolation column 103 of the adjacent light emitting unit 104, or may not be shared. The first pixel isolation column 103 surrounding the third light emitting unit 104c may be partially shared with the first pixel isolation column 103 of the adjacent light emitting unit 104, or may not be shared.

[0118] In the embodiment of the present application, the light-emitting pattern 1042 of the light-emitting unit 104 may include a functional layer pattern and a light-emitting layer pattern. The functional layer pattern may be a portion of the light-emitting functional layer located in the light-emitting region 104a after the boundary of the first pixel isolation column 103 is broken. The light-emitting layer pattern may be prepared using different light-emitting materials. For example, the material of the light-emitting layer pattern of the blue light-emitting unit 104-B may be a material for emitting blue light, the material of the light-emitting layer pattern of the red light-emitting unit 104-R may be a material for emitting red light, and the material of the light-emitting layer pattern of the green light-emitting unit 104-G may be a material for emitting green light.

[0119] Optionally, the functional layer patterns of the light-emitting units 104 of different colors can be prepared together, and the light-emitting layer patterns of the light-emitting units 104 of different colors can be prepared in a certain order. Figure 4 , the light-emitting layer pattern of the first light-emitting unit 104a can be formed by whole-surface vapor deposition, and then the light-emitting layer pattern of the second light-emitting unit 104b and the third light-emitting unit 104c is removed by a photolithography process (photoresist coating, exposure, development and removal of photoresist); and then the light-emitting layer pattern of the second light-emitting unit 104b and the light-emitting layer pattern of the third light-emitting unit 104c are formed by whole-surface vapor deposition and photolithography process. Figure 4 It is used to illustrate the preparation of the light-emitting layer pattern and the packaging film layer 111, and does not illustrate the second electrode pattern 1041, the electrode patterned layer 105 and the third electrode pattern 106.

[0120] Since no other film layers are prepared by photolithography after forming the first pixel isolation column 103 and before forming the light-emitting layer pattern of the first light-emitting unit 104a, the integrity of the first pixel isolation column 103 can be ensured, and the reliability of the overlap between the third electrode pattern 106 and the first isolation portion 1031 of the first pixel isolation column 103 can be ensured. However, before forming the light-emitting layer pattern of the second light-emitting unit 104b or before forming the light-emitting layer pattern of the third light-emitting unit 104c, other film layers have been prepared by photolithography, which may cause the morphology of the first pixel isolation column 103 to be incomplete, and the first pixel isolation column 103 surrounding the second light-emitting unit 104b can be arranged at intervals with the first pixel isolation column 103 of the adjacent light-emitting unit 104, and the first pixel isolation column 103 surrounding the third light-emitting unit 104c can be arranged at intervals with the first pixel isolation column 103 of the adjacent light-emitting unit 104. Alternatively, it can be understood that the first pixel isolation column 103 surrounding the second light-emitting unit 104b and the first pixel isolation column 103 of the adjacent light-emitting unit 104 can be used separately. The first pixel isolation column 103 surrounding the third light emitting unit 104 c and the first pixel isolation column 103 of the adjacent light emitting unit 104 may be used separately.

[0121] Figure 5 is a partial top view of another display panel provided in an embodiment of the present application. Figure 5 , the orthographic projections of the first pixel isolation columns 103 around any two adjacent light-emitting units 104 on the base substrate 101 are spaced apart. That is, the first pixel isolation columns 103 around each light-emitting unit 104 are independently arranged, so that the second electrode pattern 1043 of each light-emitting unit 104 can be electrically connected to the first isolation portion 1031 of the surrounding first pixel isolation columns 103 through the third electrode pattern 106. For each light-emitting unit 104, the first isolation portion 1031 of the first pixel isolation column 103 around the light-emitting unit 104 can be used as the cathode auxiliary electrode of the light-emitting unit 104, and the cathode auxiliary electrodes of different light-emitting units 104 are independently arranged, so that they can be controlled separately according to the data driving voltage required when different light-emitting units 104 emit light, which can play a role in reducing power consumption. Figure 5 , two first light emitting units 104a, two second light emitting units 104b, and one third light emitting unit 104c are shown. Figure 5 The light-emitting area of ​​the light-emitting unit is used to represent the light-emitting unit.

[0122] In the embodiment of the present application, the light-emitting unit 104 can be a single-layer light-emitting device or a tandem light-emitting device. A single-layer light-emitting device can include a single light-emitting layer pattern, and a tandem light-emitting device can include multiple light-emitting pattern layer patterns. Compared with a single-layer light-emitting device, a double-layer light-emitting device has improved brightness, luminous efficiency, and lifespan.

[0123] Referring to Table 1, if the plurality of light-emitting units 104 included in the display panel 100 are single-layer light-emitting devices, the luminance of the red light-emitting unit 104-R is in the range of 0.01 nit (nit) to 3000 nit, and the data driving voltage (Vdata) required for the red light-emitting unit 104-R is in the range of 1.7 V (volt) to 5.17 V. The luminance of the green light-emitting unit 104-G is in the range of 0.01 nit to 3000 nit, and the data driving voltage required for the green light-emitting unit 104-G is in the range of 2.22 V to 5.06 V. The luminance of the blue light-emitting unit 104-B is in the range of 0.01 nit to 3000 nit, and the data driving voltage required for the blue light-emitting unit 104-B is in the range of 0.92 V to 4.87 V.

[0124] Table 1

[0125] Red light unit 1.7V to 5.17V Green light unit 2.22V to 5.06V Blue light unit 0.92V to 4.87V

[0126] Referring to Table 2, if the plurality of light-emitting units 104 included in the display panel 100 are stacked series light-emitting devices, when the light-emitting brightness of the red light-emitting unit 104-R is 2000 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.27 V. When the light-emitting brightness of the red light-emitting unit 104-R is 1600 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.38 V. When the light-emitting brightness of the red light-emitting unit 104-R is 1400 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.49 V.

[0127] When the luminance of the green light-emitting unit 104-G is 2000 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.05 V. When the luminance of the green light-emitting unit 104-G is 1600 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.24 V. When the luminance of the green light-emitting unit 104-G is 1400 nit, the data driving voltage required for the red light-emitting unit 104-R is 2.34 V.

[0128] When the luminance of the blue light-emitting unit 104-B is 2000 nit, the data driving voltage required for the red light-emitting unit 104-R is 1.05 V. When the luminance of the blue light-emitting unit 104-B is 1600 nit, the data driving voltage required for the red light-emitting unit 104-R is 1.30 V. When the luminance of the blue light-emitting unit 104-B is 1400 nit, the data driving voltage required for the red light-emitting unit 104-R is 1.44 V.

[0129] Table 2

[0130]

[0131] From the above analysis, it can be seen that the data driving voltages of the light-emitting units 104 of different light-emitting colors are different at the same light-emitting brightness. Therefore, the first pixel isolation columns 103 around different light-emitting units 104 are independently set to achieve independent setting of the cathodes of different light-emitting units 104. The control can be based on the data driving voltages required by different light-emitting units 104. This can avoid the need to provide a higher data driving voltage for all light-emitting units 104 due to the higher data driving voltage of some light-emitting units 104, thereby avoiding overheating of the thin film transistor (TFT) in the light-emitting circuit that provides the light-emitting signal for the light-emitting unit 104, and can effectively reduce power consumption.

[0132] Figure 6 is a partial cross-sectional schematic diagram of another display panel provided by an embodiment of the present application. Figure 6The protruding portion 10322 of the second isolation portion 1032 of the first pixel isolation column 103 that exceeds the first isolation portion 1031 includes: a first portion 103221 on a side close to the light emitting unit 104, and a second portion 103222 on a side away from the light emitting unit 104. The width c1 of the orthographic projection of the first portion 103221 on the base substrate 101 is greater than the width c2 of the orthographic projection of the second portion 103222 on the base substrate 101.

[0133] Since the first pixel isolation columns 103 around different light-emitting units 104 are independently arranged, only one side of each first pixel isolation column 103 close to the corresponding light-emitting unit 104 needs to be connected to the third electrode pattern 106, and the side away from the corresponding light-emitting unit 104 does not need to be specially designed. Therefore, the width c1 of the first part 103221 of the second isolation portion 1032 directly determines the overlapping area between the first pixel isolation column 103 and the third electrode pattern 106. The larger the width c1 of the first part 103221 of the second isolation portion 1032, the larger the overlapping area between the first pixel isolation column 103 and the third electrode pattern 106; the smaller the width c1 of the first part 103221 of the second isolation portion 1032, the smaller the overlapping area between the first pixel isolation column 103 and the third electrode pattern 106.

[0134] In order to improve the overlapping effect and reduce the cathode resistance, the larger the overlapping area between the first pixel isolation column 103 and the third electrode pattern 106, the better. In addition, the width of the second isolation portion 1032 extending from the first isolation portion 1031 on the side close to the light-emitting unit 104 (i.e., the width of the first portion 103221) can be greater than the width of the second isolation portion 1032 extending from the first isolation portion 1031 on the side away from the light-emitting unit 104 (i.e., the width c2 of the second portion 103222).

[0135] In addition, since the side of the first pixel isolation column 103 away from the corresponding light emitting unit 104 only serves as a partition and does not serve as an overlap of the cathode auxiliary electrode, the width c2 of the second portion 103222 of the second isolation portion 1032 is designed to be as small as possible.

[0136] refer to Figure 6 Since there is a gap between the first pixel isolation columns 103 around adjacent light-emitting units 104, when the light-emitting functional layer and the first cathode layer are evaporated in the entire layer, the gap between the first pixel isolation columns 103 around adjacent light-emitting units 104 may contain the material of the light-emitting functional layer and the material of the first cathode layer. Of course, the material of the light-emitting functional layer and the material of the first cathode layer in the gap between the first pixel isolation columns 103 around adjacent light-emitting units 104 may also be removed by a photolithography process, which is not limited in the present embodiment. For example Figure 6The middle spacer is only provided with the material of the light-emitting functional layer, but not provided with the material of the cathode layer. Figure 6 The electrode patterned layer 105 also includes a fourth patterned portion 1054 located on a side of the first pixel isolation column 103 away from the base substrate 101, thereby avoiding the cathode material from adhering to the intervals between the first pixel isolation columns 103 around adjacent light-emitting units 104 and affecting the transmittance of the display panel 100 when forming the third electrode pattern 106.

[0137] Considering the independent setting and process of the first pixel isolation column 103, it is necessary to define the interval between adjacent first pixel isolation columns 103. Optionally, the distance d1 between the orthographic projections of the first isolation portion 1031 of the first pixel isolation column 103 surrounding two adjacent light-emitting units 104 away from the substrate substrate 101 on the substrate substrate 101 is greater than the width c1 of the orthographic projection of the first portion 103221 on the substrate substrate 101, and greater than the width c2 of the orthographic projection of the second portion 103222 on the substrate substrate 101. This can avoid the difficulty in manufacturing due to the small distance between adjacent first pixel isolation columns 103.

[0138] In the embodiment of the present application, the above-mentioned design of the first pixel isolation column 103 is not limited by the arrangement of the multiple light-emitting units 104. For example, the arrangement of the multiple light-emitting units 104 can be a diamond-like arrangement, a real RGB arrangement, an RGBW arrangement, or an RGBY arrangement. Among them, in the case of RGBW arrangement, the multiple light-emitting units 104 can include a red light-emitting unit 104-R, a green light-emitting unit 104-G, a blue light-emitting unit 104-B, and a white light-emitting unit 104-W. In the case of RGBY arrangement, the multiple light-emitting units 104 can include a red light-emitting unit 104-R, a green light-emitting unit 104-G, a blue light-emitting unit 104-B, and a yellow light-emitting unit 104-Y.

[0139] However, if the pixel pitch between adjacent light-emitting units 104 is too large, the first pixel isolation column 103 will have a poor effect in preventing light crosstalk, thereby affecting the yield and display quality of the display panel 100. If the size of the orthographic projection of the light-emitting unit 104 on the base substrate 101 in a single direction is too different from the size in other directions (for example, the shape is elongated), it is easy to cause the first pixel isolation column 103 surrounding the light-emitting unit 104 to be difficult to overlap with the second electrode pattern 1043 of the light-emitting unit 104 through the third electrode pattern 106 (overlapping is difficult).

[0140] Therefore, in order to avoid the above problems, the pixel pitch (Pixel Pitch) of adjacent light-emitting units 104 can be made smaller, and / or the size difference of the orthographic projection of the light-emitting unit 104 on the substrate 101 in different directions is smaller. For example, the pixel pitch (Pixel Pitch) of adjacent light-emitting units 104 is less than or equal to 50μm (micrometer). Alternatively, the aspect ratio of the orthographic projection of the light-emitting unit 104 on the substrate 101 is close to 1:1. Alternatively, the pixel pitch (Pixel Pitch) of adjacent light-emitting units 104 is less than or equal to 50μm, and the aspect ratio of the orthographic projection of the light-emitting unit 104 on the substrate 101 is close to 1:1.

[0141] In the embodiment of the present application, if the pixel pitch between adjacent light-emitting units 104 is large, such as greater than 50 μm, or the aspect ratio of the orthographic projection of the light-emitting unit 104 on the base substrate 101 is significantly different from 1:1, the light-emitting unit 104 can be divided into a plurality of sub-light-emitting units by using a second pixel isolation column 107 disposed inside the light-emitting unit 104.

[0142] Optional, reference Figures 7 and 8 , the pixel opening 102a includes a plurality of pixel sub-openings 102a1, and the plurality of pixel sub-openings 102a1 can expose at least a portion of the first electrode pattern 1041 of the same light-emitting unit 104. In this case, refer to Fig. 9 and Fig.10 The light emitting area 104a of the light emitting unit 104 may include a plurality of sub-light emitting areas 104a1 corresponding to the plurality of pixel sub-openings 102a1, or it may be understood that the light emitting area 104a of the light emitting unit 104 includes a plurality of sub-light emitting areas 104a1 of a plurality of sub-light emitting units. The display panel 100 further includes: a second pixel isolation column 107. The orthographic projection of the second pixel isolation column 107 on the base substrate 101 does not overlap with the orthographic projection of the pixel sub-opening 102a1 on the base substrate 101, so as to avoid the second pixel isolation column 107 affecting the light emission at the position of the pixel sub-opening 102a1. Fig. 9 Four sub-light emitting regions 104a1 are shown in FIG. 1 , and the second pixel isolation column 107 may be located between any two adjacent sub-light emitting regions 104a1 . Fig.10 Two sub-light emitting regions 104a1 are illustrated in FIG. 1 , and the second pixel isolation column 107 may be located between two adjacent sub-light emitting regions 104a1 .

[0143] refer to Figures 7 and 8The second pixel isolation column 107 includes a third isolation portion 1071 and a fourth isolation portion 1072 stacked in a direction away from the base substrate 101. The orthographic projection of the third isolation portion 1071 on the base substrate 101 is located inside the orthographic projection of the fourth isolation portion 1072 on the base substrate 101.

[0144] Optionally, in the case where a second pixel isolation column 107 is disposed inside, the light-emitting unit 104 may include a plurality of light-emitting sub-patterns 10421 disposed at intervals and a plurality of first sub-electrode patterns 10431 disposed at intervals. The main function of the second pixel isolation column 107 is to break the light-emitting functional layer and the cathode layer at the boundary of the second pixel isolation column 107 when forming the light-emitting functional layer and the cathode layer, thereby obtaining the plurality of light-emitting sub-patterns 10421 and the plurality of first sub-electrode patterns 10431 included in at least some of the light-emitting units 104.

[0145] The light-emitting unit 104 includes a plurality of light-emitting sub-patterns 10421 and a plurality of first sub-electrode patterns 10431 that correspond to the plurality of pixel sub-openings 102a1. The light-emitting sub-patterns 10421 and the first sub-electrode patterns 10431 are both located within the corresponding pixel sub-openings 102a1. In order to allow the second pixel isolation column 107 to also serve as the cathode auxiliary electrode of the light-emitting unit 104, the third electrode pattern 106 can also be electrically connected to the third isolation portion 1071 of the second pixel isolation column 107.

[0146] Since the light-emitting unit 104 is divided into multiple sub-light-emitting units, the multiple sub-light-emitting areas 104a1 of the multiple sub-light-emitting units will not affect each other, and the light emission of other sub-light-emitting units will not be affected by black spots or dark spots in a certain sub-light-emitting unit, thereby improving the reliability of the light-emitting unit 104.

[0147] Optional, reference Figure 7 The first sub-electrode patterns 10431 in adjacent pixel sub-openings 102a1 can be electrically connected to the third isolation portion 1071 of the same second pixel isolation column 107 through the third electrode pattern 106, so that multiple first sub-electrode patterns 10431 of the light-emitting unit 104 can be electrically connected, and cathode signals can be provided to the multiple first sub-electrode patterns 10431 together. Alternatively, referring to Figure 8 One of the first sub-electrode patterns 10431 in the adjacent pixel sub-opening 102a1 can be electrically connected to the third isolation portion 1071 of the second pixel isolation column 107 through the third electrode pattern 106, and the other first sub-electrode pattern 10431 is not electrically connected to the third isolation portion 1071 of the second pixel isolation column 107, so that cathode signals can be provided for multiple first sub-electrode patterns 10431 respectively.

[0148] refer to Figure 7, the first electrode pattern 1041 of the light emitting unit 104 may be an integrated structure, and each pixel sub-opening 102a1 may expose a portion of the first electrode pattern 1041. That is, although the light emitting unit 104 is divided into a plurality of sub-light emitting units, only the light emitting pattern 1042 and the second electrode pattern 1043 of the light emitting unit 104 may be divided, and the first electrode pattern 1041 of the light emitting unit 104 may not need to be divided. Alternatively, referring to Figure 8 The first electrode pattern 1041 of the light emitting unit 104 includes a plurality of anode sub-patterns 10411 that are spaced apart and correspond to the plurality of pixel sub-openings 102a1 , and each pixel sub-opening 102a1 exposes at least a portion of the corresponding first electrode pattern 1041 .

[0149] In the examples of this application, refer to Figure 7 , there is a second pixel isolation column 107 between the orthographic projections of adjacent pixel sub-openings 102a1 on the base substrate 101. Alternatively, referring to Figure 8 There are a plurality of second pixel isolation columns 107 (for example, two) between the orthographic projections of adjacent pixel sub-openings 102a1 on the base substrate 101. This embodiment of the present application does not limit this.

[0150] When there are multiple second pixel isolation columns 107 between the orthographic projections of adjacent pixel sub-openings 102a1 on the base substrate 101, it can be ensured that the length of the fourth isolation portion 1072 on the side of the second pixel isolation column 107 close to the pixel sub-opening 102a1 is larger than that of the third isolation portion 1071, and then the first sub-electrode pattern 10431 is electrically connected to the third isolation portion 1071 through the third electrode pattern 106, thereby improving the reliability of the overlap.

[0151] Optional, reference Figures 7 and 8 , the first pixel isolation column 103 may further include a fifth isolation portion 1033 located on a side of the first isolation portion 1031 close to the base substrate 101. The material of the fifth isolation portion 1033 may be the same material as the material of the second isolation portion 1032. In this case, the etching rate of the material of the first isolation portion 1031 is greater than the etching rate of the material of the second isolation portion 1032, and thus, during the etching process, the first isolation portion 1031 may be retracted relative to the second isolation portion 1032 and the fifth isolation portion 1033, thereby obtaining an undercut isolation column.

[0152] refer to Figure 7 and Figure 8, the second pixel isolation column 107 may further include a sixth isolation portion 1073 located on a side of the third isolation portion 1071 close to the base substrate 101. The material of the sixth isolation portion 1073 may be the same material as the material of the fourth isolation portion 1072. In this case, the etching rate of the material of the third isolation portion 1071 is greater than the etching rate of the material of the fourth isolation portion 1072, and thus, during the etching process, the third isolation portion 1071 may be retracted relative to the fourth isolation portion 1072 and the sixth isolation portion 1073, thereby obtaining an undercut isolation column.

[0153] Optionally, the fifth isolation portion 1033 of the first pixel isolation column 103 and the sixth isolation portion 1073 of the second pixel isolation column 107 are located in the same layer, and the first pixel isolation column 103 may not include the fifth isolation portion 1033, and the second pixel isolation column 107 may not include the sixth isolation portion 1073. The fifth isolation portion 1033 and the sixth isolation portion 1073 do not exist at the same time or do not exist at the same time. For example, when the first pixel isolation column 103 includes the fifth isolation portion 1033, the second pixel isolation column 107 may not include the sixth isolation portion 1073.

[0154] In addition, the first isolation portion 1031 of the first pixel isolation column 103 and the third isolation portion 1071 of the second pixel isolation column 107 are located in the same layer, and the second isolation portion 1032 of the first pixel isolation column 103 and the fourth isolation portion 1072 of the second pixel isolation column 107 are located in the same layer.

[0155] Optionally, when there is no pixel defining layer 102 on the side of the second pixel isolation column 107 close to the base substrate 101, the second pixel isolation column 107 may not include the sixth isolation portion 1073. This is because the sixth isolation portion 1073 has poor conductivity and is difficult to etch.

[0156] In the embodiment of the present application, when the light emitting unit 104 is divided into a plurality of sub-light emitting units, the plurality of sub-light emitting units may emit light together or not emit light together. That is, although the light emitting unit 104 is divided, the light emission of the light emitting unit 104 is not affected.

[0157] Optionally, the first pixel isolation column 103 is used to isolate the light emitting units 104 of different light emitting colors, and is used to prevent light crosstalk between different light emitting units 104. Because light crosstalk needs to be prevented, the distance between the side of the first pixel isolation column 103 away from the substrate 101 and the substrate 101 is relatively large. Different sub-light emitting units of the same light emitting unit 104 have the same light emitting color, and there will be no crosstalk problem. The second pixel isolation column 107 is mainly used to improve the overlap effect. Because the second pixel isolation column 107 does not need to prevent light crosstalk, the distance between the side of the second pixel isolation column 107 away from the substrate 101 and the substrate 101 can be relatively small.

[0158] Optionally, the distance h1 between the side of the first pixel isolation column 103 away from the substrate substrate 101 and the substrate substrate 101 is greater than the distance h2 between the side of the second pixel isolation column 107 away from the substrate substrate 101 and the substrate substrate 101. For example, in the case where the pixel defining layer 102 is provided on the side of the first pixel isolation column 103 and the second pixel isolation column 107 close to the substrate substrate 101, the first pixel isolation column 103 and the second pixel isolation column 107 are substantially formed on the same plane. In this case, the thickness of the second pixel isolation column 107 can be made smaller than the thickness of the first pixel isolation column 103, so that the distance h2 between the side of the second pixel isolation column 107 away from the substrate substrate 101 and the substrate substrate 101 is smaller than the distance h1 between the side of the first pixel isolation column 103 away from the substrate substrate 101 and the substrate substrate 101. Further, the thickness of the third isolation portion 1071 included in the second pixel isolation column 107 can be made smaller than the thickness of the first isolation portion 1031 included in the first pixel isolation column 103.

[0159] In the embodiment of the present application, the display panel 100 further includes: a plurality of light-emitting circuits corresponding to the plurality of light-emitting units 104, the light-emitting circuits are connected to the corresponding light-emitting units 104 and constitute light-emitting pixels. The display panel further includes: a plurality of signal lines, the signal lines are connected to the light-emitting circuits, and are used to provide driving signals for the light-emitting circuits. Optionally, the light-emitting circuits may include a plurality of thin-film transistors and at least one storage capacitor.

[0160] The orthographic projection of the signal line on the base substrate 101 and the orthographic projection of the light-emitting area 104a of the light-emitting unit 104 on the base substrate 101 do not overlap, so as to avoid the signal line affecting the normal light emission of the light-emitting area 104a. Optionally, when the light-emitting unit 104 is divided into a plurality of sub-light-emitting units, the area between adjacent sub-light-emitting units may also be a non-light-emitting area 104a. Thus, at least part of the orthographic projections of at least some of the plurality of signal lines on the base substrate 101 are located between the orthographic projections of adjacent pixel sub-openings 102a1 on the base substrate 101.

[0161] Optional, reference Fig.11 , the plurality of light-emitting units 104 may include a plurality of first light-emitting units 104a, a plurality of second light-emitting units 104b and a plurality of third light-emitting units 104c. The plurality of light-emitting units 104 include a plurality of first light-emitting unit groups Z1 and a plurality of second light-emitting unit groups Z2 arranged along the first direction X. The first light-emitting unit group Z1 includes a plurality of second light-emitting units 104b and a plurality of third light-emitting units 104c arranged alternately along the second direction Y, and the second light-emitting unit group Z2 includes a plurality of first light-emitting units 104a along the second direction Y. Among them, the second light-emitting units 104b and the third light-emitting units 104c are not divided, and each first light-emitting unit 104a can be divided into two first sub-light-emitting units 104a1 arranged along the first direction X. Fig.11 The light-emitting area is used to represent the light-emitting unit.

[0162] Fig.11 The multiple signal lines shown may all be data signal lines data. The multiple data signal lines data are arranged along the first direction X and extend along the second direction Y. Each first light-emitting unit group Z1 may be provided with two data signal lines (Data1 and Data2). One of the data signal lines may be connected to the multiple second light-emitting units 104b included in the first light-emitting unit group Z1, and used to provide data signals for the multiple second light-emitting units 104b; the other data line may be connected to the multiple third light-emitting units 104c included in the first light-emitting unit group Z1, and used to provide data signals for the multiple third light-emitting units 104c. Each second light-emitting unit group Z2 may be provided with a data signal line (Data3), and the orthographic projection of this data signal line on the substrate 101 is located between the orthographic projections of the two first sub-light-emitting units 104a1 arranged along the first direction X on the substrate 101.

[0163] In the examples of this application, refer to Figure 2 The base substrate 101 further includes a peripheral region 101b surrounding the display region 101a. Fig.12 The display panel 100 further includes: a power supply line ( Fig.12 The signal transfer pattern 108, the fourth electrode pattern 109 and the fifth electrode pattern 110 are located in the same layer, the fourth electrode pattern 109 and the second electrode pattern 1043 are located in the same layer, and the fifth electrode pattern 110 and the third electrode pattern 106 are located in the same layer.

[0164] Optionally, the signal transfer pattern 108 and the first electrode pattern 1041 can be made of the same material and prepared based on a one-time process. The fourth electrode pattern 109 and the second electrode pattern 1043 can be made of the same material and prepared based on a one-time process. The fourth electrode pattern 109 and the second electrode pattern 1043 are collectively referred to as the first cathode layer for the convenience of description in the following text. The fifth electrode pattern 110 and the third electrode pattern 106 can be made of the same material and prepared based on a one-time process. The fifth electrode pattern 110 and the third electrode pattern 106 are collectively referred to as the second cathode layer for the convenience of description in the following text.

[0165] Optionally, the thickness of the first cathode layer is less than or equal to 20 nm. The first cathode layer may include a first sublayer and a second sublayer. The material of the first sublayer may be ytterbium (Yb). The material of the second sublayer may be a metal or a metal alloy, for example, the material of the second sublayer may include at least one of magnesium (Mg) and silver (Ag). Optionally, the ratio of magnesium to silver in the material of the second sublayer may be greater than 0 and less than 1. It should be noted that the first sublayer may not be included, and this is not limited in the embodiments of the present application.

[0166] Optionally, since the third electrode pattern 106 and the fifth electrode pattern 110 in the second cathode layer are both used to transmit signals, the conductivity of the second cathode layer is greater than or equal to the conductivity of the first cathode layer. The material of the second cathode layer is a metal or a metal alloy. In order to ensure the conductivity of the second cathode layer, the material of the second cathode layer includes at least silver (Ag), and of course may also include other metals or metal alloys, which is not limited in the embodiments of the present application. In addition, since the third electrode pattern 106 and the fifth electrode pattern 110 in the second cathode layer do not affect the display, the thickness of the second cathode layer may be greater than or equal to 20nm. The second cathode layer may be transparent or opaque. Including at least one of magnesium (Mg) and.

[0167] Optionally, the material of the first cathode layer and the material of the second cathode layer may be the same material or different materials, which is not limited in the embodiment of the present application.

[0168] In the embodiment of the present application, the signal transfer pattern 108 can be connected to the power supply line, the fourth electrode pattern 109 is connected to the signal transfer pattern 108, the fourth electrode pattern 109 is also electrically connected to the first isolation portion 1031, and the fifth electrode pattern 110 is electrically connected to the fourth electrode pattern 109. Since the first isolation portion 1031 is connected to the second electrode pattern 1043 of the light-emitting unit 104 through the third electrode pattern 106, the power supply line can be connected to the second electrode pattern 1043 of the light-emitting unit 104 through the signal transfer pattern 108, the fourth electrode pattern 109, the first isolation portion 1031 and the third electrode pattern 106 in sequence, so that the power supply line can transmit the power supply signal received from the external circuit to the second electrode pattern 1043, so that the light-emitting unit 104 emits light. Optionally, the power supply line can be a negative power supply line, or it can also be called a VSS line.

[0169] Optionally, since the display panel 100 further includes a fifth electrode pattern 110 connected to the fourth electrode pattern 109 , the fifth electrode pattern 110 can play a role in reducing cathode resistance.

[0170] refer to Fig.12 It can be seen that the electrode patterned layer 105 further includes a second patterned portion 1052 located on a side of the fourth electrode pattern 109 away from the base substrate 101. The fourth electrode pattern 109 includes a second edge portion 1091, which is an edge portion of the fourth electrode pattern 109 that does not overlap with the second patterned portion 1052. The fifth electrode pattern 110 is connected to the second edge portion 1091.

[0171] Since the material of the electrode patterned layer 105 and the cathode material are mutually exclusive, the second patterned portion 1052 exposes the second edge portion 1091 of the fourth electrode pattern 109, so that when the cathode material layer is formed after the electrode patterned layer 105, the cathode material layer can be formed above the second edge portion 1091 of the fourth electrode pattern 109 (i.e., the fifth electrode pattern 110 is obtained), thereby enabling the fifth electrode pattern 110 formed after the electrode patterned layer 105 to overlap with the second edge portion 1091 of the fourth electrode pattern 109.

[0172] In the embodiment of the present application, the second electrode pattern 1043 and the fourth electrode pattern 109 can be prepared together using an open mask, which can be referred to as a first open mask. The electrode patterning layer 105 is prepared using an open mask, which can be referred to as a second open mask. The third electrode pattern 106 and the fifth electrode pattern 110 can be prepared together using an open mask, which can be referred to as a third open mask.

[0173] The first open mask plate has a first mask opening, which covers the display area 101a and covers a portion of the peripheral area close to the display area 101a. The second open mask plate has a second mask opening, which covers the display area 101a and covers a portion of the peripheral area close to the display area 101a. The third open mask plate has a third mask opening, which covers the display area 101a.

[0174] In order to ensure the effectiveness of the overlap, the size of the third mask opening can be greater than or equal to the size of the first mask opening, and the size of the first mask opening is greater than the size of the second mask opening. Fig.13 During the preparation process, the orthographic projection of the third mask opening on the base substrate 101 covers the orthographic projection of the first mask opening on the base substrate 101 , and the orthographic projection of the first mask opening on the base substrate 101 covers the orthographic projection of the second mask opening on the base substrate 101 .

[0175] Optionally, the design relationship between the fourth electrode pattern 109, the second patterned portion 1052 and the fifth electrode pattern 110 can be measured by the size of the distance from the pixel defining layer 102 to the boundary of the display area 101a. For example, the distance e1 of the fourth electrode pattern 109 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a is greater than the distance e2 of the second patterned portion 1052 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a, and the distance e2 of the second patterned portion 1052 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a is less than the distance e3 of the fifth electrode pattern 110 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a. In addition, the distance e1 of the fourth electrode pattern 109 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a may be greater than the distance e3 of the fifth electrode pattern 110 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a. Of course, the distance e1 of the fourth electrode pattern 109 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a may also be less than or equal to the distance e3 of the fifth electrode pattern 110 away from the boundary of the display area 101a and the pixel defining layer 102 away from the boundary of the display area 101a, and the embodiment of the present application does not limit this.

[0176] In order to ensure that the fifth electrode pattern 110 can be connected to the second edge portion 1091 of the fourth electrode pattern 109, it is necessary to make the distance between the fifth electrode pattern 110 away from the boundary of the display area 101a and the distance between the second patterned portion 1052 away from the boundary of the display area 101a greater than or equal to the alignment accuracy of the open mask. Optionally, assuming that the alignment accuracy of the open mask is 50μm, the distance between the fifth electrode pattern 110 away from the boundary of the display area 101a and the distance between the second patterned portion 1052 away from the boundary of the display area 101a is greater than or equal to 50μm.

[0177] Optionally, the thickness of the fourth electrode pattern 109 may be smaller than the thickness of the second patterned portion 1052 , and the thickness of the second patterned portion 1052 may be smaller than the thickness of the fifth electrode pattern 110 .

[0178] Since the fourth electrode pattern 109 and the second electrode pattern 1043 are located in the same layer, the thickness of the fourth electrode pattern 109 is affected by the second electrode pattern 1043. The second electrode pattern 1043 is designed to adjust the microcavity of the light-emitting unit 104 and requires a higher transmittance, so the thickness of the second electrode pattern 1043 needs to be designed to be thinner. Accordingly, the thickness of the fourth electrode pattern 109 is also thinner.

[0179] Furthermore, since the fifth electrode pattern 110 and the third electrode pattern 106 are located in the same layer, the thickness of the fifth electrode pattern 110 is affected by the third electrode pattern 106. The third electrode pattern 106 is designed to reduce resistance, so the thickness of the third electrode pattern 106 is designed to be thicker. Correspondingly, the thickness of the fifth electrode pattern 110 is also thicker.

[0180] In addition, the thickness of the second patterned portion 1052 may be between the thickness of the fourth electrode pattern 109 and the thickness of the fifth electrode pattern 110 .

[0181] In addition, because the fifth electrode pattern 110 needs to climb a slope at the boundary of the second patterned portion 1052 away from the display area 101a, the angle between the side of the second patterned portion 1052 away from the display area 101a and the surface of the second patterned portion 1052 close to the base substrate 101 can be an acute angle, that is, less than 90°. The angle between the side of the second patterned portion 1052 away from the display area 101a and the surface of the fifth electrode pattern 110 close to the base substrate 101 can be complementary to the angle between the side of the second patterned portion 1052 away from the display area 101a and the surface of the second patterned portion 1052 close to the base substrate 101.

[0182] In the embodiment of the present application, if the first pixel isolation column 103 around the multiple light-emitting units 104 is not used alone, the multiple light-emitting units 104 can obtain a common cathode signal. In this case, the multiple light-emitting units 104 may not need to be divided, or at least some of the multiple light-emitting units 104 may be divided into multiple sub-light-emitting units. Of course, if the first pixel isolation column 103 around the multiple light-emitting units 104 is used alone, the multiple light-emitting units 104 can obtain cathode signals independently. In this case, the multiple light-emitting units 104 may not need to be divided, or at least some of the multiple light-emitting units 104 may be divided into multiple sub-light-emitting units.

[0183] In the examples of this application, refer to Figure 4 The display panel 100 further includes an encapsulation film layer 111. The encapsulation film layer 111 may be located on a side of the plurality of light emitting units 104 away from the base substrate 101. Optionally, the encapsulation film layer 111 includes a first encapsulation layer 1111, a second encapsulation layer 1112 and a third encapsulation layer 1113.

[0184] The first encapsulation layer 1111 may include multiple encapsulation parts corresponding to the multiple light emitting units 104, each of which may cover the corresponding light emitting unit 104 for encapsulating the light emitting unit 104. The second encapsulation layer 1112 and the third encapsulation layer 1113 may both cover the multiple light emitting units 104.

[0185] Optionally, the first encapsulation layer 1111 and the third encapsulation layer 1113 may be made of an inorganic material, and the second encapsulation layer 1112 may be made of an organic material. For example, the first encapsulation layer 1111 and the third encapsulation layer 1113 may be made of one or more inorganic oxides such as SiNx (silicon nitride), SiOx (silicon oxide) and SiOxNy (silicon oxynitride). The second encapsulation layer 1112 may be made of a resin material. The resin may be a thermoplastic resin or a thermosetting resin, the thermoplastic resin may include an acrylic (PMMA) resin, and the thermosetting resin may include an epoxy resin.

[0186] In the embodiment of the present disclosure, the second encapsulation layer 1112 may be manufactured by ink jet printing (IJP) method. The first encapsulation layer 1111 and the third encapsulation layer 1113 may be manufactured by chemical vapor deposition (CVD) method.

[0187] In summary, an embodiment of the present application provides a display panel, and an embodiment of the present application provides a display panel, which includes a substrate, a pixel defining layer, a first pixel isolation column, a plurality of light-emitting units, an electrode patterning layer, and a third electrode pattern. The third electrode pattern overlaps the first edge portion of the second electrode pattern exposed by the electrode patterning layer, and is connected to the first pixel isolation column, so that the first pixel isolation column serves as a cathode auxiliary electrode of the light-emitting unit. At the same time, since the second electrode pattern of the light-emitting unit is connected to the first pixel isolation column through the third electrode pattern, the second electrode pattern of the light-emitting unit can receive the cathode signal through the first pixel isolation column, thereby improving the reliability of cathode signal reception.

[0188] Fig.14 is a flow chart of a method for preparing a display panel provided in an embodiment of the present application. Fig.14 , the method comprising:

[0189] Step S101, obtaining a substrate.

[0190] The base substrate 101 includes a display area 101a. The base substrate 101 can carry a plurality of light emitting units 104. The base substrate 101 can be made of plastic or glass.

[0191] Step S102: forming a first electrode pattern of a plurality of light-emitting units on one side of the base substrate.

[0192] The first electrode patterns 1041 of the plurality of light emitting units 104 may be arranged at intervals. Optionally, the first electrode patterns 1041 of some of the plurality of light emitting units 104 may include a plurality of anode sub-patterns 10411 arranged at intervals.

[0193] Step S103 , forming a pixel defining layer on a side of the first electrode pattern of the plurality of light emitting units away from the base substrate.

[0194] The pixel definition layer 102 includes a plurality of pixel openings 102a located in the display region 101a, and the plurality of pixel openings 102a correspond to the plurality of light emitting units 104. The pixel openings 102a expose at least a portion of the first electrode pattern 1041 of the corresponding light emitting unit 104.

[0195] Step S104 , forming a first pixel isolation column on a side of the pixel defining layer away from the base substrate.

[0196] In the embodiment of the present application, in order to prevent the first pixel isolation column 103 from affecting the light emitting unit 104 , the orthographic projection of the first pixel isolation column 103 on the base substrate 101 and the orthographic projection of the pixel opening 102 a on the base substrate 101 may not overlap.

[0197] The first pixel isolation column 103 includes: a first isolation portion 1031 and a second isolation portion 1032 stacked in a direction away from the pixel defining layer 102. The material of the first isolation portion 1031 may include a conductive material. The orthographic projection of the first isolation portion 1031 on the base substrate 101 is located inside the orthographic projection of the second isolation portion 1032 on the base substrate 101.

[0198] Optionally, the first isolation portion 1031 and the second isolation portion 1032 can be formed by a single etching process. The etching rate of the material of the first isolation portion 1031 is greater than the etching rate of the material of the second isolation portion 1032, so that the first pixel isolation column 103 can be made into an inscribed structure. This can prevent the subsequent light-emitting functional layer and the cathode layer from breaking at the edge of the second isolation portion 1032 in the first pixel isolation column 103, so as to ensure the formation of multiple independent light-emitting patterns 1042 and multiple independent second electrode patterns 1043.

[0199] Step S105 , forming light-emitting patterns of a plurality of light-emitting units in a plurality of pixel openings.

[0200] In an embodiment of the present application, the light-emitting pattern 1042 may be connected to the first electrode pattern 1041. The light-emitting pattern 1042 may include a functional layer pattern and a light-emitting layer pattern. Among them, the functional layer pattern may be a portion of the light-emitting functional layer located in the light-emitting region 104a after the boundary of the first pixel isolation column 103 is broken. The light-emitting layer pattern may be prepared using different light-emitting materials. For example, the material of the light-emitting layer pattern of the blue light-emitting unit 104-B may be a material for emitting blue light, the material of the light-emitting layer pattern of the red light-emitting unit 104-R may be a material for emitting red light, and the material of the light-emitting layer pattern of the green light-emitting unit 104-G may be a material for emitting green light.

[0201] Optionally, the functional layer patterns of the light-emitting units 104 of different colors may be prepared together, and the light-emitting layer patterns of the light-emitting units 104 of different colors may be prepared in a certain order.

[0202] Step S106 , forming a second electrode pattern of a plurality of light-emitting units on a side of the light-emitting pattern away from the base substrate.

[0203] In the embodiment of the present application, the second electrode pattern 1043 can be connected to the light-emitting pattern 1042 to realize the light-emitting unit 104. The second electrode pattern 1043 can play the role of a microcavity of the light-emitting unit 104. Optionally, the orthographic projection of the second electrode pattern 1043 on the base substrate 101 can cover the orthographic projection of the light-emitting unit 104 on the base substrate 101.

[0204] Step S107 , forming an electrode patterning layer on a side of the first cathode layer away from the base substrate.

[0205] In the embodiment of the present application, the material of the electrode patterned layer 105 and the cathode material have poor compatibility. The electrode patterned layer 105 includes a first patterned portion 1051 located in the pixel opening 102a. The orthographic projection of the first patterned portion 1051 on the base substrate 101 is located within the orthographic projection of the second electrode pattern 1043 on the base substrate 101, and the first patterned portion 1051 exposes the first edge portion 10431 of the second electrode pattern 1043.

[0206] Since the first patterned portion 1051 exposes the first edge portion 10431 of the second electrode pattern 1043 , when the electrode patterned layer 105 is subsequently formed, the cathode material can be attached above the first edge portion 10431 of the second electrode pattern 1043 .

[0207] Step S108: forming a third electrode pattern.

[0208] In the embodiment of the present application, since the first patterned portion 1051 exposes the first edge portion 10431 of the second electrode pattern 1043, a cathode material layer is formed after the electrode patterning layer 105, so that the cathode material layer can be formed above the first edge portion 10431 of the second electrode pattern 1043 (i.e., the third electrode pattern 106 is obtained), and the third electrode pattern 106 formed after the electrode patterning layer 105 can overlap with the first edge portion 10431 of the second electrode pattern 1043.

[0209] In this way, the third electrode pattern 106 can be used to connect the first isolation portion 1031 and the second electrode pattern 1043, so that the first pixel isolation column 103 plays the role of a cathode auxiliary electrode. At the same time, most of the area on the side of the second electrode pattern 1043 away from the base substrate 101 is provided with the electrode patterned layer 105. Since the transmittance of the electrode patterned layer 105 is higher than the transmittance of the cathode material, this structure can also avoid the third electrode pattern 106 being arranged above the second electrode pattern 1043 to affect the transmittance of the display panel.

[0210] Since it is difficult for cathode material to adhere to the electrode patterned layer 105, the electrode patterned layer 105 may have no cathode material adhered to it, or may have only a small amount of cathode material adhered to it. In either case, since the transmittance of the electrode patterned layer 105 is very high and there is very little or even no cathode material on the electrode patterned layer 105, this structure avoids affecting the transmittance of the display panel due to the setting of the cathode auxiliary electrode.

[0211] In the embodiment of the present application, if the light emitting unit 104 is divided into a plurality of sub-light emitting units, the display panel may further include a second pixel isolation column 107 located between the plurality of sub-light emitting units. The second pixel isolation column 107 and the first pixel isolation column 103 may be prepared by the same process.

[0212] Optionally, the signal transfer pattern 108 included in the display panel 100 can be prepared using the same process as the first electrode pattern 1041 of the plurality of light-emitting units 104. The fourth electrode pattern 109 included in the display panel can be prepared using the same process as the second electrode pattern 1043 of the plurality of light-emitting units 104. The fifth electrode pattern 110 included in the display panel can be prepared using the same process as the third electrode pattern 106.

[0213] In summary, the embodiment of the present application provides a method for preparing a display panel, and the display panel prepared by the method includes a base substrate, a pixel defining layer, a first pixel isolation column, a plurality of light-emitting units, an electrode patterning layer, and a third electrode pattern. The third electrode pattern overlaps the first edge portion of the second electrode pattern exposed by the electrode patterning layer, and is connected to the first pixel isolation column, so that the first pixel isolation column serves as a cathode auxiliary electrode of the light-emitting unit. At the same time, since the second electrode pattern of the light-emitting unit is connected to the first pixel isolation column through the third electrode pattern, the second electrode pattern of the light-emitting unit can receive the cathode signal through the first pixel isolation column, thereby improving the reliability of cathode signal reception.

[0214] Fig.15 is a schematic diagram of the structure of a display device provided in an embodiment of the present application. Fig.15 The display device includes: a power supply component 200 and the display panel 100 as described in the above embodiment. The power supply component 200 is connected to the display panel 100 to supply power to the display panel 100.

[0215] Optionally, the display device may be an organic light-emitting diode (OLED) display device. The display device may be any appropriate display device, including but not limited to any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a car navigation system, and an e-book.

[0216] Since the display device can have substantially the same technical effects as the display panel described in the previous embodiment, the technical effects of the display device will not be repeatedly described here for the purpose of brevity.

[0217] The terms used in the embodiments of this application are only used to explain the embodiments of this application, and are not intended to limit this application. Unless otherwise defined, the technical terms or scientific terms used in the embodiments of this application should be the common meanings understood by people with general skills in the field to which this application belongs.

[0218] The implementation method section of the present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0219] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme defined by the claims. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme defined by the claims. Therefore, it should be understood that any feature shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

[0220] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.

[0221] In the drawings, the size, thickness or region of one or more components may be exaggerated for clarity. In addition, the drawings schematically show ideal examples, and one embodiment of the present application is not limited to the shapes or numerical values ​​shown in the drawings.

[0222] The ordinal numbers such as "first", "second", "third" and the like in this specification are provided to avoid confusion of constituent elements, rather than to limit the quantity. The "plurality" in this application means two or more.

[0223] The thickness range of the film layer in this specification is A to B, which is used to indicate that the thickness is between A and B, and includes the two endpoint values ​​of A and B.

[0224] In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present application. The positional relationship of the constituent elements is appropriately changed according to the orientation of the constituent elements being described. Therefore, it is not limited to the words and phrases described in the specification and can be appropriately replaced according to the circumstances.

[0225] In this specification, unless otherwise clearly specified and limited, the terms "connected" and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the meanings of the above terms in this application can be understood according to the circumstances.

[0226] In this specification, a transistor refers to an element including at least three terminals: a gate electrode (gate), a drain electrode (drain electrode terminal, drain region or drain), and a source electrode (source electrode terminal, source region or source). The transistor has a channel region between the drain electrode and the source electrode, and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0227] In this specification, the first electrode of a transistor may be a drain electrode, and the second electrode of a transistor may be a source electrode, or the first electrode of a transistor may be a source electrode, and the second electrode of a transistor may be a drain electrode. In the case of using transistors with opposite polarities or when the direction of current changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged, and the "source terminal" and the "drain terminal" may be interchanged.

[0228] In this specification, "connection" includes the case where the components are connected together through an element having some electrical function. There is no particular limitation on the "element having some electrical function" as long as it can transmit electrical signals between the connected components. Examples of "element having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements having various functions.

[0229] In the present application, "thickness" and "height" refer to the vertical distance between the surface of the film layer away from the substrate and the surface of the film layer close to the substrate.

[0230] The circles, rectangles, hexagons or rhombuses in this specification are not in the strict sense, but may be approximate circles, rectangles, hexagons or rhombuses, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0231] The term "about" in this application refers to a numerical value that is not strictly limited to a limit and allows for process and measurement errors.

[0232] The above description is only an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: The display panel comprises: A base substrate, the base substrate comprising a display area; A pixel defining layer, the pixel defining layer is located on one side of the base substrate, and the pixel defining layer includes a plurality of pixel openings located in the display area; A first pixel isolation column, wherein the first pixel isolation column is located at a side of the pixel defining layer away from the base substrate; a plurality of light-emitting units corresponding to the plurality of pixel openings, the light-emitting units comprising a first electrode pattern, a light-emitting pattern, and a second electrode pattern, the first electrode pattern being located on a side of the pixel defining layer close to the base substrate, the pixel opening exposing at least a portion of the first electrode pattern corresponding to the light-emitting unit, the light-emitting pattern being located within the pixel opening and connected to the first electrode pattern, and the second electrode pattern being located on a side of the light-emitting pattern away from the base substrate and connected to the light-emitting pattern; an electrode patterned layer, the electrode patterned layer comprising a first patterned portion located in the pixel opening, an orthographic projection of the first patterned portion on the base substrate being located within an orthographic projection of the second electrode pattern on the base substrate, the second electrode pattern comprising a first edge portion, the first edge portion being an edge portion of the second electrode pattern that does not overlap with the first patterned portion; and a third electrode pattern, wherein the third electrode pattern is electrically connected to the first edge portion of the second electrode pattern, and the third electrode pattern is electrically connected to the first pixel isolation column.

2. The display panel according to claim 1, characterized in that: The third electrode pattern and the electrode patterning layer do not overlap.

3. The display panel according to claim 1, characterized in that: The orthographic projection of the first pixel isolation column on the base substrate and the orthographic projection of the pixel opening on the base substrate do not overlap, the first pixel isolation column comprises: a first isolation portion and a second isolation portion stacked in a direction away from the pixel defining layer, the material of the first isolation portion comprises a conductive material, and the orthographic projection of the first isolation portion on the base substrate is located inside the orthographic projection of the second isolation portion on the base substrate; Wherein, the third electrode pattern is electrically connected to the first isolation portion.

4. The display panel according to claim 2, characterized in that: The second isolation portion includes a portion of the first isolation portion located on a side away from the base substrate, and a protruding portion extending beyond an edge of the first isolation portion in a plane parallel to the base substrate; An orthographic projection of the third electrode pattern on the base substrate overlaps with an orthographic projection of the protruding portion on the base substrate, and the third electrode pattern is in contact and electrically connected with the first isolation portion.

5. The display panel according to claim 2, characterized in that: The orthographic projection of the second electrode pattern on the base substrate covers the orthographic projection of the light-emitting pattern on the base substrate; The orthographic projection of the third electrode pattern on the base substrate and the orthographic projection of the light-emitting pattern on the base substrate do not overlap; The distance between the orthographic projection of the boundary of the second electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate is greater than the distance between the orthographic projection of the boundary of the first patterned portion on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate; The distance between the orthographic projection of the boundary of the second electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate is greater than the distance between the orthographic projection of the boundary of the third electrode pattern on the substrate and the orthographic projection of the boundary of the light-emitting pattern on the substrate.

6. The display panel according to any one of claims 1 to 5, characterized in that: The orthographic projection of the first pixel isolation column on the base substrate surrounds the orthographic projection of the light emitting unit on the base substrate; The third electrode pattern is electrically connected to at least a portion of a first isolation portion surrounding the first pixel isolation column of the light emitting unit.

7. The display panel according to claim 6, characterized in that: The shape of the first pixel isolation column surrounding each of the light-emitting units on the base substrate is a closed figure.

8. The display panel according to claim 7, characterized in that: At least a portion of the first pixel isolation columns surrounding two adjacent light emitting units is shared.

9. The display panel according to claim 6, characterized in that: The plurality of light-emitting units include a first light-emitting unit, a second light-emitting unit and a third light-emitting unit, wherein the light-emitting colors of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit are different from each other; any one of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit is arranged adjacent to at least one of the other two light-emitting units; The orthographic projection of the first pixel isolation column on the base substrate surrounds the orthographic projection of the first light emitting unit on the base substrate, surrounds the orthographic projection of the second light emitting unit on the base substrate, and surrounds the orthographic projection of the third light emitting unit on the base substrate.

10. The display panel according to claim 9, characterized in that: Any one of the first light-emitting unit, the second light-emitting unit and the third light-emitting unit is arranged adjacent to the other two light-emitting units; A portion of the first pixel isolation column surrounding the first light emitting unit and close to the second light emitting unit is shared with a portion of the first pixel isolation column surrounding the second light emitting unit and close to the first light emitting unit; A portion of the first pixel isolation column surrounding the first light emitting unit close to the third light emitting unit and a portion of the first pixel isolation column surrounding the third light emitting unit close to the first light emitting unit are shared; A portion of the first pixel isolation column surrounding the second light-emitting unit that is close to the third light-emitting unit and a portion of the first pixel isolation column surrounding the third light-emitting unit that is close to the second light-emitting unit are shared, or there is a gap between the first pixel isolation column surrounding the second light-emitting unit and the first pixel isolation column surrounding the third light-emitting unit, and the gap is located in the arrangement direction of the second light-emitting unit and the third light-emitting unit.

11. The display panel according to claim 6, characterized in that: The orthographic projections of the first pixel isolation columns surrounding any two adjacent light-emitting units on the base substrate are spaced apart.

12. The display panel according to claim 11, characterized in that: The protruding portion of the second isolation portion of the first pixel isolation column that exceeds the edge of the first isolation portion in a plane parallel to the base substrate includes: a first portion on a side close to the light emitting unit, and a second portion on a side away from the light emitting unit; A width of an orthographic projection of the first portion on the base substrate is greater than a width of an orthographic projection of the second portion on the base substrate.

13. The display panel according to claim 12, characterized in that: The distance between the orthographic projections of the first isolation portion of the first pixel isolation column surrounding two adjacent light-emitting units on the side away from the base substrate on the base substrate is greater than the width of the orthographic projection of the first portion on the base substrate, and greater than the width of the orthographic projection of the second portion on the base substrate.

14. The display panel according to any one of claims 1 to 5, and 7 to 13, characterized in that: The pixel opening includes a plurality of pixel sub-openings, and the plurality of pixel sub-openings expose at least a portion of the first electrode pattern of the same light-emitting unit; The display panel further comprises: a second pixel isolation column, wherein the orthographic projection of the second pixel isolation column on the base substrate does not overlap with the orthographic projection of the pixel sub-opening on the base substrate, and the orthographic projection of the second pixel isolation column on the base substrate is located between the orthographic projections of adjacent pixel sub-openings on the base substrate; The second pixel isolation column comprises: a third isolation portion and a fourth isolation portion stacked in a direction away from the base substrate, wherein the orthographic projection of the third isolation portion on the base substrate is located inside the orthographic projection of the fourth isolation portion on the base substrate; The light-emitting unit includes a plurality of light-emitting sub-patterns arranged at intervals, and a plurality of first cathode sub-patterns arranged at intervals, the light-emitting sub-patterns and the first cathode sub-patterns are both located in the corresponding pixel sub-openings, and the third electrode pattern is also electrically connected to the third isolation portion.

15. The display panel according to claim 14, characterized in that: The first electrode pattern of the light-emitting unit is an integrated structure, and each of the pixel sub-openings exposes a portion of the first electrode pattern; or, the first electrode pattern of the light-emitting unit includes a plurality of anode sub-patterns that are spaced apart and correspond to the plurality of pixel sub-openings, and each of the pixel sub-openings exposes at least a portion of the corresponding first electrode pattern.

16. The display panel according to claim 14, characterized in that: A plurality of second pixel isolation columns are provided between the orthographic projections of adjacent pixel sub-openings on the base substrate.

17. The display panel according to claim 14, characterized in that: The display panel further includes: a plurality of light-emitting circuits corresponding to the plurality of light-emitting units, the light-emitting circuits are connected to the corresponding light-emitting units and form light-emitting pixels; the display panel further includes: a plurality of signal lines, the signal lines are connected to the light-emitting circuits and are used to provide driving signals for the light-emitting circuits; Wherein, at least part of the orthographic projections of at least part of the plurality of signal lines on the base substrate are located between the orthographic projections of the adjacent pixel sub-openings on the base substrate.

18. The display panel according to any one of claims 1 to 5, and 7 to 13, characterized in that: The base substrate further includes a peripheral area surrounding the display area; the display panel further includes: a power supply line at least partially located in the peripheral area, a signal transfer pattern, a fourth electrode pattern and a fifth electrode pattern, the signal transfer pattern and the first electrode pattern are located in the same layer, the fourth electrode pattern and the second electrode pattern are located in the same layer, and the fifth electrode pattern and the third electrode pattern are located in the same layer; The signal transfer pattern is connected to the power supply line, the fourth electrode pattern is connected to the signal transfer pattern, the fourth electrode pattern is also electrically connected to the first isolation portion, and the fifth electrode pattern is electrically connected to the fourth electrode pattern.

19. The display panel according to claim 18, characterized in that: The electrode patterned layer further comprises a second patterned portion located on a side of the fourth electrode pattern away from the base substrate, the fourth electrode pattern comprises a second edge portion, and the second edge portion is an edge portion of the fourth electrode pattern that does not overlap with the second patterned portion; The fifth electrode pattern is electrically connected to the second edge portion.

20. The display panel according to claim 18, characterized in that: An angle between a side surface of the second patterned portion away from the display area and a surface of the second patterned portion close to the base substrate is an acute angle.

21. A method for preparing a display panel, characterized in that: The method comprises: Obtaining a substrate, wherein the substrate includes a display area; Forming a first electrode pattern of a plurality of light-emitting units on one side of the base substrate; A pixel defining layer is formed on a side of the first electrode pattern of the plurality of light-emitting units away from the base substrate, wherein the pixel defining layer includes a plurality of pixel openings located in the display area, the plurality of pixel openings correspond to the plurality of light-emitting units, and the pixel openings expose at least a portion of the first electrode pattern of the corresponding light-emitting unit; Forming a first pixel isolation column on a side of the pixel defining layer away from the base substrate, wherein the first pixel isolation column is located on a side of the pixel defining layer away from the base substrate; forming light-emitting patterns of a plurality of light-emitting units in the plurality of pixel openings, wherein the light-emitting patterns are connected to the first electrode pattern; Forming a second electrode pattern of the plurality of light-emitting units on a side of the light-emitting pattern away from the base substrate, wherein the second electrode pattern is connected to the light-emitting pattern; forming an electrode patterning layer on a side of the second electrode pattern away from the base substrate, the electrode patterning layer comprising a first patterning portion located in the pixel opening, an orthographic projection of the first patterning portion on the base substrate being located within an orthographic projection of the second electrode pattern on the base substrate, and the second electrode pattern comprising a first edge portion, the first edge portion being an edge portion of the second electrode pattern that does not overlap with the first patterning portion; A third electrode pattern is formed, the third electrode pattern being electrically connected to the first edge portion of the second electrode pattern, and the third electrode pattern being electrically connected to the first isolation portion.

22. A display device, characterized in that: The display device comprises: a power supply component and a display panel according to any one of claims 1 to 20; Wherein, the power supply component is connected to the display panel and is used to supply power to the display panel.

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