Fan-out wiring structure, display panel and display device

Abstract

The invention provides a fan-out wiring structure, a display panel and a display device.The fan-out wiring structure is applied to the display panel and used for being connected with data lines in a display region, and the fan-out wiring structure comprises a plurality of fan-out parts and a plurality of wiring units at least arranged in the fan-out parts. The multiple fan-out parts are located on the same side of the display area, the multiple fan-out parts are sequentially arranged in the direction away from the display area, and the multiple fan-out parts comprise the first fan-out parts close to the display area. Wherein in the first fan-out part and in the orthographic projection along the thickness direction of the display panel, at least two adjacent wires are overlapped, and the overlapping size is greater than or equal to 0.3 mu m; or in the first fan-out part and in the orthographic projection in the thickness direction of the display panel, every two adjacent wires are arranged at an interval, and the minimum size of the interval is smaller than or equal to 0.3 mu m. The fan-out wiring structure provided by the invention is beneficial to improving the use performance of the display device.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and more specifically, relates to a fan-out wiring structure, a display panel and a display device. Background Art

[0002] Narrow-border displays have the advantages of increasing visible area, improving visual effects, facilitating touch operations, and facilitating splicing. Narrow-border displays are deeply loved by users.

[0003] However, the display device with a narrow-frame display screen needs to further improve its performance. Summary of the invention

[0004] The purpose of the embodiments of the present application is to provide a fan-out wiring structure, a display panel and a display device to improve the performance of the display device.

[0005] To achieve the above purpose, the technical solution adopted in this application is:

[0006] In a first aspect, a fan-out wiring structure is provided, which is applied to a display panel and is used to connect data lines in a display area. The fan-out wiring structure includes multiple fan-out parts and multiple wiring units at least arranged in the fan-out parts. The multiple fan-out parts are located on the same side of the display area, and the multiple fan-out parts are arranged in sequence in a direction away from the display area. The multiple fan-out parts include a first fan-out part close to the display area. Wherein, in the first fan-out part, and in the orthographic projection along the thickness direction of the display panel, at least two adjacent wirings overlap, and the overlapping size is greater than or equal to 0.3μm;

[0007] Alternatively, in the first fan-out portion and in the orthographic projection along the thickness direction of the display panel, every two adjacent wirings are arranged with an interval, and the minimum size of the interval is less than or equal to 0.3 μm.

[0008] Through the above technical solution, in the first fan-out portion and in the orthographic projection along the thickness direction of the display panel, at least two adjacent routing lines overlap in the first direction, and the overlap size is greater than or equal to 0.3 μm, or, every two adjacent routing lines are spaced apart along the first direction, and the minimum size of the spacing is less than or equal to 0.3 μm. In this way, the spacing between at least some of the adjacent two routing lines in the orthographic projection along the thickness direction of the display panel can be reduced, which is beneficial to reducing the wiring space in the first fan-out portion, thereby facilitating the realization of a narrow frame.

[0009] Therefore, the fan-out wiring structure provided in the present application is beneficial to improving the performance of the display device.

[0010] In some embodiments, in the first fan-out portion and in the orthographic projection along the thickness direction of the display panel, when at least two adjacent routing lines overlap, the minimum spacing between the two adjacent routing lines disposed in the same layer is greater than or equal to 1.0 μm. This can help reduce capacitance while reducing wiring space.

[0011] Optionally, a width of the wiring along the first direction is greater than or equal to 1.6 μm.

[0012] Optionally, the fan-out routing structure provided in the present application includes multiple routing units, each routing unit includes multiple routing lines, and the width of the routing unit along the first direction is greater than or equal to 5.2 μm. That is, the multiple routing lines of the fan-out routing structure provided in the present application are divided into multiple routing groups, each routing group is a routing unit.

[0013] Optionally, in the first fan-out portion and in the orthographic projection along the thickness direction of the display panel, when every two adjacent routing lines are arranged at intervals, every two adjacent routing lines in the orthographic projection along the thickness direction of the display panel are arranged in different layers.

[0014] Optionally, the width of the trace is greater than or equal to 1.2 μm.

[0015] In some embodiments, the multiple fan-out sections also include a second fan-out section, which is located on a side of the first fan-out section away from the display area. Within the second fan-out section and within the orthographic projection along the thickness direction of the display panel, every two adjacent routing lines are spaced apart along the first direction.

[0016] In this way, within the second fan-out section and within the orthographic projection along the thickness direction of the display panel, every two adjacent traces are spaced apart, which is beneficial to reducing capacitance. In the case where reducing the wiring space in the first fan-out section may lead to an increase in capacitance, the increase in capacitance in the second fan-out section can be avoided to a certain extent, which is beneficial to reducing impedance differences.

[0017] Optionally, within the first fan-out portion, and within the orthographic projection along the thickness direction of the display panel, the minimum spacing between two adjacent routing lines along the first direction is a first distance; within the second fan-out portion, and within the orthographic projection along the thickness direction of the display panel, the minimum spacing between two adjacent routing lines is a second distance; the first distance is smaller than the second distance.

[0018] Optionally, the fan-out routing structure includes multiple routing units, the routing unit includes multiple routings, within a first fan-out portion and within an orthographic projection along the thickness direction of the display panel, two adjacent routing units overlap, or, the minimum spacing between two adjacent routing units is a third distance, the third distance is less than or equal to the second distance and greater than or equal to the first distance; and / or, the multiple fan-out portions also include a third fan-out portion, the third fan-out portion is located on a side of the second fan-out portion away from the first fan-out portion, within the third fan-out portion and within an orthographic projection along the thickness direction of the display panel, the minimum spacing between two adjacent routings is a fourth distance, the fourth distance is greater than the first distance; and / or, in two adjacent fan-out portions, the routing in the first fan-out portion is electrically connected to the routing in the second fan-out portion, and the two electrically connected routings are spaced apart along the thickness direction of the display panel and are electrically connected through a connecting wire set in a via.

[0019] In this way, in two adjacent routing units, the minimum spacing between the two adjacent routing units can be equal to the first distance, or equal to the second distance, or between the first distance and the second distance. The fan-out routing structure provided in the present application can reduce the spacing between the routings, further reduce the wiring space in the first fan-out portion, and can also increase the spacing between the routings, which is beneficial to reducing the capacitance in the first fan-out portion, thereby facilitating the use performance of the display device. In addition, the fan-out routing structure provided in the present application can be provided with a third fan-out portion, so that it is possible to choose whether to provide the third fan-out portion according to different display devices. In two adjacent fan-out portions, the routing in the first fan-out portion is electrically connected to the routing in the second fan-out portion, and the two electrically connected routings are arranged at intervals along the thickness direction of the display panel, which is beneficial to reducing the impedance difference between adjacent fan-out portions and being electrically connected through the connecting wires arranged in the vias.

[0020] Optionally, the routing lines electrically connected to the second fan-out part in the first fan-out part are arranged in different layers, and the routing lines electrically connected to the third fan-out part in the second fan-out part are arranged in different layers.

[0021] In some embodiments, the routing unit includes a first routing, a second routing, and a third routing that are arranged in sequence along the thickness direction of the display panel. Within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, at least a portion of the third routing is located between the first routing and the second routing.

[0022] In this way, the routing is divided into three layers, which increases the wiring density and helps to reduce the wiring space, thus facilitating the realization of a narrow border.

[0023] In some embodiments, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, the third routing overlaps with at least one of the first routing and the second routing; and / or, the material of the first routing includes molybdenum, the material of the second routing includes molybdenum, the third routing includes a first conductive sublayer and a second conductive sublayer stacked and connected along the thickness direction of the display panel, the material of one of the first conductive sublayer and the second conductive sublayer includes molybdenum, and the material of the other includes titanium.

[0024] In this way, the wiring density can be further increased, which is conducive to reducing the wiring space and thus facilitating the realization of a narrow frame.

[0025] In some embodiments, the routing unit includes a first routing, a second routing, and two third routings, and the first routing, the second routing, and the third routing are sequentially spaced apart along the thickness direction of the display panel; in the routing unit, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel; at least a portion of a third routing is located between the first routing and the second routing, and at least a portion of the second routing is located between the two third routings.

[0026] In this way, the wiring density can be further increased, which is conducive to reducing the wiring space and thus facilitating the realization of a narrow frame.

[0027] In some embodiments, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel; a third routing line overlaps with at least one of the first routing line and the second routing line, and / or the second routing line overlaps with at least one of the two third routing lines.

[0028] In this way, the wiring density can be further increased, which is conducive to reducing the wiring space and thus facilitating the realization of a narrow frame.

[0029] In a second aspect, a display panel is provided, the display panel comprising a display area and a non-display area surrounding the display area, the display panel further comprising a substrate, a plurality of data lines, and a fan-out wiring structure in the above embodiment. The plurality of data lines are arranged on the substrate and located in the display area, the wiring is electrically connected to the data lines, and the fan-out portion is located in the non-display area.

[0030] The display panel provided in the present application has the same technical effect as the fan-out wiring structure in the above embodiment, which will not be described in detail here. Among them, the wiring space of the first fan-out part is reduced, which can reduce the size of the non-display area, thereby facilitating the realization of a narrow frame.

[0031] In some embodiments, the display panel includes a first pixel unit, a second pixel unit, and a third pixel unit arranged on a substrate and emitting different colors, and the multiple data lines include multiple data line groups arranged adjacent to each other in sequence; wherein the data line group includes a first data line and a second data line arranged adjacent to each other, the first pixel unit and the second pixel unit are connected to the first data line, the third pixel unit is connected to the second data line, one of the two adjacent routings in the first fan-out section is electrically connected to the first data line, and the other of the two adjacent routings in the first fan-out section is electrically connected to the second data line; or, the data line group includes a first data line, a second data line, and a third data line arranged adjacent to each other, the first pixel unit is connected to the first data line, the second pixel unit is connected to the second data line, the third pixel unit is connected to the third data line, the first of the three adjacent routings in the first fan-out section is electrically connected to the first data line, the second of the three adjacent routings in the first fan-out section is electrically connected to the second data line, and the third of the three adjacent routings in the first fan-out section is electrically connected to the third data line.

[0032] In this way, the display panel provided in the present application can have different pixel structures.

[0033] In a third aspect, a display device is provided, comprising the above-mentioned display panel. The display device provided in this application has the same technical effect as the above-mentioned display panel, which will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0035] Figure 1 One of the structural schematic diagrams of the display panel provided in the embodiment of the present application;

[0036] Figure 2 The second structural schematic diagram of the display panel provided in the embodiment of the present application;

[0037] Figure 3 One of the partial schematic diagrams of the routing in the first fan-out part provided in the embodiment of the present application;

[0038] Figure 4 For along Figure 2 One of the cross-sectional structural diagrams along the AA line;

[0039] Figure 5 One of the planar structural schematic diagrams of the routing in the first fan-out part provided in the embodiment of the present application;

[0040] Figure 6 A schematic diagram of the planar structure of the wiring in the second fan-out part or the third fan-out part provided in an embodiment of the present application;

[0041] Figure 7 For along Figure 2 The second cross-sectional structure diagram of the AA line;

[0042] Figure 8 A second partial schematic diagram of routing in the first fan-out portion provided in an embodiment of the present application;

[0043] Fig. 9 For along Figure 2 The third cross-sectional structure diagram of the AA line;

[0044] Fig.10 A second schematic diagram of the planar structure of the wiring in the first fan-out portion provided in an embodiment of the present application;

[0045] Fig.11 for Fig.10 A partial enlarged view of point B in the middle;

[0046] Fig.12 For along Figure 2 The fourth cross-sectional structure diagram of the AA line;

[0047] Fig.13 The third schematic diagram of the planar structure of the wiring in the first fan-out part provided in the embodiment of the present application;

[0048] Fig.14 A fourth schematic diagram of the planar structure of the wiring in the first fan-out portion provided in an embodiment of the present application;

[0049] Fig.15 One of the structural schematic diagrams of the pixel structure and fan-out wiring structure provided in the embodiment of the present application;

[0050] Fig.16 The second structural schematic diagram of the pixel structure and fan-out wiring structure provided in the embodiment of the present application;

[0051] Fig.17 The third structural schematic diagram of the pixel structure and fan-out wiring structure provided in the embodiment of the present application;

[0052] Fig.18 The fourth structural schematic diagram of the pixel structure and fan-out wiring structure provided in the embodiment of the present application;

[0053] Fig.19 A fifth schematic diagram of the planar structure of the wiring in the first fan-out part provided in an embodiment of the present application;

[0054] Fig. 20 A sixth schematic diagram of the planar structure of the wiring in the first fan-out portion provided in an embodiment of the present application;

[0055] Fig.21 For along Fig.18 Cross-sectional structural diagram along the CC line.

[0056] Among them, the reference numerals in the figure are:

[0057] 100-display panel; 110-substrate; 101-display area; 102-non-display area; 210-first fan-out part; 220-bending part; 230-second fan-out part; 240-third fan-out part; 250-integrated circuit; 310-first pixel unit; 320-second pixel unit; 330-third pixel unit; 350-first data line; 360-second data line; 370-third data line; 01-routing unit; 10-first routing; 20-second routing; 30-third routing; 40-connecting line. DETAILED DESCRIPTION

[0058] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0059] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0060] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0061] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0062] Narrow-border displays have the advantages of increasing visible area, improving visual effects, facilitating touch operation and easy splicing. Narrow-border displays are deeply loved by users and are widely used in electronic products such as mobile phones, TVs, tablets, laptops, desktop computers, car display terminals, wearable devices, advertising display equipment, etc.

[0063] With the continuous development of display screens, the demand for narrow borders is getting higher and higher, especially for mobile phone products. In order to achieve a full screen or a four-sided border design, in addition to the left border, right border, and top border of the display screen needing to be reduced in size, the size of the bottom border also needs to be further reduced. Therefore, display devices with narrow border displays need to further improve their performance.

[0064] The display device provided in the embodiment of the present application is now described. The display device can be a mobile phone, a television, a tablet computer, a laptop computer, a desktop computer, a vehicle-mounted display terminal, a wearable device, an advertising display device, etc.

[0065] The display device includes a display panel 100 , which may be an organic light-emitting diode (OLED) display panel 100 , a micro light-emitting diode (Micro LED / μLED) display panel 100 , or a liquid crystal display (LCD) display panel 100 .

[0066] The embodiment of the present application is described by taking the display panel 100 as an OLED display panel 100 as an example. The display panel 100 may include a display panel 100 .

[0067] Please also read Figure 1 and Figure 2 The display panel 100 provided in the embodiment of the present application includes a substrate 110 and a pixel structure ( Figure 1 and Figure 2 The pixel structure may include a data line and a first pixel unit 310, a second pixel unit 320 and a third pixel unit 330 connected to the data line. It is understandable that the pixel structure may be arranged using a sub-pixel rendering (SPR) technology or a traditional sub-pixel (Real RGB) arrangement. The display panel 100 has a display area 101 (Active Area, AA) and a non-display area 102 (Nondisplay area, NA), the non-display area 102 is arranged around the display area 101, and the pixel structure is arranged in the display area 101.

[0068] The display panel 100 provided in the embodiment of the present application further includes a fan-out wiring structure, a bonding portion, and an integrated circuit 250 (IC). The fan-out wiring structure is connected to the data line in the pixel structure, the bending portion 220 is located in the middle of the fan-out wiring structure, the integrated circuit 250 is located at one end of the fan-out wiring structure away from the display area 101, and is electrically connected to the fan-out wiring structure, and the integrated circuit 250 transmits signals to the data line through the fan-out wiring structure.

[0069] Please also read Figure 1 , Figure 2 , Figure 3 as well as Figure 4 The fan-out wiring structure provided in the embodiment of the present application includes a plurality of fan-out parts and a plurality of wirings located in the fan-out parts, and the plurality of wirings in the same fan-out part are arranged along a first direction (such as Figure 1 The fan-out wiring structure provided in the embodiment of the present application further includes a plurality of wiring units 01, the wiring unit 01 includes a plurality of wirings, and the plurality of wiring units 01 in the same fan-out unit are also sequentially arranged along the first direction. The plurality of wirings of the wiring unit 01 are arranged along the thickness direction of the display panel 100 (such as Figure 4 The fan-out portions are located in the display area 101 along the second direction (such as Figure 1 The first direction is perpendicular to the second direction, and the third direction is perpendicular to the first direction and the second direction. That is, the first direction, the second direction, and the third direction can be respectively the X direction, the Y direction, and the Z direction in the three-dimensional space coordinate system.

[0070] The fan-out wiring structure provided in the embodiment of the present application further includes multiple fan-out parts, the wiring unit 01 passes through the fan-out parts, and multiple wirings in the wiring unit 01 are insulated from each other. Optionally, the fan-out part is made of insulating material, or the fan-out part includes multiple insulating film layers.

[0071] Please continue reading Figure 1 and Figure 5 In some examples, the plurality of fan-out sections may include a first fan-out section 210 close to the display area 101. Within the first fan-out section 210 and within the orthographic projection along the third direction, every two adjacent traces are spaced apart, and the minimum size of the spacing is less than or equal to 0.3 μm. This can reduce the spacing between at least some of the adjacent traces within the orthographic projection along the third direction, which is beneficial to reducing the wiring space within the first fan-out section 210, thereby facilitating the realization of a narrow frame. Therefore, the fan-out trace structure provided in the embodiment of the present application is beneficial to improving the performance of the display device.

[0072] Optionally, the plurality of fan-out sections may further include a second fan-out section 230, and the first fan-out section 210 and the second fan-out section 230 are sequentially arranged along the second direction. The first fan-out section 210 is located in the non-display area 102, and the wiring in the first fan-out section 210 is electrically connected to the data line in the display area 101, and the second fan-out section 230 is located on a side of the first fan-out section 210 away from the display area 101. The wiring in the first fan-out section 210 may be connected to the wiring in the second fan-out section 230 at the bending section 220, and the wiring in the second fan-out section 230 may be connected to the integrated circuit 250, so that the integrated circuit 250 can transmit signals to the data line.

[0073] Please continue reading Figure 2 In some other examples, the plurality of fan-out sections further include a third fan-out section 240, which is located on a side of the second fan-out section 230 away from the first fan-out section 210, and the routing unit 01 of the routing unit 01 passes through the third fan-out section 240. The routing in the third fan-out section 240 is connected to the routing in the second fan-out section 230, and the routing in the third fan-out section 240 is connected to the integrated circuit 250, that is, the routing in the second fan-out section 230 can be connected to the integrated circuit 250 through the routing in the third fan-out section 240.

[0074] It can be understood that, in addition, the fan-out wiring structure provided in the embodiment of the present application can choose whether to set the third fan-out portion 240 according to different display devices.

[0075] For example, see Figure 5 , within the first fan-out portion 210 and within the orthographic projection along the third direction, the minimum spacing between two adjacent routing lines in the first direction is a first distance c1, c1≤0.3 μm.

[0076] Optionally, in the second fan-out section 230 and in the orthographic projection along the third direction, every two adjacent routing lines are spaced apart along the first direction. This is conducive to reducing the capacitance in the second fan-out section 230. In the case where reducing the wiring space in the first fan-out section 210 may lead to an increase in capacitance, the increase in capacitance in the second fan-out section 230 can be avoided to a certain extent, which is conducive to reducing the impedance difference.

[0077] For example, in the second fan-out portion 230, the minimum distance between two adjacent traces is the second distance c2, and the first distance c1 may be smaller than the second distance c2. Of course, the size relationship between c1 and c2 may also be designed according to specific products.

[0078] Optionally, in the first fan-out portion 210 and in the orthographic projection along the third direction, when every two adjacent routing lines are arranged at intervals, every two adjacent routing lines in the orthographic projection along the third direction are arranged in different layers.

[0079] Optionally, a width of the wiring along the first direction is greater than or equal to 1.2 μm.

[0080] Please continue reading Figure 5 and Figure 6 In some embodiments, the minimum spacing between two adjacent routing units 01 is a third distance c3, and the third distance c3 is less than or equal to the second distance c2 and greater than or equal to the first distance c1. That is, in two adjacent routing units 01, the third distance c3 may be equal to the first distance c1, may be equal to the second distance c2, or may be between the first distance c1 and the second distance c2.

[0081] It can be understood that when the third distance c3 is equal to the first distance c1, the fan-out routing structure provided in the embodiment of the present application can further reduce the spacing between the routings, and further reduce the wiring space in the first fan-out portion 210. When the third distance c3 is equal to the second distance c2, the fan-out routing structure provided in the embodiment of the present application can also increase the spacing between the routings, which is beneficial to reduce the capacitance in the first fan-out portion 210, thereby facilitating the improvement of the performance of the display device. In addition, the fan-out routing structure provided in the embodiment of the present application can also be configured to be between the first distance c1 and the second distance c2 according to performance requirements to improve the scope of application.

[0082] Please continue reading Figure 6 In the third fan-out section 240, and in the orthographic projection along the third direction, every two adjacent routing lines are arranged at intervals. This is conducive to reducing the capacitance in the third fan-out section 240. In the case where reducing the wiring space in the first fan-out section 210 may lead to an increase in capacitance, the increase in capacitance in the third fan-out section 240 can be avoided to a certain extent, which is conducive to reducing the impedance difference.

[0083] For example, in the third fan-out portion 240, the minimum distance between two adjacent traces is a fourth distance c4, and the fourth distance c4 may be greater than the first distance c1. Of course, the size relationship between c4 and c1 may also be designed according to specific products.

[0084] The fourth distance c4 may be greater than the second distance c2, the fourth distance c4 may be less than the second distance c2, or the fourth distance c4 may be the second distance c2. Similarly, when the fourth distance c4 is greater than or equal to the second distance c2, the fan-out wiring structure provided in the embodiment of the present application may also increase the spacing of the wiring, which is beneficial to reducing the capacitance in the first fan-out portion 210, thereby facilitating improving the performance of the display device.

[0085] The inventors found that, however, with the continuous improvement of display screen resolution specifications, such as Full High Definition (FHD) products, Wide Quad High Definition (WQHD) products, etc. As a result, the corresponding pixel density (Pixels Pre Inch, PPI) is also constantly increasing, such as 300+PPI, 400+PPI, 500+PPI, so the number of data (data) signal pull lines (data lines) from the integrated circuit 250 (Integrated Circuit, IC) to the display (Active Area, AA) area is also increasing, and at the same time, it is becoming more and more dense. Correspondingly, the wiring space required for the first fan-out part 210 will also become larger and larger, and the size of the lower frame needs to be further reduced.

[0086] Please also read Figure 7 , Figure 8 and Fig. 9 In order to further reduce the size of the lower frame, in some embodiments, the routing unit 01 includes a first routing 10, a second routing 20, and a third routing 30 that are sequentially spaced along the third direction. In the first fan-out portion 210, and in the orthographic projection along the third direction, at least a portion of the third routing 30 is located between the first routing 10 and the second routing 20.

[0087] In this way, a first routing line 10, a second routing line 20 and a third routing line 30 can form a routing unit 01 of a routing unit 01, three routing lines form a routing unit 01 of a routing unit 01, and multiple routing units 01 are arranged in sequence along the first direction. The routing lines in the routing unit 01 are divided into three layers, which can increase the wiring density, thereby facilitating the reduction of the wiring space, thereby facilitating the realization of a narrow bottom frame.

[0088] Please also read Fig.10 and Fig.11 In some embodiments, the routing unit 01 includes a first routing line 10, a second routing line 20, and two third routing lines 30, and the first routing line 10, the second routing line 20, and the third routing line 30 are sequentially arranged in intervals along the third direction. In the routing unit 01, within the first fan-out portion 210 and within the orthographic projection along the third direction; at least a portion of a third routing line 30 is located between the first routing line 10 and the second routing line 20, and at least a portion of the second routing line 20 is located between the two third routing lines 30.

[0089] It is understandable that one first routing line 10, one second routing line 20 and two third routing lines 30 can also form a routing unit 01 of a routing unit 01, four routing lines form a routing unit 01 of a routing unit 01, and multiple routing units 01 are arranged in sequence along the first direction. In this way, the fan-out routing structure provided by the present application can further increase the wiring density, which is conducive to reducing the wiring space, thereby facilitating the realization of a narrow bottom frame.

[0090] The following describes how to increase the wiring density by dividing the wiring in the wiring unit 01 into three layers.

[0091] Please continue reading Figure 5 When the routing unit 01 includes two layers of routing, namely, the first routing 10 and the second routing 20, the width a of the first routing 10 can be 1.8um, the width a of the second routing 20 can also be 1.8um, the minimum spacing b between two adjacent second routings 20 can be 2.0um, and the spacing c1 between the first routing 10 and the second routing 20 can be 0.5um. The first routing 10 and the second routing 20 are of equal width, and the size d1 of the arrangement unit of a single routing is the sum of the width a of the routing and the spacing c1 between the first routing 10 and the second routing 20. In this way, the size of the arrangement unit of a single routing can be a+c=2.3um.

[0092] Please continue reading Fig.10 and Fig.11 When the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20 and the third routing 30, the width a of the first routing 10 can be 1.8um, the width a of the second routing 20 can also be 1.8um, the width a of the third routing 30 can also be 1.8um, the minimum spacing b between two adjacent third routings 30 can be 2.0um, and the spacing c between the first routing 10 and the second routing 20 can be 0.1um. The first routing 10, the second routing 20 and the third routing 30 are of equal width, and the size d2 of the arrangement unit of a single routing is the sum of the width a of the routing and the spacing c between the second routing 20 and the third routing 30. In this way, the size of the arrangement unit of a single routing can be 1.9um.

[0093] In summary, (d1-d2) / d1≈17.4%. When the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20 and the third routing 30, about 17.4% of the space can be saved.

[0094] It is understandable that the impedance requirement of the routing is relatively high, the width of the routing needs to be greater than 1.8um, and the routing can overlap. Exemplarily, the width of the routing is 3.5um.

[0095] In some embodiments, within the first fan-out portion 210 and in the orthographic projection along the third direction, at least two adjacent routing lines overlap, and the overlap size in the first direction is greater than or equal to 0.3 μm. The first routing line 10 may overlap the third routing line 30, and the second routing line 20 may also overlap the third routing line 30.

[0096] Optionally, a minimum spacing between two adjacent wirings arranged in the same layer and along the first direction is greater than or equal to 1.0 μm, which can help reduce capacitance while reducing wiring space.

[0097] Optionally, a width of the wiring along the first direction is greater than or equal to 1.6 μm.

[0098] Optionally, a width of the routing unit 01 along the first direction is greater than or equal to 5.2 μm.

[0099] Please also read Fig.12 , Fig.13 and Fig.14 , exemplarily, when three routing lines form a routing unit 01 of a routing unit 01, within the first fan-out portion 210 and in the orthographic projection along the third direction, the third routing line 30 overlaps at least one of the first routing line 10 and the second routing line 20. The third routing line 30 may overlap the first routing line 10, or the third routing line 30 may overlap the second routing line 20, or the third routing line 30 may overlap the first routing line 10 and the second routing line 20 at the same time.

[0100] Exemplarily, two adjacent routing units 01 overlap.

[0101] Exemplarily, when four routing lines form a routing unit 01 , within the first fan-out portion 210 and in the orthographic projection along the third direction, the third routing line 30 overlaps with at least one of the adjacent first routing line 10 and the second routing line 20 .

[0102] Exemplarily, when four routing lines form a routing unit 01 of a routing unit 01 , within the first fan-out portion 210 and within the orthographic projection along the third direction, the second routing line 20 overlaps with at least one of the two third routing lines 30 .

[0103] In this way, the fan-out routing structure provided in the present application can further increase the wiring density, which is beneficial to reducing the wiring space, thereby facilitating the realization of a narrow bottom frame.

[0104] Please continue Fig.13When the routing unit 01 includes two layers of routing, namely, the first routing 10 and the second routing 20, the width a of the first routing 10 can be 3.5um, the width a of the second routing 20 can also be 3.5um, the minimum spacing b between two adjacent second routings 20 can be 4.5um, and the spacing c1 between the first routing 10 and the second routing 20 can be 0.5um. The first routing 10 and the second routing 20 are of equal width, and the size d3 of the arrangement unit of a single routing is the sum of the width a of the routing and the spacing c between the first routing 10 and the second routing 20. In this way, the size of the arrangement unit of the four routings can be 4(a+c)=16um.

[0105] Please continue reading Fig.14 When the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20 and the third routing 30, the width a of the first routing 10 can be 3.5um, the width a of the second routing 20 can also be 3.5um, the width a of the third routing 30 can also be 3.5um, the minimum spacing between two adjacent third routings 30 can be 2.0um, and the overlapping dimension e of the third routing 30 with the first routing 10 and the second routing 20 can be 0.75um. The first routing 10, the second routing 20 and the third routing 30 are of equal width, and the dimension d4 of the arrangement unit of the four routings can be 4a-4e=11um.

[0106] In summary, (d3-d4) / d3=31.25%. When the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20 and the third routing 30, 31.25% of the space can be saved.

[0107] Please read and Fig.15 , Fig.16 , Fig.17 and Fig.18 In some embodiments, the display panel 100 includes a pixel structure disposed on a substrate 110, the pixel structure including a first pixel unit 310 for emitting red light, a second pixel unit 320 for emitting blue light, and a third pixel unit 330 for emitting green light.

[0108] See also Fig.15 and Fig.16 , the pixel structure of the display panel 100 can be arranged using a sub-pixel rendering (SPR) technology.

[0109] Among them, the multiple data lines include multiple data line groups, and the multiple data line groups are arranged in sequence along the first direction; wherein the data line group includes a first data line 350 and a second data line 360 ​​arranged in sequence along the first direction, the first pixel unit 310 and the second pixel unit 320 are connected to the first data line 350, the third pixel unit 330 is connected to the second data line 360, one of the two adjacent routings in the first fan-out part 210 is electrically connected to the first data line 350, and the other of the two adjacent routings in the first fan-out part 210 is electrically connected to the second data line 360.

[0110] For example, see Fig.15 , the first data line 350 can be connected to the first wiring 10 or the second wiring 20 , and the second data line 360 ​​can be connected to the third wiring 30 .

[0111] For example, see Fig.16 , the first data line 350 can be connected to the third wiring 30 , and the second data line 360 ​​can be connected to the first wiring 10 or the second wiring 20 .

[0112] See also Fig.17 and Fig.18 , the pixel structure of the display panel 100 may also adopt a traditional sub-pixel (Real RGB) arrangement.

[0113] The data line group includes a first data line 350, a second data line 360 ​​and a third data line 370 arranged in sequence along a first direction, the first pixel unit 310 is connected to the first data line 350, the second pixel unit 320 is connected to the second data line 360, the third pixel unit 330 is connected to the third data line 370, the first of the three adjacent routings in the first fan-out section 210 is electrically connected to the first data line 350, the second of the three adjacent routings in the first fan-out section 210 is electrically connected to the second data line 360, and the third of the three adjacent routings in the first fan-out section 210 is electrically connected to the third data line 370.

[0114] In this way, the fan-out wiring structure provided in the embodiment of the present application can be applicable to different pixel structures, and the display panel 100 using the fan-out wiring structure can have different pixel structures.

[0115] For example, see Figures 14 to 17 , a first routing line 10, a second routing line 20 and two third routing lines 30 form a routing unit 01 of a routing unit 01, and the routing unit 01 is arranged along the first direction. Among them, four routing lines form a routing unit 01 of a routing unit 01, and each third routing line 30 can overlap with the adjacent first routing line 10 and the second routing line 20 at the same time, thereby increasing the routing density and reducing the wiring space.

[0116] For example, see Fig.18 , Fig.19 and Fig. 20 A first routing line 10, a second routing line 20 and a third routing line 30 form a routing unit 01 of a routing unit 01, and the routing unit 01 is arranged along the first direction. When the routing width is small, for example, the routing width a is 1.8um, three routing lines form a routing unit 01 of a routing unit 01, and the routing unit 01 is arranged along the first direction, which can also increase the routing density and reduce the wiring space.

[0117] The following describes how to improve the routing density when three routing lines form a routing unit 01.

[0118] See also Fig.19 When the routing unit 01 includes two layers of routing, namely, the first routing 10 and the second routing 20, the width a of the first routing 10 can be 1.8um, the width a of the second routing 20 can also be 1.8um, the minimum spacing b between two adjacent second routings 20 can be 2.8um, and the spacing c between the first routing 10 and the second routing 20 can be 0.5um. The first routing 10 and the second routing 20 are of equal width, and the size of the arrangement unit of a single routing is the sum of the width a of the routing and the spacing c between the first routing 10 and the second routing 20. In this way, the size d5 of the arrangement unit of the six routings can be 6(a+c)=13.8um.

[0119] See also Fig. 20 When the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20 and the third routing 30, the width a of the first routing 10 can be 1.8um, the width a of the second routing 20 can also be 1.8um, the width a of the third routing 30 can also be 1.8um, the minimum spacing b between two adjacent third routings 30 can be 2.8um, the spacing c between the first routing 10 and the second routing 20 can be 0.5um, and the overlapping dimension e of the third routing 30 with the first routing 10 and the second routing 20 can be 0.65um. The first routing 10, the second routing 20 and the third routing 30 are of equal width, and the dimension d6 of the arrangement unit of the six routings can be 4a+4c=9.2um, or 6a-4e+2c=9.2um.

[0120] In summary, (d5-d6) / d5≈33.33%, and when the routing unit 01 includes three layers of routing, namely, the first routing 10, the second routing 20, and the third routing 30, about 33.33% of the space can be saved. Three routings form a routing unit 01, and the routing unit 01 is arranged along the first direction, which can also increase the routing density and thus reduce the wiring space.

[0121] See also Fig.21In some embodiments, in two adjacent fan-out parts, the routing in the first fan-out part is electrically connected to the routing in the second fan-out part, and the two electrically connected routings are arranged in different layers and are electrically connected through the connecting wire 40 arranged in the via. In this way, the heights of the routings in the two adjacent fan-out parts are different, which can avoid the large impedance difference of the routings in the two fan-out parts due to process fluctuations in the manufacturing process, thereby helping to reduce the impedance difference between adjacent fan-out parts.

[0122] Optionally, the wiring electrically connected in the first fan-out portion 210 and in the second fan-out portion 230 is arranged in different layers.

[0123] Optionally, the wiring electrically connected in the second fan-out portion 230 and the third fan-out portion 240 is arranged in different layers.

[0124] It can be understood that when the routing in the first fan-out section 210 is the first routing 10, the routing in the second fan-out section 230 can be the second routing 20 or the third routing 30; when the routing in the first fan-out section 210 is the second routing 20, the routing in the second fan-out section 230 can be the first routing 10 or the third routing 30; when the routing in the first fan-out section 210 is the third routing 30, the routing in the second fan-out section 230 can be the first routing 10 or the second routing 20. When the routing in the second fan-out section 230 is the first routing 10, the routing in the third fan-out section 240 may be the second routing 20 or the third routing 30; when the routing in the second fan-out section 230 is the second routing 20, the routing in the third fan-out section 240 may be the first routing 10 or the third routing 30; when the routing in the second fan-out section 230 is the third routing 30, the routing in the third fan-out section 240 may be the first routing 10 or the second routing 20.

[0125] Exemplarily, the material of the first routing 10 includes molybdenum (Mo). Exemplarily, the first routing 10 can be made of molybdenum. Exemplarily, the material of the second routing 20 includes molybdenum. Exemplarily, the second routing 20 can also be made of molybdenum. Exemplarily, the third routing 30 includes a first conductive sublayer and a second conductive sublayer stacked and connected along a third direction, and the material of one of the first conductive sublayer and the second conductive sublayer includes molybdenum, and the material of the other includes titanium. That is, the third routing 30 can be made of a molybdenum-titanium alloy. Among them, the molybdenum-titanium alloy of the third routing 30 is divided into a molybdenum layer and a titanium (Ti) layer, and the molybdenum layer is located on the side of the titanium layer close to the substrate 110. It can be understood that the first routing 10, the second routing 20 and the third routing 30 can also be made of other conductor materials.

[0126] In some embodiments, the display panel 100 provided in the embodiment of the present application further includes a driving unit, which can drive the pixel structure to emit light, and the driving unit can include a thin film transistor (Thin Film Transistor, TFT). Among them, the third wiring 30 can be the top gate of the thin film transistor, and the thin film transistor can be an Indium Gallium Zinc Oxide (IGZO) thin film transistor. In this way, the devices in the display panel 100 can be fully utilized.

[0127] The above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A fan-out wiring structure, applied to a display panel and used to connect data lines in a display area, characterized in that: The fan-out wiring structure includes a plurality of fan-out parts and a plurality of wirings at least arranged in the fan-out parts, the plurality of fan-out parts are located on the same side of the display area and are arranged in sequence in a direction away from the display area, and the plurality of fan-out parts include a first fan-out part close to the display area; Wherein, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, at least two adjacent routing lines overlap, and the overlapping size is greater than or equal to 0.3 μm; Alternatively, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, every two adjacent wirings are arranged with an interval, and the minimum size of the interval is less than or equal to 0.3 μm.

2. The fan-out routing structure according to claim 1, characterized in that: In the first fan-out portion and in the orthographic projection along the third direction, when at least two adjacent routing lines overlap, the minimum spacing between the two adjacent routing lines disposed in the same layer is greater than or equal to 1.0 μm; Preferably, the width of the trace is greater than or equal to 1.6 μm; Preferably, the fan-out routing structure includes a plurality of routing units, the routing unit includes a plurality of the routing lines, and the width of the routing unit is greater than or equal to 5.2 μm. Alternatively, in the first fan-out portion, and in an orthographic projection along the thickness direction of the display panel, when every two adjacent routing lines are arranged at intervals, every two adjacent routing lines in an orthographic projection along the thickness direction of the display panel are arranged in different layers; Preferably, the width of the wiring is greater than or equal to 1.2 μm.

3. The fan-out routing structure according to claim 1, wherein: The plurality of fan-out parts further include a second fan-out part, the second fan-out part is located on a side of the first fan-out part away from the display area, and within the second fan-out part and within the orthographic projection along the thickness direction of the display panel, every two adjacent routing lines are arranged at intervals; Preferably, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, the minimum spacing between two adjacent routing lines is a first distance; In the second fan-out portion and in the orthographic projection along the thickness direction of the display panel, the minimum spacing between two adjacent routing lines is a second distance; The first distance is smaller than the second distance; Preferably, the fan-out routing structure includes a plurality of routing units, the routing unit includes a plurality of the routings, and within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, two adjacent routing units overlap, or the minimum spacing between two adjacent routing units is a third distance, and the third distance is less than or equal to the second distance and greater than or equal to the first distance; And / or, the plurality of fan-out portions further include a third fan-out portion, the third fan-out portion being located on a side of the second fan-out portion away from the first fan-out portion, and within the third fan-out portion and within an orthographic projection along a thickness direction of the display panel, a minimum spacing between two adjacent routing lines is a fourth distance, and the fourth distance is greater than the first distance; And / or, in two adjacent fan-out parts, the routing in the first fan-out part is electrically connected to the routing in the second fan-out part, and the two electrically connected routings are arranged in different layers and are electrically connected through a connecting line arranged in a via; Preferably, the routing lines electrically connected in the first fan-out part and in the second fan-out part are arranged in different layers, and the routing lines electrically connected in the second fan-out part and in the third fan-out part are arranged in different layers.

4. The fan-out routing structure according to any one of claims 1 to 3, characterized in that: The routing unit includes a first routing, a second routing and a third routing which are arranged in sequence along the thickness direction of the display panel. Within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel, at least a portion of the third routing is located between the first routing and the second routing.

5. The fan-out routing structure according to claim 4, characterized in that: In the first fan-out portion, and in an orthographic projection along a thickness direction of the display panel, the third routing line overlaps with at least one of the first routing line and the second routing line; And / or, the material of the first routing includes molybdenum, the material of the second routing includes molybdenum, the third routing includes a first conductive sublayer and a second conductive sublayer stacked and connected along the thickness direction of the display panel, the material of one of the first conductive sublayer and the second conductive sublayer includes molybdenum, and the material of the other includes titanium.

6. The fan-out routing structure according to any one of claims 1 to 3, characterized in that: The wiring unit includes a first wiring, a second wiring and two third wirings, and the first wiring, the second wiring and the third wiring are sequentially arranged at intervals along the thickness direction of the display panel; In the routing unit, within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel; at least a portion of one of the third routings is located between the first routing and the second routing, and at least a portion of the second routing is located between two of the third routings.

7. The fan-out routing structure according to claim 6, characterized in that: Within the first fan-out portion and within the orthographic projection along the thickness direction of the display panel; one of the third routing lines overlaps with at least one of the first routing line and the second routing line, and / or the second routing line overlaps with at least one of the two third routing lines.

8. A display panel, characterized in that: comprising a display area and a non-display area surrounding the display area, substrate; A plurality of data lines are arranged on the substrate and located in the display area; The fan-out wiring structure according to any one of claims 1 to 7, wherein the wiring is electrically connected to the data line, and the fan-out portion is located in the non-display area.

9. The display panel according to claim 8, wherein: The display panel comprises a first pixel unit, a second pixel unit and a third pixel unit which are arranged on the substrate and emit light of different colors, and the plurality of data lines comprise a plurality of data line groups which are arranged adjacent to each other in sequence; The data line group includes a first data line and a second data line that are adjacently arranged, the first pixel unit and the second pixel unit are connected to the first data line, the third pixel unit is connected to the second data line, one of the two adjacent routing lines in the first fan-out portion is electrically connected to the first data line, and the other of the two adjacent routing lines in the first fan-out portion is electrically connected to the second data line; Alternatively, the data line group includes a first data line, a second data line, and a third data line that are adjacently arranged, the first pixel unit is connected to the first data line, the second pixel unit is connected to the second data line, the third pixel unit is connected to the third data line, the first of the three adjacent routings in the first fan-out section is electrically connected to the first data line, the second of the three adjacent routings in the first fan-out section is electrically connected to the second data line, and the third of the three adjacent routings in the first fan-out section is electrically connected to the third data line.

10. A display device, characterized in that: Comprising a display panel as claimed in claim 8 or 9.

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