Display panel, preparation method of display panel and electronic equipment
By adjusting the position of the edge part in the packaging unit of the display panel, it is ensured that the cathode of the light emitting unit of the post-process can continuously cover the packaging unit of the pre-process, which solves the problem of insufficient protection in the prior art and improves the display effect.
Patent Information
- Application Number
- CN202410742240.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-07
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2044-06-07
AI Technical Summary
The cathode of the light emitting unit of the existing display panel cannot continuously cover the packaging unit of the light emitting unit of the light emitting unit of the pre-process in the light emitting unit, resulting in the light emitting unit of the pre-process in the light emitting unit that cannot be fully protected, affecting the display effect.
By ensuring that the cathode of the light emitting unit of the post-process can continuously cover the package unit of the pre-process light emitting unit by the positive projection of the pre-process light emitting unit by the part of the pre-process light emitting unit.
It realizes better protection of the light emitting unit of the pre-process and improves the display effect of the display panel.
Smart Images

Figure CN119907569A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular, to a display panel, a method for preparing a display panel, and an electronic device. Background Art
[0002] Organic Light Emitting Diode (OLED) and flat panel display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages such as high image quality, power saving, thin body and wide application range, becoming the mainstream in display panels.
[0003] However, there are still some problems with display panels that need to be solved urgently. Summary of the invention
[0004] In order to overcome the technical problems mentioned in the above technical background, an embodiment of the present application provides a display panel, wherein the display panel includes:
[0005] An array substrate;
[0006] An isolation structure located at one side of the array substrate, wherein the isolation structure is provided with an isolation opening;
[0007] a light emitting unit at least partially located within the isolation opening;
[0008] a first encapsulation layer located on a side of the light-emitting unit away from the array substrate, the first encapsulation layer comprising a plurality of encapsulation units arranged at intervals, at least some of the encapsulation units extending from a side of the isolation structure to a side of the isolation structure away from the array substrate, the side of the isolation structure being a surface of the isolation structure facing the isolation opening;
[0009] In which, the packaging unit includes a edging portion located on the side of the isolation structure away from the array substrate, and the orthographic projection of the part of the edging portion away from the array substrate on the array substrate does not exceed the orthographic projection of the part of the edging portion close to the array substrate on the array substrate.
[0010] In some possible implementations, along a direction away from the array substrate, along a direction away from the array substrate, the encapsulation unit includes a first encapsulation sublayer, the first encapsulation sublayer is located at a portion of the isolation structure away from a side of the array substrate and is arranged obliquely away from a side of the isolation opening;
[0011] Preferably, the encapsulation unit further comprises a second encapsulation sublayer located on a side of the first encapsulation sublayer away from the array substrate, and the second encapsulation sublayer is located on a part of the isolation structure away from the array substrate and is arranged obliquely away from a side of the isolation opening;
[0012] Preferably, the orthographic projection of the second encapsulation sublayer on the array substrate is located within the orthographic projection of the first encapsulation sublayer on the array substrate;
[0013] Preferably, the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate, and the third encapsulation sublayer is located on a part of the isolation structure away from the array substrate and is inclined away from a side of the isolation opening;
[0014] Preferably, the orthographic projection of the third encapsulation sublayer on the array substrate is located within the orthographic projection of the second encapsulation sublayer on the array substrate;
[0015] Preferably, the edge portion is arranged obliquely away from the side of the isolation opening;
[0016] Preferably, the side surface of the edging portion away from the isolation opening comprises a step surface.
[0017] In some possible implementations, along a direction away from the array substrate, the edge portion of the encapsulation unit includes a first encapsulation sublayer and a second encapsulation sublayer, and the first encapsulation sublayer and the second encapsulation sublayer are in a step shape away from the isolation opening.
[0018] Preferably, the edge-wrapping portion of the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate, and the side surfaces of the second encapsulation sublayer and the third encapsulation sublayer away from the isolation opening are in a step shape.
[0019] In some possible implementations, the etching rates of the first encapsulation sublayer, the second encapsulation sublayer, and the third encapsulation sublayer increase in sequence.
[0020] In some possible implementations, the light transmittances of the first encapsulation sublayer and the second encapsulation sublayer are both greater than the light transmittance of the third encapsulation sublayer;
[0021] Preferably, the light transmittance of the first encapsulation sublayer is greater than the light transmittance of the second encapsulation sublayer.
[0022] In some possible implementations, along a direction perpendicular to the array substrate, a thickness of the third encapsulation sublayer is less than a thickness of the first encapsulation sublayer;
[0023] Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the second encapsulation sublayer;
[0024] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:6-1:4;
[0025] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the second encapsulation sublayer is 1:5-1:3;
[0026] Preferably, along a direction perpendicular to the array substrate, a thickness of the second encapsulation sublayer is less than a thickness of the first encapsulation sublayer;
[0027] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the second encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:2-5:6.
[0028] In some possible implementations, the material of the first encapsulation sublayer includes silicon oxide;
[0029] Preferably, the material of the second encapsulation sublayer includes silicon oxynitride;
[0030] Preferably, the material of the third encapsulation sublayer includes silicon nitride.
[0031] In some possible implementations, there is a gap between a side of the edge portion close to the array substrate and a side of the isolation structure away from the array substrate;
[0032] Preferably, adjacent packaging units are arranged at intervals on a side of the isolation structure away from the array substrate;
[0033] Preferably, the orthographic projection of the packaging unit on the array substrate covers the orthographic projection of the isolation opening on the array substrate.
[0034] In some possible implementations, the light-emitting unit includes a first electrode, a light-emitting portion, and a second electrode that are at least partially located in the isolation opening and are sequentially stacked in a direction away from the array substrate, and the second electrode is electrically connected to the isolation structure;
[0035] The display panel further comprises a pixel defining layer located on a side of the first electrode away from the array substrate, the isolation structure is located on a side of the pixel defining layer away from the array substrate; the pixel defining layer comprises a pixel opening exposing at least a portion of the first electrode, and the orthographic projection of the isolation structure on the array substrate is located between orthographic projections of two adjacent pixel openings on the array substrate;
[0036] Preferably, the orthographic projection of the pixel opening on the array substrate is located within the orthographic projection of the isolation opening on the array substrate.
[0037] In some possible implementations, the display panel further includes a second packaging layer located on a side of the first packaging layer away from the array substrate;
[0038] Preferably, the display panel further comprises a third packaging layer located on a side of the second packaging layer away from the array substrate;
[0039] Preferably, the materials of the first encapsulation layer and the third encapsulation layer both include inorganic materials;
[0040] Preferably, the second encapsulation layer comprises an organic material.
[0041] In some possible embodiments, the isolation structure includes a first isolation portion and a second isolation portion which are stacked in sequence in a direction away from the array substrate, and the orthographic projection of the side of the first isolation portion away from the array substrate on the array substrate is located within the orthographic projection of the second isolation portion on the array substrate.
[0042] In some possible implementations, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the array substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion;
[0043] Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes titanium metal.
[0044] In some possible implementations, the present application further provides a display panel, comprising:
[0045] An array substrate;
[0046] An isolation structure located at one side of the array substrate, wherein the isolation structure is provided with an isolation opening;
[0047] a light emitting unit at least partially located within the isolation opening;
[0048] a first encapsulation layer located on a side of the light-emitting unit away from the array substrate, the first encapsulation layer comprising a plurality of encapsulation units arranged at intervals, at least some of the encapsulation units extending from a side of the isolation structure to a side of the isolation structure away from the array substrate, the side of the isolation structure being a surface of the isolation structure facing the isolation opening;
[0049] Wherein, along the direction away from the array substrate, the encapsulation unit includes a plurality of encapsulation sublayers stacked in sequence, and the etching rates of the plurality of encapsulation sublayers increase in sequence along the direction away from the array substrate.
[0050] In some possible implementations, along a direction away from the array substrate, the encapsulation unit includes a first encapsulation sublayer and a second encapsulation sublayer which are sequentially stacked;
[0051] Preferably, the light transmittance of the first encapsulation sublayer is greater than the light transmittance of the second encapsulation sublayer;
[0052] Preferably, the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate;
[0053] The light transmittance of the first encapsulation sublayer and the second encapsulation sublayer are both greater than the light transmittance of the third encapsulation sublayer;
[0054] Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the first encapsulation sublayer;
[0055] Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the second encapsulation sublayer;
[0056] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:6-1:4;
[0057] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the second encapsulation sublayer is 1:5-1:3;
[0058] Preferably, along a direction perpendicular to the array substrate, a thickness of the second encapsulation sublayer is less than a thickness of the first encapsulation sublayer;
[0059] Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the second encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:2-5:6.
[0060] In some possible implementations, the present application further provides a method for preparing a display panel, the method comprising:
[0061] Providing an array substrate;
[0062] An isolation structure is formed on one side of the array substrate, wherein the isolation structure is provided with an isolation opening;
[0063] preparing a light-emitting unit, wherein at least a portion of the light-emitting unit is located in the isolation opening;
[0064] A first packaging layer is formed on a side of the light-emitting unit away from the array substrate, the first packaging layer includes a plurality of packaging units arranged at intervals, at least some of the packaging units extend from a side of the isolation structure to a side of the isolation structure away from the array substrate, the side of the isolation structure is a surface of the isolation structure facing the isolation opening; the packaging unit includes a edging portion located on a side of the isolation structure away from the array substrate, an orthographic projection of a portion of the edging portion away from the array substrate on the array substrate does not exceed an orthographic projection of a portion of the edging portion close to the array substrate on the array substrate.
[0065] In some possible implementations, the present application further provides an electronic device, which includes the display panel described in the present application, or includes a display panel prepared by the method for preparing the display panel described in the present application.
[0066] Compared with the prior art, this application has the following beneficial effects:
[0067] The present application provides a display panel, a method for preparing a display panel, and an electronic device. By positioning the orthographic projection of a portion of an edge portion away from an array substrate on an array substrate within the orthographic projection of a portion of the edge portion close to the array substrate on an array substrate, the cathode of a light-emitting unit of a subsequent process can continuously cover the packaging unit of a light-emitting unit of a preceding process, thereby better protecting the light-emitting unit of the preceding process and further improving the display effect of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0068] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0069] Figure 1 A schematic cross-sectional view of a display panel during the preparation process in the related art provided in an embodiment of the present application;
[0070] Figure 2 A schematic cross-sectional view of a display panel in the related art provided by an embodiment of the present application;
[0071] Figure 3 One of the cross-sectional schematic diagrams of a display panel provided in an embodiment of the present application;
[0072] Figure 4 One of the cross-sectional schematic diagrams of the display panel provided in the embodiment of the present application during the preparation process;
[0073] Figure 5 A second cross-sectional schematic diagram of a display panel provided in an embodiment of the present application;
[0074] Figure 6 The second cross-sectional schematic diagram of the display panel during the preparation process provided by the embodiment of the present application;
[0075] Figure 7 The third cross-sectional schematic diagram of the display panel provided in the embodiment of the present application;
[0076] Figure 8 The third cross-sectional schematic diagram of the display panel during the preparation process provided by the embodiment of the present application;
[0077] Fig. 9 The display panel provided in the embodiment of the present application includes a cross-sectional schematic diagram of a second encapsulation layer;
[0078] Fig.10 A cross-sectional schematic diagram of a display panel provided in an embodiment of the present application including a third encapsulation layer;
[0079] Fig.11 The isolation structure provided in the embodiment of the present application includes a cross-sectional schematic diagram of a three-layer structure;
[0080] Fig.12 A schematic diagram of a process for preparing a display panel provided in an embodiment of the present application;
[0081] Fig.13 A cross-sectional schematic diagram of forming a first electrode layer on one side of an array substrate provided in an embodiment of the present application;
[0082] Fig.14 A cross-sectional schematic diagram of a pixel defining material layer formed on a side of a first electrode layer away from an array substrate provided in an embodiment of the present application;
[0083] Fig.15 A cross-sectional schematic diagram of an isolation structure material layer formed on a side of a pixel defining material layer away from an array substrate provided in an embodiment of the present application;
[0084] Fig.16 A cross-sectional schematic diagram of etching an isolation structure material layer to form an isolation structure provided in an embodiment of the present application;
[0085] Fig.17 A cross-sectional schematic diagram of etching a pixel defining material layer to form a pixel defining layer provided in an embodiment of the present application;
[0086] Fig.18 A cross-sectional schematic diagram of a light-emitting portion formed in an isolation opening according to an embodiment of the present application;
[0087] Fig.19A cross-sectional schematic diagram of a second electrode located in an isolation opening formed on a side of a light emitting portion away from an array substrate provided in an embodiment of the present application.
[0088] Figure numerals: 1. array substrate; 2. pixel defining layer; 21. pixel opening; 3. isolation structure; 31. first isolation portion; 32. second isolation portion; 33. third isolation portion; 4. packaging structure; 41. first packaging film layer; 42. second packaging film layer; 5. first electrode; 6. light-emitting portion; 7. second electrode; 8. light-emitting unit; 81. first light-emitting unit; 82. second light-emitting unit; 9. first packaging layer; 901. edging portion; 91. first packaging sublayer; 92. second packaging sublayer; 93. third packaging sublayer; 10. isolation opening; 11. first packaging layer; 12. second packaging layer; 13. pixel defining material layer; 14. isolation structure material layer. DETAILED DESCRIPTION
[0089] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.
[0090] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for which protection is sought, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present application.
[0091] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0092] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, or the positions or positional relationships in which the inventive product is usually placed when in use. They are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present application. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.
[0093] It should be noted that, in the absence of conflict, different features in the embodiments of the present application may be combined with each other.
[0094] See also Figure 1 In the process of implementing the present invention, the inventors found the following problems in the related art. The display panel in the related art includes an array substrate 1, an isolation structure 3 located on one side of the array substrate 1, a light-emitting unit 8 located in an isolation opening 10 formed by the isolation structure 3, and a first encapsulation layer located on the side of the light-emitting unit 8 away from the array substrate 1, and the first encapsulation layer includes an encapsulation structure 4 covering the light-emitting unit 8. Among them, the encapsulation structure 4 includes a first encapsulation film layer 41 and a second encapsulation film layer 42 stacked in sequence in a direction away from the array substrate 1, and the first encapsulation film layer 41 shrinks inward relative to the second encapsulation film layer 42.
[0095] During the preparation process of the light-emitting unit 8, for example, according to the preparation order of the first light-emitting unit and the second light-emitting unit, when preparing the second light-emitting unit, the cathode of the second light-emitting unit will cover the side of the packaging structure 4 of the first light-emitting unit away from the array substrate 1, and the cathode of the second light-emitting unit can protect the packaging structure 4 of the first light-emitting unit.
[0096] However, since the first packaging film layer 41 of the first light-emitting unit shrinks inward relative to the second packaging film layer 42, the cathode of the second light-emitting unit cannot continuously cover the packaging structure 4 of the first light-emitting unit at the position where the first packaging film layer 41 shrinks inward relative to the second packaging film layer 42, thereby failing to completely protect the packaging structure 4 of the first light-emitting unit, and ultimately failing to completely protect the first light-emitting unit.
[0097] See also Figure 2 In the subsequent manufacturing process, since the cathode of the second light-emitting unit cannot completely protect the packaging structure 4 of the first light-emitting unit, the first light-emitting unit may be damaged, so that the cathode of the first light-emitting unit and the corresponding isolation structure 3 cannot be well overlapped, thereby affecting the display effect of the display panel.
[0098] In view of this, the present embodiment provides a solution that can improve the display effect of the display panel. The solution provided by the present embodiment is described in detail below.
[0099] See also Figure 3 This embodiment provides a display panel, which includes an array substrate 1, an isolation structure 3, a light-emitting unit 8 and a first encapsulation layer 9.
[0100] The array substrate 1 may include a substrate and a plurality of driving units located on one side of the substrate, and each driving unit may include one or more semiconductor switching devices. The semiconductor switching device may be formed by the cooperation of a plurality of film layers in the array substrate 1, for example, the semiconductor switching device may be a thin film transistor formed by the cooperation of a plurality of film layers.
[0101] The isolation structure 3 is located on one side of the array substrate 1 , and an isolation opening 10 is provided in the isolation structure 3 .
[0102] The composition, preparation and other contents of the isolation structure 3 are further described in patents PCT / CN2023 / 134518, 202310759370.2, 202310740412.8, 202310707209.0, 202311346196.5, 202311499823.9, 202310731471.9, and 202311091555.7 for reference.
[0103] At least part of the light emitting unit 8 is located in the isolation opening 10. The light emitting unit 8 may include a first light emitting unit and a second light emitting unit. The light emitting colors of the first light emitting unit and the second light emitting unit are different. For example, the light emitting color of the first light emitting unit may be red, and the light emitting color of the second light emitting unit may be green.
[0104] The first packaging layer 9 is located on the side of the light-emitting unit 8 away from the array substrate 1. The first packaging layer 9 includes a plurality of packaging units arranged at intervals. At least some of the packaging units extend from the side of the isolation structure 3 to the side of the isolation structure 3 away from the array substrate 1. The side of the isolation structure 3 is the surface of the isolation structure 3 facing the isolation opening 10.
[0105] Among them, the packaging unit includes a edging portion 901 located on the side of the isolation structure 3 away from the array substrate 1, and the orthographic projection of the part of the edging portion 901 away from the array substrate 1 on the array substrate 1 does not exceed the orthographic projection of the part of the edging portion 901 close to the array substrate 1 on the array substrate 1.
[0106] See also Figure 4According to the manufacturing sequence of the first light-emitting unit 81 and the second light-emitting unit 82, since the orthographic projection of the portion of the edge portion 901 of the packaging unit of the preceding process that is far from the array substrate 1 on the array substrate 1 is located within the orthographic projection of the portion of the edge portion 901 that is close to the array substrate 1 on the array substrate 1, that is, along the direction perpendicular to the array substrate 1, among all the cross sections of the edge portion 901 along the direction parallel to the array substrate 1, the orthographic projection of the cross section that is far from the array substrate 1 on the array substrate 1 is located within the orthographic projection of the cross section that is close to the array substrate 1. Therefore, the second electrode 7 of the second light-emitting unit 82 of the subsequent process, such as the cathode, can continuously cover the packaging unit corresponding to the first light-emitting unit 81 at the position of the edge portion 901, and the cathode of the second light-emitting unit 82 can completely cover the packaging unit of the first light-emitting unit 81, so that the first light-emitting unit 81 can be completely protected. In this way, when preparing the second light-emitting unit 82 in the post-process, the packaging unit of the first light-emitting unit 81 is not easily damaged, and thus the first light-emitting unit 81 is not easily damaged. Therefore, the cathode of the first light-emitting unit can be better overlapped with the corresponding isolation structure 3.
[0107] If the second light-emitting unit 82 is followed by a third light-emitting unit in a post-process, the second light-emitting unit 82 is not easily damaged due to the same principle as the first light-emitting unit 81 , and the cathode of the second light-emitting unit 82 can also be well overlapped with the corresponding isolation structure 3 .
[0108] If there is no third light emitting unit in a subsequent process after the second light emitting unit 82, the second light emitting unit 82 will not be damaged, and the cathode of the second light emitting unit 82 can also be well overlapped with the corresponding isolation structure 3. In this way, the cathodes of the light emitting units 8 of the display panel can be effectively overlapped with the corresponding isolation structure 3.
[0109] Based on the above design, in this embodiment, the cathode of the light-emitting unit 8 of the post-process can continuously cover the packaging unit of the light-emitting unit 8 of the pre-process by locating the orthographic projection of the part of the edging portion 901 away from the array substrate 1 on the array substrate 1 within the orthographic projection of the part of the edging portion 901 close to the array substrate 1 on the array substrate 1, thereby better protecting the light-emitting unit 8 of the pre-process and further improving the display effect of the display panel.
[0110] For some possible implementations, see again Figure 3The light-emitting unit 8 includes a first electrode 5, a light-emitting portion 6, and a second electrode 7 which are at least partially located in the isolation opening 10 and are sequentially stacked in a direction away from the array substrate 1, and the second electrode 7 is electrically connected to the isolation structure 3. The display panel also includes a pixel defining layer 2 located on a side of the first electrode 5 away from the array substrate 1, and the isolation structure 3 is located on a side of the pixel defining layer 2 away from the array substrate 1; the pixel defining layer 2 includes a pixel opening 21 exposing at least a portion of the first electrode 5, and the orthographic projection of the isolation structure 3 on the array substrate 1 is located between the orthographic projections of two adjacent pixel openings 21 on the array substrate 1, and the orthographic projection of the pixel opening 21 on the array substrate 1 is located within the orthographic projection of the isolation opening 10 on the array substrate 1.
[0111] When forming the light-emitting functional layer, the light-emitting functional layer will be separated by the isolation structure 3 to form a plurality of spaced light-emitting portions 6. When forming the second electrode layer, the second electrode layer will be separated by the isolation structure 3 to form a plurality of spaced second electrodes 7. The isolation structure 3 includes a conductive material. The second electrode 7 is electrically connected to the isolation structure 3. A first electrode 5, a light-emitting portion 6 and a second electrode 7 form a light-emitting unit 8. The first electrode 5 is an anode and the second electrode 7 is a cathode.
[0112] In some possible embodiments, there is a gap between the side of the edging portion 901 close to the array substrate 1 and the side of the isolation structure 3 away from the array substrate 1, adjacent packaging units are spaced apart on the side of the isolation structure 3 away from the array substrate 1, and the orthographic projection of the packaging unit on the array substrate 1 covers the orthographic projection of the isolation opening 10 on the array substrate 1.
[0113] During the patterning process of the light-emitting unit 8 , the first encapsulation layer 9 is disconnected at the isolation structure 3 to form an encapsulation unit, and the encapsulation unit can completely and independently encapsulate the corresponding light-emitting unit 8 , thereby improving the display characteristics of the display panel.
[0114] For some possible implementations, see again Figure 3 and Figure 4, along the direction away from the array substrate 1, the encapsulation unit includes a first encapsulation sublayer 91, the first encapsulation sublayer 91 is located at a part of the isolation structure 3 away from the array substrate 1 and is inclined away from the side of the isolation opening 10, the encapsulation unit also includes a second encapsulation sublayer 92 located at a side of the first encapsulation sublayer 91 away from the array substrate 1, the second encapsulation sublayer 92 is located at a part of the isolation structure 3 away from the array substrate 1 and is inclined away from the side of the isolation opening 10, the orthographic projection of the second encapsulation sublayer 92 on the array substrate 1 is located within the orthographic projection of the first encapsulation sublayer 91 on the array substrate 1, the encapsulation unit also includes a third encapsulation sublayer 93 located at a side of the second encapsulation sublayer 92 away from the array substrate 1, the third encapsulation sublayer 93 is located at a part of the isolation structure 3 away from the array substrate 1 and is inclined away from the side of the isolation opening 10, and the orthographic projection of the third encapsulation sublayer 93 on the array substrate 1 is located within the orthographic projection of the second encapsulation sublayer 92 on the array substrate 1.
[0115] In this way, the cathode of the second light-emitting unit 82 of the post-process can more easily and continuously cover the packaging unit corresponding to the first light-emitting unit 81 at the position of the edge portion 901, and the cathode of the second light-emitting unit 82 can more easily and completely cover the packaging unit of the first light-emitting unit 81, thereby providing more complete protection for the first light-emitting unit 81.
[0116] In some embodiments, please refer again to Figure 3 and Figure 4 The edge portion is inclined away from the side of the isolation opening 10. In this embodiment, the cathode of the second light emitting unit 82 of the post-process can continuously cover the packaging unit corresponding to the first light emitting unit 81 at the edge portion 901.
[0117] In other embodiments, see Figure 5 and Figure 6 , the side of the hemming portion away from the isolation opening 10 includes a step surface, and the first encapsulation sublayer 91, the second encapsulation sublayer 92, and the third encapsulation sublayer 93 are located on the side of the isolation structure 3 away from the array substrate 1 and are inclined away from the side of the isolation opening 10. In this embodiment, the cathode of the second light-emitting unit 82 of the post-process can continuously cover the encapsulation unit corresponding to the first light-emitting unit 81 at the position of the hemming portion 901.
[0118] In some other embodiments, see Figure 7 and Figure 8 , the side of the hemming portion away from the isolation opening 10 includes a step surface, and the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 are located at the part of the isolation structure 3 away from the side of the array substrate 1 and are vertically arranged away from the side of the isolation opening 10. In this embodiment, the cathode of the second light-emitting unit 82 of the post-process can continuously cover the encapsulation unit corresponding to the first light-emitting unit 81 at the position of the hemming portion 901.
[0119] Preferably, along the direction away from the array substrate 1, the encapsulation unit includes a first encapsulation sublayer 91, a second encapsulation sublayer 92 and a third encapsulation sublayer 93 which are stacked in sequence, and the etching rates of the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 increase successively.
[0120] Since the etching rates of the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 are increased in sequence, when etching the first encapsulation layer 9, the third encapsulation sublayer 93 will shrink relative to the second encapsulation sublayer 92, and the second encapsulation sublayer 92 will be inward relative to the first encapsulation sublayer 91. Since the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 are stacked in sequence in the direction away from the array substrate 1, after the light-emitting unit 8 is prepared, the orthographic projection of the portion of the edge portion 901 of the encapsulation unit away from the array substrate 1 on the array substrate 1 is located within the orthographic projection of the portion of the edge portion 901 close to the array substrate 1 on the array substrate 1, and it is also easier to form an inclined surface on the side of the edge portion 901 away from the isolation opening 10, so that the second electrode 7 of the second light-emitting unit 82 in the post-process, such as the cathode, can continuously cover the encapsulation unit corresponding to the first light-emitting unit 81 at the position of the edge portion 901, and the cathode of the second light-emitting unit 82 can completely cover the encapsulation unit of the first light-emitting unit 81, so that the first light-emitting unit 81 can be completely protected. In this way, the packaging unit of the first light-emitting unit 81 is not easily damaged when preparing the second light-emitting unit 82 in the post-process, so that the cathode of the first light-emitting unit can be better overlapped with the corresponding isolation structure 3, and finally the light-emitting unit 8 of the display panel is not easy to fail.
[0121] In some possible implementations, the transmittance of the first encapsulation sublayer 91 and the second encapsulation sublayer 92 are both greater than the transmittance of the third encapsulation sublayer 93 , and the transmittance of the first encapsulation sublayer 91 is greater than the transmittance of the second encapsulation sublayer 92 .
[0122] The material of the encapsulation unit in the related art may be made only of the material of the third encapsulation sublayer 93 , and the light transmittance of the material of the third encapsulation sublayer 93 is not good enough, thus affecting the optical properties of the display panel in the related art.
[0123] In the present embodiment, since the materials of some packaging units are replaced with the first packaging sublayer 91 and the second packaging sublayer 92 with better transmittance, the present embodiment can not only better ensure the morphology of the packaging unit and make the light-emitting unit 8 less likely to fail, but also improve the light transmittance of the packaging unit, and ultimately improve the optical properties of the display panel.
[0124] For some possible implementations, see again Figure 3, along a direction perpendicular to the array substrate 1 , a thickness H3 of the third encapsulation sublayer 93 is less than a thickness H1 of the first encapsulation sublayer 91 .
[0125] Since the transmittance of the third encapsulation sublayer 93 is lower than that of the first encapsulation sublayer 91, setting the third encapsulation sublayer thinner than the first encapsulation sublayer 91 can increase the proportion of the film layer with higher transmittance in the encapsulation unit, thereby further improving the transmittance of the encapsulation unit.
[0126] Specifically, the ratio of the thickness H3 of the third encapsulation sublayer 93 to the thickness H1 of the first encapsulation sublayer 91 is 1:6-1:4. For example, the ratio of the thickness H3 to the thickness H1 may be 1:4, 1:5 or 1:6, etc. Reasonable setting of the ratio of the thickness H3 to the thickness H1 can improve the light transmittance of the encapsulation unit without increasing the thickness of the encapsulation unit and ensuring the quality of the encapsulation unit.
[0127] Preferably, see again Figure 3 , along a direction perpendicular to the array substrate 1 , a thickness H3 of the third encapsulation sublayer 93 is less than a thickness H2 of the second encapsulation sublayer 92 .
[0128] Since the transmittance of the third encapsulation sublayer 93 is lower than that of the second encapsulation sublayer 92, setting the third encapsulation sublayer thinner than the second encapsulation sublayer 92 can increase the proportion of the film layer with higher transmittance in the encapsulation unit, thereby further improving the transmittance of the encapsulation unit.
[0129] Specifically, the ratio of the thickness H3 of the third encapsulation sublayer 93 to the thickness H2 of the second encapsulation sublayer 92 is 1:5-1:3. For example, the ratio of the thickness H3 to the thickness H2 may be 1:3, 1:4 or 1:5, etc. Reasonable setting of the ratio of the thickness H3 to the thickness H2 can improve the light transmittance of the encapsulation unit without increasing the thickness of the encapsulation unit and ensuring the quality of the encapsulation unit.
[0130] Preferably, see again Figure 3 , along a direction perpendicular to the array substrate 1 , a thickness H2 of the second encapsulation sublayer 92 is less than a thickness of the first encapsulation sublayer 91H1 .
[0131] Since the transmittance of the second encapsulation sublayer 92 is lower than that of the first encapsulation sublayer 91, setting the second encapsulation sublayer thinner than the first encapsulation sublayer 91 can increase the proportion of the film layer with higher transmittance in the encapsulation unit, thereby further improving the transmittance of the encapsulation unit.
[0132] Specifically, the ratio of the thickness H2 of the second encapsulation sublayer 92 to the thickness H1 of the first encapsulation sublayer 91 is 1:2-5:6. For example, the ratio of the thickness H2 to the thickness H1 may be 3:4, 3:5, 1:2, 4:5, 2:3 or 5:6, etc. Reasonable setting of the ratio of the thickness H2 to the thickness H1 can improve the light transmittance of the encapsulation unit without increasing the thickness of the encapsulation unit and ensuring the quality of the encapsulation unit.
[0133] Preferably, the material of the first encapsulation sublayer 91 includes silicon oxide, the material of the second encapsulation sublayer 92 includes silicon oxynitride, and the material of the third encapsulation sublayer 93 includes silicon nitride. Reasonable arrangement of the materials of the first encapsulation sublayer 91, the second encapsulation sublayer 92, and the third encapsulation sublayer 93 can provide the display effect and quality of the display panel.
[0134] For some possible implementations, see Fig. 9 and Fig.10 The display panel further includes a second encapsulation layer 11 located on a side of the first encapsulation layer 9 away from the array substrate 1 and a third encapsulation layer 12 located on a side of the second encapsulation layer 11 away from the array substrate 1. The materials of the first encapsulation layer 9 and the third encapsulation layer 12 both include inorganic materials, and the second encapsulation layer 11 includes organic materials.
[0135] The second encapsulation layer 11 and the third encapsulation layer 12 can achieve a better encapsulation effect on the light-emitting unit 8, thereby further improving the encapsulation quality of the display panel.
[0136] For some possible implementations, see again Fig.10 The isolation structure 3 includes a first isolation portion 31 and a second isolation portion 32 which are stacked in sequence in a direction away from the array substrate 1, and the orthographic projection of the side of the first isolation portion 31 away from the array substrate 1 on the array substrate 1 is located within the orthographic projection of the second isolation portion 32 on the array substrate 1.
[0137] Since the second isolation portion 32 is located on the side of the first isolation portion 31 away from the array substrate 1, and the lateral width of the second isolation portion 32 is greater than the lateral width of the first isolation portion 31, the second isolation portion 32 disconnects the light-emitting functional layer and the second electrode layer at the isolation structure 3. In this way, the isolation structure 3 formed by the first isolation portion 31 and the second isolation portion 32 can make it easier to package each light-emitting unit 8 independently.
[0138] For some possible implementations, see again Fig.10 , the second electrode 7 of the light-emitting unit 8 is electrically connected to the first isolation portion 31; the first isolation portion 31 includes a conductive material, and the second electrode 7 corresponding to the light-emitting unit 8 extends to contact the side wall of the first isolation portion 31 to achieve electrical connection between the second electrode 7 corresponding to the light-emitting unit 8 and the first isolation portion 31.
[0139] See also Fig.11 The isolation structure 3 further includes a third isolation portion 33 located on a side of the first isolation portion 31 facing the array substrate 1 , and the second electrode 7 of the light emitting unit 8 is electrically connected to the third isolation portion 33 .
[0140] The third isolation portion 33 includes a conductive material, and the second electrode 7 corresponding to the light emitting unit 8 extends to contact the side wall of the third isolation portion 33 to achieve electrical connection between the second electrode 7 corresponding to the light emitting unit 8 and the third isolation portion 33 .
[0141] Specifically, the material of the third isolation portion 33 includes molybdenum metal; and / or, the material of the first isolation portion 31 includes aluminum metal; and / or, the material of the second isolation portion 32 includes titanium metal. In this way, when the isolation structure 3 separates the second electrode layer into the second electrode 7, the second electrode 7 is more easily electrically connected to the first isolation portion 31 and / or the third isolation portion 33.
[0142] For some possible implementations, see again Figure 3 and Figure 4 The present application also provides a display panel, which includes an array substrate 1, an isolation structure 3, a light-emitting unit 8 and a first encapsulation layer 9.
[0143] The isolation structure 3 is located at one side of the array substrate 1 . The isolation structure 3 is provided with an isolation opening 10 . At least part of the light emitting units 8 are located in the isolation opening 10 .
[0144] The first encapsulation layer 9 is located on a side of the light emitting unit 8 away from the array substrate 1. The first encapsulation layer 9 includes a plurality of encapsulation units arranged at intervals. At least some of the encapsulation units extend from the side of the isolation structure 3 to the side of the isolation structure 3 away from the array substrate 1. The side of the isolation structure 3 is the surface of the isolation structure 3 facing the isolation opening 10.
[0145] Wherein, along the direction away from the array substrate 1 , the encapsulation unit includes a plurality of encapsulation sublayers stacked in sequence, and the etching rate of the plurality of encapsulation sublayers increases in sequence along the direction away from the array substrate 1 .
[0146] In the direction away from the array substrate 1, the encapsulation unit includes a first encapsulation sublayer 91, a second encapsulation sublayer 92 and a third encapsulation sublayer 93 which are stacked in sequence, and the etching rates of the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 increase successively.
[0147] Since the etching rates of the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 increase in sequence, when etching the first encapsulation layer 9, the third encapsulation sublayer 93 will shrink relative to the second encapsulation sublayer 92, and the second encapsulation sublayer 92 will be inward relative to the first encapsulation sublayer 91. Since the first encapsulation sublayer 91, the second encapsulation sublayer 92 and the third encapsulation sublayer 93 are stacked in sequence in a direction away from the array substrate 1, after the light-emitting unit 8 is prepared, the side of the edge portion 901 of the encapsulation unit facing the isolation opening 10 will form an inclined surface inclined in a direction away from the isolation opening 10.
[0148] Please see again Figure 4 Since the edge portion 901 of the packaging unit of the front process is tilted toward the side of the isolation opening 10, the cathode of the second light-emitting unit 82 of the back process can continuously cover the corresponding packaging unit of the first light-emitting unit 81 at the edge portion 901, and the cathode of the second light-emitting unit 82 can completely cover the packaging unit of the first light-emitting unit 81, so that the packaging unit of the first light-emitting unit 81 can be completely protected. In this way, when preparing the second light-emitting unit 82 of the back process, it is not easy to damage the packaging unit of the first light-emitting unit 81, and it is not easy to damage the first light-emitting unit 81, so that the cathode of the first light-emitting unit 81 can be better overlapped with the corresponding isolation structure 3.
[0149] If the second light-emitting unit 82 is followed by a third light-emitting unit in a post-process, the second light-emitting unit 82 is not easily damaged due to the same principle as the first light-emitting unit 81 , and the cathode of the second light-emitting unit 82 can also be well overlapped with the corresponding isolation structure 3 .
[0150] If there is no third light emitting unit in a post-process after the second light emitting unit 82, the second light emitting unit 82 will not be damaged, and the cathode of the second light emitting unit 82 can also be well overlapped with the corresponding isolation structure 3. In this way, the cathodes of the light emitting units 8 of the display panel can be effectively overlapped with the corresponding isolation structure 3, thereby improving the display effect of the display panel.
[0151] In summary, the present application tilts the edging portion 901 of the packaging unit toward the side of the isolation opening 10, so that the cathode of the light-emitting unit 8 of the post-process can continuously cover the light-emitting unit 8 of the pre-process, thereby better protecting the light-emitting unit 8 of the pre-process and further improving the display effect of the display panel.
[0152] For some possible implementations, see Fig.12 The present application also provides a method for preparing a display panel, the method comprising:
[0153] S10: providing an array substrate 1.
[0154] The array substrate 1 may include a substrate and a plurality of driving units located on one side of the substrate, and each driving unit may include one or more semiconductor switching devices. The semiconductor switching device may be formed by the cooperation of a plurality of film layers in the array substrate 1, for example, the semiconductor switching device may be a thin film transistor formed by the cooperation of a plurality of film layers.
[0155] S11 : forming an isolation structure 3 on one side of the array substrate 1 , wherein the isolation structure 3 is provided with an isolation opening 10 .
[0156] See also Fig.13 A first electrode layer is formed on one side of the array substrate 1 , and the first electrode layer includes a plurality of first electrodes 5 arranged at intervals.
[0157] See also Fig.14 A pixel defining material layer 13 is formed on a side of the first electrode layer away from the array substrate 1 .
[0158] See also Fig.15 , an isolation structure material layer 14 is formed on a side of the pixel defining material layer 13 away from the array substrate 1 .
[0159] See also Fig.16 , etching the isolation structure material layer 14 to form the isolation structure 3.
[0160] See also Fig.17 , the pixel defining material layer 13 is etched to form a pixel defining layer 2, the pixel defining layer 2 includes a pixel opening 21 exposing at least a portion of the first electrode 5, the orthographic projection of the isolation structure 3 on the array substrate 1 is located between the orthographic projections of two adjacent pixel openings 21 on the array substrate 1; the orthographic projection of the pixel opening 21 on the array substrate 1 is located within the orthographic projection of the isolation opening 10 on the array substrate 1.
[0161] S12 : preparing the light-emitting unit 8 , wherein at least a portion of the light-emitting unit 8 is located in the isolation opening 10 .
[0162] See also Fig.18 , a light emitting portion 6 is formed in the isolation opening 10 .
[0163] The light-emitting functional layer is disconnected at the isolation structure 3 , so that at least part of the light-emitting functional layer is located in the isolation opening 10 to form a light-emitting portion 6 . By controlling the evaporation angle, the light-emitting portion 6 is prevented from contacting the isolation structure 3 .
[0164] See also Fig.19 A second electrode 7 is formed in the isolation opening 10 on a side of the light emitting portion 6 away from the array substrate 1 .
[0165] The second electrode layer is disconnected at the isolation structure 3, so that at least part of the second electrode layer is located in the isolation opening 10 to form the second electrode 7. By controlling the evaporation angle, the second electrode 7 can be extended from the isolation opening 10 to electrically contact the isolation structure 3 to connect adjacent second electrodes 7 or connect the second electrode 7 to other circuits. In this way, the manufacturing difficulty of the display panel can be reduced.
[0166] S13: A first packaging layer 9 is formed on a side of the light-emitting unit 8 away from the array substrate 1, wherein the first packaging layer 9 includes a plurality of packaging units arranged at intervals, wherein at least some of the packaging units extend from the side of the isolation structure 3 to the side of the isolation structure 3 away from the array substrate 1, and the side of the isolation structure 3 is a surface of the isolation structure 3 facing the isolation opening 10; the packaging unit includes a edging portion 901 located on a side of the isolation structure 3 away from the array substrate 1, and the orthographic projection of the portion of the edging portion 901 away from the array substrate 1 on the array substrate 1 does not exceed the orthographic projection of the portion of the edging portion 901 close to the array substrate 1 on the array substrate 1.
[0167] Please see again Figure 4 In the process of forming the light-emitting unit 8 and the packaging unit, since the orthographic projection of the portion of the edge portion 901 of the packaging unit of the previous process away from the array substrate 1 on the array substrate 1 does not exceed the orthographic projection of the portion of the edge portion 901 close to the array substrate 1 on the array substrate 1, that is, along the direction perpendicular to the array substrate 1, in all cross sections of the edge portion 901 along the direction parallel to the array substrate 1, the orthographic projection of the cross section on the side away from the array substrate 1 on the array substrate 1 is located within the orthographic projection of the cross section on the side close to the array substrate 1. Therefore, the second electrode 7 of the second light-emitting unit 82 of the post-process, such as the cathode, can continuously cover the packaging unit corresponding to the first light-emitting unit 81 at the position of the edge portion 901, and the cathode of the second light-emitting unit 82 can completely cover the packaging unit of the first light-emitting unit 81, so that the first light-emitting unit 81 can be completely protected. In this way, when preparing the second light-emitting unit 82 of the post-process, it is not easy to damage the packaging unit of the first light-emitting unit 81, and it is not easy to damage the first light-emitting unit 81, so that the cathode of the first light-emitting unit 81 can be better overlapped with the corresponding isolation structure 3. Finally, the display panel formed by the above method is as follows Figure 3 As shown, the display effect of the display panel formed by this method.
[0168] In some possible implementations, the present application further provides an electronic device, the electronic device comprising the display panel of the present application, or comprising a display panel prepared by the method for preparing a display panel of the present application. The electronic device may include a device with image processing capabilities, such as a server, a personal computer, a laptop computer, etc. Since the electronic device comprises the display panel of the present application, the display effect of the electronic device is better.
[0169] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0170] The above-mentioned embodiments only express several implementation methods of the present invention, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for ordinary technicians in this field, several variations and improvements can be made without departing from the concept of the present invention, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the patent of the present invention shall be subject to the attached claims.
Claims
1. A display panel, characterized in that: The display panel comprises: An array substrate; An isolation structure located at one side of the array substrate, wherein the isolation structure is provided with an isolation opening; a light emitting unit at least partially located within the isolation opening; A first packaging layer located at a side of the light emitting unit away from the array substrate, the first packaging layer comprising a plurality of packaging units arranged at intervals; In which, the packaging unit includes a edging portion located on the side of the isolation structure away from the array substrate, and the orthographic projection of the part of the edging portion away from the array substrate on the array substrate does not exceed the orthographic projection of the part of the edging portion close to the array substrate on the array substrate.
2. The display panel according to claim 1, characterized in that: The encapsulation unit comprises a first encapsulation sublayer, which is located at a portion of the isolation structure away from the array substrate and is inclined away from the side of the isolation opening; Preferably, the encapsulation unit further comprises a second encapsulation sublayer located on a side of the first encapsulation sublayer away from the array substrate, and the second encapsulation sublayer is located on a part of the isolation structure away from the array substrate and is arranged obliquely away from a side of the isolation opening; Preferably, the orthographic projection of the second encapsulation sublayer on the array substrate is located within the orthographic projection of the first encapsulation sublayer on the array substrate; Preferably, the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate, and the third encapsulation sublayer is located on a part of the isolation structure away from the array substrate and is inclined away from a side of the isolation opening; Preferably, the orthographic projection of the third encapsulation sublayer on the array substrate is located within the orthographic projection of the second encapsulation sublayer on the array substrate; Preferably, the edge portion is arranged obliquely away from the side of the isolation opening; Preferably, the side of the hemming portion away from the isolation opening comprises a step surface; Preferably, at least part of the packaging unit extends from a side surface of the isolation structure to a side of the isolation structure away from the array substrate, and the side surface of the isolation structure is a surface of the isolation structure facing the isolation opening.
3. The display panel according to claim 1, characterized in that: Along a direction away from the array substrate, the edge portion of the encapsulation unit includes a first encapsulation sublayer and a second encapsulation sublayer, and the sides of the first encapsulation sublayer and the second encapsulation sublayer away from the isolation opening are in a step shape; Preferably, the edge-wrapping portion of the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate, and the side surfaces of the second encapsulation sublayer and the third encapsulation sublayer away from the isolation opening are in a step shape.
4. The display panel according to claim 2, characterized in that: The etching rates of the first encapsulation sublayer, the second encapsulation sublayer and the third encapsulation sublayer increase in sequence.
5. The display panel according to claim 2, characterized in that: The light transmittance of the first encapsulation sublayer and the second encapsulation sublayer are both greater than the light transmittance of the third encapsulation sublayer; Preferably, the light transmittance of the first encapsulation sublayer is greater than the light transmittance of the second encapsulation sublayer.
6. The display panel according to any one of claims 2 to 5, characterized in that: Along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the first encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the second encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:6-1:4; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the second encapsulation sublayer is 1:5-1:3; Preferably, along a direction perpendicular to the array substrate, a thickness of the second encapsulation sublayer is less than a thickness of the first encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the second encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:2-5:
6.
7. The display panel according to any one of claims 2 to 5, characterized in that: The material of the first encapsulation sublayer includes silicon oxide; Preferably, the material of the second encapsulation sublayer includes silicon oxynitride; Preferably, the material of the third encapsulation sublayer includes silicon nitride.
8. The display panel according to any one of claims 1 to 5, characterized in that: There is a gap between a side of the edge portion close to the array substrate and a side of the isolation structure away from the array substrate; Preferably, adjacent packaging units are arranged at intervals on a side of the isolation structure away from the array substrate; Preferably, the orthographic projection of the packaging unit on the array substrate covers the orthographic projection of the isolation opening on the array substrate.
9. The display panel according to any one of claims 1 to 5, characterized in that: The light-emitting unit comprises a first electrode, a light-emitting portion, and a second electrode which are at least partially located in the isolation opening and are sequentially stacked in a direction away from the array substrate, and the second electrode is electrically connected to the isolation structure; Preferably, the display panel further comprises a pixel defining layer located on a side of the first electrode away from the array substrate, and the isolation structure is located on a side of the pixel defining layer away from the array substrate; the pixel defining layer comprises a pixel opening exposing at least a portion of the first electrode, and the orthographic projection of the isolation structure on the array substrate is located between the orthographic projections of two adjacent pixel openings on the array substrate; Preferably, the orthographic projection of the pixel opening on the array substrate is located within the orthographic projection of the isolation opening on the array substrate.
10. The display panel according to any one of claims 1 to 5, characterized in that: The display panel further comprises a second packaging layer located on a side of the first packaging layer away from the array substrate; Preferably, the display panel further comprises a third packaging layer located on a side of the second packaging layer away from the array substrate; Preferably, the materials of the first encapsulation layer and the third encapsulation layer both include inorganic materials; Preferably, the second encapsulation layer comprises an organic material.
11. The display panel according to any one of claims 1 to 5, characterized in that: The isolation structure includes a first isolation portion and a second isolation portion which are stacked in sequence in a direction away from the array substrate, wherein the orthographic projection of the first isolation portion on the array substrate at a side away from the array substrate is located within the orthographic projection of the second isolation portion on the array substrate.
12. The display panel according to claim 11, characterized in that: The second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or the isolation structure further includes a third isolation portion located on a side of the first isolation portion facing the array substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum metal; and / or the material of the first isolation portion includes aluminum metal; and / or the material of the second isolation portion includes titanium metal.
13. A display panel, characterized in that: The display panel comprises: An array substrate; An isolation structure located at one side of the array substrate, wherein the isolation structure is provided with an isolation opening; a light emitting unit at least partially located within the isolation opening; A first packaging layer located at a side of the light emitting unit away from the array substrate, the first packaging layer comprising a plurality of packaging units arranged at intervals; Wherein, along the direction away from the array substrate, the encapsulation unit includes a plurality of encapsulation sublayers stacked in sequence, and the etching rates of the plurality of encapsulation sublayers increase in sequence along the direction away from the array substrate.
14. The display panel according to claim 13, characterized in that: Along a direction away from the array substrate, the encapsulation unit comprises a first encapsulation sublayer and a second encapsulation sublayer which are stacked in sequence; Preferably, the light transmittance of the first encapsulation sublayer is greater than the light transmittance of the second encapsulation sublayer; Preferably, the encapsulation unit further comprises a third encapsulation sublayer located on a side of the second encapsulation sublayer away from the array substrate; Preferably, the light transmittance of the first encapsulation sublayer and the second encapsulation sublayer are both greater than the light transmittance of the third encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the first encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, the thickness of the third encapsulation sublayer is less than the thickness of the second encapsulation sublayer; Preferably, at least part of the packaging unit extends from a side surface of the isolation structure to a side of the isolation structure away from the array substrate, and the side surface of the isolation structure is a surface of the isolation structure facing the isolation opening; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:6-1:4; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the third encapsulation sublayer to a thickness of the second encapsulation sublayer is 1:5-1:3; Preferably, along a direction perpendicular to the array substrate, a thickness of the second encapsulation sublayer is less than a thickness of the first encapsulation sublayer; Preferably, along a direction perpendicular to the array substrate, a ratio of a thickness of the second encapsulation sublayer to a thickness of the first encapsulation sublayer is 1:2-5:
6.
15. A method for preparing a display panel, characterized in that: The method comprises: Providing an array substrate; An isolation structure is formed on one side of the array substrate, wherein the isolation structure is provided with an isolation opening; preparing a light-emitting unit, wherein at least part of the light-emitting unit is located in the isolation opening; Forming a first encapsulation layer on a side of the light emitting unit away from the array substrate, the first encapsulation layer comprising a plurality of encapsulation units arranged at intervals; The packaging unit includes a edging portion located on a side of the isolation structure away from the array substrate, and the orthographic projection of a portion of the edging portion away from the array substrate on the array substrate does not exceed the orthographic projection of a portion of the edging portion close to the array substrate on the array substrate.
16. An electronic device, characterized in that: The electronic device comprises the display panel according to any one of claims 1 to 14, or comprises a display panel prepared by the method for preparing a display panel according to claim 15.
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