Display device

Abstract

The invention discloses a display device which is characterized in that a first touch control chip is electrically connected with a self-capacitance electrode layer and arranged in a frame area, a second touch control chip is electrically connected with a mutual capacitance electrode layer and arranged in the frame area, and the first touch control chip is electrically connected with a first touch control chip and a second touch control chip. The first touch control chip and the second touch control chip are located in frame areas on different sides of the display device, and the first touch control chip and the second touch control chip are oppositely arranged, so that the frame area where the first touch control chip is located can be relatively small, and the width of the frame area where the second touch control chip is located can be relatively small. The problem that the width of the frame area of the display device is increased due to the fact that the first touch control chip and the second touch control chip are located in the frame area on the same side of the display device and the wire outlet space of the frame area where the first touch control chip and the second touch control chip are located is increased at the same time is solved, and therefore the narrow frame of the display device can be achieved easily.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display device. Background Art

[0002] Display devices using self-capacitive touch and mutual-capacitive touch technologies need to use touch signal lines to electrically connect self-capacitive touch electrodes, mutual-capacitive touch electrodes and touch chips. The touch signal lines of conventional display devices using self-capacitive touch and mutual-capacitive touch technologies occupy a large space, which is not conducive to achieving a narrow frame of the display device. Summary of the invention

[0003] The embodiments of the present application provide a display device to improve the problem that a large space occupied by a touch signal line is not conducive to realizing a narrow frame of the display device.

[0004] An embodiment of the present application provides a display device, the display device includes a display area and a frame area, the display device also includes a display panel and a touch panel, the touch panel is arranged on the display panel, and the touch panel includes:

[0005] Touch control substrate;

[0006] A self-capacitive electrode layer, wherein the self-capacitive electrode layer is disposed on a side of the touch control substrate close to the display panel;

[0007] A mutual capacitance electrode layer, wherein the mutual capacitance electrode layer is disposed on a side of the touch control substrate away from the display panel;

[0008] A first touch chip, the first touch chip is electrically connected to the self-capacitive electrode layer, and the first touch chip is arranged in the frame area;

[0009] a second touch chip, the second touch chip is electrically connected to the mutual capacitance electrode layer, and the first touch chip is arranged in the frame area,

[0010] The first touch control chip and the second touch control chip are located in frame areas on different sides of the display device, and the first touch control chip and the second touch control chip are arranged opposite to each other.

[0011] Furthermore, the display panel includes a source driver, and the source driver is located in the frame area;

[0012] The first touch control chip and the source driver are located on the same side, and the second touch control chip and the source driver are located on different sides.

[0013] Furthermore, the display panel includes a source driver, and the source driver is located in the frame area;

[0014] The first touch control chip and the source driver are located at different sides, and the second touch control chip and the source driver are located at the same side.

[0015] Furthermore, the self-capacitive electrode layer includes a plurality of self-capacitive electrodes, and the plurality of self-capacitive electrodes are arranged at intervals in the direction of the columns of the display device;

[0016] The mutual capacitance electrode layer includes a plurality of first sub-mutual capacitance electrodes, and the plurality of first sub-mutual capacitance electrodes are arranged at intervals in the direction of the columns of the display device;

[0017] The touch panel also includes:

[0018] a plurality of first touch signal lines, wherein portions of the plurality of first touch signal lines located in the display area are spaced apart in a row direction of the display device, each of the first touch signal lines is electrically connected to each of the self-capacitive electrodes, and the first touch signal lines are electrically connected to the first touch chip;

[0019] a plurality of second touch signal lines, wherein the portions of the plurality of second touch signal lines located in the display area are spaced apart in the direction of the rows of the display device, each of the second touch signal lines is electrically connected to each column of the first sub-mutual capacitance electrodes, and the second touch signal lines are electrically connected to the second touch chip;

[0020] Wherein, a plurality of the first touch signal lines are arranged between two adjacent second touch signal lines.

[0021] Furthermore, the mutual capacitance electrode layer further includes N rows of second sub-mutual capacitance electrodes;

[0022] The touch panel further includes N rows of third touch signal lines, each of the third touch signal lines is electrically connected to each row of the second sub-mutual capacitance electrodes, and the third touch signal lines are electrically connected to the second touch chip;

[0023] The display panel also includes a first gate driving circuit and N rows of first scanning signal lines, the first gate driving circuit includes a multi-stage electrically connected first shift register, each stage of the first shift register is electrically connected to each of the first scanning signal lines, and each stage of the first shift register is electrically connected to each of the third touch signal lines.

[0024] Furthermore, the display device further includes a plurality of first thin film transistors, and one of the first thin film transistors is electrically connected to one level of the first shift register and one of the third touch signal lines.

[0025] Furthermore, in the top view of the display device, a portion of the third touch signal line located in the display area does not overlap with the first scan signal line.

[0026] Furthermore, the mutual capacitance electrode layer further includes 2N rows of third sub-mutual capacitance electrodes;

[0027] The touch panel further includes 2N rows of fourth touch signal lines, each of the fourth touch signal lines is electrically connected to each row of the third sub-mutual capacitance electrodes, and the fourth touch signal lines are electrically connected to the second touch chip;

[0028] The display panel further includes a second gate driving circuit and 2N rows of second scanning signal lines, the second gate driving circuit includes a plurality of electrically connected second shift registers, each stage of the second shift register is electrically connected to each of the second scanning signal lines, and each stage of the second shift register is electrically connected to each of the fourth touch signal lines;

[0029] The first gate driving circuit and the second gate driving circuit are located in frame areas on different sides of the display device, and the first gate driving circuit and the second gate driving circuit are arranged opposite to each other.

[0030] Furthermore, the display device further includes a plurality of second thin film transistors, and a second thin film transistor is electrically connected to a stage of the second shift register and a fourth touch signal line.

[0031] Furthermore, in the top view of the display device, a portion of the fourth touch signal line located in the display area does not overlap with the second scan signal line.

[0032] Beneficial effects of this application:

[0033] The present application provides a display device, which comprises the following steps: providing the first touch chip to be electrically connected to the self-capacitive electrode layer, the first touch chip to be arranged in the frame area, the second touch chip to be electrically connected to the mutual-capacitive electrode layer, the first touch chip to be arranged in the frame area, the first touch chip and the second touch chip to be located in frame areas on different sides of the display device, and the first touch chip and the second touch chip to be arranged relative to each other, so that the frame area where the first touch chip is located can be relatively small, and the width of the frame area where the second touch chip is located can be relatively small, thereby avoiding the problem that the first touch chip and the second touch chip are located in the frame area on the same side of the display device, resulting in an increase in the wire outlet space of the frame area where the first touch chip and the second touch chip are located at the same time, and causing an increase in the width of the frame area of ​​the display device, thereby facilitating the realization of a narrow frame of the display device. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 is a schematic diagram of a display device of the present application;

[0035] Figure 2 yes Figure 1A cross-sectional view of the display device shown;

[0036] Figure 3 is a schematic diagram of the positions of the first touch chip and the second touch chip of the display device of the present application;

[0037] Figure 4 is a schematic diagram of the connection between the third touch signal line and the first shift register of the display device of the present application;

[0038] Figure 5 is a schematic diagram of the connection between the fourth touch signal line and the second shift register of the display device of the present application;

[0039] Figure 6 is a schematic diagram of the positions of the self-capacitive electrode layer and the mutual-capacitive electrode layer of the touch panel of the display device of the present application;

[0040] Figure 7 It is a schematic diagram of the arrangement of the first sub-mutual capacitance electrode, the second sub-mutual capacitance electrode and the third sub-mutual capacitance electrode of the mutual capacitance electrode layer of the touch panel of the display device of the present application.

[0041] 10-display device; 100-display panel, 110-source driver, 120-first gate drive circuit, 121-first shift register, 130-first scan signal line, 140-second gate drive circuit, 141-second shift register, 150-second scan signal line, 160-clock signal line; 200-touch panel; 210-touch substrate, 220-self-capacitive electrode layer, 221-self-capacitive electrode, 230-mutual-capacitive electrode layer, 231-first sub-mutual-capacitive electrode, 232-second sub-mutual-capacitive electrode, 233-third sub-mutual-capacitive electrode, 240-first touch signal line, 250-second touch signal line, 260-third touch signal line, 270-fourth touch signal line; 300-first touch chip; 400-second touch chip; 500-first thin film transistor; 600-second thin film transistor. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. The technical solutions described below are only used to explain and illustrate the ideas of the present application and should not be regarded as limiting the scope of protection of the present application.

[0043] In addition, the terms "first", "second" and similar words do not indicate any order, quantity or importance, but are only used to distinguish different technical features. The term "plurality" and similar words mean two or more, unless otherwise clearly defined.

[0044] The first embodiment of the present application provides a first display device 10, referring to Figure 1 , Figure 2 , Figure 3 ,and Figure 6 The display device 10 includes a display area AA and a frame area BB. The display device 10 also includes a display panel 100 and a touch panel 200. The touch panel 200 is arranged on the display panel 100. The touch panel 200 includes: a touch substrate 210, a self-capacitive electrode layer 220, a mutual-capacitive electrode layer 230, a first touch chip 300 and a second touch chip 400.

[0045] Specifically, the self-capacitive electrode layer 220 is arranged on a side of the touch substrate 210 close to the display panel 100; the mutual-capacitive electrode layer 230 is arranged on a side of the touch substrate 210 away from the display panel 100; the first touch chip 300 is electrically connected to the self-capacitive electrode layer 220, and the first touch chip 300 is arranged in the border area BB; the second touch chip 400 is electrically connected to the mutual-capacitive electrode layer 230, and the first touch chip 300 is arranged in the border area BB, wherein the first touch chip 300 and the first touch chip 300 are located in the border area BB on different sides of the display device 10, and the first touch chip 300 and the second touch chip 400 are arranged opposite to each other; specifically, the display panel 100 includes a source driver 110, and the source driver 110 is located in the border area BB; wherein the first touch chip 300 and the source driver 110 are located on the same side, and the second touch chip 400 and the source driver 110 are located on different sides.

[0046] Since each self-capacitive electrode 221 of the self-capacitive electrode layer 220 of the display device 10 needs to be electrically connected to a touch signal line, and each column or row of mutual-capacitive touch electrodes only needs to be electrically connected to one touch signal line, the self-capacitive touch technology and the mutual-capacitive touch technology need to set up a large number of touch signal lines, occupying a large amount of line outlet space. However, the line outlet space occupied by the self-capacitive touch technology is larger than the line outlet space occupied by the mutual-capacitive touch technology. When the first touch chip 300 and the second touch chip 400 are located in the frame area BB on the same side of the display device 10, the line outlet space of the frame area BB is increased, resulting in an increase in the width of the frame area BB of the display device 10, which is conducive to realizing a narrow frame of the display device 10. Therefore, the technical solution of the present application is to arrange the first touch chip 300 to be electrically connected to the self-capacitive electrode layer 220, the first touch chip 300 is arranged in the border area BB, the second touch chip 400 is electrically connected to the mutual capacitance electrode layer 230, the first touch chip 300 is arranged in the border area BB, the first touch chip 300 and the first touch chip 300 are located in the border area BB on different sides of the display device 10, and the first touch chip 300 and the second touch chip 400 are arranged opposite to each other, the first touch chip 300 and the source driver 110 are located on the same side, and the second touch chip 400 and the source driver 110 are located on different sides; on the one hand, the border area BB where the first touch chip 300 is located can be relatively small, and the width of the border area BB where the second touch chip 400 is located can be relatively small, thereby avoiding the first touch chip 300 and the second touch chip 400 from being too close to each other. The touch chip 400 is located in the border area BB on the same side of the display device 10, which results in an increase in the outlet space of the border area BB where the first touch chip 300 and the second touch chip 400 are located, resulting in an increase in the width of the border area BB of the display device 10. On the other hand, since the first touch chip 300 connected to the first touch signal line 240 is on the same side as the source driver 110, and the second touch chip 400 connected to the second touch signal line 250 is on a different side from the source driver 110, the number of touch signal lines is relatively small, ensuring that the border area BB corresponding to the source driver 110 of the display device 10 has enough area as the outlet space for the first touch signal line 240, that is, there is no need to increase the width of the border area BB where the first touch chip 300 is located, nor is there any need to increase the width of the border area BB where the second touch chip 400 is located, which is conducive to achieving a narrow border of the display device 10.

[0047] In this embodiment, the frame area BB includes a lower frame area BB1 and an upper frame area BB2 , wherein the lower frame area BB1 includes a binding area; wherein the source driver 110 and the first touch chip 300 are located in the lower frame area BB1 , and the second touch chip 400 is located in the upper frame area BB2 .

[0048] In this embodiment, the first touch control chip 300 is a 3D touch control chip, and the second touch control chip 400 is a 2D touch control chip.

[0049] In this embodiment, reference Figure 3 and Figure 7 The self-capacitive electrode layer 220 includes a plurality of self-capacitive electrodes 221, which are spaced apart in the direction M of the columns of the display device 10; the mutual-capacitive electrode layer 230 includes a plurality of first sub-mutual-capacitive electrodes 231, which are spaced apart in the direction M of the columns of the display device 10; the touch panel 200 also includes a plurality of first touch signal lines 240 and a plurality of second touch signal lines 250, and the portions of the plurality of first touch signal lines 240 located in the display area AA are spaced apart in the direction L of the rows of the display device 10, and each of the first touch signal lines 240 and the second touch signal lines 250 are spaced apart in the direction L of the columns of the display device 10. The first touch signal line 240 is electrically connected to each of the self-capacitive electrodes 221, and the first touch signal line 240 is electrically connected to the first touch chip 300; the portion of the plurality of second touch signal lines 250 located in the display area AA is spaced apart in the row direction L of the display device 10, each of the second touch signal lines 250 is electrically connected to each column of the first sub-mutual-capacitive electrodes 231, and the second touch signal line 250 is electrically connected to the second touch chip 400; wherein, a plurality of the first touch signal lines 240 are arranged between two adjacent second touch signal lines 250.

[0050] In this embodiment, reference Figure 1 , Figure 3 , Figure 4 and Figure 7, the mutual capacitance electrode layer 230 also includes N rows of second sub-mutual capacitance electrodes 232; the touch panel 200 also includes N rows of third touch signal lines 260, each of the third touch signal lines 260 is electrically connected to each row of the second sub-mutual capacitance electrodes 232, and the third touch signal lines 260 are electrically connected to the second touch chip 400; the display panel 100 also includes a first gate driving circuit 120 and N rows of first scanning signal lines 130, the first gate driving circuit 120 includes a multi-stage electrically connected first shift register 121, each stage of the first shift register 121 is electrically connected to each of the first scanning signal lines 130, and each stage of the first shift register 121 is electrically connected to each of the third touch signal lines 260. By setting each level of the first shift register 121 to be electrically connected to each of the first scanning signal lines 130, and each level of the first shift register 121 to be electrically connected to each of the third touch signal lines 260, it is no longer necessary to set up additional scanning signal lines to provide signals for the third touch signal lines 260, thereby reducing the routing of the border area BB where the first gate drive circuit 120 is located, thereby reducing the width of the border area BB where the first gate drive circuit 120 is located.

[0051] In this embodiment, the display panel 100 further includes a plurality of clock signal lines 160 , wherein the input end of the first shift register 121 is electrically connected to one clock signal line 160 .

[0052] In this embodiment, the border area BB further includes a left border area BB3 and a right border area BB4 , and the first gate driving circuit 120 is located in the left border area BB3 or the right border area BB4 of the display device 10 .

[0053] In this embodiment, the display device 10 further includes a plurality of first thin film transistors 500 , and a first thin film transistor 500 is electrically connected to a first shift register 121 and a third touch signal line 260 .

[0054] In this embodiment, the output end of the first shift register 121 is electrically connected to the control end of the first thin film transistor 500 , the second touch chip 400 is electrically connected to the input end of the first thin film transistor 500 , and the third touch signal line 260 is electrically connected to the output end of the first thin film transistor 500 .

[0055] In this embodiment, in the top view of the display device 10, the portion of the third touch signal line 260 located in the display area AA does not overlap with the first scan signal line 130. By setting the portion of the third touch signal line 260 located in the display area AA not to overlap with the first scan signal line 130, the risk of coupling between the third touch signal line 260 and the first scan signal line 130 can be reduced, thereby preventing the touch accuracy of the display device 10 from being reduced.

[0056] In this embodiment, reference Figure 1 , Figure 3 , Figure 4 , Figure 5 and Figure 7 The mutual capacitance electrode layer 230 further includes 2N rows of third sub-mutual capacitance electrodes 233; the touch panel 200 further includes 2N rows of fourth touch signal lines 270, each of the fourth touch signal lines 270 is electrically connected to each row of the third sub-mutual capacitance electrodes 233, and the fourth touch signal lines 270 are electrically connected to the second touch chip 400; the display panel 100 further includes a second gate driving circuit 140 and 2N rows of second scanning signal lines 150, the second gate driving circuit 140 includes a plurality of electrically connected second shift registers 141, each stage of the second shift register 141 is electrically connected to each second scanning signal line 150, and each stage of the second shift register 141 is electrically connected to each fourth touch signal line 270; wherein the first gate driving circuit 120 and the second gate driving circuit 140 are located in the frame area BB on different sides of the display device 10, and the first gate driving circuit 120 and the second gate driving circuit 140 are arranged opposite to each other. In the scheme of this embodiment, based on the aforementioned embodiment in which the first gate driving circuit 120 is set, each level of the second shift register 141 is further set to be electrically connected to each of the second scanning signal lines 150, and each level of the second shift register 141 is electrically connected to each of the fourth touch signal lines 270; wherein, the first gate driving circuit 120 and the second gate driving circuit 140 are located in the border area BB on different sides of the display device 10, so that there is no need to additionally set a scanning signal line to provide a signal for the fourth touch signal line 270, and the routing of the border area BB where the first gate driving circuit 120 and the second gate driving circuit 140 are located can be reduced at the same time, thereby reducing the width of the border area BB where the first gate driving circuit 120 is located and the width of the border area BB where the second gate driving circuit 140 is located, and ensuring that the width of the border area BB where the first gate driving circuit 120 is located and the width of the border area BB where the second gate driving circuit 140 is located can be kept consistent.

[0057] In this embodiment, it should be noted that the N rows of first scanning signal lines 130 are odd-numbered scanning signal lines, and the 2N rows of second scanning signal lines 150 are even-numbered scanning signal lines.

[0058] In this embodiment, it should be noted that the N rows of second sub-mutual capacitance electrodes 232 are odd-numbered rows of mutual capacitance electrodes arranged in the row direction L, and the 2N rows of third sub-mutual capacitance electrodes 233 are even-numbered rows of mutual capacitance electrodes arranged in the row direction L.

[0059] In this embodiment, the first gate driving circuit 120 is located in one of the left frame area BB3 or the right frame area BB4 of the display device 10 , and the second gate driving circuit 140 is located in the other of the left frame area BB3 or the right frame area BB4 of the display device 10 .

[0060] In this embodiment, the display device 10 further includes a plurality of second thin film transistors 600 , and one of the second thin film transistors 600 is electrically connected to one stage of the second shift register 141 and one of the fourth touch signal lines 270 .

[0061] In this embodiment, the output end of the second shift register 141 is electrically connected to the control end of the second thin film transistor 600 , the second touch chip 400 is electrically connected to the input end of the second thin film transistor 600 , and the fourth touch signal line 270 is electrically connected to the output end of the second thin film transistor 600 .

[0062] In this embodiment, in the top view of the display device 10, the portion of the fourth touch signal line 270 located in the display area AA does not overlap with the second scan signal line 150. Since the portion of the fourth touch signal line 270 located in the display area AA does not overlap with the second scan signal line 150, the risk of coupling between the fourth touch signal line 270 and the second scan signal line 150 can be reduced, thereby preventing the touch accuracy of the display device 10 from being reduced.

[0063] In this embodiment, the mutual capacitance electrode layer 230 includes a first sub-electrode layer and a second sub-electrode layer, the second sub-electrode layer is located on one side of the first sub-electrode layer, wherein the first sub-mutual capacitance electrode 231 is located in the first sub-electrode layer, and the second sub-mutual capacitance electrode 232 and the third sub-mutual capacitance electrode 233 are located in the second sub-electrode layer.

[0064] The second embodiment of the present application provides a second display device 10. The second embodiment is similar to the first embodiment. The difference between the second embodiment and the first embodiment is that the first touch chip 300 and the source driver 110 are located on different sides, and the second touch chip 400 and the source driver 110 are located on the same side. By arranging the first touch chip 300 and the source driver 110 to be located on different sides, and the second touch chip 400 and the source driver 110 to be located on the same side, the border area BB where the first touch chip 300 is located can be relatively small, and the width of the border area BB where the second touch chip 400 is located can be relatively small, thereby avoiding the problem that the first touch chip 300 and the second touch chip 400 are located on the same side of the border area BB of the display device 10, resulting in an increase in the outlet space of the border area BB where the first touch chip 300 and the second touch chip 400 are located, and causing an increase in the width of the border area BB of the display device 10.

[0065] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. A display device, characterized in that: The display device includes a display area and a frame area, and the display device also includes a display panel and a touch panel. The touch panel is arranged on the display panel, and the touch panel includes: Touch control substrate; A self-capacitive electrode layer, wherein the self-capacitive electrode layer is disposed on a side of the touch control substrate close to the display panel; A mutual capacitance electrode layer, wherein the mutual capacitance electrode layer is disposed on a side of the touch control substrate away from the display panel; A first touch chip, the first touch chip is electrically connected to the self-capacitive electrode layer, and the first touch chip is arranged in the frame area; a second touch chip, the second touch chip is electrically connected to the mutual capacitance electrode layer, and the first touch chip is arranged in the frame area, The first touch control chip and the second touch control chip are located in frame areas on different sides of the display device, and the first touch control chip and the second touch control chip are arranged opposite to each other.

2. The display device according to claim 1, characterized in that The display panel comprises a source driver, and the source driver is located in the frame area; The first touch control chip and the source driver are located on the same side, and the second touch control chip and the source driver are located on different sides.

3. The display device according to claim 1, characterized in that The display panel comprises a source driver, and the source driver is located in the frame area; The first touch control chip and the source driver are located at different sides, and the second touch control chip and the source driver are located at the same side.

4. The display device according to claim 2 or 3, characterized in that: The self-capacitive electrode layer includes a plurality of self-capacitive electrodes, and the plurality of self-capacitive electrodes are arranged at intervals in the direction of the columns of the display device; The mutual capacitance electrode layer includes a plurality of first sub-mutual capacitance electrodes, and the plurality of first sub-mutual capacitance electrodes are arranged at intervals in the direction of the columns of the display device; The touch panel also includes: a plurality of first touch signal lines, wherein portions of the plurality of first touch signal lines located in the display area are spaced apart in a row direction of the display device, each of the first touch signal lines is electrically connected to each of the self-capacitive electrodes, and the first touch signal lines are electrically connected to the first touch chip; a plurality of second touch signal lines, wherein the portions of the plurality of second touch signal lines located in the display area are spaced apart in the direction of the rows of the display device, each of the second touch signal lines is electrically connected to each column of the first sub-mutual capacitance electrodes, and the second touch signal lines are electrically connected to the second touch chip; Wherein, a plurality of the first touch signal lines are arranged between two adjacent second touch signal lines.

5. The display device according to claim 4, characterized in that: The mutual capacitance electrode layer further includes N rows of second sub-mutual capacitance electrodes; The touch panel further includes N rows of third touch signal lines, each of the third touch signal lines is electrically connected to each row of the second sub-mutual capacitance electrodes, and the third touch signal lines are electrically connected to the second touch chip; The display panel also includes a first gate driving circuit and N rows of first scanning signal lines, the first gate driving circuit includes a multi-stage electrically connected first shift register, each stage of the first shift register is electrically connected to each of the first scanning signal lines, and each stage of the first shift register is electrically connected to each of the third touch signal lines.

6. The display device according to claim 5, characterized in that: The display device further includes a plurality of first thin film transistors, and one of the first thin film transistors is electrically connected to one of the first shift registers and one of the third touch signal lines.

7. The display device according to claim 5, characterized in that: In the top view of the display device, a portion of the third touch signal line located in the display area does not overlap with the first scan signal line.

8. The display device according to claim 5, characterized in that The mutual capacitance electrode layer further includes 2N rows of third sub-mutual capacitance electrodes; The touch panel further includes 2N rows of fourth touch signal lines, each of the fourth touch signal lines is electrically connected to each row of the third sub-mutual capacitance electrodes, and the fourth touch signal lines are electrically connected to the second touch chip; The display panel further includes a second gate driving circuit and 2N rows of second scanning signal lines, the second gate driving circuit includes a plurality of electrically connected second shift registers, each stage of the second shift register is electrically connected to each of the second scanning signal lines, and each stage of the second shift register is electrically connected to each of the fourth touch signal lines; The first gate driving circuit and the second gate driving circuit are located in frame areas on different sides of the display device, and the first gate driving circuit and the second gate driving circuit are arranged opposite to each other.

9. The display device according to claim 8, characterized in that: The display device further includes a plurality of second thin film transistors, and one of the second thin film transistors is electrically connected to one of the second shift registers and one of the fourth touch signal lines.

10. The display device according to claim 8, characterized in that: In the top view of the display device, a portion of the fourth touch signal line located in the display area does not overlap with the second scan signal line.

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