Failure unit repairing method of nor flash chip and computer storage medium

Abstract

The invention discloses a failure unit repairing method of an nor flash chip and a computer storage medium. The failure unit repairing method comprises the following steps: a, acquiring address information of a failure unit in the chip; b, traversing rows in the column repair area to obtain the number of failure units in each row unit; d, when the number of the failure units exceeds the limit, a redundant line repair unit is used for repairing and obtaining address information of the repaired failure units; d, counting the number of failure units in each arrangement repair area; e, when the number of the failure units exceeds the limit, a redundant line repair unit is used for repair; f, the step d is repeated, if the number of the failure units in each arrangement repair area exceeds the limit, one redundant row repair unit continues to be replaced for repair, all the failure units are traversed in sequence, and if one row repair unit cannot meet the requirement, the number is increased to the upper limit; and g, repairing a failure unit in the column repairing area by using a redundant column repairing unit. According to the invention, the problem of low repairing efficiency of the existing repairing method for the failure unit of the storage chip is solved.

Description

Technical Field

[0001] The present invention relates to the technical field of chips, and in particular to a method for repairing a failed unit of a NOR flash chip and a computer storage medium. Background Art

[0002] With the rapid development of the chip design industry, a large number of chip products with different functions have emerged, and nor-flash memory chips (non-volatile memory chips) are one of them. Among them, large-capacity nor-flash chips are prone to storage failures in some memory units due to the large number of memory units, resulting in a low actual yield rate. In order to improve the yield rate, some chips will add some redundant memory units during design, and perform address mapping for some failed units to repair these failed units.

[0003] Currently, memories generally use redundant memory units for repair, but the number of repair groups is usually small, and usually a whole row or a whole column is repaired, resulting in low repair efficiency.

[0004] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0005] In order to overcome the defects of the prior art, a method for repairing a failed unit of a NOR flash chip is provided to solve the problem of low repair efficiency in the prior art method for repairing a failed unit of a memory chip.

[0006] To achieve the above object, a method for repairing a failed unit of a NOR flash chip is provided, comprising the following steps: a. Obtaining failed unit address information in a storage address of a chip, wherein the storage address of the chip includes a plurality of column repair regions and a plurality of row repair regions, wherein the column repair region includes a column unit and a plurality of redundant column repair units, and the row repair region includes a row unit and a plurality of redundant row repair units; b. traversing the storage address, using the column repair area as a traversal pointer, traversing the rows in the column repair area, and obtaining the number of failed cells in each row unit; c. When the number of failed cells in each row unit is greater than the number of redundant column repair units, use the redundant row repair units to repair and obtain address information of the repaired failed cells; d. Counting the number of failed cells in the column repair area of ​​each row; e. When the number of failed cells in the column repair area in each row exceeds the number of cells that can be repaired by the redundant column repair unit, one of the redundant row repair units is used for repair; f. Repeat step d. If the number of failed cells in the column repair area of ​​each row exceeds the number of redundant column repair units, continue to use another redundant row repair unit for repair, and traverse all failed cells in turn. If a redundant row repair unit cannot be repaired after enumeration, increase the number of redundant row repair units until the upper limit of the number of redundant row repair units is reached. g. Repairing failed cells in the column repair area using redundant column repair units.

[0007] Furthermore, it also includes counting and outputting the number of redundant column repair units and the number of redundant row repair units used in each column repair area to determine the repair result of the failed unit, and at the same time dividing the chip level by customizing different numbers of redundant repair units.

[0008] The present invention provides a computer storage medium on which a program is stored. When the program is executed by a processor, the above-mentioned repair method is implemented.

[0009] The beneficial effect of the present invention is that the method for repairing a failed unit of a NOR flash chip of the present invention first obtains the address information file of the failed unit in various modes through ATE testing, and then determines whether the test chip can be repaired into a good chip through the address according to the address information file, and outputs the row and column repair times if it meets the repair conditions, thereby determining whether the chip is good or bad. Among them, the number of column repairs required is reduced by first repairing a specific row, and finally the purpose of repairing all addresses is achieved, thereby improving the repair efficiency of the failed unit.

[0010] The method for repairing a failed unit of a NOR flash chip of the present invention can realize offline processing, only generate failed address information during testing, and reduce chip testing time. The method for repairing a failed unit of a NOR flash chip of the present invention customizes the number of redundant repair units and divides the chip into repairable levels. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Other features, objects and advantages of the present application will become more apparent by reading the detailed description of non-limiting embodiments made with reference to the following drawings: Figure 1 The present invention is a flowchart of a method for repairing a failed unit of a NOR flash chip according to an embodiment of the present invention.

[0012] Figure 2 Schematic diagram of a column repair area of ​​a NOR flash chip according to an embodiment of the present invention.

[0013] Figure 3 Schematic diagram of a row repair area of ​​a NOR flash chip according to an embodiment of the present invention.

[0014] Figure 4 Schematic diagram of the minimum repair unit of the NOR flash chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0015] The present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the relevant invention, rather than to limit the invention. It is also necessary to explain that, for ease of description, only the parts related to the invention are shown in the accompanying drawings.

[0016] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0017] Reference Figures 1 to 4 As shown, the present invention provides a method for repairing a failed unit of a NOR flash chip, comprising the following steps: a. Obtain the failed unit address information in the storage address of the chip. The storage address of the chip includes multiple column repair areas 1 and multiple row repair areas 2. The column repair area contains column units and multiple redundant column repair units 11, and the row repair area contains row units and multiple redundant row repair units 21.

[0018] In this embodiment, the number of redundant column repair units and redundant row repair units can be defined by oneself, such as 8, 4 or 4, 2. The result can be judged according to the defined number. The following steps are described by taking 8 redundant column repair units and 4 redundant row repair units as an example.

[0019] b. Traverse the storage address, use the column repair area as the traversal pointer, traverse the rows in the column repair area, and obtain the number of failed cells in each row cell.

[0020] d. When the number of failed cells in each row unit is greater than the number of redundant column repair cells, redundant row repair cells are used to repair and obtain address information of the repaired failed cells.

[0021] d. Count the number of failed units in each permutation repair area.

[0022] e. When the number of failed cells in each permutation repair area exceeds the number that can be repaired by the redundant column repair unit, a redundant row repair unit is used for repair.

[0023] f. Repeat step d. If the number of redundant column repair units required for the column repair area in each arrangement repair area exceeds the upper limit (that is, if the number of failed cells in each arrangement repair area is greater than eight), continue to use a redundant row repair unit for repair, and traverse all failed cells in turn. If a redundant row repair unit cannot be repaired after enumeration, increase the number of redundant row repair units until the upper limit of the number of redundant row repair units is reached.

[0024] g. Use redundant column repair units to repair failed cells in the column repair area.

[0025] h. Count and output the number of redundant column repair units and the number of redundant row repair units used in each column repair area to determine the repair results of the failed cells. At the same time, by customizing different numbers of redundant repair units, the chip can be graded to facilitate repair feasibility analysis.

[0026] The method for repairing a failed unit of a NOR flash chip of the present invention first obtains the address information file of the failed unit in various modes through ATE testing, and then determines whether the test chip can be repaired into a good chip through the address according to the address information file. If the repair condition is met, the row and column repair times are output to determine the quality of the chip. Among them, the number of columns required for repair is reduced by first repairing a specific row, and finally the purpose of repairing all addresses is achieved, thereby improving the repair efficiency of the failed unit.

[0027] In this embodiment, the memory address of the chip can be regarded as a two-dimensional array of (x, y), where x represents the column and y represents the row. There are two ways to repair the failed cell, one is column repair (col column repair) and the other is row repair (row row repair).

[0028] like Figure 2 As shown in the figure, the entire address map (32K×32K) of the chip is divided into 128 (16×8) column repair areas. There are 8 redundant column repair units (unit size 8×4K) in one column repair area (2K×4K). If there is a failed unit (or failed address unit) in the column repair area, the column repair unit (size 8×4K) where the failed unit is located can be mapped to the redundant column repair unit, thereby achieving the function of repairing the failed unit.

[0029] Since a column repair area has at most 8 redundant column repair units, it is necessary to use as few redundant column repair units as possible to repair each column area.

[0030] like Figure 3As shown, the entire address of the chip is divided into two row repair areas (32K×16K). Each row repair area has 4 redundant row repair units (unit size 32K×256). If there is a failed unit in the row repair area, the row repair unit (size 32K×256) where the failed unit is located can be mapped to the redundant row repair unit, thereby achieving the function of repairing the failed unit.

[0031] A row repair area can only repair 4 row repair units at most. Due to the large address range of row repair (the row repair unit size is 32K×256, such as Figure 3 As shown, the column repair unit is Figure 1 As shown in the figure, the size is 8×4K, and the row repair area is much larger than the column repair area). The row repair unit can repair the failed cells of a whole row, and can affect the failed cells in 16 column repair areas. Therefore, it is possible to first perform specific row repairs to reduce the number of column repairs required, and ultimately achieve the goal of repairing all addresses.

[0032] like Figure 4 As shown in FIG. 1 , a repair unit is an intersection area (size 8×256) of a redundant column repair unit and a redundant row repair unit, that is, a minimum repair unit A, which is the minimum unit of row and column repair. Failed cells in a repair unit can be repaired by a specified redundant row or column unit.

[0033] See also Figure 1 As shown, First, the address information of the failed unit is stored, and only the location information of the repaired unit is saved, which is recorded as (x, y), x∈[0,4095], y∈[0,127].

[0034] The column repair area is represented as x∈[256×k,256×k+255],k=0,1,2...15; y∈[16×t,16×t+15],t=0,1,2...7.

[0035] The row repair region is represented as x∈[0,4095],y∈[64×t,64×t+63], t=0,1 In each column repair area, if there are more than 8 cells in the same row that need to be repaired, the column repair cannot be completely repaired and only row repair can be used. Therefore, the rows are traversed first and the cells that need row repair are repaired using row repair cells.

[0036] After this, there may still be a column repair region that requires more than 8 column repair units (the number of different x's of failed units in the region) to be completely repaired, so row repair units are also needed to make each column repair region meet the column repair conditions. For each permutation repair region (y∈[16×t,16×t+15],t=0,1,2,3...7), try to use row repair to reduce the number of different x's in each column repair region.

[0037] Count the number of different x in each column repair area of ​​the single row area, recorded as x_cnt. If all x_cnt in the single row repair area does not exceed 8, then this row area does not need to be processed.

[0038] For the column repair area in a row where x_cnt is greater than 8, first use 1 row repair unit to repair the failed cells, count x_cnt again, if there are still cells greater than 8, continue to repair another row, and traverse all failed cells in this way. If a row repair unit cannot meet the conditions after enumeration, increase it to 2 and repeat the above process, up to the upper limit of the row repair unit in the row repair area.

[0039] After that, all column repair areas can be completely repaired using column repair. The number of column repairs and the y value of the row repair unit used in each column repair area are counted and output.

[0040] The present invention provides a computer-readable storage medium, on which a computer program is stored, which implements all or part of the process in the failed unit repair method of the above-mentioned norflash chip, and can also be completed by instructing related hardware through a computer program. The computer program can be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of each of the above-mentioned method embodiments can be implemented. Among them, the computer program includes computer program code, and the computer program code can be in source code form, object code form, executable file or some intermediate form, etc. The computer-readable medium can include: any entity or device, medium, U disk, mobile hard disk, disk, optical disk, computer memory, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), electrical carrier signal, telecommunication signal and software distribution medium, etc. that can carry the computer program code.

[0041] It should be noted that the content contained in the computer-readable medium can be appropriately increased or decreased according to the requirements of legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media does not include electrical carrier signals and telecommunication signals.

[0042] Specifically, the computer program flow is as follows: 1. Randomly generate 500 (x, y) two-dimensional address pairs and save them as an array org_set, where x represents the column, y represents the row, x∈[0,4095], y∈[0,127], and each (x, y) is called a unit. Print org_set.

[0043] 2. The range R is defined as x∈[256×k,256×k+255], k is an integer between 0 and 15, and y∈[16×t,16×t+15], t is an integer between 0 and 3.

[0044] 3. The range R1 is defined as x∈[0,4095],y∈[16×t,16×t+15], where t is an integer between 0 and 3.

[0045] 4. For a single R, the total number of different x-coordinates of all units belonging to R is denoted as col_fail_cnt.

[0046] 5. Set the variable row_repair_num = 0; set the array col_repair_num to contain 50 elements, all initially 0; create an initial empty array row_repair_unit.

[0047] 6. Once row_repair_num>4, or any element in col_repair_num>7, output "Repair failed" as well as row_repair_num and col_repair_num.

[0048] 7. For org_set, traverse the rows in each R. If the row has more than 8 units, delete all units in the entire row (including other R) from org_set. If the deletion operation is performed, row_repair_num+1 is added, and the deleted y is added to the array row_repair_unit only.

[0049] 8. In org_set, for each R in a single R1, if col_fail_cnt>8, store all units in that R into the temporary array tmp_set.

[0050] 9. Use exhaustive method to delete 1 row of unit from the rows with unit in tmp_set, do not change the original tmp_set, and calculate col_fail_cnt. If R still has col_fail_cnt>8 after exhaustive method, delete 2 rows of unit from tmp_set, and so on until all col_fail_cnt<=8. Finally, add the number of deleted rows to row_repair_num, and add the deleted y to the array of row_repair_unit.

[0051] 10. Repeat the process of 8-9 until all R1 are traversed.

[0052] 11. Update org_set according to the deletion results.

[0053] 12. Update the y range of range R and R1 to y∈[16×t+64,16×t+15+64] and repeat steps 5-11.

[0054] 13. Count the number of different x in each R and enter the corresponding number of each R into col_repair_num.

[0055] 14. Print row_repair_unit, col_repair_num.

[0056] The above description is only a preferred embodiment of the present application and an explanation of the technical principles used. Those skilled in the art should understand that the scope of the invention involved in the present application is not limited to the technical solution formed by a specific combination of the above technical features, but should also cover other technical solutions formed by any combination of the above technical features or their equivalent features without departing from the inventive concept. For example, the above features are replaced with (but not limited to) technical features with similar functions disclosed in the present application.

Claims

1. A method for repairing a failed unit of a NOR flash chip, characterized in that: The following steps are involved: a. Obtaining failed unit address information in a storage address of a chip, wherein the storage address of the chip includes a plurality of column repair regions and a plurality of row repair regions, wherein the column repair region includes a column unit and a plurality of redundant column repair units, and the row repair region includes a row unit and a plurality of redundant row repair units; b. traversing the storage address, using the column repair area as a traversal pointer, traversing the rows in the column repair area, and obtaining the number of failed cells in each row unit; c. When the number of failed cells in each row unit is greater than the number of redundant column repair units, use the redundant row repair units to repair and obtain address information of the repaired failed cells; d. Counting the number of failed cells in the column repair area of ​​each row (such as FIG. 2 , a row of sixteen column repair areas); e. When the number of failed cells in each row of the column repair area exceeds the number of repair units of the redundant column repair unit, one of the redundant row repair units is used for repair; f. Repeat step d. If the number of failed cells in the column repair area in each row still exceeds the number of redundant column repair units, continue to use another redundant row repair unit for repair, and traverse all failed cells in turn. If a redundant row repair unit cannot be repaired after enumeration, increase the number of redundant row repair units until the upper limit of the number of redundant row repair units is reached. g. Repairing failed cells in the column repair area using redundant column repair units.

2. The method for repairing a failed unit of a NOR flash chip according to claim 1, characterized in that: It also includes counting and outputting the number of the redundant column repair units and the number of the redundant row repair units used in each column repair area to determine the repair result of the failed unit, and at the same time dividing the chip level by customizing different numbers of redundant repair units.

3. A computer storage medium, characterized in that: A program is stored thereon, and when the program is executed by a processor, the repair method described in any one of claims 1 to 2 is implemented.

Images