Package Structure of Chip and Semiconductor Device

Abstract

The present application relates to the field of semiconductor technology, and discloses a chip packaging structure and a semiconductor device; the chip packaging structure includes a cathode electrode and a dynamic equalizing pressure module; the cathode electrode is stacked on the chip, and the cathode electrode is divided into multiple pressure compensation areas; the dynamic equalizing pressure module is arranged on the side of the cathode electrode away from the chip and has a closed cavity, the closed cavity is filled with elastic buffer material, and multiple dynamic insertion electrodes electrically connected to multiple pressure compensation areas are arranged in the closed cavity, and the outer end of the dynamic equalizing pressure module is electrically connected to the cathode seal of the external tube shell. When the technical solution of the present application is adopted to package the chip and the tube shell, by arranging a dynamic equalizing pressure module with a closed cavity on the cathode electrode, the buffer material inside the closed cavity can be used to achieve pressure compensation in the chip packaging process, perform dynamic pressure regulation, and even out the pressure between the metal electrodes.

Description

Technical Field

[0001] The present application belongs to the field of semiconductor technology, and specifically relates to a chip packaging structure and a semiconductor device. Background Art

[0002] As the core component of power transmission equipment, high-power semiconductor devices need to withstand high voltage and high current working environments in practical applications. With the continuous improvement of equipment capacity, the power level of devices is also getting larger and larger, which leads to the increasing size of electrodes and heat sinks of semiconductor devices; therefore, the crimping effect of large-size contact surfaces has become a key constraint affecting the heat dissipation and flow improvement of devices. However, for the surfaces of common semiconductor devices in the prior art, there are usually different degrees of crimping unevenness during the crimping process. In severe cases, the degree of unevenness can exceed 80%. Therefore, crimping unevenness is not conducive to the long-term use reliability of semiconductor devices. In addition, the crimping uniformity can be improved by improving the flatness of the contact surface between the packaged components and the heat sink, but this method will undoubtedly greatly increase the packaging cost, and the upper limit is low; therefore, it is urgent to develop a pressure equalization structure to improve the crimping uniformity of semiconductor devices. Summary of the invention

[0003] The purpose of the present application is to provide a chip packaging structure and a semiconductor device to achieve pressure compensation on the chip surface and improve the uniformity of the pressing of the semiconductor device.

[0004] In order to achieve the above-mentioned object, the present application provides a chip packaging structure on one hand, and the chip packaging structure includes:

[0005] A cathode electrode is stacked on the chip and electrically connected to the chip, and the cathode electrode is divided into a plurality of pressure compensation areas;

[0006] The dynamic pressure equalizing module is arranged on the side of the cathode electrode away from the chip and has a closed cavity. The closed cavity is filled with elastic buffer material. A plurality of dynamic insertion electrodes are arranged in the closed cavity and are electrically connected to a plurality of pressure compensation areas in a one-to-one correspondence. The outer end of the dynamic pressure equalizing module is electrically connected to the cathode seal of the external tube shell.

[0007] In some embodiments, the pressure compensation area is an annular structure, and a plurality of pressure compensation areas are arranged in sequence along the radial direction.

[0008] In some embodiments, the pressure compensation region is a fan-shaped structure, and the number of pressure compensation regions of the fan-shaped structure is multiple and symmetrically distributed, and the multiple pressure compensation regions are combined into a disc-shaped structure.

[0009] In some embodiments, the dynamic pressure equalization module includes:

[0010] The conductive gasket is located on the side of the cathode electrode facing away from the chip. The side of the conductive gasket facing away from the chip is open. The dynamic insertion electrode is electrically connected to the pressure compensation area through the conductive gasket.

[0011] The metal plate covers the opening. The metal plate and the conductive gasket cooperate to form a closed cavity. The surface of the metal plate facing away from the closed cavity is in contact with the external radiator.

[0012] In some embodiments, the conductive gasket includes a bottom surface and a side surface surrounding the outer periphery of the bottom surface. A plurality of dynamic insertion electrodes are in contact with the bottom surface. The outer end of the side surface extends towards the side away from the closed cavity with a conductive connection part, and the conductive connection part is electrically connected to the cathode of the external package in a sealed manner.

[0013] In some embodiments, the number of dynamic insertion electrodes is the same as the number of pressure compensation areas and they are arranged in one-to-one correspondence. The radial cross-sectional area of each dynamic insertion electrode is equal to the radial cross-sectional area of each pressure compensation area.

[0014] In some embodiments, a limiting block is provided between any two adjacent dynamic insertion electrodes, and a limiting block is also provided between the outermost dynamic insertion electrode and the side surface.

[0015] In some embodiments, the limiting block is made of a high-temperature and wear-resistant material.

[0016] In some embodiments, the elastic buffer substance is a high-pressure insulating gas or silicone rubber.

[0017] The second aspect of the present application provides a semiconductor device, which includes:

[0018] The above-mentioned chip packaging structure; and

[0019] The package, on which there are a package cathode and a package anode. The package cathode is electrically connected to the conductive gasket of the dynamic voltage equalization module, and the package anode is electrically connected to the anode electrode.

[0020] In some embodiments, a stepped structure is provided on the outer periphery of the package cathode. The conductive gasket of the dynamic voltage equalization module has a conductive connection part extending outwards, and the conductive connection part is hermetically connected to the stepped structure.

[0021] In some embodiments, the metal plate of the dynamic voltage equalization module and the stepped structure of the package cathode are hermetically connected by a brazing process.

[0022] Through the above technical solutions, the chip packaging structure and the semiconductor device provided by the embodiments of the present application have the following beneficial effects:

[0023] The packaging structure of the chip includes a cathode electrode and a dynamic voltage equalization module; the cathode electrode is stacked on the chip, and the cathode electrode is divided into multiple pressure compensation regions; the dynamic voltage equalization module is arranged on the side of the cathode electrode facing away from the chip and has a closed cavity, and an elastic buffer material is filled in the closed cavity. A plurality of dynamic insertion electrodes electrically connected to the multiple pressure compensation regions are arranged in the closed cavity, and the outer end of the dynamic voltage equalization module is hermetically electrically connected to the cathode of the external package. In this application, a dynamic voltage equalization module with a closed cavity is added to the cathode electrode. The multiple dynamic insertion electrodes in the dynamic voltage equalization module are electrically connected to the pressure compensation regions, and an elastic buffer material is filled in the closed cavity. Compared with rigid connection, when the chip is pressed, the elastic buffer structure in the entire dynamic voltage equalization module can compensate the pressure during the chip pressing process and improve the pressure uniformity.

[0024] Other features and advantages of the embodiments of this application will be described in detail in the subsequent specific embodiment part. Brief Description of the Drawings

[0025] The drawings are used to provide a further understanding of the embodiments of this application, and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the embodiments of this application, but do not constitute a limitation to the embodiments of this application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the structures shown in these drawings. In the drawings:

[0026] Figure 1 It is a schematic diagram of the packaging structure of a semiconductor device in the prior art;

[0027] Figure 2 It is a schematic diagram of the structure of the chip of this application;

[0028] Figure 3 It is a schematic diagram of the packaging structure of the chip of this application;

[0029] Figure 4 It is a schematic diagram of the structure of the cathode electrode in the packaging structure of the chip in the first embodiment of this application;

[0030] Figure 5 It is a schematic diagram of the structure of the cathode electrode in the packaging structure of the chip in the second embodiment of this application;

[0031] Figure 6 It is a partial schematic diagram of the packaging structure of the semiconductor device of this application.

[0032] Explanation of the Reference Numerals

[0033] 100, Chip; 22, Conductive gasket; 101, Cathode electrode; 221, Bottom surface; 1011, Pressure compensation area; 222, Side surface; 102, Case cathode; 223, Conductive connection part; 103, Case anode; 23, Enclosed cavity; 104, Anode electrode; 24, Dynamic insertion electrode; 200, Dynamic voltage equalization module; 25, Limit block; 21, Metal plate; 300, Case. Detailed implementation manners

[0034] The following describes the detailed implementation manners of the present application with reference to the accompanying drawings. It should be understood that the detailed implementation manners described herein are only used to illustrate and explain the present application, and are not used to limit the present application.

[0035] The following describes the packaging structure of the chip and the semiconductor device according to the present application with reference to the accompanying drawings.

[0036] As is well known, the packaging structure of the crimp type high-power semiconductor device in the prior art is as Figure 1 shown. Usually, the surface of the chip 100 is rigidly connected to the metal electrode (generally metal molybdenum or molybdenum alloy), and the metal electrode is rigidly connected to the case electrode (for example, metal copper). Therefore, the crimp uniformity of the surface of the chip 100 is only achieved by the processing accuracy of the metal electrode. However, the current manufacturing capacity of the processing factory is that the flatness of the surface of the metal electrode can generally only reach 10 - 15 μm, which no longer meets the crimp packaging requirements of larger-sized devices, and the processing accuracy is unstable, and qualified products need to be screened out; therefore, when the processing progress is increased to within 5 μm, the cost will increase sharply, which will greatly affect the economy of the device, and the processing difficulty is large, and the current processing factory cannot meet the requirements.

[0037] In view of this, the present application provides a dynamic voltage equalization structure. Specifically, as Figure 2 shown, a packaging structure of a chip is provided. Referring to the structure of the chip 100 shown in Figure 2 and Figure 3 it can be known that the packaging structure of the chip includes a cathode electrode 101 and a dynamic voltage equalization module 200; the cathode electrode 101 is stacked on the chip 100 and is electrically connected to the chip 100, and the cathode electrode 101 is divided into multiple pressure compensation areas 1011; the dynamic voltage equalization module 200 is arranged on the side of the cathode electrode 101 away from the chip 100 and has an enclosed cavity 23. An elastic buffer substance is filled in the enclosed cavity 23, and a plurality of dynamic insertion electrodes 24 that are electrically connected to the multiple pressure compensation areas 1011 one by one are arranged in the enclosed cavity 23. The outer end of the dynamic voltage equalization module 200 is hermetically and electrically connected to the external case cathode 102.

[0038] In this embodiment, by proposing a cathode structure with dynamic pressure compensation, the pressure compensation effect on the chip 100 is realized, and the uniformity of the chip 100 during the press-fitting process is improved. During the assembly process of the chip 100 of a semiconductor device, in the prior art, an intermetallic hard press-bonding method is used to achieve electrical connection. However, as the size of the electrode increases, the processing requirements for the metal electrode become higher and the difficulty increases. In this application, the cathode electrode 101 of the chip 100 is designed as an independent small structure composed of multiple pressure compensation regions 1011. The independent small structure is easier to process compared to the entire large structure, so it is easier to keep the pressure on the contact surface with the chip 100 consistent. And by introducing a new structure on the cathode electrode 101, that is, a dynamic pressure equalization module 200, an enclosed cavity 23 filled with an elastic buffer material is formed inside the dynamic pressure equalization module 200, and the dynamic insertion electrode 24 inside the enclosed cavity 23 is electrically connected to the multiple pressure compensation regions 1011, thereby realizing the electrical connection between the dynamic pressure equalization module 200 and the cathode electrode 101. Since there is a buffer material inside the dynamic pressure equalization module 200, when the dynamic pressure equalization module 200 is connected to the cathode electrode 101, the mode of rigid metal connection is avoided. When the chip 100 is packaged with the package 300, due to the presence of the dynamic pressure equalization module 200 on the cathode electrode 101, the buffer material inside the enclosed cavity 23 can be used to achieve pressure compensation during the packaging process of the chip 100, perform dynamic pressure adjustment, and equalize the pressure between the metal electrodes. In addition, since the cathode electrode 101 of this application is composed of multiple independent pressure compensation regions 1011, for each pressure compensation region 1011, the pressure between the dynamic pressure equalization module 200 and the pressure compensation region 1011 is reduced, and the pressure of the small area is easier to compensate. In addition, the cathode electrode 101 can also be called a buffer electrode, and it can also play a role in matching the thermal expansion coefficients between the chip 100 and the dynamic insertion electrode 24. Further, by improving the packaging structure of the chip, the overall packaging process is not affected. Compared with the prior art method of improving the press-bonding uniformity by changing the packaging process, the manufacturing cost of this application is lower.

[0039] Since it is easier to process when the contact surface of the cathode electrode 101 in contact with the chip 100 is smaller, it is thus easier to perform pressure compensation on the surface of the chip 100. Therefore, the cathode electrode 101 of the present application is divided into multiple pressure compensation regions 1011. Understandably, the cathode electrode 101 is composed of multiple small-area regional electrodes. In this way, the contact area of each electrode region with the chip 100 is much smaller than the contact area of the entire cathode electrode 101 with the chip 100, which is more conducive to pressure compensation. In this embodiment, the cathode electrode 101 can be a cathode molybdenum sheet. The cathode electrode 101 has a circular structure. The cathode electrode 101 is designed with partitions so that the cathode electrode 101 is composed of a combination of multiple divided pressure compensation regions 1011. The shape of the pressure compensation region 1011 can be various. Preferably, the shape of the pressure compensation region 1011 can adopt the following two preferred embodiments and can be designed as a multi-ring or fan-shaped partition structure:

[0040] In the first embodiment of the present application, as Figure 4 shown, the pressure compensation region 1011 is a ring structure. Multiple pressure compensation regions 1011 are arranged in sequence from the inside to the outside along the radial direction. The ring width of each pressure compensation region 1011 is equal, so that the pressure on the corresponding region of the chip 100 by each pressure compensation region 1011 remains consistent. In this embodiment, the cathode electrode 101 is a multi-ring structure. Multiple sets of comb bar assemblies are arranged at intervals along the radial direction on the surface of the chip 100. Each set of comb bar assemblies includes multiple comb bars arranged at intervals along the circumferential direction. This multi-ring structure can be distributed according to the comb bar structure on the surface of the chip 100. When designing, one set of comb bar assemblies or adjacent multiple sets of comb bar assemblies can share one pressure compensation region 1011. It should be noted that the number of the ring-shaped pressure compensation regions 1011 can be one, two, three, etc., all within the protection scope of the present application. The specific number can be determined according to the area of the cathode molybdenum sheet and the processing requirements, and will not be limited here.

[0041] In the second embodiment of the present application, as Figure 5 shown, the pressure compensation region 1011 is a fan-shaped structure, and the number of the fan-shaped pressure compensation regions 1011 is an even number greater than 0. Multiple pressure compensation regions 1011 are symmetrically distributed and combined into a disc-shaped structure. In this embodiment, the sizes of the fan-shaped pressure compensation regions 1011 are exactly the same. That is to say, when designing, the cathode molybdenum sheet needs to be evenly divided. The cathode molybdenum sheet can be divided into two, four, six or other even-numbered fan-shaped pressure compensation regions 1011 to ensure that each pressure compensation region 1011 is exactly the same. When multiple pressure compensation regions 1011 are in contact with the chip 100, the pressure on the chip 100 is made equal, improving the pressure uniformity.

[0042] In some embodiments, the dynamic voltage equalization module 200 includes a conductive gasket 22 and a metal plate 21; the conductive gasket 22 is located on the side of the cathode electrode 101 facing away from the chip 100, and the side of the conductive gasket 22 facing away from the chip 100 is open. The dynamic insertion electrode 24 is electrically connected to the pressure compensation region 1011 through the conductive gasket 22 to achieve stable and reliable electrical lead-out; the metal plate 21 covers the open portion, and the metal plate 21 and the conductive gasket 22 cooperate to form a closed cavity 23. The surface of the metal plate 21 facing away from the closed cavity 23 is in contact with an external radiator to compensate for the heat dissipation capacity on the cathode side of the chip 100; since the surface of the metal plate 21 in this embodiment is a flat plate structure, when the metal plate 21 is in contact with the external radiator, the crimping uniformity between the metal plate 21 and the external radiator can also be improved.

[0043] Among them, the specification size of the conductive gasket 22 is designed according to the current-carrying requirements of the semiconductor device. The material of the conductive gasket 22 can be a metal with high electrical conductivity and high ductility, such as copper, silver, gold and their alloys, etc., to achieve better electrical conductivity, and the metal with high ductility can improve the contact uniformity between the dynamic insertion electrode 24 and the pressure compensation region 1011. Compared with the rigid connection between metal electrodes in the prior art, the pressure uniformity is better.

[0044] In some embodiments, the conductive gasket 22 includes a bottom surface 221 and a side surface 222 surrounding the outer periphery of the bottom surface 221. The side surface 222 and the bottom surface 221 cooperate to form a cavity structure with one end open. A plurality of dynamic insertion electrodes 24 are located in the cavity and are in contact with the bottom surface 221, so as to achieve the electrical conduction of the dynamic insertion electrodes 24. In addition, a conductive connection portion 223 extends from the outer end of the side surface 222 toward the side away from the closed cavity 23, and the conductive connection portion 223 is hermetically electrically connected to the external package cathode 102. By extending the conductive connection portion 223 outward from the side surface 222 of the conductive gasket 22 and sealingly connecting the conductive connection portion 223 with the package cathode 102, the hermetic packaging between the package 300 and the chip 100 can be realized.

[0045] In some embodiments, the number of the dynamic insertion electrodes 24 is the same as the number of the pressure compensation regions 1011 and they are arranged in one-to-one correspondence. The radial cross-sectional area of each dynamic insertion electrode 24 is equal to the radial cross-sectional area of each pressure compensation region 1011. In this embodiment, since each dynamic insertion electrode 24 is electrically connected to the corresponding pressure compensation region 1011 through the bottom surface 221 of the conductive gasket 22, the electrical connection between the entire dynamic voltage equalization module 200 and the cathode molybdenum sheet can be achieved. In addition, in order to make the electrical connection performance between the two more stable and reliable, it is necessary to make the radial cross-sectional area of each insertion electrode equal to the radial cross-sectional area of the corresponding pressure compensation region 1011.

[0046] It should be noted that the dynamic insertion electrode 24 of the present application is a common metal electrode, and its material needs to have a certain rigidity and be able to withstand a certain pressure, such as materials like molybdenum, molybdenum-copper alloy, and die steel.

[0047] In some embodiments, a limiting block 25 is provided between any two adjacent dynamic insertion electrodes 24. Each limiting block 25 fills the gap between the two adjacent dynamic insertion electrodes 24, so that the limiting blocks 25 on both sides of each dynamic insertion electrode 24 can act simultaneously to clamp the dynamic insertion electrode 24, thereby realizing the limitation of each dynamic insertion electrode 24. In addition, a limiting block 25 is also provided between the outermost dynamic insertion electrode 24 and the side surface 222. In this embodiment, the existence of the limiting block 25 not only ensures that the positions of the dynamic insertion electrodes 24 do not change, but also can ensure the accuracy when the dynamic insertion electrodes 24 are aligned with the pressure compensation area 1011.

[0048] In some embodiments, the limiting block 25 is made of a high-temperature resistant and wear-resistant material. For example, common high-temperature resistant and wear-resistant materials in the prior art can be used, such as composite coating materials (Al 2 O 3 / Ni), nano-ceramic materials, or high-temperature heat-resistant and wear-resistant steel plates, etc. It can also be a high-temperature wear-resistant composite material, such as glass fiber reinforced composite material, carbon fiber reinforced composite material, etc. In this embodiment, by using a limiting block 25 material with good wear resistance, it can prevent the dynamic insertion electrode 24 from causing wear to the limiting block 25 during the insertion or extraction movement process. And since there is contact between the limiting block 25 and the side surface 222 of the dynamic insertion electrode 24 or the conductive gasket 22, a material with good wear resistance can increase the service life of the limiting block 25.

[0049] In some embodiments, the elastic buffer material is a high-voltage insulating gas or a flexible silicone rubber. Among them, the high-voltage insulating gas can be an inert gas such as nitrogen and sulfur hexafluoride commonly used in the prior art, and the pressure of the high-voltage insulating gas is evenly distributed and wraps the dynamic insertion electrode 24. Since the high-voltage insulating gas has a certain pressure, when the dynamic insertion electrode 24 is pressed down, the high-voltage insulating gas is squeezed again, and the gas expands to generate pressure. The pressure is transmitted to the dynamic insertion electrode 24 through the gas, and then transmitted to the chip 100, thereby achieving the role of pressure compensation and improving the uniformity of the chip 100 crimping. In addition, silicone rubber can also be filled in the closed cavity 23. The material of the rubber silicone needs to be resistant to high temperatures (for example, it needs to be able to withstand the brazing temperature of the brazing process of the semiconductor device during the packaging process), and has good elastic deformation ability in the junction temperature range of the semiconductor device (≥125°C), so that the flexible connection of the entire cathode structure and the tube shell cathode 102 can be achieved, and the pressure uniformity between the metal electrodes can be improved. Of course, in other embodiments, the elastic buffer material filled inside the closed cavity 23 is not limited to the two substances mentioned in the present application, but may also be other elastic materials. As long as the material has elastic deformation properties or buffering properties, it is within the protection scope of the present application.

[0050] The chip 100 of the present application is also provided with an anode electrode 104 on the side facing away from the cathode electrode 101, and the anode electrode 104 can be an anode molybdenum sheet. Since the packaging structure of the present application adopts an additional dynamic voltage balancing module 200 on the basis of the cathode molybdenum sheet, the overall radial thickness of the packaging structure of the present application is increased compared with the original cathode molybdenum sheet, and the gate lead-out method of the chip 100 remains unchanged, which will affect the symmetry of the cathode electrode 101 and the anode electrode 104 of the chip 100, sacrificing the heat dissipation capacity of the cathode electrode 101 side, so it is necessary to compensate for the loss of thermal resistance of the entire semiconductor device by thinning / offsetting the anode electrode 104 packaging technology. Specifically, in order to achieve the unchanged overall thickness of the entire semiconductor device, the increased radial thickness of the cathode electrode 101 of the chip 100 can be compensated by thinning the radial thickness of the anode electrode 104, and the specific thinning thickness can be designed and calculated according to the increased thickness of the dynamic voltage balancing module 200.

[0051] The second aspect of the present application provides a semiconductor device, which includes the above-mentioned packaging structure of the chip and a package 300; the package 300 is provided with a package cathode 102 and a package anode 103, and both the package cathode 102 and the package anode 103 are conventional metal electrodes in the semiconductor device. The package cathode 102 is electrically connected to the conductive gasket 22 of the dynamic voltage equalizing module 200, and the package anode 103 is electrically connected to the anode electrode 104. It should be noted that the semiconductor device of the present application is a high-power semiconductor device for power transmission equipment. When packaging the semiconductor device, first, the packaging structure of the chip is hermetically electrically connected to the package cathode 102 through a soldering process. Specifically, electrical connection can be achieved through the conductive connection part 223 of the dynamic voltage equalizing module 200 and the package cathode 102. Then, the anode electrode 104 of the chip 100 is hermetically electrically connected to the package anode 103 through a soldering process, thereby realizing the packaging of the entire semiconductor device. The semiconductor device of the present application adopts all embodiments of the above-mentioned packaging structure of the chip, and thus has all the beneficial effects brought by the above-mentioned packaging structure of the chip, which will not be elaborated in detail here.

[0052] In some embodiments, as Figure 3 and Figure 6 shown, a stepped structure (such as the stepped structure shown in Figure 6 ) is provided on the outer periphery of the package cathode ( Figure 6 not shown), and the conductive gasket 22 of the dynamic voltage equalizing module 200 has a conductive connection part 223 extending outward, and the conductive connection part 223 is hermetically connected to the stepped structure. In this embodiment, the conductive connection part 223 and the stepped structure on the package cathode are hermetically connected through a soldering process in the prior art. Among them, the stepped structure can provide a certain deformation space for the dynamic voltage equalizing module 200, and the deformation amount ≥ 15 μm.

[0053] In addition, the metal plate 21 of the dynamic voltage equalizing module 200 and the stepped structure of the package cathode 102 are hermetically connected through a soldering process. Specifically, the surface of the metal plate 21 is in direct contact with the external radiator, and at the same time, the end of the metal plate 21 and the stepped structure are also hermetically connected to the package cathode 102 through a soldering process, thereby improving the connection stability and reliability between the metal plate 21 and the package cathode 102.

[0054] In the description of the present application, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one of these features. In the description of the present application, the meaning of "a plurality" is at least two, such as two, three, etc., unless otherwise specifically defined.

[0055] In this application, unless otherwise clearly specified or limited, the terms "installed", "connected", "connected to", "fixed", etc. shall be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection, an electrical connection, or communicable with each other; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the communication inside two components or the interaction relationship between two components, unless otherwise clearly limited. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0056] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples", etc. means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of this application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples. In addition, without contradiction, those skilled in the art can combine and combine the different embodiments or examples described in this specification and the features of different embodiments or examples.

[0057] Although the embodiments of this application have been shown and described above, it can be understood that the above embodiments are exemplary and should not be construed as limiting this application. Those of ordinary skill in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. A chip packaging structure, characterized in that: The chip packaging structure includes: a cathode electrode (101), stacked on the chip (100) and electrically connected to the chip (100), the cathode electrode (101) being divided into a plurality of pressure compensation areas (1011); A dynamic pressure equalizing module (200) is arranged on a side of the cathode electrode (101) away from the chip (100) and has a closed cavity (23), the closed cavity (23) is filled with an elastic buffer material, a plurality of dynamic insertion electrodes (24) are arranged in the closed cavity (23) and are electrically connected to the plurality of pressure compensation areas (1011) in a one-to-one correspondence, and an outer end of the dynamic pressure equalizing module (200) is sealed and connected to the external tube shell cathode (102); The dynamic pressure equalization module (200) comprises: a conductive gasket (22) located on a side of the cathode electrode (101) facing away from the chip (100), the side of the conductive gasket (22) facing away from the chip (100) being open, and the dynamic insertion electrode (24) being electrically connected to the pressure compensation area (1011) via the conductive gasket (22); A metal plate (21) is sealed at the opening, the metal plate (21) and the conductive gasket (22) cooperate to form the closed cavity (23), and a surface of the metal plate (21) facing away from the closed cavity (23) is in contact with an external heat sink.

2. The chip packaging structure according to claim 1, characterized in that: The pressure compensation area (1011) is an annular structure, and a plurality of the pressure compensation areas (1011) are arranged in sequence along the radial direction.

3. The chip packaging structure according to claim 1, characterized in that: The pressure compensation area (1011) is a fan-shaped structure, and the number of the pressure compensation areas (1011) of the fan-shaped structure is multiple and symmetrically distributed, and the multiple pressure compensation areas (1011) are combined into a disc-shaped structure.

4. The chip packaging structure according to claim 1, characterized in that: The conductive gasket (22) comprises a bottom surface (221) and a side surface (222) enclosing the periphery of the bottom surface (221); a plurality of dynamic insertion electrodes (24) are in contact with the bottom surface (221); an outer end portion of the side surface (222) extends toward a side away from the closed cavity (23) to form a conductive connection portion (223); and the conductive connection portion (223) is sealed and electrically connected to the external tube shell cathode (102).

5. The chip packaging structure according to claim 4, characterized in that: The number of the dynamic insertion electrodes (24) is the same as the number of the pressure compensation areas (1011) and they are arranged in a one-to-one correspondence, and the radial cross-sectional area of ​​each dynamic insertion electrode (24) is equal to the radial cross-sectional area of ​​each pressure compensation area (1011).

6. The chip packaging structure according to claim 5, characterized in that: A stop block (25) is provided between any two adjacent dynamic insertion electrodes (24), and a stop block (25) is also provided between the dynamic insertion electrode (24) located at the outermost layer and the side surface (222).

7. The chip packaging structure according to claim 6, characterized in that: The limit block (25) is made of a high temperature resistant and wear resistant material.

8. The chip packaging structure according to any one of claims 1 to 7, characterized in that: The elastic buffer material is high-voltage insulating gas or silicone rubber.

9. A semiconductor device, characterized in that: The semiconductor device comprises: The chip packaging structure according to any one of claims 1 to 8; and A tube shell (300), wherein a tube shell cathode (102) and a tube shell anode (103) are provided on the tube shell (300), the tube shell cathode (102) is electrically connected to the conductive gasket (22) of the dynamic voltage balancing module (200), and the tube shell anode (103) is electrically connected to the anode electrode (104) of the chip (100).

10. The semiconductor device according to claim 9, characterized in that The outer periphery of the tube shell cathode (102) is provided with a stepped structure, and the conductive gasket (22) of the dynamic voltage equalizing module (200) has a conductive connecting portion (223) extending outwards, and the conductive connecting portion (223) is sealed and connected to the stepped structure.

11. The semiconductor device according to claim 10, characterized in that The metal plate (21) of the dynamic pressure equalizing module (200) and the stepped structure of the tube shell cathode (102) are sealed and connected by a brazing process.

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