Power semiconductor device and its manufacturing method

Abstract

The present invention provides a power semiconductor device and a processing method thereof. The power semiconductor device includes: a first electrode structure and a second electrode structure, the first electrode structure and the second electrode structure are arranged at intervals, the second electrode structure includes an electrode main body and a first connection structure connected to the electrode main body; a chip, disposed between the first electrode structure and the electrode main body, and electrically connected to both the first electrode structure and the electrode main body; a housing assembly, the housing assembly includes a tube shell and a second connection structure disposed on the tube shell, the tube shell is disposed around the outer periphery of the chip, the tube shell is connected to the first electrode structure, and the second connection structure is connected to the first connection structure; an energy release channel is disposed between the first connection structure and the second connection structure. The technical solution of the present application effectively solves the problem that when the power semiconductor device in the related art is short-circuited, the probability that the released energy will damage the tube shell structure is relatively high.

Description

Technical Field

[0001] The present invention relates to the field of power semiconductor devices, and more particularly, to a power semiconductor device and a processing method thereof. Background Art

[0002] In power transmission equipment, high-power semiconductor devices play an indispensable role. The design of high-power semiconductor devices is directly related to the overall efficiency, stability, and safety of the power system. Especially under operating conditions of high voltage and large current, the reliability, durability, and explosion resistance of the devices need to be particularly considered.

[0003] In the prior art, when a high-power semiconductor device is under extreme operating conditions, such as short circuit, a huge amount of energy will be suddenly released inside it. This energy release not only poses a threat to the device itself, but may also cause the failure or even destruction of the shell structure. The failure or even destruction of the shell structure is not limited to the physical integrity of the shell structure. Its fragments and residues may also fly to the periphery of the shell structure, causing secondary damage to surrounding equipment, such as scratching or short-circuiting other components, thus triggering a chain reaction in the entire power system, reducing the reliability and safety of system operation, and may also cause harm to operators, increasing the probability of industrial safety accidents. Summary of the Invention

[0004] The main objective of the present invention is to provide a power semiconductor device and a processing method thereof, so as to solve the problem that when the power semiconductor device in the related technology is short-circuited, the probability that the released energy will damage the shell structure is relatively high.

[0005] To achieve the above objective, according to one aspect of the present invention, there is provided a power semiconductor device, including: a first electrode structure and a second electrode structure, the first electrode structure and the second electrode structure are spaced apart; the second electrode structure includes an electrode main body and a first connection structure connected to the electrode main body; a chip, disposed between the first electrode structure and the electrode main body, and electrically connected to both the first electrode structure and the electrode main body; a housing assembly, the housing assembly includes a shell and a second connection structure disposed on the shell, the shell surrounds the periphery of the chip, the shell is connected to the first electrode structure, and the second connection structure is connected to the first connection structure; an energy release channel, disposed on the first connection structure and / or the second connection structure, or disposed between the first connection structure and the second connection structure.

[0006] Further, the power semiconductor device further includes a third connection structure, and the third connection structure is disposed between the first connection structure and the second connection structure.

[0007] Furthermore, an energy release channel is provided between the first connection structure and the second connection structure. The third connection structure includes at least one connection portion, and the energy release channel includes at least one sub-channel. When the third connection structure includes one connection portion and the energy release channel includes one sub-channel, a sub-channel is formed between the two ends of the connection portion, between the first connection structure, and between the second connection structure. When the third connection structure includes multiple connection portions and the energy release channel includes multiple sub-channels, the multiple connection portions are arranged at intervals along the circumferential direction of the first connection structure, and a sub-channel is formed between any two adjacent connection portions, between the first connection structure, and between the second connection structure.

[0008] Furthermore, the power semiconductor device further includes an enclosure structure, which is disposed on the outer periphery of the first connection structure and the second connection structure and encloses the energy release channel.

[0009] Furthermore, the enclosure structure includes an enclosure ring, and a receiving groove is provided on the inner wall of the enclosure ring. The first connection structure and the second connection structure are inserted into the receiving groove and are arranged in contact with the groove wall of the receiving groove.

[0010] Furthermore, the enclosure ring includes a mounting plate, a first extension plate provided at the first end of the mounting plate, and a second extension plate provided at the second end of the mounting plate. The first extension plate and the second extension plate both extend toward the electrode body, and a receiving groove is formed among the mounting plate, the first extension plate, and the second extension plate.

[0011] Furthermore, the material of the enclosure ring is non-metallic.

[0012] Furthermore, a cavity is provided inside the housing.

[0013] Furthermore, the housing includes a first housing body and a second housing body connected to the first housing body in a butt joint manner, and a cavity is formed between the first housing body and the second housing body.

[0014] Furthermore, the housing further includes a first connection layer and a second connection layer. The first connection layer is provided on the first housing body, the second connection layer is provided on the second housing body, and the first connection layer and the second connection layer are connected to connect the first housing body and the second housing body.

[0015] Furthermore, the first connection layer is a first metal layer, and the second connection layer is a second metal layer.

[0016] Furthermore, the first housing body includes a first annular plate and a first convex plate provided on the first annular plate. The first connection layer is provided on the side of the first convex plate facing the second housing body to connect the first convex plate and the second housing body.

[0017] Further, the second housing includes a second annular plate and a second outwardly convex plate disposed on the second annular plate. The second outwardly convex plate and the first outwardly convex plate are spaced apart, and a second connection layer is disposed on a side of the second outwardly convex plate facing the first housing to connect the second outwardly convex plate to the first housing.

[0018] Further, the first housing is located inside the second housing, and an annular accommodation cavity is provided between the chip and the first housing.

[0019] Further, through holes are provided in the package, and the through holes communicate the annular accommodation cavity with the outside of the package. In the stacking direction of the first electrode structure and the second electrode structure, the minimum distance between the through holes and the cavity is between 0.5 mm and 3 mm.

[0020] Further, the power semiconductor device further includes a buffer structure located between the chip and the package. The surface of the buffer structure away from the package has a plurality of protrusions.

[0021] According to another aspect of the present invention, there is provided a method for manufacturing a power semiconductor device for manufacturing the above-mentioned power semiconductor device. The manufacturing method includes:

[0022] Obtaining a first electrode structure and a second electrode structure, wherein the electrode body and the first connection structure are connected to form the second electrode structure;

[0023] Obtaining a package and a second connection structure, and connecting the package to the second connection structure to obtain a housing assembly;

[0024] Connecting the package to the first electrode structure;

[0025] Electrically connecting the chip to the first electrode structure and placing the chip inside the housing assembly;

[0026] Electrically connecting the electrode body to the chip and placing the chip between the first electrode structure and the electrode body;

[0027] Providing an energy release channel on the first connection structure and / or the second connection structure, and connecting the first connection structure and the second connection structure; or connecting the first connection structure and the second connection structure and providing an energy release channel between the first connection structure and the second connection structure.

[0028] Applying the technical solution of the present invention, the power semiconductor device includes a first electrode structure, a second electrode structure spaced from the first electrode structure, a chip, a housing assembly, and an energy release channel. The second electrode structure includes an electrode main body and a first connection structure. The first connection structure is connected to the electrode main body, and the chip is electrically connected to the electrode main body. The chip is disposed between the first electrode structure and the electrode main body. The housing assembly includes a shell and a second connection structure. The shell is disposed around the periphery of the chip, and the second connection structure is disposed on the shell. The shell is connected to the first electrode structure, and the second connection structure is connected to the first connection structure. The energy release channel is disposed between the first connection structure and the second connection structure. Through the above arrangement, current can flow between the first electrode structure, the chip, and the electrode main body. The shell, the second connection structure, the first connection structure, the electrode main body, and the first electrode structure can protect the chip. When the power semiconductor device is short-circuited, the generated energy can be discharged through the energy release channel, reducing the probability that when the energy is relatively large, the energy breaks through the shell structure and causes damage to the shell structure, and further reducing the probability that the damaged shell structure causes damage to the equipment around the power semiconductor device. That is, by providing the energy release channel, an energy release path is provided for the power semiconductor device when it fails, avoiding the accumulation of energy inside the power semiconductor device, thereby reducing the risk of explosion of the power semiconductor device, and effectively reducing the probability of device explosion caused by short circuit, ensuring the safe operation of the equipment. Therefore, the technical solution of the present application effectively solves the problem that when the power semiconductor device in the related art is short-circuited, the probability of damage to the shell structure caused by the released energy is relatively high. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The accompanying drawings forming a part of this application are used to provide a further understanding of the present invention. The schematic embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0030] Figure 1 shows a three-dimensional structural schematic diagram of an embodiment of a power semiconductor device according to the present invention;

[0031] Figure 2 shows Figure 1 a cross-sectional schematic diagram of the power semiconductor device;

[0032] Figure 3 shows Figure 2 a partially enlarged schematic diagram at position A of the power semiconductor device;

[0033] Figure 4 shows Figure 1 a cross-sectional schematic diagram of the shell of the power semiconductor device;

[0034] Figure 5 shows Figure 1Exploded structural schematic diagram of the housing of a power semiconductor device;

[0035] Figure 6 Shows Figure 1 Cross-sectional schematic diagram of the connection between the first connection structure and the second connection structure of a power semiconductor device;

[0036] Figure 7 Shows Figure 1 Top view schematic diagram of the third connection structure of a power semiconductor device;

[0037] Figure 8 Shows Figure 1 Cross-sectional schematic diagram of the third connection structure of a power semiconductor device when it has only one sub-channel;

[0038] Figure 9 Shows Figure 1 Cross-sectional perspective schematic diagram of the housing of a power semiconductor device;

[0039] Figure 10 Shows Figure 1 Cross-sectional schematic diagram of the buffer structure of a power semiconductor device;

[0040] Figure 11 Shows Figure 1 Cross-sectional perspective schematic diagram of the buffer structure of a power semiconductor device;

[0041] Figure 12 Shows the schematic diagram of the connection between the first housing and the housing of another embodiment of a power semiconductor device according to the present invention;

[0042] Figure 13 Shows the flow schematic diagram of the manufacturing method of a power semiconductor device according to the present invention.

[0043] Wherein, the above-mentioned drawings include the following reference numerals:

[0044] 10. First electrode structure; 20. Second electrode structure; 21. Electrode body; 22. First connection structure; 30. Chip; 40. Housing assembly; 41. Package; 411. Cavity; 412. First housing; 4121. First annular plate; 4122. First convex plate; 4123. Third convex plate; 413. Second housing; 4131. Second annular plate; 4132. Second convex plate; 4133. Fourth convex plate; 414. First connection layer; 415. Second connection layer; 416. Through hole; 42. Second connection structure; 50. Energy release channel; 51. Sub-channel; 60. Third connection structure; 61. Connection part; 70. Sealing structure; 71. Sealing ring; 711. Mounting plate; 712. First extension plate; 713. Second extension plate; 72. Receiving groove; 80. Annular receiving cavity; 90. Buffer structure; 91. Convex part. Detailed implementation manners

[0045] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually illustrative only and in no way limits the present invention and its application or use. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0046] It should be noted that the terms used herein are only for describing specific implementation manners and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0047] Unless otherwise specifically stated, the relative arrangements, numerical expressions, and numerical values of the components and steps set forth in these embodiments do not limit the scope of the present invention. At the same time, it should be understood that, for the sake of convenience of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationships. Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the said technologies, methods, and devices should be regarded as part of the specification. In all the examples shown and discussed here, any specific values should be construed as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, further discussion thereof is not required in subsequent drawings.

[0048] As a core component of power transmission equipment, high-power semiconductor devices need to withstand a working environment of high voltage and large current in practical applications. The housings of existing crimping devices are usually composed of metal electrodes and ceramic shells. Due to the brittle properties of ceramic materials, when the chip fails due to a short circuit, a large amount of energy is instantaneously released, which may cause explosive damage inside the device and to the housing. On the one hand, the explosion of the housing will cause damage to the device body and lead to the failure of series components. On the other hand, the residues generated by the explosion of the housing may also impact nearby equipment, interfere with the operation of the equipment, reduce the reliability of the equipment operation, and even cause personal injury.

[0049] The capacitance value of the DC capacitor of the UHV converter sub-module is about 24 mF. When a power device-capacitor direct short-circuit extreme condition occurs, the short-circuit current exceeds 1000 kA. As the energy further increases, the ceramic housing and metal electrodes of the device may be impacted and fail by the huge energy. In this case, the explosion-proof failure of the housing is very likely to lead to serious accidents and pose potential hazards.

[0050] In the prior art, the housing material of the in-service crimping type high-power semiconductor device is ceramic, the sealing form is cold pressure welding, and the insulation form is gas insulation. The explosion-proof ability of this encapsulated structure device is reflected in the strength of the interface between the ceramic housing and the cold pressure welding. Moreover, due to the device size being restricted by equipment application and the internal space of the package as well as the thickness of the ceramic housing, when the failure energy of the device exceeds the load of the interface between the ceramic housing and the cold pressure welding, it will not have explosion-proof ability.

[0051] Such as Figures 1 to 3 and Figure 6As shown, in this embodiment, the power semiconductor device includes: a first electrode structure 10, a second electrode structure 20, a chip 30, a housing assembly 40, and an energy release channel 50. The first electrode structure 10 and the second electrode structure 20 are spaced apart. The second electrode structure 20 includes an electrode body 21 and a first connection structure 22 connected to the electrode body 21. The chip 30 is disposed between the first electrode structure 10 and the electrode body 21 and is electrically connected to both the first electrode structure 10 and the electrode body 21. The housing assembly 40 includes a housing 41 and a second connection structure 42 disposed on the housing 41. The housing 41 surrounds the outer periphery of the chip 30. The housing 41 is connected to the first electrode structure 10, and the second connection structure 42 is connected to the first connection structure 22. The energy release channel 50 is disposed between the first connection structure 22 and the second connection structure 42.

[0052] Applying the technical solution of this embodiment, the power semiconductor device includes a first electrode structure 10, a second electrode structure 20 spaced apart from the first electrode structure 10, a chip 30, a housing assembly 40, and an energy release channel 50. The second electrode structure 20 includes an electrode body 21 and a first connection structure 22. The first connection structure 22 is connected to the electrode body 21, and the chip 30 is electrically connected to the electrode body 21. The chip 30 is disposed between the first electrode structure 10 and the electrode body 21. The housing assembly 40 includes a housing 41 and a second connection structure 42. The housing 41 surrounds the outer periphery of the chip 30. The second connection structure 42 is disposed on the housing 41. The housing 41 is connected to the first electrode structure 10, and the second connection structure 42 is connected to the first connection structure 22. The energy release channel 50 is disposed between the first connection structure 22 and the second connection structure 42. Through the above arrangement, current can flow between the first electrode structure 10, the chip 30, and the electrode body 21. The housing 41, the second connection structure 42, the first connection structure 22, the electrode body 21, and the first electrode structure 10 can protect the chip 30. When the power semiconductor device is short-circuited, the generated energy can be discharged through the energy release channel 50, reducing the probability that when the energy is large, the energy breaks through the housing structure and causes damage to the housing structure, and further reducing the probability that the damaged housing structure damages the devices around the power semiconductor device. That is, by setting the energy release channel 50, a path for energy release is provided for the power semiconductor device when it fails, avoiding the accumulation of energy inside the power semiconductor device, thereby reducing the risk of explosion of the power semiconductor device and effectively reducing the probability of device explosion caused by short circuit, ensuring the safe operation of the device. Therefore, the technical solution of this embodiment effectively solves the problem in the related art that when the power semiconductor device is short-circuited, the probability of the released energy damaging the housing structure is relatively high.

[0053] The first connection structure 22 includes a first annular flange, and the second connection structure 42 includes a second annular flange.

[0054] The first electrode structure 10 is a cathode, and the electrode body 21 is an anode.

[0055] The housing assembly 40 further includes a cathode ceramic ring, and a gate lead flange is provided between the cathode ceramic ring and the tube shell 41. The tube shell 41 is connected to the first electrode structure 10, which means that the tube shell is connected to the first electrode structure through the gate lead flange and the cathode ceramic ring.

[0056] The power semiconductor device of this embodiment is an integrated gate-commutated thyristor.

[0057] like Figure 7 and Figure 8 As shown, in this embodiment, the power semiconductor device further includes a third connection structure 60, which is disposed between the first connection structure 22 and the second connection structure 42. By providing the third connection structure 60, the first connection structure 22 and the second connection structure 42 can be connected, so that the connection between the first connection structure 22 and the second connection structure 42 is more stable.

[0058] The third connection structure 60 is formed by argon arc welding.

[0059] like Figure 7 and Figure 8 As shown, in this embodiment, the energy release channel 50 is arranged between the first connection structure 22 and the second connection structure 42, the third connection structure 60 includes at least one connection portion 61, and the energy release channel 50 includes at least one sub-channel 51. By providing the connection portion, the connection between the first connection structure 22 and the second connection structure 42 can be made more stable. By providing the sub-channel 51, the release of energy is facilitated.

[0060] The energy release channel 50 refers to the gap between the first connection structure 22 and the second connection structure 42. After the power semiconductor device is manufactured, the first connection structure 22 and the second connection structure 42 are tightly fitted, and the gap between the first connection structure 22 and the second connection structure 42 is 0. However, when the energy is released, Figure 6 As shown, the energy shock wave can stretch the first connection structure 22 and the second connection structure 42 apart, so that the gap between the first connection structure 22 and the second connection structure 42 is greater than 0, which facilitates energy release.

[0061] In this embodiment, when the third connection structure 60 includes a plurality of connection portions 61 and the energy release channel 50 includes a plurality of sub-channels 51, the plurality of connection portions 61 are arranged at intervals in the circumferential direction of the first connection structure 22, and a sub-channel 51 is formed between any two adjacent connection portions 61, between the first connection structure 22 and the second connection structure 42. The arrangement of the plurality of connection portions 61 makes the connection between the first connection structure 22 and the second connection structure 42 more stable. A sub-channel 51 is formed between any two adjacent connection portions 61, between the first connection structure 22 and the second connection structure 42. In this way, when the connection between the first connection structure 22 and the second connection structure 42 is more stable, more sub-channels 51 can be formed, which is convenient for the rapid release of energy. By providing a plurality of sub-channels 51, multi-path release of energy can be achieved, effectively dispersing and reducing the pressure borne by a single channel, further improving the explosion resistance performance of the power semiconductor device, and significantly reducing the explosion risk caused by energy accumulation in the power semiconductor device.

[0062] In this embodiment, the number of connection portions is 6, and the 6 connection portions are evenly arranged at 60° intervals in the circumferential direction of the first connection structure 22. The sum of the arc lengths of the 6 connection portions 61 is 5% to 10% of the circumference of the first connection structure 22. Except for the 6 connection portions, the remaining positions in the circumferential direction of the first connection structure 22 and the second connection structure 42 are not welded.

[0063] As Figure 8 shown, when the third connection structure 60 includes one connection portion 61 and the energy release channel 50 includes one sub-channel 51, a sub-channel 51 is formed between the two ends of the connection portion 61, between the first connection structure 22 and the second connection structure 42. The connection portion 61 is an arc-shaped weld.

[0064] In other embodiments, the energy release channel 50 is provided on the first connection structure 22 and / or the second connection structure 42. At this time, the sub-channel of the energy release channel 50 is a hole structure. The hole structure can be provided on the first connection structure 22, or on the second connection structure 42, or on both the first connection structure 22 and the second connection structure 42.

[0065] As Figures 1 to 3As shown, in this embodiment, the power semiconductor device further includes a sealing structure 70. The sealing structure 70 is disposed on the outer periphery of the first connection structure 22 and the second connection structure 42 and seals the energy release channel 50. The sealing structure 70 can seal the energy release channel 50, thereby separating the energy release channel 50 from the outside of the power semiconductor device, preventing moisture in the external environment from entering the power semiconductor device and corroding the chip 30, the first electrode structure 10, and the second electrode structure 20, and maintaining the seal of the power semiconductor device. The setting of the sealing structure 70 ensures the sealing and insulation of the device under normal operating conditions, and can be damaged in time when the device fails, providing a channel for the release of energy and reducing the explosion risk.

[0066] The sealing structure 70 is obtained by injection molding.

[0067] As Figures 1 to 3 shown, in this embodiment, the sealing structure 70 includes a sealing ring 71. A receiving groove 72 is provided on the inner wall of the sealing ring 71. The first connection structure 22 and the second connection structure 42 are inserted into the receiving groove 72 and are arranged in contact with the groove wall of the receiving groove 72. By providing the sealing ring 71 with the receiving groove 72, the tight fit between the sealing ring 71 and the first connection structure 22 and the second connection structure 42 not only enhances the sealing performance of the sealing structure 70, but also makes the connection between the first connection structure 22 and the second connection structure 42 tighter, and can also seal the energy release channel 50, preventing the energy release channel 50 from communicating with the outside of the device. When the device fails, it can respond quickly, and by controlling the opening of the sealing ring 71, the release of energy is realized, further improving the safety and reliability of the device.

[0068] During injection molding, the device is in a press-fitted state, that is, the device is under pressure, which makes the contact between the first connection structure 22 and the second connection structure 42 tighter, thereby avoiding the probability of the encapsulating material entering the sub-channel 51 when the sealing ring 71 is formed by injection molding.

[0069] Under the action of the injection mold, the encapsulating material can be limited, and in cooperation with the first connection structure 22 and the second connection structure 42, a sealing ring 71 with a receiving groove 72 can be formed.

[0070] As Figures 1 to 3As shown, in this embodiment, the closed loop 71 includes a mounting plate 711, a first extension plate 712 disposed at the first end of the mounting plate 711, and a second extension plate 713 disposed at the second end of the mounting plate 711. Both the first extension plate 712 and the second extension plate 713 extend towards the electrode body 21. A receiving groove 72 is formed among the mounting plate 711, the first extension plate 712, and the second extension plate 713. The first extension plate 712 and the second extension plate 713 can clamp the first connection structure 22 and the second connection structure 42, and the mounting plate 711 can connect the first extension plate 712 and the second extension plate 713, so that the connection between the first connection structure 22 and the second connection structure 42 is more stable, and the energy release channel 50 can be closed.

[0071] Both the first extension plate 712 and the second extension plate 713 extend along the radial direction of the electrode body 21.

[0072] As Figures 1 to 3 shown, in this embodiment, the material of the closed loop 71 is non-metal. Such a setting not only reduces the weight of the closed loop 71, but also improves the corrosion resistance and insulation of the power semiconductor device.

[0073] As Figure 2 , Figure 4 and Figure 9 shown, in this embodiment, a cavity 411 is provided in the housing 41. When energy is released, the cavity 411 can absorb part of the energy, providing an additional buffer space for the energy, further improving the explosion resistance of the power semiconductor device. It can absorb and disperse the explosion energy when the device fails, effectively reducing the stress concentration of the housing 41, improving the explosion resistance of the device, and significantly reducing the explosion risk caused by internal energy accumulation in the device.

[0074] The width of the cavity 411 is between 3 mm and 6 mm, and can be 3 mm, 3.5 mm, 4 mm, 4.5 mm, 5 mm or 6 mm.

[0075] As Figure 2 , Figure 4 , Figure 5 , Figure 9 and Figure 12 shown, in this embodiment, the housing 41 includes a first housing 412 and a second housing 413 that is butt-connected to the first housing 412. A cavity 411 is formed between the first housing 412 and the second housing 413. By providing the first housing 412 and the second housing 413 and butt-connecting the first housing 412 and the second housing 413, the housing 41 with the cavity 411 is easier to process.

[0076] The material of the package 41 is ceramic, that is, the material of the first housing 412 is ceramic, and the material of the second housing 413 is ceramic.

[0077] As Figure 2 , Figure 4 and Figure 9 shown, in this embodiment, the package 41 further includes a first connection layer 414 and a second connection layer 415. The first connection layer 414 is disposed on the first housing 412, and the second connection layer 415 is disposed on the second housing 413. The first connection layer 414 and the second connection layer 415 are connected to connect the first housing 412 and the second housing 413. By providing the first connection layer 414 and the second connection layer 415 and connecting the first connection layer 414 and the second connection layer 415, the connection between the first housing 412 and the second housing 413 can be made easier.

[0078] As Figure 4 shown, in this embodiment, the first connection layer 414 is a first metal layer, and the second connection layer 415 is a second metal layer. The connection between the first metal layer and the second metal layer is relatively easy, and thus the connection between the first housing 412 and the second housing 413 is easier.

[0079] The first metal layer can be connected to the first housing 412, and the second metal layer can be connected to the second housing 413.

[0080] As Figures 2 to 4 shown, in this embodiment, the first housing 412 includes a first annular plate 4121 and a first convex plate 4122 disposed on the first annular plate 4121. The first connection layer 414 is disposed on the side of the first convex plate 4122 facing the second housing 413 to connect the first convex plate 4122 and the second housing 413. By providing the first convex plate 4122, a gap can be formed between the first annular plate 4121 and the second housing 413, facilitating the formation of the cavity 411. The first connection layer 414 is disposed on the first convex plate 4122, which facilitates the connection between the first convex plate 4122 and the second housing 413.

[0081] As Figures 2 to 4As shown, in this embodiment, the second housing 413 includes a second annular plate 4131 and a second outwardly convex plate 4132 provided on the second annular plate 4131. The second outwardly convex plate 4132 and the first outwardly convex plate 4122 are spaced apart. The second connecting layer 415 is provided on the side of the second outwardly convex plate 4132 facing the first housing 412 to connect the second outwardly convex plate 4132 to the first housing 412. By providing the second outwardly convex plate 4132, a space can be formed between the second annular plate 4131 and the second housing 413, further facilitating the formation of the cavity 411. The second connecting layer 415 is provided on the second outwardly convex plate 4132, which facilitates the connection between the second outwardly convex plate 4132 and the first housing 412. Thus, under the action of the first outwardly convex plate 4122 and the second outwardly convex plate 4132, a cavity is formed between the first housing 412 and the second housing 413.

[0082] The first housing 412 further includes a third outwardly convex plate 4123 provided on the first annular plate 4121, and the third outwardly convex plate 4123 is connected to the second outwardly convex plate 4132.

[0083] The first housing 412 further includes a third connecting layer provided on the side of the third outwardly convex plate 4123 facing the second housing 413. The third connecting layer is a third metal layer. The third connecting layer is connected to the second connecting layer to connect the second outwardly convex plate 4132 to the third outwardly convex plate 4123, thereby making the connection between the first housing 412 and the second housing 413 more stable.

[0084] The second housing 413 further includes a fourth outwardly convex plate 4133 provided on the second annular plate 4131, and the fourth outwardly convex plate 4133 is connected to the first outwardly convex plate 4122.

[0085] The second housing 413 further includes a fourth connecting layer provided on the side of the fourth outwardly convex plate 4133 facing the first housing 412. The fourth connecting layer is a fourth metal layer. The fourth connecting layer is connected to the first connecting layer to connect the fourth outwardly convex plate 4133 to the first outwardly convex plate 4122, thereby making the connection between the first housing 412 and the second housing 413 more stable.

[0086] It should be noted that, in this embodiment, the thickness of the second outwardly convex plate 4132 and the third outwardly convex plate 4123 is between 1 mm and 1.5 mm. Specifically, it can be 1 mm, 1.2 mm, 1.3 mm, or 1.5 mm.

[0087] It should be noted that, in this embodiment, the wall thickness of the first annular plate 4121 is between 1 mm and 1.5 mm. Specifically, it can be 1 mm, 1.2 mm, 1.3 mm, or 1.5 mm.

[0088] As Figure 12As shown in Fig. a, in other embodiments, different from this embodiment: the first housing 412 only includes the first annular plate 4121, without the first convex plate 4122 and the third convex plate 4123, and the second convex plate 4132 and the fourth convex plate 4133 on the second housing 413 are both provided. The two ends of the first annular plate 4121 are respectively connected to the second convex plate 4132 and the fourth convex plate 4133 of the second housing 413. The first connection layer 414 and the second connection layer 415 are respectively provided at the two ends of the first annular plate 4121.

[0089] As Figure 12 shown in Fig. b, in other embodiments, different from this embodiment: the first housing 412 includes the first annular plate 4121 and the third convex plate 4123, without the first convex plate 4122, and the second convex plate 4132 and the fourth convex plate 4133 on the second housing 413 are both provided. The first connection layer 414 is provided at one end of the first annular plate 4121 close to the fourth convex plate 4133, and the fourth connection layer is correspondingly provided on the fourth convex plate 4133.

[0090] As Figure 12 shown in Fig. c, in other embodiments, different from this embodiment: the first housing 412 includes the first annular plate 4121 and the first convex plate 4122, without the third convex plate 4123, and the second convex plate 4132 and the fourth convex plate 4133 on the second housing 413 are both provided. The third connection layer is provided at one end of the first annular plate 4121 close to the second convex plate 4132, and the second connection layer 415 is correspondingly provided on the second convex plate 4132.

[0091] As Figure 12 shown in Fig. d, in other embodiments, different from this embodiment: the first housing 412 includes the first annular plate 4121 and the third convex plate 4123, without the first convex plate 4122, and the second housing 413 includes the second annular plate 4131 and the fourth convex plate 4133, without the second convex plate 4132. The first connection layer 414 is provided at one end of the first annular plate 4121 close to the fourth convex plate 4133, and the fourth connection layer is correspondingly provided on the fourth convex plate 4133. The second connection layer 415 is provided on one side of the second annular plate 4131 close to the first annular plate 4121, and is correspondingly provided with the third connection layer.

[0092] As Figure 12 shown in Fig. e, in other embodiments, different from this embodiment: the first housing 412 includes the first annular plate 4121, the first convex plate 4122 and the third convex plate 4123, and the second housing 413 includes the second annular plate 4131 and the fourth convex plate 4133, without the second convex plate 4132. The second connection layer 415 is provided on one side of the second annular plate 4131 close to the first annular plate 4121, and is correspondingly provided with the third connection layer.

[0093] As Figure 12 shown in Fig. f, in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121 and a first outwardly convex plate 4122, without providing a third outwardly convex plate 4123, and the second housing 413 includes a second annular plate 4131 and a second outwardly convex plate 4132, without providing a fourth outwardly convex plate 4133. The fourth connection layer is disposed on one side of the second annular plate 4131 close to the first annular plate 4121, and is correspondingly disposed with the first connection layer 414. The third connection layer is disposed at one end of the first annular plate 4121 close to the second outwardly convex plate 4132, and the second connection layer 415 is correspondingly disposed on the second outwardly convex plate 4132.

[0094] As Figure 12 shown in Fig. g, in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121, a first outwardly convex plate 4122 and a third outwardly convex plate 4123, and the second housing 413 includes a second annular plate 4131 and a second outwardly convex plate 4132, without providing a fourth outwardly convex plate 4133. The fourth connection layer is disposed on one side of the second annular plate 4131 close to the first annular plate 4121, and is correspondingly disposed with the first connection layer 414.

[0095] As Figure 12 shown in Fig. h, in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121, a first outwardly convex plate 4122 and a third outwardly convex plate 4123, and the second housing 413 only includes a second annular plate 4131. The second connection layer 415 and the fourth connection layer are spaced apart and disposed on one side of the second annular plate 4131 close to the first annular plate 4121. The first connection layer 414 is correspondingly disposed with the fourth connection layer, and the second connection layer 415 is correspondingly disposed with the third connection layer.

[0096] As Figure 12 shown in Fig. i, in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121 and a first outwardly convex plate 4122, without providing a third outwardly convex plate 4123, and the second housing 413 includes a second annular plate 4131, a second outwardly convex plate 4132 and a fourth outwardly convex plate 4133. The third connection layer is disposed on one side of the first annular plate 4121 close to the second annular plate 4131, and is correspondingly disposed with the second connection layer 415.

[0097] As Figure 12As shown in , in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121 and a third outwardly convex plate 4123, and does not provide the first outwardly convex plate 4122. The second housing 413 includes a second annular plate 4131 and a fourth outwardly convex plate 4133, and does not provide the second outwardly convex plate 4132. The first connection layer 414 is disposed on the side of the first annular plate 4121 close to the second annular plate 4131, and is correspondingly disposed with the fourth connection layer. The second connection layer 415 is disposed on the side of the second annular plate 4131 close to the first annular plate 4121, and is correspondingly disposed with the first connection layer 414.

[0098] As Figure 12 As shown in , in other embodiments, different from this embodiment: the first housing 412 includes a first annular plate 4121 and a third outwardly convex plate 4123, and does not provide the first outwardly convex plate 4122. The second housing 413 includes a second annular plate 4131, a second outwardly convex plate 4132, and a fourth outwardly convex plate 4133. The first connection layer 414 is disposed on the side of the first annular plate 4121 close to the second annular plate 4131, and is correspondingly disposed with the fourth connection layer.

[0099] As Figure 2 As shown, in this embodiment, the first housing 412 is located inside the second housing 413, and there is an annular accommodation cavity 80 between the chip 30 and the first housing 412. By providing the annular accommodation cavity 80, there is a gap between the chip 30 and the first housing 412, so that the transmission path of energy can be extended to consume part of the energy, and to avoid the energy released directly impacting the first housing 412 when the chip 30 is attached to the first housing 412, causing damage to the first housing 412.

[0100] The annular accommodation cavity 80 of the power semiconductor device is formed between the first electrode structure 10, the second electrode structure 20, the chip 30, and the inner wall of the package 41.

[0101] As Figure 9 As shown, in this embodiment, the package 41 is provided with a through hole 416, and the through hole 416 communicates the annular accommodation cavity 80 and the outside of the package 41. In the stacking direction of the first electrode structure 10 and the second electrode structure 20, the minimum distance between the through hole 416 and the cavity 411 is between 0.5 mm and 3 mm. Through the through hole 416, an insulating gas can be input into the annular accommodation cavity 80, thereby realizing the protection of the chip 30, the first electrode structure 10, and the second electrode structure 20. By limiting the minimum distance between the through hole 416 and the cavity 411, there can be a sufficient distance between the through hole 416 and the cavity 411, so that the partial structure of the package 41 between the through hole 416 and the cavity 411 can have sufficient structural strength, and avoid the partial structure of the package 41 between the through hole 416 and the cavity 411 from breaking.

[0102] As shown Figure 4 in the figure, the minimum distance between the through hole 416 and the cavity 411 is L, and L can be 0.5 mm, 1 mm, 1.5 mm, 2 mm, 2.5 mm or 3 mm. Such a setting can ensure the structural strength of the package 41.

[0103] Preferably, the minimum distance between the through hole 416 and the cavity 411 is between 1 mm and 2 mm.

[0104] The minimum distance between the through hole 416 and the cavity 411 is the minimum distance between the hole wall of the through hole 416 and the side wall of the cavity 411 close to the second connection structure 42.

[0105] The diameter of the through hole 416 is between 1 mm and 3 mm. Specifically, it can be 1 mm, 1.5 mm, 2 mm, 2.5 mm or 3 mm. Preferably, the diameter of the through hole is between 1.5 mm and 2.5 mm.

[0106] In this embodiment, the through hole 416 includes a first sub-hole and a second sub-hole. The first sub-hole and the second sub-hole are communicated.

[0107] The first sub-hole is arranged on the first outer convex plate 4122 of the first housing 412, and the first sub-hole extends along the radial direction of the first housing 412. The second sub-hole is arranged on the fourth outer convex plate 4133 of the second housing 413, and the second sub-hole extends along the radial direction of the second housing 413. After the insulating gas is filled, the through hole 416 is sealed.

[0108] The minimum distance between the hole wall of the through hole 416 and one end of the package 41 close to the second connection structure 42 is also L. This can ensure the structural strength of the package 41.

[0109] In other embodiments, the first sub-hole is arranged on the third outer convex plate 4123 of the first housing 412, and the second sub-hole is arranged on the second outer convex plate 4132 of the second housing 413.

[0110] As Figure 10 and Figure 11 shown in the figure, in this embodiment, the power semiconductor device further includes a buffer structure 90. The buffer structure 90 is located between the chip 30 and the package 41. The surface of the buffer structure 90 away from the first housing 412 has a plurality of convex portions 91. By providing the buffer structure 90, the energy released by the power semiconductor device when the chip 30 is short-circuited can be absorbed. The setting of the plurality of convex portions 91 enables the buffer structure 90 to absorb more energy.

[0111] The buffer structure 90 is located on the side of the first housing 412 away from the second housing 413.

[0112] The buffer structure 90 is arranged in the annular accommodation cavity 80.

[0113] In the stacking direction of the first electrode structure 10 and the second electrode structure 20, the buffer structure 90 and the through hole 416 are arranged at intervals to prevent the buffer structure 90 from interfering with the through hole 416 and affecting the entry of the insulating gas.

[0114] In other embodiments, the buffer structure 90 may also be arranged at intervals from the first housing 412 and is located on the side of the first housing 412 away from the second housing 413.

[0115] It should be noted that the power semiconductor device further includes an energy absorption structure. The energy absorption structure includes an energy absorption ring, and the energy absorption ring is arranged in the cavity 411. A plurality of through holes are provided on the energy absorption ring, and the plurality of through holes penetrate the thickness direction of the energy absorption ring. Such an arrangement can enable the energy absorption ring to absorb the energy transmitted to the cavity 411 in the cavity 411.

[0116] The material of the energy absorption ring is the same as that of the buffer structure 90. The cross-section of the through hole can be circular, hexagonal or other polygons.

[0117] The energy absorption structure further includes a plurality of elastic columns, and the plurality of elastic columns are arranged in one-to-one correspondence with the plurality of through holes and are located in the through holes. This can further improve the energy absorption effect of the energy absorption structure.

[0118] There is a gap between the outer periphery of the elastic column and the inner wall of the through hole, which facilitates the deformation of the structure of the energy absorption ring and the extrusion of the elastic column, making the energy absorption effect of the energy absorption structure better.

[0119] When manufacturing the semiconductor device, first, the plurality of elastic columns are respectively placed into the plurality of through holes, then the energy absorption structure is placed into the second housing 413, and then the first housing 412 and the second housing 413 are connected.

[0120] The structure and technical effects of the preferred embodiment of the power semiconductor device of the present application are as follows:

[0121] The power semiconductor device of this embodiment proposes a packaging solution for a power semiconductor device. By setting an explosion relief buffer layer (i.e., the buffer structure 90), an explosion relief cavity (i.e., the cavity 411), and improving the tube shell sealing form to umbrella skirt plastic sealing (i.e., the closed ring 71), etc., the anti-explosion ability of the device is improved while ensuring the packaging requirements such as tube shell insulation and sealing.

[0122] The power semiconductor device of this embodiment has a first explosion relief structure, a second explosion relief structure, and a third explosion relief structure. Specifically:

[0123] (1) First explosion venting structure: A buffer structure 90 with a non-smooth surface is filled in the gap between the inner wall of the package 41 of the power semiconductor device in this embodiment and the chip 30. Among them, the material of the buffer structure 90 is an energy-absorbing material, including but not limited to porous materials such as polyurethane and porous silicon. The inner wall surface of the material has a convex structure (i.e., the convex part 91), including but not limited to a pyramid, a spherical surface, etc. The corresponding mechanism is to regulate the action direction of the energy shock wave, realize the regulation of the energy shock wave direction, and maximize the energy neutralization inside the buffer structure 90. At the same time, an explosion-proof coating, such as a polyurea coating, is provided on the outer surface of the package 41 and is coated on the outer surface of the package by spraying.

[0124] (2) Second explosion venting structure: The package 41 of the power semiconductor device in this embodiment is different from the traditional integrally formed porcelain ring and is composed of an outer ring (i.e., the second housing 413) and an inner ring (i.e., the first housing 412). Among them, there is an explosion venting cavity (i.e., the cavity 411) between the inner ring and the outer ring after they are combined and connected. The width of the explosion venting cavity (i.e., the distance between the two surfaces of the cavity 411 in the direction from the inner ring to the outer ring) is between 3 mm and 6 mm, and the distance between the explosion venting cavity and the inner surface of the porcelain ring (i.e., the wall thickness of the first annular plate 4121) and the lower surface of the porcelain ring is between 1 mm and 1.5 mm (i.e., the thickness of the second outer convex plate 4132). Among them, the contact surfaces of the inner ring and the outer ring are metallized (i.e., the first connection layer 414, the second connection layer 415, the third connection layer, and the fourth connection layer). The metallization material is generally metals such as nickel, copper, and tin, and its purpose is to achieve high-temperature vacuum brazing connection; the welding process parameters are silver-copper-titanium active brazing filler metal (AgCuTi 4.5 ), and the brazing temperature range is 830 to 930 °C. After the inner ring and the outer ring are brazed, they are used as a whole component to replace the porcelain ring in the traditional packaging solution and complete the remaining package assembly.

[0125] (3) The third explosion venting structure: The shell sealing of the power semiconductor device in this embodiment is different from the traditional cold pressure welding process, and the shell sealing is realized by the plastic encapsulation sealing process. Among them, the shell sealing process is carried out in three steps: argon arc welding fixation, plastic encapsulation sealing, and filling insulating gas. An inflation hole (i.e., through hole 416) needs to be reserved on the side wall of the shell. For argon arc welding fixation, a specific pressing fixture needs to be developed to keep the device in a pressed state during the fixation process, and the pressure is between 10% and 20% of the device installation pressure; and the welding positions are spaced at 60°, and the welding length is 5% to 10% of the perimeter of the umbrella skirt (i.e., the first connection structure 22), and the rest of the area is not welded. Among them, the device is still in a pressed state during the injection molding process, and the pressure is 10% to 20% of the device installation pressure. The melted plastic encapsulation filler is injected into the connection of the shell umbrella skirt (i.e., the connection of the first connection structure 22 and the second connection structure 42) through the plastic encapsulation mold, and is degassed and cured at high temperature to form a closed ring 71. The plastic encapsulation filler is an epoxy plastic encapsulation material, such as bisphenol F epichlorohydrin epoxy resin. The plastic encapsulation temperature is 175 °C, the pressure is 7 MPa, and the plastic encapsulation time is 90 s. The insulating gas is filled through the reserved air holes, and the sealing is completed by the argon arc welding process. The types of insulating gas are: nitrogen or sulfur hexafluoride, and the filling pressure is: 75 to 85 kPa. The overall airtightness of the device needs to meet 1E -7 Pa·m 3 / s.

[0126] The prior art adopts a ceramic shell sealing structure, and seals the explosion energy inside the shell by the method of "blocking". As the power level of the device increases, the failure energy increases exponentially with the operating voltage, and the explosion power will only become greater and greater, and it cannot play an effective anti-explosion role.

[0127] However, this solution adopts the method of "venting", and releases the explosion energy in three stages (i.e., the first explosion venting structure, the second explosion venting structure, and the third explosion venting structure), which greatly reduces the negative impact generated after the device explodes, and solves the problem that the existing packaging structure does not have anti-explosion performance from the perspective of packaging.

[0128] The present invention provides an anti-explosion packaging solution and a shell structure design method for power devices; a three-stage explosion venting solution combining a buffer layer - cavity - plastic encapsulation (i.e., the first explosion venting structure, the second explosion venting structure, and the third explosion venting structure) is proposed, which improves the explosion venting ability of the device and enhances the application reliability of the device without changing the insulation and sealing performance of the shell.

[0129] As Figure 13 shown, the processing method of the power semiconductor device in this embodiment is used to process the above-mentioned power semiconductor device, and the processing method includes:

[0130] Step S10: Obtain the first electrode structure 10 and the second electrode structure 20. Among them, the electrode body 21 and the first connection structure 22 are connected to form the second electrode structure 20;

[0131] Step S20: Obtain the shell 41 and the second connection structure 42, and connect the shell 41 and the second connection structure 42 to obtain the housing assembly 40;

[0132] Step S30: Connect the shell 41 with the first electrode structure 10;

[0133] Step S40: Electrically connect the chip 30 with the first electrode structure 10, and place the chip 30 inside the housing assembly 40;

[0134] Step S50: Electrically connect the electrode body 21 with the chip 30, and place the chip 30 between the first electrode structure 10 and the electrode body 21;

[0135] Step S60: Connect the first connection structure 22 and the second connection structure 42, and arrange an energy release channel 50 between the first connection structure 22 and the second connection structure 42.

[0136] Through the above arrangements, the first electrode structure 10, the second electrode structure 20 and the shell 41 can be obtained. Connect the shell 41 with the first electrode structure 10, electrically connect the chip 30 with the first electrode structure 10, and connect the chip 30 with the electrode body 21. Arrange an energy release channel 50 between the first connection structure 22 and the second connection structure 42 to facilitate the release of energy.

[0137] In other embodiments, arrange an energy release channel 50 on the first connection structure 22 and / or the second connection structure 42, and connect the first connection structure 22 and the second connection structure 42.

[0138] The steps of arranging an energy release channel on the first connection structure 22 include:

[0139] Fabricate a plurality of hole structures on the first connection structure 22.

[0140] Through the above arrangements, an energy release channel can be formed on the first connection structure 22.

[0141] The steps of arranging an energy release channel on the second connection structure 42 include:

[0142] Fabricate a plurality of hole structures on the second connection structure 42.

[0143] Through the above arrangements, an energy release channel can be formed on the second connection structure 42.

[0144] In this embodiment, the steps of step S20: obtaining the shell 41 include:

[0145] Obtain the first housing 412 and the second housing 413 respectively;

[0146] Dock and connect the first housing 412 and the second housing 413.

[0147] Through the above settings, the first housing 412 and the second housing 413 can be obtained, and the first housing 412 and the second housing 413 can be connected to obtain the package 41.

[0148] In this embodiment, the steps before docking and connecting the first housing 412 and the second housing 413 include:

[0149] Form a first connection layer 414 on the first outer convex plate 4122;

[0150] Form a second connection layer 415 on the second outer convex plate 4132.

[0151] Through the above settings, a first connection layer 414 can be formed on the first outer convex plate 4122, and a second connection layer 415 can be formed on the second outer convex plate 4132, facilitating the docking and connection of the first housing 412 and the second housing 413.

[0152] In this embodiment, the steps of docking and connecting the first housing 412 and the second housing 413 include:

[0153] Connect the first connection layer 414 and the second connection layer 415 so that the first housing 412 and the second housing 413 are connected.

[0154] Through the above settings, the first housing 412 and the second housing 413 can be connected, and then the package 41 can be obtained.

[0155] In this embodiment, the steps of connecting the first connection layer 414 and the second connection layer 415 include:

[0156] Connect the first connection layer 414 and the second connection layer 415 under a first preset process condition.

[0157] Through the above settings, the first connection layer 414 and the second connection layer 415 can be connected.

[0158] The first preset process condition is: under vacuum conditions, using a silver-copper-titanium active brazing filler metal, with a temperature range of 830 to 930 °C, for brazing.

[0159] In this embodiment, for step S30: the steps before connecting the package 41 and the first electrode structure 10 include:

[0160] Obtain a buffer structure 90;

[0161] Connect the buffer structure 90 and the package 41.

[0162] Through the above settings, a buffer structure 90 can be connected to the inner wall of the shell 41.

[0163] In this embodiment, step S60: The step of connecting the first connection structure 22 and the second connection structure 42 includes:

[0164] A third connection structure 60 is provided between the first connection structure 22 and the second connection structure 42, and an energy release channel 50 is formed.

[0165] Through the above settings, while the third connection structure 60 can connect the first connection structure 22 and the second connection structure 42, the energy release channel 50 is formed.

[0166] In this embodiment, the step of providing a third connection structure 60 between the first connection structure 22 and the second connection structure 42 includes:

[0167] The first connection structure 22 and the second connection structure 42 are connected under a second preset process condition to obtain a plurality of connection portions 61.

[0168] Through the above settings, a plurality of connection portions 61 can be obtained to obtain the third connection structure 60 and simultaneously form sub-channels 51.

[0169] The second preset process condition is: using a press-fitting fixture to keep the fixing process device in a press-fitting state, with the pressure between 10% and 20% of the device installation pressure, and using the argon arc welding process for welding.

[0170] In this embodiment, step S60: The steps after connecting the first connection structure 22 and the second connection structure 42 include:

[0171] Under a third preset process condition, a closed structure 70 is obtained.

[0172] Through the above settings, a closed structure 70 can be obtained to close the energy release channel 50.

[0173] The third preset process condition is: using a plastic encapsulation mold to inject molten plastic encapsulation filler into the connection between the first connection structure 22 and the second connection structure 42, and performing high-temperature degassing and curing. The plastic encapsulation filler is an epoxy plastic encapsulation material such as bisphenol F epoxy chloropropane epoxy resin. The plastic encapsulation temperature is 175 °C, the pressure is 7 MPa, and the plastic encapsulation time is 90 s.

[0174] In the description of the present invention, it should be understood that the orientation or positional relationship indicated by orientation words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom", etc. is usually based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description. Without contrary explanations, these orientation words do not indicate and imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation on the protection scope of the present invention; the orientation words "inside, outside" refer to the inside and outside relative to the contour of each component itself.

[0175] For the sake of convenience in description, spatial relative terms such as "above...", "over...", "on the upper surface of...", "upper" etc. can be used here to describe the spatial positional relationship between a device or feature shown in the drawings and other devices or features. It should be understood that the spatial relative terms are intended to cover different orientations in use or operation in addition to the orientation described in the drawings for the device. For example, if the device in the drawings is inverted, the device described as "above other devices or structures" or "over other devices or structures" will then be positioned as "below other devices or structures" or "under other devices or structures". Thus, the exemplary term "above..." can include both the orientations of "above..." and "below...". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and corresponding interpretations should be made for the spatial relative descriptions used here.

[0176] In addition, it should be noted that the use of words such as "first", "second", etc. to limit components is only for the convenience of differentiating the corresponding components. Without separate statements, the above words have no special meanings. Therefore, it should not be construed as a limitation on the protection scope of the present invention.

[0177] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various modifications and changes. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A power semiconductor device, characterized in that: include: A first electrode structure (10) and a second electrode structure (20), wherein the first electrode structure (10) and the second electrode structure (20) are arranged at an interval, and the second electrode structure (20) comprises an electrode body (21) and a first connection structure (22) connected to the electrode body (21); a chip (30) disposed between the first electrode structure (10) and the electrode body (21), and electrically connected to both the first electrode structure (10) and the electrode body (21); A housing component (40), the housing component (40) comprising a tube shell (41) and a second connection structure (42) arranged on the tube shell (41), the tube shell (41) being arranged around the periphery of the chip (30), the tube shell (41) being connected to the first electrode structure (10), and the second connection structure (42) being connected to the first connection structure (22); An energy release channel (50) is arranged between the first connection structure (22) and the second connection structure (42); The power semiconductor device further comprises a third connection structure (60), wherein the third connection structure (60) is arranged between the first connection structure (22) and the second connection structure (42); The energy release channel (50) is arranged between the first connection structure (22) and the second connection structure (42), the third connection structure (60) comprises at least one connection portion (61), and the energy release channel (50) comprises at least one sub-channel (51); Wherein, when the third connection structure (60) includes a connection portion (61) and the energy release channel (50) includes a sub-channel (51), the sub-channel (51) is formed between two ends of the connection portion (61) and between the first connection structure (22) and the second connection structure (42); When the third connection structure (60) includes a plurality of connection portions (61) and the energy release channel (50) includes a plurality of sub-channels (51), the plurality of connection portions (61) are arranged at intervals along the circumference of the first connection structure (22), and one sub-channel (51) is formed between any two adjacent connection portions (61) and between the first connection structure (22) and the second connection structure (42).

2. The power semiconductor device according to claim 1, characterized in that: The power semiconductor device further comprises a closed structure (70), wherein the closed structure (70) is arranged on the periphery of the first connection structure (22) and the second connection structure (42) and closes the energy release channel (50).

3. The power semiconductor device according to claim 2, characterized in that: The closed structure (70) comprises a closed ring (71), an inner wall of the closed ring (71) being provided with a receiving groove (72), the first connecting structure (22) and the second connecting structure (42) being inserted into the receiving groove (72) and being arranged in close contact with the groove wall of the receiving groove (72).

4. The power semiconductor device according to claim 3, characterized in that: The closed ring (71) comprises a mounting plate (711), a first extension plate (712) arranged at a first end of the mounting plate (711), and a second extension plate (713) arranged at a second end of the mounting plate (711), the first extension plate (712) and the second extension plate (713) both extending toward the electrode body (21), and the accommodating groove (72) is formed between the mounting plate (711), the first extension plate (712), and the second extension plate (713).

5. The power semiconductor device according to claim 3, characterized in that: The material of the closed ring (71) is non-metal.

6. The power semiconductor device according to any one of claims 1 to 5, characterized in that: A cavity (411) is provided in the tube shell (41).

7. The power semiconductor device according to claim 6, characterized in that: The tube shell (41) comprises a first shell (412) and a second shell (413) butt-connected to the first shell (412), and the cavity (411) is formed between the first shell (412) and the second shell (413).

8. The power semiconductor device according to claim 7, characterized in that: The tube shell (41) further comprises a first connection layer (414) and a second connection layer (415); the first connection layer (414) is arranged on the first shell (412); the second connection layer (415) is arranged on the second shell (413); the first connection layer (414) and the second connection layer (415) are connected to connect the first shell (412) and the second shell (413).

9. The power semiconductor device according to claim 8, characterized in that: The first connection layer (414) is a first metal layer, and the second connection layer (415) is a second metal layer.

10. The power semiconductor device according to claim 8, characterized in that: The first shell (412) includes a first annular plate (4121) and a first outer convex plate (4122) arranged on the first annular plate (4121), and the first connecting layer (414) is arranged on a side of the first outer convex plate (4122) facing the second shell (413) so as to connect the first outer convex plate (4122) to the second shell (413).

11. The power semiconductor device according to claim 10, characterized in that: The second shell (413) includes a second annular plate (4131) and a second outer convex plate (4132) arranged on the second annular plate (4131), the second outer convex plate (4132) and the first outer convex plate (4122) are arranged at intervals, and the second connecting layer (415) is arranged on the side of the second outer convex plate (4132) facing the first shell (412) so as to connect the second outer convex plate (4132) to the first shell (412).

12. The power semiconductor device according to claim 7, characterized in that: The first shell (412) is located on the inner side of the second shell (413), and an annular accommodating cavity (80) is provided between the chip (30) and the first shell (412).

13. The power semiconductor device according to claim 12, characterized in that: A through hole (416) is provided on the tube shell (41), the through hole (416) communicating with the annular accommodating cavity (80) and the outside of the tube shell (41), and in the stacking direction of the first electrode structure (10) and the second electrode structure (20), the minimum distance between the through hole (416) and the cavity (411) is between 0.5 mm and 3 mm.

14. The power semiconductor device according to claim 7, characterized in that: The power semiconductor device further comprises a buffer structure (90) located on a side of the first shell (412) away from the second shell (413); a surface of the buffer structure (90) away from the first shell (412) comprises a plurality of protrusions (91).

15. A method for processing a power semiconductor device, characterized in that: Used for processing a power semiconductor device according to any one of claims 1 to 14, the processing method comprising: Obtaining a first electrode structure (10) and a second electrode structure (20), wherein the electrode body (21) and the first connecting structure (22) are connected to form the second electrode structure (20); Connecting the tube shell (41) and the second connection structure (42) to obtain a housing assembly (40); connecting the tube shell (41) to the first electrode structure (10); electrically connecting the chip (30) to the first electrode structure (10), and positioning the chip (30) within the housing component (40); The electrode body (21) is electrically connected to the chip (30), and the chip (30) is located between the first electrode structure (10) and the electrode body (21); The first connection structure (22) and the second connection structure (42) are connected, and an energy release channel (50) is provided between the first connection structure (22) and the second connection structure (42).

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