Method and system for digital non-linear compensation

Abstract

The invention relates to a method and system for digital non-linear compensation. In some embodiments, a circuitry may include circuitry configured to receive a baseband signal having an intermodulation non-linear distortion portion and a harmonic distortion portion. In addition, the circuitry may include a compensator coupled to the circuitry, the compensator configured to generate a value for compensating the intermodulation non-linear distortion portion rather than the harmonic distortion portion. The circuitry may include where the compensator is configured to output the value. The circuitry may include where the circuitry is configured to adjust the baseband signal using the value. In some embodiments, the baseband signal may be a baseband voltage. In some embodiments, the value may be a complex number.

Description

Technical Field

[0001] The present disclosure relates generally to the field of nonlinear compensation of signal receivers, and more particularly to nonlinear compensation in a digital baseband of a receiver. Background Art

[0002] Wireless base station receivers often require high linearity. Linearity can be achieved through higher power consumption and larger transistor sizes in analog circuits, which can result in significant power consumption and demanding reliability requirements. As 5G, 6G and next-generation standards evolve, meeting the large number of power consumption and reliability requirements becomes more difficult. It is desirable to have a relatively simple digital approach that can leverage digital processing power to achieve the relatively high linearity required for receivers.

[0003] Digital nonlinear compensation in wireless base station receivers has mainly focused on radio frequency (RF) band compensation. RF analog-to-digital converters (ADCs) have high sampling rates, resulting in relatively high power consumption. In addition, receiver frequency nonlinearities exhibit significant magnitude and phase variations. To be effective at high frequencies, this magnitude and phase variation typically requires a large number of correction terms, further increasing digital processing power.

[0004] A wireless base station receiver may have an anti-aliasing filter. This filter suppresses high frequency harmonic distortion but preserves in-band intermodulation distortion, making the two nonlinear components uncorrelated. Therefore, it makes it difficult for nonlinear compensation techniques in analog or digital RF bands to handle both types of distortion simultaneously, e.g., compensating one without affecting the other. Analog or digital RF band compensation methods will generate correction terms for both harmonic distortion and intermodulation distortion simultaneously.

[0005] When intermodulation distortion (IMD) and harmonic distortion are present in a signal, analyzing the distortion becomes more challenging because the two types of distortion interact. For example, the presence of IMD can introduce new frequencies, which in turn can become a source of harmonic distortion. This interaction of the two distortions complicates the identification and measurement of the distortion components within the signal.

[0006] The interaction between IMD and harmonic distortion can result in the generation of unpredictable frequencies. This unpredictability makes it difficult to predict the nature and location of the distortion components within the signal spectrum. Complex mathematical models and simulations are often required to accurately understand and predict these effects.

[0007] To effectively mitigate mixed IMD and harmonic distortion in nonlinear systems, advanced signal processing techniques such as adaptive filters and digital pre-distortion can be implemented. These techniques aim to reduce or eliminate the unwanted components generated by nonlinearity. However, optimizing these methods for specific applications can be a time-consuming and resource-intensive process. Summary of the invention

[0008] It is desirable to have a compensation scheme that focuses on only one type of distortion, such as intermodulation distortion, which may be the dominant distortion requirement for RF applications.

[0009] The digital nonlinear compensation described herein can be used for direct sampling base station receivers. Instead of or in addition to analog nonlinear compensation or digital compensation in the RF band, nonlinear compensation in digital baseband can be used. In some embodiments, nonlinear compensation in digital baseband can provide significant power savings. The original baseband input (e.g., original voltage) can be calculated in baseband to generate a nonlinear correction term (e.g., calibration voltage). The output (e.g., final voltage) can be the sum of the original baseband input and the nonlinear correction term. The correction term can be calculated using a preset nonlinear coefficient and a third-order multiplication of the input in-phase and quadrature (I / Q) data. The correction term may include only intermodulation nonlinear components and no direct harmonic distortion of the original baseband input signal. This configuration can provide baseband nonlinear compensation that only includes compensation for intermodulation nonlinearity of the input signal and does not generate unwanted harmonics of the input signal.

[0010] In one general aspect, a circuit system may include a circuit configured to receive a baseband signal, wherein the baseband signal has an intermodulation nonlinear distortion portion and a harmonic distortion portion. The circuit system may also include a compensator coupled to the circuit, wherein the compensator is configured to generate a value for compensating the intermodulation nonlinear distortion portion rather than compensating the harmonic distortion portion. In addition, the circuit system may include an implementation in which the compensator is configured to output the value. In addition, the circuit system may include an implementation in which the circuit is configured to use the value to adjust the baseband signal. Other embodiments of this aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each of which is configured to perform the actions of the method.

[0011] Implementations may include one or more of the following features. The circuit system may include an implementation in which the baseband signal is a baseband voltage. The circuit system may include an implementation in which the value is a complex number, the complex number may include an in-phase portion of the baseband signal and a quadrature portion of the baseband signal. The circuit system may include an implementation in which the compensator further includes at least one of a rounding or truncation engine to output the value when the value is rounded or truncated. The circuit system may include an implementation in which jitter is injected before the rounding or truncation engine. The circuit system may include an implementation in which the value is based on at least the baseband signal, the square of the absolute value of the baseband signal, and a nonlinear coefficient. The circuit system may include an implementation in which one or more values ​​of the nonlinear coefficient are selected in response to an operating frequency of the baseband signal. The circuit system may include a down converter to filter image frequencies. Implementations of the described technology may include hardware, methods or processes, or computer tangible media.

[0012] In one general aspect, a system may include a device configurable to receive a baseband signal, wherein the baseband signal has an intermodulation nonlinear distortion portion and a harmonic distortion portion. The system may include a compensator configured to generate a value for compensating the intermodulation nonlinear distortion portion but not compensating the harmonic distortion portion. The system may include an implementation in which the device is configured to adjust the baseband signal using the value provided by the compensator.

[0013] The system may include an implementation in which the baseband signal is a baseband voltage. The system may include an implementation in which the value is a complex number, the complex number including an in-phase portion of the baseband signal and a quadrature portion of the baseband signal. The system may include an implementation in which the compensator further includes at least one of a rounding or truncation engine to output the value when the value is rounded or truncated. The system may include an implementation in which jitter is injected before the rounding or truncation engine. The system may include an implementation in which the value is based on at least the baseband signal, the square of the absolute value of the baseband signal, and a nonlinear coefficient. The system may include an implementation in which one or more values ​​of the nonlinear coefficient are selected in response to an operating frequency of the baseband signal.

[0014] In one general aspect, a method may include receiving, by a circuit, a baseband signal, wherein the baseband signal has an intermodulation nonlinear distortion portion and a harmonic distortion portion. The method may also include generating, by a compensator coupled to the circuit, a value for compensating for the intermodulation nonlinear distortion portion but not for compensating for the harmonic distortion portion. In addition, the method may include adjusting, by the circuit, the baseband signal using the value output by the compensator. Other embodiments of this aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of a method.

[0015] The method may include an implementation in which the baseband signal is a baseband voltage. The method may include an implementation in which the value is a complex number, the complex number having an in-phase portion of the baseband signal and a quadrature portion of the baseband signal. The method may further include injecting jitter into the compensator. The method may further include rounding or truncating at least one of the values. The method may include an implementation in which the value is based on at least the baseband signal, the square of the absolute value of the baseband signal, and a nonlinear coefficient. The method may further include selecting one or more values ​​of the nonlinear coefficient in response to an operating frequency of the baseband signal. The method may further include filtering an image frequency from the baseband signal by a down converter. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A system for digital baseband nonlinear compensation according to some embodiments.

[0017] Figure 2 Digital baseband nonlinearity compensation when the baseband signal is a single-tone signal according to some embodiments is described.

[0018] Figure 3 Digital baseband nonlinearity compensation when the baseband signal is a two-tone signal according to some embodiments is described.

[0019] Figure 4 The magnitude and phase of nonlinear coefficients for different frequencies according to some embodiments are illustrated.

[0020] Figures 5A to 5B Linearity performance improvement of digital nonlinear compensation using two-tone testing according to some embodiments is described.

[0021] Figures 6A to 6B Linearity performance improvements using wideband analog digital nonlinear compensation according to some embodiments are described.

[0022] Figure 7 A digital baseband nonlinear compensation system with dithering and rounding or truncation operations according to some embodiments is described.

[0023] Fig. 8A The output of a digital baseband non-linear compensation system without added jitter is illustrated in accordance with some embodiments.

[0024] Figure 8B The output of a digital baseband nonlinear compensation system when dither is added according to some embodiments is illustrated.

[0025] Fig. 9 is a flow chart of an example process for digital baseband nonlinear compensation.

[0026] Fig. 10A and 10B A block diagram of a computing device for practicing embodiments of a client device or network device is depicted in accordance with some embodiments.

[0027] Fig. 10C An embodiment of a computing device is depicted in which a processor communicates directly with a main memory via a memory port in accordance with some embodiments. DETAILED DESCRIPTION

[0028] In analog nonlinear compensation of RF analog / digital conversion, an input buffer can be utilized. Nonlinearities of high-speed RF analog / digital conversion used in wireless receivers mostly come from the analog front end, such as a programmable gain amplifier or an input buffer. In order to improve linearity, analog circuit nonlinearities (such as gain compression) can be compensated with inverse characteristics (such as gain expansion). For example, correcting input buffer nonlinearities may include a push-pull (PP) follower topology and a harmonic compensation diode load (HC-DL). In a push-pull configuration, there are two transistors, one transistor actively pulls up the signal and the other actively pulls down the signal. This arrangement enhances the ability of the buffer to drive the output while reducing distortion and improving linearity. The inherent characteristics or gain compression of the PP follower topology result in, for example, nonlinearity of Iout relative to Vin. The inverse characteristics or gain expansion of HC-DL are utilized for compensation.

[0029] The input buffer is biased by a passive level shifter (LS). A level shifter is a circuit component that adjusts the voltage level of the input signal. The LS enables the input signal to be at the appropriate voltage level for the subsequent stage of the ADC. For example, if the subsequent stage is programmed to expect a voltage range of 0 to 1V and the input signal is at 0.5 to 1.5V, the passive level shifter can bring it into the desired range. The passive LS does not consume a lot of power. HC-DL suppresses nonlinearity in the buffer. HC-DL mitigates nonlinearity by compensating for harmonics in the signal that can cause nonlinearity. Harmonics are undesirable frequency components that can cause deviations from an ideal linear response. By suppressing harmonics, HC-DL helps improve the linearity of the input buffer. Biasing is a technique used to set stable operating points for various components within a circuit. Biasing involves setting a fixed voltage or current to stabilize the operation of components within the circuit. Biasing ensures that the components of the circuit operate within their desired and linear operating ranges. The bias voltages of the HC-DL, expressed as the voltage bias of the HC-DL positive terminal (VBIP) and the voltage bias of the HC-DL negative terminal (VBIN), are determined by the calibration engine. The calibration engine is responsible for adjusting and fine-tuning the bias voltages VBIP and VBIN. This adjustment process can be implemented using a feedback mechanism and algorithm.

[0030] One disadvantage of this analog nonlinear compensation is that not all analog circuits have a mechanism available for compensation by using the inverse characteristic. In addition, this compensation generally has limited utility in terms of accuracy and high frequency operation.

[0031] Another technique for nonlinear compensation can be performed in the digital RF band. For example, RF analog / digital conversion with nonlinear compensation can be performed in the RF band. High-speed RF data captured by the RFADC is directly processed and compensated by a nonlinear digital block in the RF band. This method can be performed in a conventional RFADC. Before the multi-bit captured data (e.g., baseband signal) is received by the baseband circuitry, a digital nonlinear correction block can be inserted at the output of the high-speed data transmission. But this digital processing for nonlinear correction generally requires high-speed data processing of the captured multi-bit data in real time or nearly real time. As wireless standards evolve for the next generation and the sampling rate of the RF analog / digital conversion becomes higher, this can result in a lot of power consumption.

[0032] A baseband signal is an electronic signal that retains the original information or data being transmitted without modification or conversion. It originates from a source such as a microphone or computer and travels through a transmission medium such as a cable or wireless network. A baseband signal may be modulated or converted to another signal type (such as a carrier wave or wireless signal) for transmission over long distances or various media. Baseband voltage refers to the original, unmodulated voltage signal that directly represents the information or data being transmitted.

[0033] Figure 1 A system 100 for digital nonlinear compensation is illustrated according to some embodiments. In some embodiments, system 100 may include baseband circuitry 102 and circuitry 106 external to baseband circuitry 102. In some embodiments, system 100 may include receive circuitry 108 that receives an analog signal from receive antenna 110. A direct sampling base station receiver may have digital nonlinear compensation that may be performed in baseband circuitry 102.

[0034] In some embodiments, system 100 may include circuitry 108 that includes an analog receiver 122 and a digitizer 124. For example, circuitry 108 may include an analog front end (AFE) module 122 and an analog-to-digital converter (ADC) 124, which may be an RFADC. AFE 122 is an interface between the analog and digital domains, essentially bridging the gap between physical signals and digital processing circuitry. In some embodiments, RFADC 124 converts analog signals received by circuitry 108.

[0035] In some embodiments, circuitry 106 may include digital RF band circuitry capable of wirelessly transmitting digital signals. For example, digital RF band can convert digital signals into radio waves that can be transmitted over the air. Digital baseband circuitry 102, on the other hand, processes the digital signals and prepares them for transmission through circuitry 106 and 108. Circuitry 106 and 108 can transmit and receive information wirelessly without being physically coupled to each other.

[0036] The digital RF band circuitry of the circuit system 106 may include a down converter. A down converter is a component that reduces the frequency of an input signal from a higher RF frequency to a lower intermediate frequency (IF) or baseband frequency. The operation of the down converter involves mixing the input RF signal with a local oscillator (LO) signal. The mixer produces an output signal at the sum and difference frequencies of the input and LO signals. By selecting the LO frequency, the down converter can shift the input signal frequency to a desired lower frequency range. This frequency conversion can enable information to be extracted from the RF signal and make the RF signal more manageable for subsequent processing.

[0037] The down converter may include a bandpass filter (BPF) 114, a mixer (or multiplier) 116, and an oscillator 120. A filter is a device or technique for selectively removing or altering certain components of a signal. A filter can be used to separate or attenuate signals of different frequencies, resulting in a cleaner and more understandable signal. For example, filters may be low-pass, high-pass, bandpass, and band-stop filters. A low-pass filter allows low-frequency components of a signal to pass through and attenuates high-frequency components. A high-pass filter, on the other hand, allows high-frequency components to pass through and attenuates low-frequency components. A bandpass filter only allows a certain frequency band to pass through, while attenuating both lower and higher frequencies. A band-stop filter or notch filter attenuates a certain frequency band while allowing other frequencies to pass through. Filters may be implemented using a variety of techniques, including analog and digital circuits and software algorithms.

[0038] Oscillator 120 may be a nonlinear crystal oscillator (NCO). Circuitry 106 may include a frequency control word (FCW) module 118. FCW is a digital word or value that can be used to configure the frequency of an oscillator or signal generator, thereby facilitating setting, adjusting, and controlling the output frequency with greater precision. Signal 130 is received from RFADC 124 by BPF 114, which allows signals within a specified frequency range to pass to mixer 116 while attenuating frequencies outside of the range. NCO 120 may receive FCW 118 and send a signal to mixer 116, which mixes the signals received from BPF 114 and NCO 120. The output of mixer 116 is signal V that is sent to digital baseband circuitry 102. raw .

[0039] Digital nonlinear compensation for a direct sampling base station receiver is achieved by performing nonlinear compensation in the baseband circuit 102 rather than using the RF band circuit 106. In some embodiments, the system 100 may include a digital baseband nonlinear compensation engine 104 that determines the nonlinear coefficient a3 (or α3) and provides a3 to the digital baseband circuit 102. The baseband circuit 102 may include a plurality of operators that perform addition and multiplication functions.

[0040] In some embodiments, the signal V raw(which may be, for example, a voltage) may be received by digital baseband circuit 102 from mixer 116 of circuit 106. In some embodiments, V raw This is provided below as an illustrative example.

[0041] V raw =I+j×Q

[0042] "I" and "Q" represent the signal V raw The in-phase and quadrature components of a signal. The in-phase component (I) represents the portion of the signal that is in phase with a reference signal, such as a carrier. This component carries the amplitude and phase information of the original signal. The quadrature component (Q) represents the portion of the signal that is 90 degrees out of phase with the in-phase component. Q carries information about the phase difference between the original signal and the reference signal. The variable "j" represents the imaginary unit, which is defined as the square root of -1. The I and Q components are used to represent signals in the complex plane.

[0043] Binary addition may involve a series of logic gates in the form of a ripple-carry adder. For example, an "addition array" may be an arrangement of logic gates and components that collectively perform binary addition on multi-bit operands. In some embodiments, a hardware multiplier uses an array of logic gates, such as in the form of an array multiplier, to perform binary multiplication. An array multiplier breaks the multiplication into multiple AND and XOR gates. In some embodiments, each bit of one operand is multiplied with each bit of the other operand; the partial products are then added together to form the final result.

[0044] like Figure 1 As shown, the original baseband input is calculated in the baseband circuit 102 to produce the nonlinear correction term Vcal. At the multiplication operator 127, the signal V raw Experience makes signal V raw The output of multiplier 112, α3×(I+j×Q), is fed to multiplier 126. At multiplier 112, signal V raw Experience makes signal V raw The absolute value of a number multiplied by itself. Absolute value refers to the mathematical concept used to express the magnitude or distance of a number from zero, regardless of the sign (positive or negative) of the number. The absolute value of a number is always positive or zero. Absolute value is useful for comparing numbers or simplifying equations involving negative numbers.

[0045] The output V of the multiplier 112 raw |I+j×Q| 2 The multiplier 126 multiplies the outputs of the multipliers 112 and 127 to output V cal In some embodiments, V cal This is provided below as an illustrative example.

[0046] V cal =α3×(I+j×Q)×|I+j×Q| 2

[0047] Vcal is calculated by the third-order multiplication of the preset nonlinear coefficient a3 and the input I / Q data. Vcal includes intermodulation nonlinear components and does not include direct harmonic distortion of the input signal Vraw. Having only intermodulation nonlinear components of the signal Vraw and no direct harmonic distortion can perform baseband nonlinear compensation only for the intermodulation nonlinearity of the signal Vraw, without generating additional undesired harmonics of the signal Vraw.

[0048] Addition operator 128 makes signal V raw With V cal Add and output signal V final Signal V final is the sum of Vraw and Vcal and is provided below as an illustrative example.

[0049] V final =V raw +V cal

[0050] The compensation described in the present disclosure provides the following advantages over other RF band compensations: (1) significant power savings; (2) decoupling of intermodulation and harmonic distortion; and (3) using complex operations (e.g., imaginary unit j) to perform compensation enables compensation for the phase shift component of IMD distortion. Phase shift refers to the delay or advance of the phase of a wave as it passes through a medium or encounters an obstacle. Phase shift is the amount of time or space shift of a wave. The phase shift of a wave is measured in degrees or radians, and can be positive or negative depending on the direction of the shift.

[0051] In some embodiments, nonlinear compensation in baseband circuitry 102 provides significant power savings because compensation is performed on signal Vraw that undergoes down conversion in digital RF band circuitry 106 after being processed by analog receiver 122 and digitizer 124 of circuitry 108 .

[0052] In some embodiments, the compensator may refer to a combination of the digital baseband nonlinear compensation engine 104, the multipliers 112, 126, 127, and the adder 128. A compensator is a device or mechanism designed to reduce or eliminate (compensate for) the effects of disturbances or changes in a particular system. A compensator is used to improve the stability, accuracy, or performance of a system by adjusting or controlling an input or output signal. A compensator may be implemented as a feedback control system that corrects or compensates for errors or changes that occur in a system.

[0053] Figure 2 and 3Digital baseband nonlinear compensation that only compensates for intermodulation distortion and does not generate undesired harmonic distortion according to some embodiments is described.

[0054] For RF applications, in-band intermodulation distortion may be a more important linearity specification than harmonic distortion because RF applications are narrowband in nature and harmonic distortion has other system mitigation methods, such as filtering or frequency planning. In some embodiments, system 100 focuses on mitigating intermodulation and does not affect harmonic distortion.

[0055] Figure 2 140. The digital baseband nonlinear compensation of signal Vraw is illustrated as a single tone signal 140. Signal 140 is passed through a bandpass filter 148 (i.e., a component of a downconverter). Vraw can be expressed as I+j×Q or e jw , where ω is the frequency of the fundamental signal Vraw. The image frequency 146 is substantially absent because it is filtered out by a down converter (eg, of the circuit 106).

[0056] Image frequencies refer to the phenomenon where two or more frequencies in a signal are reflections of each other around a certain center frequency. These frequencies are at the same distance from the center frequency and equidistant from each other. For example, in a communication system, image frequencies can occur when a transmitted signal is reflected by a surface and the reflected signal interferes with the original signal. This can cause signal distortion or attenuation and can lead to communication errors.

[0057] The fundamental frequency of a digital signal is the lowest frequency component of the signal and represents its basic tone or pitch. This frequency is determined by the rate at which the signal changes polarity, meaning it alternates between positive and negative voltages. For example, a sine wave has a fundamental frequency equal to the frequency of the wave itself, which is the rate at which the wave oscillates between maximum positive and negative values. The fundamental frequency is often called the clock rate or sampling rate, which is the rate at which the signal is sampled or measured.

[0058] The harmonic distortion portion is a phenomenon that occurs in electrical systems when a pure sinusoidal waveform of alternating current (AC) is distorted or altered due to the presence of harmonic frequencies. Harmonic frequencies are multiples of the fundamental frequency of the AC waveform, and their presence in an electrical system can cause undesirable effects such as equipment overheating, increased power losses, and reduced efficiency. Harmonic distortion can also cause interference with other electronic devices and can cause power supply interference. The harmonic distortion portion is typically measured as the total harmonic distortion (THD) of the AC signal, expressed as a percentage of the fundamental frequency. THD represents the sum of the amplitudes of all harmonic frequencies present in the waveform relative to the amplitude of the fundamental frequency. If the THD is high, the level of harmonic distortion in the AC signal may be large.

[0059] The nonlinear distortion portion of intermodulation refers to the signal processing phenomenon that occurs when two or more signals are mixed together, and the resulting waveform contains components that were not present in the original signals. For example, when signals with different frequencies are combined, they can produce additional frequencies that were not present in the original signals. The nonlinear distortion portion of intermodulation refers to the portion of the resulting waveform that is caused by the nonlinear behavior of the signal processing system. Nonlinear systems do not exhibit a linear relationship between input and output, so the output signal may not be proportional to the input signal. In the case of intermodulation distortion, the nonlinear distortion portion of the waveform is caused by the nonlinear response of the system to the input signal.

[0060] Signal|Vraw| 2 Equal to |I+j×Q| 2 or |e jω | 2 , which is equal to 1, because |e jω | 2 Equal to cos 2 ω and sin 2 The sum of ω, where the sum is equal to 1. Figure 2 As shown in FIG. 1 , the RF downconverter in the baseband circuit 106 filters out the image frequency 146 , so |Vraw| 2 (represented by signal 142) does not have a frequency component 2ω and Vcal does not have a frequency component 3ω, where ω is the frequency of the fundamental signal Vraw. The resulting compensation, signal Vcal (represented by signal 144), compensates for intermodulation and does not affect harmonic distortion. Signal 144 is a right-shifted representation of signal 142. In the single-tone signal 148, only the fundamental portion is present and there is no intermodulation portion in signal 144, which means that Vcal does not affect harmonic distortion.

[0061] Figure 3 1. Illustrate digital baseband nonlinear compensation when Vraw is a two-tone signal 149, 150. Signals 149, 150 pass through a bandpass filter 158 (i.e., a component of a downconverter). Image frequency 156 is substantially absent because it is filtered out by the downconverter (e.g., of circuit 106).

[0062] like Figure 3 As shown in FIG. 1 , the RF downconverter in the baseband circuit 106 filters out the image frequency 156 , so |Vraw| 2(represented by signals 151, 152, 153) does not have a frequency component 2ω and Vcal does not have a frequency component 3ω, where ω is the frequency of the fundamental signal Vraw. The resulting compensation, signal Vcal (represented by signals 154, 155, 157, 159), compensates for intermodulation and does not affect harmonic distortion. For example, only the fundamental portion 154, 155 and the intermodulation distortion portion 157, 159 of the signal Vraw are present, but there is no harmonic distortion in the calibration signal Vcal (e.g., calibration voltage).

[0063] A calibration voltage refers to a known and constant voltage used to calibrate or adjust an electrical device. The calibration voltage may be generated by a stable and accurate voltage source such as a voltage divider, a Zener diode, or a precision voltage reference. Electrical devices may drift or lose accuracy over time due to factors such as temperature changes, aging, and wear. The calibration voltage is used to adjust the device's internal circuitry and correct for errors or offsets that have occurred over time.

[0064] When measuring semiconductor chips implementing the systems 100, 700, the two-tone IMD3 test can identify significant linear performance differences between the data captured by the RF band circuitry 106 and the baseband circuitry 102. The two-tone test comparison in the RF and baseband data can illustrate the methods described herein for linear IMD3 improvement in the baseband circuitry 102. If only the nonlinear intermodulation tones are improved in the baseband circuitry 102 and the other tones are not improved, it can indicate that nonlinear compensation is performed in the baseband circuitry 102.

[0065] When comparing single-tone ( Figure 2 ) and two-tone signal ( Figure 3 ), the compensation performed by system 100 using the baseband compensation method only compensates for the dual-tone signal or the intermodulation tone and does not affect the test results of the harmonic tone or the single-tone signal.

[0066] System 100 provides advantages over analog or RF band compensation methods that do not distinguish between harmonics and intermodulation. This lack of distinction can lead to conflicting compensations because harmonic and intermodulation distortion may be uncorrelated.

[0067] Figure 4 The magnitude 402 and phase 404 of the nonlinear coefficient a3 for different frequencies according to some embodiments are illustrated. The receiver nonlinearity is characterized by the nonlinear coefficient a3, as previously described. Figure 1 In frequency, coefficient a3 has a change in magnitude 402 and phase 404, such as Figure 4 However, this variation of coefficient a3 is at least partially limited by the PVT and external conditions of the real-time implementation. Voltage and temperature environmental variations can be tracked and calculated into the value of coefficient a3 to adjust and apply coefficient a3 under given PVT and external conditions.

[0068] With magnitude 402 and phase 404, coefficient a3 is a complex number, which may be implemented in digital baseband circuitry 102. A complex number is a type of number that combines real and imaginary numbers. It is written in the form a+jb, where "a" is the real part and "bj" is the imaginary part. The letter "j" represents the square root of -1. Complex numbers are able to solve equations involving negative roots. The real part of a complex number represents the horizontal position on the complex plane, while the imaginary part represents the vertical position. The complex plane is a two-dimensional graph where the horizontal axis represents real numbers and the vertical axis represents imaginary numbers. Complex numbers can be added, subtracted, multiplied, and divided like real numbers.

[0069] Making a readily available and relatively straightforward implementation in the digital baseband circuitry 102 is superior to RF band nonlinear compensation that typically requires high-order compensation terms to correct for intermodulation changing phase. In some embodiments, a data structure, such as a database, such as a lookup table (LUT), has preset values ​​of coefficient a3 collected by measuring coefficient a3 at different frequencies. Based on the RF operating band, coefficient a3 can be programmed to have a value at the corresponding frequency. Then, when using a given RF operating band, such values ​​of coefficient a3 can be applied.

[0070] Operating frequency refers to the frequency at which an electronic device or system operates. It is a measurement of cycles per second, or Hertz (Hz), at which a device or system performs its intended function. The operating frequency of a device or system depends on its underlying technology, design, and intended use.

[0071] Test frequency refers to the frequency at which the functionality or performance of an electronic device, circuit, or system is tested. The test frequency is determined by various factors, such as the intended use of the electronic device, the importance of its operation, and any desired performance characteristics. Testing at a higher frequency can also help detect faults or defects that cannot be detected at a lower frequency.

[0072] A database is a structured collection of data organized in a way that allows easy access, retrieval, and management of the data. A database is a digital repository that stores, organizes, and manages data in a systematic way. In a database, data is stored in tables, which can represent virtual containers containing related data. Each table can contain rows and columns, which represent individual records and fields, respectively. By using queries, reports, and forms, users can extract useful information from a database without having to manually sort through large amounts of data.

[0073] A lookup table (LUT) is a data structure commonly used in computer programs to efficiently retrieve information based on a key. A LUT is a table where each row contains a key-value pair, where one column contains the key and the other column contains the corresponding value. The key is used to find the corresponding value in the table. The lookup table is pre-created and stored in memory, allowing information to be accessed quickly and efficiently as needed. LUTs can be used in scenarios where the same data is accessed repeatedly, because LUTs can significantly reduce the amount of computation used to retrieve information. LUTs can be implemented in various ways, including arrays, hash tables, and binary trees.

[0074] Figures 5A to 5B 6A-6B illustrate linear performance improvements of the nonlinear compensation system 100 according to some embodiments. Figures 5A to 5B Explains digital nonlinearity compensation using two-tone testing. Two-tone testing is a test method for evaluating receiver intermodulation. Two-tone testing involves analyzing the response of a device to two different input signals or frequencies. The setup typically involves applying two sinusoidal signals of known frequency and amplitude to the device under test and then examining the output signals.

[0075] Figures 5A to 5B The results of a two-tone test using a fast Fourier transform (FFT) of a receiver (RX) baseband (BB) signal are illustrated. In some embodiments, the FFT or RX BB signal may have the following signal components: a fundamental signal 501, intermodulation distortion 502 (e.g., IMD3 (which includes IMD and third-order components of IMD), and a noise signal 504. Figure 5A Test results before digital linear compensation is performed by system 100 are described. Figure 5B Test results after compensation by system 100 are illustrated. Figures 5A to 5B 5 illustrates an improvement in component 502 associated with IMD3 distortion. For example, after performing digital linear compensation using system 100, IMD3 is significantly improved. Figure 5A In FIG. 5 , the IMD3 components 502a and 502b before digital linear compensation are higher than the noise signals 504a and 504b. Figure 5B , the IMD3 components 502c, 502d after digital linear compensation are lower than the noise signals 504c, 504d. This digital linear compensation achieves a reduction in distortion of the fundamental signals 501c, 501d by improving the IMD3 components 502c, 502d. For example, the fundamental signals 501c, 501d are better identified than the fundamental signals 501a, 501b because before the digital linear compensation is performed using the system 100, 501a, 501b are more distorted by the IMD3 components 502a, 502b.

[0076] Figures 6A to 6BDigital nonlinear compensation using wideband simulation is described. For wideband simulation, a frequency range can be defined and then a reliable signal source can be selected to operate within the defined frequency range, for example, a signal generator or RF source can be used. A high-quality, low-noise amplifier can be used to amplify weak signals as needed. Signal conditioning elements such as filters and attenuators can be used for signal preparation. A high-performance spectrum analyzer or oscilloscope with wide bandwidth capability can be used for accurate signal analysis.

[0077] Fig. 6A The results of the broadband simulation before compensation are shown. Figure 6B The results of a broadband simulation after compensation are shown. The broadband simulation shows skirts 602, 604. The term "skirt" refers to Figures 6A to 6B A gradually sloping region surrounding the main signal in an amplitude versus frequency plot in FIG. The sloping region may be referred to as a "side lobe" or "skirt." The skirt represents the signal amplitude at frequencies adjacent to the main signal frequency. The skirt may exhibit a gradual decrease in amplitude as you move away from the center frequency. The presence of spurious frequencies caused by IMD and the different amplitudes and phases of the spurious frequencies may modify the overall shape of the skirt. The skirt may become more irregular, exhibiting a deviation from an ideal response with a relatively flat skirt.

[0078] exist Figures 6A to 6B , the broadband simulation shows that the received data has a skirt 604 with a slope that is less than the slope of the skirt 602 that the signal had before compensation (e.g., compensation by system 100 makes skirt 602 relatively flat). The smaller slope of skirt 604 is due to system 100 mitigating the effects of intermodulation nonlinearity.

[0079] Figure 7 A digital baseband nonlinear compensation system 700 is illustrated with dither 706 and rounding or truncation operation 710. For a real-time digital implementation of system 700, dither 706 is added by summing operator 704 in baseband circuit 702 prior to rounding or truncation operator 710.

[0080] A rounding or truncation engine (module or operator) is a hardware, firmware, or software component responsible for performing rounding or truncation operations on numerical data. Rounding involves converting a number to the nearest integer or decimal point, while truncation involves removing the decimal portion of a number. Truncation and rounding operations can be implemented as software functions or libraries that can be accessed by other programs. These engines can incorporate various rounding or truncation algorithms (such as round up, round down, and round to nearest) to provide different options for users. In addition, these engines can have various configuration parameters that allow users to customize rounding or truncation behavior.

[0081] Spurious signals are caused by the quantization process in the analog-to-digital converter (ADC). When an analog signal is converted to a digital format, the analog signal is divided into discrete levels or quantization intervals. The quantization process introduces errors, and this error results in quantization noise, which includes quantization spurious. Quantization spurious appear as unwanted spectral components in the frequency domain. Quantization spurious appear in the frequency spectrum at predictable intervals, such as at multiples of the sampling frequency.

[0082] The term "dither" refers to a type of noise that is added to a digital signal to reduce distortion and improve resolution. Dither noise is a random bit pattern that can be added to the least significant bits of a digital signal to allow for a smoother and more accurate representation of the original signal. In addition to reducing distortion and improving resolution, dither can also help mask other types of noise that may be present in a digital signal. By adding random noise to a signal, dither can hide other types of noise that may be introduced during processing or transmission.

[0083] As a small amount of random noise, dither 706 can be added to the signal before rounding or truncation 710. The dither noise 706 effectively performs frequency domain dispersion ("smearing") of the quantization error over a wider frequency range. For example, when, for example, the input signal Vraw is relatively small and is at the boundary of the rounding or truncation minimum level, dither 706 is added to mitigate quantization parasitics. Figure 7 A multi-bit dithering 706 is illustrated to remove quantization spurious signals, for example to bring the quantization spurious signals below the noise floor.

[0084] In some embodiments, the digital baseband nonlinear compensation engine 104 ( Figure 1 ), the combination of the multipliers 112, 126, 127, the adder operator 128, the adder operator 704 in which the dither 706 is added, and the truncation or rounding operator 710 may be referred to as a compensator.

[0085] Fig. 8A The output of the digital baseband nonlinear compensation system 700 is illustrated without the addition of the jitter 706. For example, the quantization spurious signal 802 may have an amplitude that is above the noise level, represented by the amplitude 806a, for example. In some embodiments, the amplitude of the quantization spurious signal 802 may be comparable to the amplitude of the incoming signal 801 (e.g., the quantization spurious signal 802 may be near the incoming signal 801). Figure 8B The output of the digital baseband nonlinear compensation system 700 is illustrated when dither 706 is added. After adding dither 706, the quantized spurious signal 804 is moved below the noise floor by the dither 706, where the noise floor may be represented, for example, by amplitude 806b.

[0086] The systems 100, 700 can provide low power consumption and high performance. In some embodiments, digital baseband nonlinear compensation can significantly save power and improve linear performance compared to analog or RF band nonlinear compensation. Digital nonlinear compensation can compensate for nonlinearity of the entire receiver path without negatively affecting other receiver performance, such as noise mitigation. The systems 100, 700 have significant linearity improvements compared to other nonlinear compensation systems. For example, the improved linear performance can be used in wireless base stations.

[0087] In some embodiments, analog nonlinear compensation or digital RF band compensation can be eliminated using system 100, 700. Compared with RF band nonlinear compensation, digital baseband nonlinear compensation has significant power and area advantages. The entire system 100, 700 can be more compact. Since the linearity of the receiver front end of system 100, 700 can be significantly improved, greater flexibility can be achieved. For example, trade-offs for other performance in certain application scenarios can be achieved in system 100, 700, such as trade-offs between lower linearity improvement and higher noise performance.

[0088] In some embodiments, a semiconductor chip implementing the system 100, 700 may have a knob to enable and disable digital compensation in the chip. The difference between the two results (with and without digital compensation) of enabling and disabling digital compensation may be derived. The correction term or calibration term V cal Recognizable as containing V raw Multiply by |V raw | 2 The result is, for example, the component (I+j×Q)×|I+j×Q| 2 .

[0089] When the semiconductor chip implementing the system 100, 700 is decapped, the digital baseband processing blocks at the receiver side can be enlarged due to the additional blocks that perform nonlinear correction in the baseband circuit system 102. In some embodiments, using the digital nonlinear compensation method described herein, a direct sampling base station receiver implementing the system 100, 700 can be used in advanced complementary metal oxide semiconductor (CMOS) technology and new 5G, 6G and next generation wireless standards. The configuration of the system 100, 700 can be applied to other direct sampling based base station receivers.

[0090] Fig. 9 is a flow diagram of an example process 900. In some embodiments, Fig. 9 One or more process blocks of may be performed by the system 100 , 700 .

[0091] like Fig. 9, according to some embodiments, process 900 may include receiving a baseband signal (block 910). In some embodiments, the baseband signal has an intermodulation nonlinear distortion portion and a harmonic distortion portion (block 912). In some embodiments, the baseband signal may be received by a circuit (block 914). For example, system 100, 700 may receive a baseband signal by a circuit, wherein the baseband signal has an intermodulation nonlinear distortion portion and a harmonic distortion portion, as described above.

[0092] Also like Fig. 9 As shown in FIG. 1 , process 900 may include generating a value for compensating for an intermodulation nonlinear distortion portion instead of compensating for a harmonic distortion portion (block 920). In some embodiments, a compensator coupled to the circuit may generate the value (block 922). For example, system 100, 700 may generate a value for compensating for an intermodulation nonlinear distortion portion instead of compensating for a harmonic distortion portion by a compensator coupled to the circuit, as described above.

[0093] like Fig. 9 As further shown in FIG. 9 , process 900 may include outputting a value (block 930). In some embodiments, the compensator may output a value (block 932). For example, system 100, 700 may output a value via the compensator, as described above. Fig. 9 , process 900 may include adjusting a baseband signal using a value (block 940). In some embodiments, the circuit may adjust the baseband signal (block 942). For example, system 100, 700 may adjust a baseband signal using a value by the circuit, as described above.

[0094] although Fig. 9 An example block diagram of process 900 is shown, but in some embodiments, process 900 may be comparable to Fig. 9 The process 900 may include additional blocks, fewer blocks, different blocks, or differently arranged blocks, rather than the blocks depicted in the process 900. In some implementations, two or more blocks of the process 900 may be executed in parallel.

[0095] The following IEEE standards (including any draft versions of such standards) are hereby incorporated by reference herein in their entirety and become part of the present disclosure for all purposes: IEEE 802.3, IEEE 802.11x, IEEE 802.11ad, IEEE 802.11ah, IEEE 802.11aj, IEEE 802.16 and 802.16a, and IEEE 802.11ac. In addition, although the present disclosure may refer to aspects of these standards, the present disclosure is in no way limited by these standards.

[0096] After discussing specific embodiments of the present solution, it may be helpful to describe aspects of the operating environment and associated system components (eg, hardware elements) in conjunction with the methods and systems described herein. Fig. 10A, depicting an embodiment of a network environment. The network may include or communicate with one or more storage area networks (SANs), security adapters, or Ethernet converged network adapters (CNAs). In short, the network environment includes a communication system that includes one or more network devices 1006, one or more client devices 1002, and network hardware components 1092. In some embodiments, the network device 1006 may be an access point (AP). In some embodiments, the client device 1002 may be a wireless communication device. For example, the client device 1002 may include a laptop computer 1002, a tablet computer 1002, a personal computer 1002, a wearable device 1002, a vehicle 1002 (such as a car, a drone, an intelligent vehicle, a robotic unit, and the like), an electronic game console 1002, a cellular telephone device 1002, a smart television 1002, an Internet of Things (IoT) device 1002, and any other electronic device 1002 capable of wireless communication. Reference Fig. 10B and 10C Details of embodiments of client device 1002 and network device 1006 are described in more detail. In one embodiment, the network environment may be an ad hoc network environment, an infrastructure wireless network environment, a wired network coupled to a wireless network, a subnet environment, or a combination of the foregoing.

[0097] The term "coupled" and its variations include two components being joined directly or indirectly to each other. The term "electrically coupled" and its variations include two components being joined directly or indirectly to each other through a conductive material (e.g., a metal or copper trace). This joining may be fixed (e.g., permanent or fixed) or movable (e.g., removable or releasable). This joining may be achieved by: two components being directly coupled to each other; two components being coupled to each other using a separate intermediary component and any additional intermediate components that are coupled to each other; or two components being coupled to each other using an intermediary component that is integrally formed as a single entity with one of the two components. If "coupled" or its variations are modified by additional terms (e.g., directly coupled), the general definition of "coupled" provided above is modified by the plain language meaning of the additional terms (e.g., "directly coupled" means that the two components are joined without any separate intermediary components), resulting in a narrower definition than the general definition of "coupled" provided above. This coupling may be mechanical, electrical, or fluidic.

[0098] The network device 1006 may be operably coupled to the network hardware 1092 via a local area network connection. The network hardware 1092, which may include one or more routers, gateways, switches, bridges, modems, system controllers, appliances, and the like, may provide a local area network connection for the communication system. Each network device 1006 may have an associated antenna or antenna array to communicate with client devices in its area. Client devices may register with a particular network device 1006 to receive services from the communication system (e.g., via SU-MIMO or MU-MIMO configurations). For direct connections (i.e., point-to-point communications), some client devices may communicate directly via an assigned channel and communication protocol. Some client devices 1002 may be mobile or relatively stationary relative to the network device 1006.

[0099] In some embodiments, the network device 1006 includes a device or module (including a combination of hardware and software) capable of connecting the client device 1002 to a wired or wireless network. The network device 1006 is oriented toward a wired connection and is also designed to support wireless connections. The configuration and design of the network device 1006 enable communication between the network device 1006 and the controller and storage device established by a wired link. In some embodiments, the network device 1006 can be connected to a router (e.g., via a wired network) as a standalone device. In other embodiments, the network device 1006 can be a component of a router. The network device 1006 can provide network access to multiple devices. The network device 1006 can, for example, be connected to a wired Ethernet connection and use a radio frequency link to provide a wireless connection for other devices 1002 to utilize the wired connection. The network device 1006 can be constructed and configured to support standards for sending and receiving data using one or more radio frequencies. These standards and the frequencies they use can be defined by IEEE (e.g., IEEE 802.11 standards). The network device 1006 may be configured and used to support public Internet hotspots and extend the Wi-Fi signal range of the network on an internal network.

[0100] In some embodiments, the network device 1006 may be used for an indoor or in-building wireless network (e.g., IEEE 802.11, Bluetooth, ZigBee, any other type of radio frequency based network protocol or variants thereof). Each client device 1002 may include a built-in radio or be coupled to a radio. Such client devices 1002 and network devices 1006 may operate in accordance with various aspects of the present disclosure presented herein to enhance performance, reduce cost or size, and enhance broadband applications. Each client device 1002 may be capable of acting as a client node to seek access to resources (e.g., data and connections to networked nodes such as servers) via one or more network devices.

[0101] The network connection may include any type or form of network and may include any of the following: a point-to-point network, a broadcast network, a telecommunications network, a data communications network, or a computer network. The network topology may be a bus, star, or ring network topology. The network may have any such network topology known to those of ordinary skill in the art and may be capable of supporting the operations described herein. In some embodiments, different types of data may be transmitted via different protocols. In other embodiments, the same type of data may be transmitted via different protocols.

[0102] The client device 1002 and the network device 1006 may be deployed as or executed on any type and form of computing device, such as a computer, network device, or appliance capable of communicating over any type and form of network and performing the operations described herein. Fig. 10B and 10C A block diagram of a computing device 1000 is depicted for practicing an embodiment of a client device 1002 or a network device 1006. Fig. 10B and 10C As shown in FIG. 1 , each computing device 1000 includes a central processing unit 1021 and a main memory or main memory unit 1022. Fig. 10B As shown in FIG. 1 , computing device 1000 may include storage device 1028, installation device 1016, network interface 1018, I / O controller 1023, display devices 1024a to 1024n, keyboard 1026, and pointing device 1027, such as a mouse. Storage device 1028 may include, but is not limited to, an operating system or software. Fig. 10C As shown in , each computing device 1000 may also include additional optional elements, such as a memory port 1003 that communicates with the central processing unit 1021, a bridge 1070, one or more input / output (I / O) devices 1030a to 1030n (collectively referred to using reference numeral 1030), and a cache memory 1040.

[0103] A circuit is a network of interconnected electronic components, such as resistors, capacitors, inductors, and transistors, that work together to perform a specific function. Components are connected in a specific way to enable electricity to flow through the circuit, allowing it to perform its intended task. "Circuitry" may refer to an interconnected arrangement of electronic components and paths that allow electrical signals to flow in a device, system, or application. In some embodiments, a single-component circuit system may be an electronic component that performs a specific function within an electronic system, such as a resistor, capacitor, or transistor. In some embodiments, multiple components working together in a circuit system may include coordination of various electronic components. In some embodiments, a circuit system may include hardware components, such as integrated circuits, transistors, resistors, capacitors, and connectors, and a combination of hardware and software or firmware elements that can operate together to perform various functions. Multiple components may include separate components, such as sensors, microcontrollers, memory modules, communication interfaces, or power management circuits, which are interconnected to form a functional system. For example, a circuit system may include a microcontroller or processor that executes software instructions to control the behavior of hardware components. For example, a circuit system processor may run a program to enable a device or system to perform various tasks, such as data processing and communication. In some embodiments, components may not be physically contained within the same device, for example, the components may be distributed across different devices connected by a wired or wireless interface.

[0104] The central processing unit (CPU) 1021 is any logic circuitry that responds to and processes instructions fetched from the main memory unit 1022. In many embodiments, the central processing unit 1021 is provided by a microprocessor unit, such as those manufactured by Intel Corporation of Mountain View, California, by International Business Machines of White Plains, New York, or by Advanced Micro Devices of Sunnyvale, California. The computing device 1000 may be based on any of these processors or any other processor capable of operating as described herein. The CPU may be a programmable parallel processor.

[0105] Other programmable parallel processors may include graphics processing units (GPUs) and neural processors. GPUs are programmable parallel processors that can perform complex calculations for graphics rendering and general computing tasks. GPUs consist of processing cores interconnected by high-bandwidth memory interfaces and bus systems to achieve efficient parallel processing. The processing cores of GPUs may be equipped with dedicated arithmetic logic units and memory caches, allowing multiple computing threads to be executed simultaneously. In order to optimize the graphics rendering pipeline, GPUs may incorporate the following hardware components: texture units and rasterizers. GPUs may use optimized algorithms and data parallel techniques to accelerate calculations, resulting in better performance than conventional CPUs. GPUs can be programmed using graphics application programming interfaces (APIs) and parallel computing frameworks to achieve scientific simulations, machine learning, and data analysis.

[0106] The main memory unit 1022 may be one or more memory chips capable of storing data and allowing the microprocessor 1021 to access any storage location, such as any type or variant of static random access memory (SRAM), dynamic random access memory (DRAM), ferroelectric RAM (FRAM), NAND flash, NOR flash, and solid-state drive (SSD). The main memory 1022 may be based on any of the above memory chips or any other available memory chip capable of operating as described herein. Fig. 10B In the embodiment shown in , processor 1021 communicates with main memory 1022 via system bus 1050 (described in more detail below). Fig. 10C An embodiment of a computing device 1000 is depicted in which the processor communicates directly with the main memory 1022 via a memory port 1003. For example, in Fig. 10C In the embodiment, the main memory 1022 may be a DRAM.

[0107] Fig. 10C An embodiment is depicted in which the main processor 1021 communicates directly with the cache memory 1040 via a secondary bus (sometimes referred to as a backside bus). In other embodiments, the main processor 1021 communicates with the cache memory 1040 using a system bus 1050. The cache memory 1040 typically has a faster response time than the main memory 1022 and is provided by, for example, SRAM, BSRAM, or EDRAM. Fig. 10C, the processor 1021 communicates with various I / O devices 1030 via a local system bus 1050. Various buses may be used to connect the central processing unit 1021 to any I / O device 1030, such as a VESA VL bus, an ISA bus, an EISA bus, a Micro Channel Architecture (MCA) bus, a PCI bus, a PCI-X bus, a PCI Express bus, or a NuBus. For embodiments in which the I / O device is a video display 1024, the processor 1021 may communicate with the display 1024 using an Advanced Graphics Port (AGP). Fig. 10C An embodiment of a computer or computer system 1000 is depicted in which the main processor 1021 can communicate directly with the I / O device 1030b, such as via HYPERTRANSPORT, RAPIDIO, or INFINIBAND communication technology. Fig. 10C Also depicted is an embodiment in which local busses and direct communications are mixed: processor 1021 communicates with I / O device 1030a using a local interconnect bus while communicating directly with I / O device 1030b.

[0108] Various I / O devices 1030a to 1030n may be present in computing device 1000. Input devices include keyboards, mice, track pads, trackballs, microphones, dials, touch pads, touch screens, and drawing tablets. Output devices include video displays, speakers, inkjet printers, laser printers, projectors, and dye sublimation printers. I / O devices may be controlled by I / O controller 1023, such as Fig. 10B 1000. The I / O controller may control one or more I / O devices, such as a keyboard 1026 and a pointing device 1027, such as a mouse or light pen. In addition, the I / O devices may also provide storage and installation media 1016 for the computing device 1000. In other embodiments, the computing device 1000 may provide a USB connection (not shown) to receive a handheld USB storage device, such as the USB flash drive series of devices manufactured by s Industry, Inc. of Los Alamos, California.

[0109] Reference again Fig. 10B, the computing device 1000 may support any suitable installation device 1016, such as a disk drive, a CD-ROM drive, a CD-R / RW drive, a DVD-ROM drive, a flash memory drive, a tape drive of various formats, a USB device, a hard drive, a network interface, or any other device suitable for installing software and programs. The computing device 1000 may further include a storage device (e.g., one or more hard drives or redundant arrays of independent disks (storage devices)) for storing an operating system and other related software and for storing application software programs, such as any program or software 1020 for implementing the systems and methods described herein (e.g., software 1020 configured or designed for the systems and methods described herein). In some embodiments, any installation device 1016 may be used as a storage device. In some embodiments, the operating system and software may be run from a bootable medium.

[0110] In addition, computing device 1000 may include a network interface 1018 that interfaces with network 1004 through various connections, including but not limited to a standard telephone line, a LAN or WAN link (e.g., 802.11, T1, T3, 56 kb, X.25, SNA, DECNET), a broadband connection (e.g., ISDN, Frame Relay, ATM, Gigabit Ethernet, Ethernet over SONET), a wireless connection, or some combination of any or all of the above. The connection may be established using various communication protocols (e.g., TCP / IP, IPX, SPX, NetBIOS, Ethernet, ARCNET, SONET, SDH, Fiber Distributed Data Interface (FDDI), RS232, IEEE 802.11, IEEE 802.11a, IEEE 802.11b, IEEE802.11g, IEEE 802.11n, IEEE 802.11ac, IEEE 802.11ad, CDMA, GSM, WiMax, and direct asynchronous connection). In one embodiment, the computing device 1000 communicates with other computing devices 1000 via any type and form of gateway or tunneling protocol, such as Secure Sockets Layer (SSL) or Transport Layer Security (TLS). The network interface 1018 may include a built-in network adapter, a network interface card, a PCMCIA network card, a card bus network adapter, a wireless network adapter, a USB network adapter, a modem, or any other device capable of communicating and performing the operations described herein suitable for interfacing the computing device 1000 to any type of network.

[0111] In some embodiments, the computing device 1000 may include or be connected to one or more display devices 1024a to 1024n. Thus, any I / O device 1030a to 1030n and the I / O controller 1023 may include any type or form of suitable hardware, software, or a combination of hardware and software to support, implement, or provide the computing device 1000 to connect and use the display devices 1024a to 1024n. For example, the computing device 1000 may include any type or form of video adapter, graphics card, driver, and library to interface, communicate, connect, or otherwise use the display devices 1024a to 1024n. In one embodiment, the video adapter may include multiple connectors to interface to the display devices 1024a to 1024n. In other embodiments, the computing device 1000 may include multiple video adapters, each of which is connected to the display devices 1024a to 1024n. In some embodiments, any part of the operating system of the computing device 1000 may be configured to use multiple displays 1024a to 1024n. One of ordinary skill in the art will recognize and appreciate the various ways and embodiments in which the computing device 1000 may be configured to have one or more display devices 1024a - 1024n .

[0112] In a further embodiment, the I / O device 1030 may be a bridge between the system bus 1050 and an external communication bus (such as a USB bus, an Apple Desktop bus, an RS-232 serial connection, a SCSI bus, a FireWire bus, a FireWire 1000 bus, an Ethernet bus, an AppleTalk bus, a Gigabit Ethernet bus, an Asynchronous Transfer Mode bus, a Fibre Channel bus, a Serial Attached Small Computer System Interface bus, a USB connection, or an HDMI bus).

[0113] Fig. 10B and 10CA computing device or system 1000 of the type depicted in the drawings may operate under the control of an operating system, which controls task scheduling and system resource access. The computing device 1000 may run any operating system, such as any version of the Microsoft Windows operating system, different versions of the Unix and Linux operating systems, any version of the MAC OS for Apple Computer, any embedded operating system, any real-time operating system, any open source operating system, any proprietary operating system, any operating system for mobile computing devices, or any other operating system capable of running on a computing device and performing the operations described herein. Typical operating systems include, but are not limited to, Android produced by Google Inc., WINDOWS 7 and 8 produced by Microsoft Corporation of Redmond, Washington, MAC OS produced by Apple Computer of Cupertino, California, WebOS produced by Research InMotion (RIM), OS / 2 and Linux produced by International Business Machines of Armonk, New York, a freely available operating system distributed by Caldera Corporation of Salt Lake City, Utah, or any type and form of Unix operating system, etc.

[0114] The computer system 1000 may be any network device, storage device, workstation, phone, desktop computer, laptop or notebook computer, server, handheld computer, mobile phone or other portable telecommunication device, media playback device, gaming system, mobile computing device, or any other type or form of computing, telecommunication or media device capable of communication. The computer system 1000 has sufficient processor power and memory capacity to perform the operations described herein.

[0115] In some embodiments, the computing device 1000 may have a different processor, operating system, and input device consistent with the device. For example, in one embodiment, the computing device 1000 is a smart phone, mobile device, tablet computer, or personal digital assistant. In other embodiments, the computing device 1000 is an Android-based mobile device, an iPhone smart phone manufactured by Apple Computer of Cupertino, California, or a Blackberry or WebOS-based handheld device or smart phone, such as a device manufactured by Research In Motion Limited. In addition, the computing device 1000 can be any workstation, desktop computer, laptop or notebook computer, server, handheld computer, mobile phone, any other computer or other form of computing or telecommunications device that is capable of communication and has sufficient processor power and memory capacity to perform the operations described herein. The aspects of the above operating environment and components will be understood in the context of the systems and methods disclosed herein.

[0116] It should be noted that certain paragraphs of the present disclosure may refer to terms (e.g., "first" and "second") associated with device signals, data, inputs, channels, and the like for identifying or distinguishing one from another or from others. These terms are not intended to relate entities (e.g., first input and second input) only in time or according to a sequence, although in some cases, these entities may include such a relationship, nor do these terms limit the number of possible entities (e.g., devices) that may operate within a system or environment.

[0117] It should be understood that the above-described systems may provide multiples of any or each of these components. In addition, the above-described systems and methods may be provided as one or more computer-readable programs or executable instructions, programmable circuits, or digital logic embodied on or in one or more articles of manufacture. The article of manufacture may be a floppy disk, hard disk, CD-ROM, flash memory card, PROM, RAM, ROM, ASIC, or magnetic tape. In general, the computer-readable program may be implemented in any programming language (e.g., LISP, PERL, C, C++, C#, PROLOG) or in any bytecode language (e.g., JAVA). The software program or executable instructions may be stored as object code on or in one or more articles of manufacture.

[0118] Although the above written description of the methods and systems enables a person of ordinary skill in the art to make and use various embodiments of these methods and systems, a person of ordinary skill in the art should understand and appreciate that there are variations, combinations, and equivalents of the specific embodiments, methods, and examples herein. Therefore, the methods and systems of the present invention should not be limited by the above-described embodiments, methods, and examples, but by all embodiments and methods within the scope and spirit of the present disclosure.

Claims

1. A circuit system, comprising: A circuit configured to receive a baseband signal having an intermodulation nonlinear distortion portion and a harmonic distortion portion; and a compensator coupled to the circuit, the compensator being configured to generate a value for compensating the intermodulation nonlinear distortion portion instead of compensating the harmonic distortion portion, wherein the compensator is configured to output the value, and Wherein the circuit is configured to use the value to adjust the baseband signal. 2 . The circuit system of claim 1 , wherein the baseband signal is a baseband voltage. 3 . The circuit system of claim 1 , wherein the value is a complex number, the complex number further comprising an in-phase portion of the baseband signal and a quadrature portion of the baseband signal.

4. The circuit system of claim 1 , wherein the compensator further comprises: at least one of a rounding or truncation engine for outputting the value, where the value is rounded or truncated, and Wherein the jitter is injected before the rounding or truncation engine.

5. The circuit system of claim 1, wherein the value is based on at least the baseband signal, a square of an absolute value of the baseband signal, and a nonlinear coefficient.

6. The circuit system of claim 5, wherein the one or more values ​​of the nonlinear coefficient are selected in response to an operating frequency of the baseband signal.

7. The circuit system according to claim 1, further comprising: Down converter, which is used to filter image frequencies.

8. A system comprising: A device configured to receive a baseband signal having an intermodulation nonlinear distortion portion and a harmonic distortion portion, the system comprising: a compensator configured to generate a value for compensating the intermodulation nonlinear distortion portion instead of compensating the harmonic distortion portion, Wherein the device is configured to adjust the baseband signal using the value provided by the compensator.

9. The system of claim 8, wherein the baseband signal is a baseband voltage.

10. The system of claim 8, wherein the value is a complex number, the complex number further comprising an in-phase portion of the baseband signal and a quadrature portion of the baseband signal.

11. The system of claim 8, wherein the compensator further comprises: at least one of a rounding or truncation engine for outputting the value, where the value is rounded or truncated, and Wherein the jitter is injected before the rounding or truncation engine.

12. The system of claim 8, wherein the value is based on at least the baseband signal, a square of an absolute value of the baseband signal, and a nonlinear coefficient.

13. The system of claim 12, wherein one or more values ​​of the nonlinear coefficients are selected in response to an operating frequency of the baseband signal.

14. A method comprising: A baseband signal is received by the circuit, wherein the baseband signal includes an intermodulation nonlinear distortion portion and a harmonic distortion portion; generating, by a compensator coupled to the circuit, a value for compensating the intermodulation nonlinear distortion portion but not compensating the harmonic distortion portion; and The value output by the compensator is used by the circuit to adjust the baseband signal. The method of claim 14 , wherein the baseband signal is a baseband voltage.

16. The method of claim 14, wherein the value is a complex number, the complex number further comprising an in-phase portion of the baseband signal and a quadrature portion of the baseband signal.

17. The method of claim 14, further comprising: injecting jitter into the compensator; At least one of the values ​​is rounded or truncated.

18. The method of claim 14, wherein the value is based on at least the baseband signal, a square of an absolute value of the baseband signal, and a non-linear coefficient.

19. The method of claim 18, further comprising selecting one or more values ​​of the nonlinear coefficients responsive to an operating frequency of the baseband signal.

20. The method of claim 14, further comprising: Image frequencies are filtered from the baseband signal by a down converter.

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