Solar cell, preparation method thereof and cell module

Abstract

The invention discloses a solar cell and a preparation method thereof and a cell module, the solar cell comprises a silicon substrate, the silicon substrate is provided with a first surface and a second surface which are opposite to each other, a first doping layer and a first electrode are laminated on the first surface in sequence, and a second doping layer and a second electrode are laminated on the second surface. The first doped layer comprises a first crystal doped region and a first amorphous doped region which are adjacent to each other; a second doping layer and a second electrode are sequentially stacked on the second surface of the silicon substrate, and the doping type of the first doping layer is opposite to that of the second doping layer; the projection of the first electrode on the silicon substrate is overlapped with the projection of the first crystal doped region on the silicon substrate, and the projection area of the first electrode on the silicon substrate is smaller than the projection area of the first crystal doped region on the silicon substrate. The solar cell can reduce the contact resistance and avoid the electric leakage phenomenon at the same time.

Description

[0001] This application claims the priority of the Chinese patent filed with the China Patent Office on February 20, 2024, with application number 202410190935.4 and application name “A solar cell, a method for preparing the same, and a battery assembly”, the entire contents of which are incorporated by reference in this application. Technical Field

[0002] The present application relates to the photovoltaic field, and in particular to a solar cell and a preparation method thereof and a solar cell assembly. Background Art

[0003] The front-back contact crystalline silicon amorphous silicon heterojunction cell (SHJ) of the crystalline silicon-amorphous silicon heterojunction structure adopts intrinsic amorphous silicon passivation, so it has a good passivation effect. The highest Voc of the commonly used 130μm n-type silicon wafer can reach 751mV, which is much higher than TOPCon. However, the contact resistance of the crystalline silicon amorphous silicon structure cell is higher than the tunneling oxide silicon passivation contact structure (TOPCon) and the high-temperature diffusion homojunction, and its contact resistance has become a major factor restricting the efficiency of SHJ cells. The contact resistance mentioned above includes the contact resistance of the front and back sides of the SHJ, where the N side is the contact of c-Si / ia-Si:H / na-Si:H / TCO (N-segment contact), and the P side is the contact of c-Si / ia-Si:H / pa-Si:H / TCO (P-end contact). In order to improve the above contact information, the commonly used process is to use PECVD deposition to deposit doped microcrystalline / nanocrystalline film layers instead of conventional doped amorphous silicon. However, PECVD deposition of microcrystalline / nanocrystalline films is slow, equipment investment costs are high, and other methods are needed to achieve film crystallization. On the other hand, when amorphous silicon thin films are crystallized, their conductivity will increase by an order of magnitude (10E-4 to 1E10), but the leakage at the edge of the SHJ battery will be very obvious. Summary of the invention

[0004] In order to solve the above problems, the present application provides a solar cell, which can reduce contact resistance and avoid leakage.

[0005] The present application provides a solar cell, comprising a silicon substrate, the silicon substrate having a first surface and a second surface opposite to each other, a first doping layer and a first electrode being sequentially stacked on the first surface, the first doping layer comprising a first crystalline doping region and a first amorphous doping region adjacent to each other; a second doping layer and a second electrode being sequentially stacked on the second surface of the silicon substrate, the doping type of the first doping layer being opposite to that of the second doping layer;

[0006] A projection of the first electrode on the silicon substrate overlaps with a projection of the first crystal doping region on the silicon substrate, and a projection area of ​​the first electrode on the silicon substrate is smaller than a projection area of ​​the first crystal doping region on the silicon substrate.

[0007] Furthermore, the second doped layer includes a first region and a second region that are adjacent to each other, the crystallization rate of the second region is greater than the crystallization rate of the first region; the projection of the second electrode on the silicon substrate overlaps with the projection of the second region on the silicon substrate, and the projection area of ​​the second electrode on the silicon substrate is smaller than the projection area of ​​the second region on the silicon substrate.

[0008] Furthermore, the first region is a second amorphous doping region, and the second region is a second crystalline doping region.

[0009] Furthermore, the second doped layer includes doped polysilicon.

[0010] Furthermore, the solar cell further comprises a second passivation layer, wherein the second passivation layer is located on a side of the second doping layer close to the silicon substrate; and / or,

[0011] The solar cell further comprises a dielectric layer, wherein the dielectric layer covers a side of the second doped layer away from the silicon substrate, and the second electrode passes through the dielectric layer and is electrically connected to the second doped layer.

[0012] Further, in the first crystal doping region, at least a portion away from the silicon substrate has crystals; and / or

[0013] In the second crystal doping region, at least a portion away from the silicon substrate has crystals.

[0014] Further, the total width of the first crystalline doping region is 0% to 100% of the width of the first doping layer, excluding 0% and 100%; and / or

[0015] The total width of the second crystalline doping region is 0% to 100% of the width of the second doping layer, excluding 0% and 100%.

[0016] Further, in the width direction, the first amorphous doped region includes first amorphous doped regions A located at both ends of the first doped layer, and the width of the first amorphous doped region A is 0.05 to 6 mm, preferably 0.5 to 1 mm; and / or

[0017] In the width direction, the second amorphous doping region includes second amorphous doping regions A located at two ends of the second doping layer, and the width of the second amorphous doping region A is 0.05 to 6 mm, preferably 0.5 to 1 mm.

[0018] Furthermore, the first crystal doping region is a first microcrystalline doping region, a first nanocrystalline doping region or a first polycrystalline doping region.

[0019] Further, the first amorphous doped region is selected from one of a first amorphous silicon doped region, a first amorphous silicon carbide doped region or a first amorphous silicon oxide doped region; and / or

[0020] The first crystalline doped region is selected from one of a first crystalline silicon doped region, a first crystalline silicon carbide doped region or a first crystalline silicon oxide doped region.

[0021] Further, the crystallization rate of the first crystal doping region is 0.01-100%; and / or

[0022] The crystallization rate of the second crystal doping region is 0.01-100%.

[0023] A method for preparing a solar cell comprises the following steps:

[0024] Providing a silicon substrate having a first surface and a second surface opposite to each other;

[0025] forming a first doped layer on one side of the first surface, wherein the first doped layer is a first amorphous doped layer;

[0026] Performing a crystallization process on the first doped layer, so that a part of the first amorphous doped layer is transformed into a first crystalline doped region, and a part that has not been crystallized is the first amorphous doped region;

[0027] forming a first electrode on a side of the first crystalline doped region away from the silicon substrate;

[0028] forming a second doping layer on one side of the second surface, wherein the first doping layer and the second doping layer have opposite doping types;

[0029] forming a second electrode on a side of the second doped layer away from the silicon substrate;

[0030] A projection of the first electrode on the silicon substrate overlaps with a projection of the first crystal doping region on the silicon substrate, and a projection area of ​​the first electrode on the silicon substrate is smaller than a projection area of ​​the first crystal doping region on the silicon substrate.

[0031] Furthermore, the second doped layer is a polysilicon doped layer.

[0032] Furthermore, the second doped layer is a second amorphous doped layer; and the method for preparing the solar cell further comprises the steps of:

[0033] Performing a crystallization process on the second doping layer, so that a part of the second doping layer is transformed into a second crystalline doping region, and a part that has not been crystallized is a second amorphous doping region;

[0034] A projection of the second electrode on the silicon substrate overlaps with a projection of the second crystal doping region on the silicon substrate, and a projection area of ​​the second electrode on the silicon substrate is smaller than a projection area of ​​the second crystal doping region on the silicon substrate.

[0035] Furthermore, after the first doped layer is crystallized and before the first electrode is formed on the side of the first crystal doped region away from the silicon substrate, a first conductive layer is formed on the side of the first doped layer away from the silicon substrate.

[0036] Furthermore, the crystallization process for the first doping layer is to irradiate the first doping layer with laser.

[0037] Furthermore, the prepared solar cell is the aforementioned solar cell.

[0038] The present application provides a battery assembly, which includes the aforementioned solar cell or the solar cell prepared by the aforementioned preparation method.

[0039] The solar cell of the present application has a projection of the first electrode on the silicon substrate overlapping with the projection of the first crystalline doped region on the silicon substrate, and the projection area of ​​the first electrode on the silicon substrate is smaller than the projection area of ​​the first crystalline doped region on the silicon substrate; when photogenerated carriers are transmitted to the first electrode through the first doped layer, the current density here is the highest. Since the transmission efficiency of the first crystallized doped region is higher than that of the first amorphous doped region, the larger the projection area of ​​the first crystalline doped region on the silicon substrate, the higher the transmission efficiency and the smaller the contact resistance. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The accompanying drawings are used to better understand the present application and do not constitute an improper limitation on the present application.

[0041] Figure 1 This is a schematic diagram of the structure of the solar cell provided in this application.

[0042] Figure 2 A schematic diagram of a portion of the structure of the solar cell provided in this application.

[0043] Figure 3 A schematic diagram of a portion of the structure of the solar cell provided in this application.

[0044] Figure 4 A schematic diagram of a portion of the structure of the solar cell provided in this application.

[0045] Figure 5 A schematic diagram of a portion of the structure of the solar cell provided in this application.

[0046] Figure 6 This is a schematic diagram of the structure of the solar cell provided in this application.

[0047] Description of Reference Numerals

[0048] 1-first electrode, 2-first conductive layer, 3-first amorphous doped region, 4-first passivation layer, 5-silicon substrate, 6-second passivation layer, 7-second amorphous doped region, 8-second conductive layer, 9-second electrode, 10-first crystalline doped region, 11-second crystalline doped region, 12-dielectric layer. DETAILED DESCRIPTION

[0049] The following is a description of the exemplary embodiments of the present application, including various details of the embodiments of the present application to facilitate understanding, which should be considered as merely exemplary. Therefore, it should be recognized by those of ordinary skill in the art that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present application. Similarly, for clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0050] For the same thickness of the growth film layer, amorphous silicon has a faster growth rate than crystals (microcrystals or nanocrystals). However, amorphous silicon does not have the high conductivity of crystalline silicon, which is not conducive to the electrical contact of solar cells. Therefore, the preparation of batteries by laser-induced transformation of amorphous silicon to microcrystalline silicon has extremely high production capacity advantages. Taking n-type silicon wafers as an example, under the action of the field effect, the minority holes of photogenerated carriers are transmitted to the p-end, and enter the second doped layer through thermal emission or diffusion, and then enter the second conductive layer 8 through tunneling, and then converge into the second electrode 9, and the electrons converge into the first electrode 1 through the first doped layer and the first conductive layer 2. During the transmission process, the lateral conductivity of the second conductive layer 8 is very strong, and the photogenerated carriers are mainly collected by the second conductive layer 8, so the contact surface between the second conductive layer 8 / the second doped layer / the silicon substrate 5 will play a role in transmitting carriers. The contact resistance between the second conductive layer 8 / the second doped layer / the silicon substrate 5 is limited by the doping concentration of the second doped layer. Conventional doped amorphous silicon has low doping efficiency, and the transmission between it and the conductive layer and the silicon substrate 5 is mainly defect-assisted tunneling, which is inefficient. If the amorphous silicon in this area is crystallized by laser to improve its doping efficiency, the contact between the conductive layer / the doped layer will be heavily doped, and the transmission mode will change from defect-assisted tunneling to direct tunneling, and the resistivity will be significantly reduced. Therefore, in the entire battery contact area, compared with the amorphous doped layer, the higher the proportion of the crystallized doped layer, the lower the contact resistance of the battery. Based on this, the present application provides the following technical solutions.

[0051] The present application provides a solar cell, including a silicon substrate 5, the silicon substrate 5 having a first surface and a second surface opposite to each other, a first doping layer and a first electrode 1 are sequentially stacked on the first surface, the first doping layer includes a first crystal doping region 10 and a first amorphous doping region 3 adjacent to each other; the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystal doping region 10 on the silicon substrate 5, and the projection area of ​​the first electrode 1 on the silicon substrate 5 is smaller than the projection area of ​​the first crystal doping region 10 on the silicon substrate 5. The first electrode 1 can be multiple, and the multiple first electrodes 1 extend along the first direction and are arranged at intervals along the second direction. Correspondingly, the first crystal doping region 10 can also be multiple and arranged one-to-one with the first electrode 1.

[0052] In the solar cell provided in the present application, since the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystal doping region 10 on the silicon substrate 5, and the projection area of ​​the first electrode 1 on the silicon substrate 5 is smaller than the projection area of ​​the first crystal doping region 10 on the silicon substrate 5, when the photogenerated carriers are transmitted to the first electrode 1 through the first doping layer, the current density here is the highest. Since the transmission efficiency of the first crystallized doping region is higher than that of the first amorphous doping region 3, the larger the projection area of ​​the first crystal doping region 10 on the silicon substrate 5, the higher the transmission efficiency and the smaller the contact resistance.

[0053] like Figure 1 As shown, in some embodiments, a second doping layer and a second electrode 9 are sequentially stacked on the second surface of the silicon substrate 5, and the second electrode 9 is conductively connected to the second doping layer. In addition, the first doping layer and the second doping layer have opposite doping types, so as to collect and extract electrons and holes respectively, so as to form photocurrent.

[0054] The specific structure of the solar cell is described in detail below through several embodiments.

[0055] Embodiment 1:

[0056] In the first embodiment, the second doped layer includes a first region and a second region that are adjacent to each other, and the crystallization rate of the second region is greater than the crystallization rate of the first region. That is, the first region and the second region are arranged along a direction parallel to the second surface. The projection of the second electrode on the silicon substrate 5 overlaps with the projection of the second region on the silicon substrate 5, and the projection area of ​​the second electrode on the silicon substrate 5 is smaller than the projection area of ​​the second region on the silicon substrate 5. That is, the projection of the second electrode on the silicon substrate 5 is located inside the projection of the second region on the silicon substrate 5. In this way, the contact resistance between the second electrode and the second doped layer is smaller, and the transmission efficiency is higher.

[0057] In some embodiments, the first region is the second amorphous doping region 7 , and the second region is the second crystalline doping region 11 . That is, the second doping layer includes the second amorphous doping region 7 and the second crystalline doping region 11 that are adjacent to each other.

[0058] The projection of the second electrode 9 on the silicon substrate 5 overlaps with the second crystal doping region 11 on the silicon substrate 5 , and the projection area of ​​the second electrode 9 on the silicon substrate 5 is smaller than the projection area of ​​the second crystal doping region 11 on the silicon substrate 5 .

[0059] There are multiple second electrodes 9, and the multiple second electrodes 9 can be arranged in parallel as multiple strip structures. Along the direction perpendicular to the second electrodes 9, the second crystalline doping regions 11 and the second amorphous doping regions 7 are alternately arranged in sequence, and each second electrode 9 at least partially overlaps with the second crystalline doping region 11 on the projection of the silicon substrate 5, and there can be multiple second crystalline doping regions 11 to correspond one by one with the multiple second electrodes 9.

[0060] In some embodiments, the first electrode 1 is a plurality of strip structures arranged in parallel, and along a direction perpendicular to the first electrode 1, the first crystalline doping regions 10 and the first amorphous doping regions 3 are alternately arranged in sequence, and each first electrode 1 at least partially overlaps with the first crystalline doping region 10 on the projection of the silicon substrate, and there can be multiple first crystalline doping regions 10 to correspond one by one to the multiple first electrodes 1.

[0061] In some embodiments, the first amorphous doping region 3 is disposed around the first crystalline doping region 10 .

[0062] Specifically, the projection of the first crystalline doping region 10 on the silicon substrate 5 may be a regular shape, such as a circle, a rectangle, or an irregular shape.

[0063] In some embodiments, the second crystalline doping region 11 and the second amorphous doping region 7 are arranged in sequence.

[0064] In some embodiments, the second amorphous doping region 7 is disposed around the second crystalline doping region 11 .

[0065] Specifically, the projection of the second crystalline doping region 11 on the silicon substrate 5 may be a regular shape, such as a circle, a rectangle, or an irregular shape.

[0066] A first passivation layer 4 is further stacked between the silicon substrate 5 and the first doped layer. The first passivation layer 4 is located on a side of the first doped layer close to the silicon substrate 5. That is, the first passivation layer 4 is located between the first doped layer and the silicon substrate 5. When the first doped layer includes one or more of microcrystalline silicon, nanocrystalline silicon, and amorphous silicon, the first passivation layer 4 includes one or more of intrinsic microcrystalline silicon, intrinsic nanocrystalline silicon, and intrinsic amorphous silicon.

[0067] A first conductive layer 2 is disposed between the first doped layer and the first electrode 1 .

[0068] A second passivation layer 6 is further stacked between the silicon substrate 5 and the second doped layer. The second passivation layer 6 is located on a side of the second doped layer close to the silicon substrate 5. When the second doped layer includes one or more of microcrystalline silicon, nanocrystalline silicon, and amorphous silicon, the second passivation layer 6 includes one or more of intrinsic microcrystalline silicon, intrinsic nanocrystalline silicon, and intrinsic amorphous silicon.

[0069] A second conductive layer 8 is arranged between the second doped layer and the second electrode 9 .

[0070] The silicon substrate 5 may be a p-type doped silicon substrate 5 or an n-type doped silicon substrate 5 .

[0071] The first passivation layer 4 may be intrinsic hydrogenated amorphous silicon, and its thickness is 1 nm-20 nm.

[0072] The second passivation layer 6 may be intrinsic hydrogenated amorphous silicon, and its thickness is 1 nm-20 nm.

[0073] The first passivation layer 4 and the second passivation layer 6 are different layers, and may have different hydrogen contents, thicknesses, and processes, for example.

[0074] The thickness of the first doping layer is 5nm-200nm.

[0075] The thickness of the second doping layer is 5nm-200nm.

[0076] The first conductive layer 2 is a TCO layer, and its thickness is 5nm-200nm.

[0077] The second conductive layer 8 is a TCO layer, and its thickness is 5 nm-200 nm.

[0078] The first electrode 1 is made of silver, aluminum, copper or an alloy thereof.

[0079] The second electrode 9 is made of silver, aluminum, copper or an alloy thereof.

[0080] In the solar cell provided in the present application, since the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystal doping region 10 on the silicon substrate 5, and the projection area of ​​the first electrode 1 on the silicon substrate 5 is smaller than the projection area of ​​the first crystal doping region 10 on the silicon substrate 5, and the projection of the second electrode 9 on the silicon substrate 5 overlaps with the second crystal doping region 11 on the silicon substrate 5, and the projection area of ​​the second electrode 9 on the silicon substrate 5 is smaller than the projection area of ​​the second crystal doping region 11 on the silicon substrate 5, when the photogenerated carriers are transmitted to the first electrode 1 / the second electrode 9 through the first doping layer / the second doping layer, the current density here is the highest, and since the transmission efficiency of the first crystallized doping region and the second crystallized doping region is higher than that of the first amorphous doping region 3 and the second amorphous doping region 7, the larger the projection areas of the first crystal doping region 10 and the second crystal doping region 11 on the silicon substrate 5, the higher the transmission efficiency and the smaller the contact resistance.

[0081] In the present application, the first doping layer and the second doping layer have opposite doping types.

[0082] The first crystalline doping region 10 and the second crystalline doping region 11 have opposite conductivity types.

[0083] The first amorphous doping region 3 and the first crystalline doping region 10 have the same conductivity type.

[0084] The second amorphous doping region 7 and the second crystalline doping region 11 have the same conductivity type.

[0085] In some embodiments, the element doped in the first doping layer is phosphorus or boron. Exemplarily, when the element doped in the first doping layer is phosphorus, the element doped in the second doping layer is boron.

[0086] In some embodiments, when the element doped in the first doping layer is boron, the element doped in the second doping layer is phosphorus.

[0087] In some embodiments, the doping element in the first crystalline doping region 10 is the same as the doping element in the first amorphous doping region 3 .

[0088] In some embodiments, the concentration of the doping element in the first crystalline doping region 10 is greater than the concentration of the doping element in the first amorphous doping region 3 , which can improve the conductivity of the first doping layer.

[0089] In some embodiments, the doping element in the second crystalline doping region 11 is the same as the doping element in the second amorphous doping region 7 .

[0090] In some embodiments, the concentration of the doping element in the second crystalline doping region 11 is greater than the concentration of the doping element in the second amorphous doping region 7 , which can improve the conductivity of the second doping layer.

[0091] In the present application, the first crystalline doping region 10 is a first microcrystalline doping region, a first nanocrystalline doping region or a first polycrystalline doping region.

[0092] The second crystal doping region 11 is a second microcrystalline doping region, a second nanocrystalline doping region or a second polycrystalline silicon doping region.

[0093] In the present application, the first amorphous doping region 3 is selected from one of a first amorphous silicon doping region, a first amorphous silicon carbide doping region or a first amorphous silicon oxide doping region.

[0094] The first crystalline doped region 10 is selected from one of a first crystalline silicon doped region, a first crystalline silicon carbide doped region or a first crystalline silicon oxide doped region.

[0095] The second amorphous doping region 7 is selected from one of a second amorphous silicon doping region, a second amorphous silicon carbide doping region or a second amorphous silicon oxide doping region.

[0096] The second crystalline doped region 11 is selected from one of a second crystalline silicon doped region, a second crystalline silicon carbide doped region or a second crystalline silicon oxide doped region.

[0097] In some embodiments, the first crystalline doping region 10 is a first crystalline silicon doping region, the first amorphous doping region 3 is a first amorphous silicon doping region, the second crystalline doping region 11 is a second crystalline silicon doping region, and the second amorphous doping region 7 is a second amorphous silicon doping region.

[0098] In the present application, the crystallization rate of the first crystalline doping region 10 is 0.01-100%, for example, 0.01%, 1%, 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, etc.

[0099] The crystallization rate of the second crystalline doping region 11 is 0.01-100%, for example, it can be 0.01%, 1%, 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, etc.

[0100] The crystallization rate can be measured by Raman spectroscopy. Amorphous silicon / silicon carbide / silicon oxide, microcrystalline silicon / silicon carbide / silicon oxide and crystalline silicon / silicon carbide / silicon oxide have different wave numbers, such as amorphous silicon is about 480 / cm, microcrystalline silicon is about 510 / cm, and crystalline silicon is 520.7 / cm. The amount of components affects the Raman spectrum intensity of the corresponding peak, and the crystallization rate is obtained by integral conversion. The crystallization rate is a parameter that characterizes the degree of crystallization. As the crystallization rate increases, the mobility of carriers increases, the effective doping concentration also increases, and the conductivity of the doped layer increases. Microcrystalline silicon has a short-range ordered atomic structure, while amorphous silicon is amorphous silicon. Therefore, the crystallized area, grain size, etc. can be observed by transmission electron microscopy.

[0101] The grain size of the first crystalline doping region 10 is nanometer-scale and does not exceed 100 nm, for example, it may be 100 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm or 30 nm.

[0102] The grain size of the second crystalline doping region 11 is nanometer-scale and does not exceed 100 nm, for example, it may be 100 nm, 90 nm, 80 nm, 70 nm, 60 nm, 50 nm, 40 nm or 30 nm.

[0103] The grain size can be observed by transmission electron microscopy.

[0104] In the present application, in the first crystal doping region 10, at least a portion away from the silicon substrate 5 has crystals. In the second crystal doping region 11, at least a portion away from the silicon substrate 5 has crystals.

[0105] In some embodiments, the first crystalline doping region 10 is entirely crystalline.

[0106] In some embodiments, in the first crystalline doping region 10 , the crystallization rate of the first crystallized doping layer gradually decreases in a direction from close to the first electrode 1 to the first passivation layer 4 .

[0107] In some embodiments, the crystallization rates of the first crystallized doping layer in the first crystalline doping region 10 in a direction from close to the first electrode 1 to the first passivation layer 4 are the same.

[0108] In some embodiments, the second crystalline doping region 11 is entirely crystalline.

[0109] In some embodiments, in the second crystalline doping region 11 , the crystallization rate of the second crystallized doping layer gradually decreases in a direction from close to the second electrode 9 to the second passivation layer 6 .

[0110] In some embodiments, the crystallization rate of the second crystalline doping region 11 is the same in a direction from close to the second electrode 9 to the second passivation layer 6 in the second crystalline doping region 11 .

[0111] In the present application, the total width of the first crystalline doping region 10 is 0% to 100% of the width of the first doping layer, excluding 0% and 100%; for example, it can be 1%, 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, 95%, 99.9%, etc.

[0112] The total width of the second crystalline doping region 11 is 0% to 100% of the width of the second doping layer, excluding 0% and 100%; for example, it can be 1%, 5%, 10%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, 80%, 85%, 90%, 95%, 99.9%, etc.

[0115] In some embodiments, the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystalline doping region 10 on the silicon substrate 5 , and the projection of the first electrode 1 is located at the center of the projection of the first crystalline doping region 10 .

[0116] Since the transmission efficiency of the first crystallized doped region 10 is higher than that of the first amorphous doped region 3, the larger the overlapping area between the projection of the first electrode 1 on the silicon substrate 5 and the projection of the first crystal doped region 10 on the silicon substrate 5, the smaller the contact resistance. Therefore, with the structure of the present application, when the photogenerated carriers are transmitted to the first electrode 1 through the first doped layer, the current density here is the highest, and the electronic conduction capacity of the first crystallized doped region 10 can be fully utilized, thereby reducing the contact resistance or series resistance and improving the battery efficiency of the battery. (Contact resistance = contact resistivity / contact area, the contact resistivity of the first crystal doped region 10 is lower than the contact resistivity of the first amorphous doped region 3)

[0117] In some embodiments, the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystalline doping region 10 on the silicon substrate 5, and the projection of the first electrode 1 is located at any position within the projection of the first crystalline doping region 10 (excluding the projection center of the first crystalline doping region 10). With such a structure, since the conductivity of the first crystallized doping region 10 is much greater than the conductivity of the first amorphous doping region 3, the position requirement of the metal electrons is weakened, so it can be offset to a certain extent.

[0118] In some embodiments, the projection of the second electrode 9 on the silicon substrate 5 overlaps with the projection of the second crystalline doping region 11 on the silicon substrate 5 , and the projection of the second electrode 9 is located at the center of the projection of the second crystalline doping region 11 .

[0119] In some embodiments, the projection of the second electrode 9 on the silicon substrate 5 overlaps with the projection of the second crystal doping region 11 on the silicon substrate 5, and the projection of the second electrode 9 is located at any position within the projection of the second crystal doping region 11 (excluding the projection center of the second crystal doping region 11).

[0120] In the present application, in the width direction, the first amorphous doping region 3 includes first amorphous doping regions A located at both ends of the first doping layer, and the width of the first amorphous doping region A is 0.05 to 6 mm, preferably 0.5 to 1 mm, for example, 0.05 mm, 0.1 mm, 0.2 mm,

[0121] 0.3mm, 0.4mm, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm,

[0122] 1.1mm, 1.2mm, 1.3mm, 1.4mm, 1.5mm, 1.6mm, 1.7mm, 1.8mm,

[0123] 1.9mm, 2mm, 2.1mm, 2.2mm, 2.3mm, 2.4mm, 2.5mm, 2.6mm,

[0124] 2.7mm, 2.8mm, 2.9mm, 3mm, 3.1mm, 3.2mm, 3.3mm, 3.4mm,

[0125] 3.5mm, 3.6mm, 3.7mm, 3.8mm, 3.9mm, 4mm, 4.1mm, 4.2mm,

[0126] 4.3mm, 4.4mm, 4.5mm, 4.6mm, 4.7mm, 4.8mm, 4.9mm, 5mm,

[0127] 5.1mm, 5.2mm, 5.3mm, 5.4mm, 5.5mm, 5.6mm, 5.7mm, 5.8mm,

[0128] 5.9mm, 6mm, etc.

[0129] In some embodiments, the first doping layer includes a first crystallized doping region 10 and a first amorphous doping region 3, the first amorphous doping region 3 includes a first amorphous doping region A and a first amorphous doping region B, in the width direction, the first amorphous doping region A is located at both ends of the first doping layer, the first crystal doping region and the first amorphous doping region B are alternately arranged in the middle of the first doping layer, and the first crystal doping region is between the first amorphous doping region A and the first amorphous doping region B.

[0130] In the present application, in the width direction, the second amorphous doping region 7 includes a second amorphous doping region A located at both ends of the second doping layer, and the width of the second amorphous doping region A is 0.05 to 6 mm, preferably 0.5 to 1 mm, for example, 0.05 mm, 0.1 mm, 0.2 mm,

[0131] 0.3mm, 0.4mm, 0.5mm, 0.6mm, 0.7mm, 0.8mm, 0.9mm, 1mm,

[0132] 1.1mm, 1.2mm, 1.3mm, 1.4mm, 1.5mm, 1.6mm, 1.7mm, 1.8mm,

[0133] 1.9mm, 2mm, 2.1mm, 2.2mm, 2.3mm, 2.4mm, 2.5mm, 2.6mm,

[0134] 2.7mm, 2.8mm, 2.9mm, 3mm, 3.1mm, 3.2mm, 3.3mm, 3.4mm,

[0135] 3.5mm, 3.6mm, 3.7mm, 3.8mm, 3.9mm, 4mm, 4.1mm, 4.2mm,

[0136] 4.3mm, 4.4mm, 4.5mm, 4.6mm, 4.7mm, 4.8mm, 4.9mm, 5mm,

[0137] 5.1mm, 5.2mm, 5.3mm, 5.4mm, 5.5mm, 5.6mm, 5.7mm, 5.8mm, 5.9mm, 6mm, etc.

[0138] In some embodiments, the second doping layer includes a second crystalline doping region 11 and a second amorphous doping region 7, and the second amorphous doping region 7 includes a second amorphous doping region A and a second amorphous doping region B. In the width direction, the second amorphous doping region A is located at both ends of the second doping layer, the second crystalline doping region and the second amorphous doping region B are alternately arranged in the middle of the second doping layer, and the second crystalline doping region A and the second amorphous doping region B are between the second amorphous doping region A and the second amorphous doping region B.

[0139] Since the first crystallized doped region and the second crystallized doped region have high conductivity, if both ends of the first doped layer and the second doped layer are crystallized doped regions, the carriers separated on the front and back sides will recombine from the edges, resulting in leakage. Therefore, both ends of the first doped layer and the second doped layer are set as amorphous doped regions, which can reduce the risk of battery leakage.

[0140] In the present application, the first crystalline doped region 10 is formed by laser irradiation, that is, the first crystalline doped region 10 is formed by laser irradiation of an amorphous doped layer, and the amorphous layer is at least partially converted into a crystalline layer under the action of the laser.

[0141] The second crystal doping region 11 is also formed by laser irradiation, that is, the second crystal doping region 11 is formed by laser irradiation of an amorphous doping layer, and the amorphous layer is at least partially transformed into a crystal layer under the action of the laser.

[0142] In the present application, the selective action of the laser can be used to precisely crystallize the area. The first doping layer and the second doping layer are partially crystallized so that both have crystallized areas and amorphous areas. This can not only maintain their high resistivity, but also limit the lateral leakage current. At the same time, it can also increase the effective doping concentration in the crystallized area and reduce the contact resistance, which is beneficial to reduce the resistance loss of the battery.

[0143] The wavelength of the laser will affect its absorption depth in the amorphous film and the longitudinal range of action in the film layer. The longer the wavelength of the laser, the deeper the absorption depth, and the easier it is for the amorphous to transform into a crystal in the longitudinal or thickness direction. In practical applications, the wavelength of the laser can be determined according to actual needs.

[0144] The greater the laser power, the greater the energy generated by the laser, and the easier it is to transform amorphous materials into crystals.

[0145] Laser power, laser spot overlap rate, laser pulse width, and laser irradiation times affect the laser energy received per unit area, the crystallization range, the crystallization rate, and the degree of passivation damage to the silicon wafer surface under the film layer. The greater the laser energy, the easier it is for amorphous to be converted into crystal, but the higher the degree of passivation damage to the silicon wafer surface. Therefore, in the application, the various parameters of the laser can be designed according to the actual situation.

[0146] In the present application, the single spot energy density of the functional laser can be used to characterize the laser energy, and those skilled in the art can control the laser energy by adjusting the above parameters.

[0147] In the method of the present application, for example, the following single spot energy density of the laser can be used, for example, the single spot energy density of the laser> 60mJ / cm 2 . For example, it can be 61mJ / cm 2 、65mJ / cm 2 ,

[0148] 70mJ / cm 2 、75mJ / cm 2 、80mJ / cm 2 、85mJ / cm 2 、90mJ / cm 2 、100mJ / cm 2 ,

[0149] 110mJ / cm 2 、120mJ / cm 2 、130mJ / cm 2 、140mJ / cm 2 、150mJ / cm 2 ,

[0150] 160mJ / cm 2 、170mJ / cm 2 、180mJ / cm 2 、190mJ / cm 2 、200mJ / cm 2 wait.

[0151] Embodiment 2:

[0152] In the second embodiment, the second doped layer includes doped polysilicon. Doped polysilicon has a high current transmission capacity, so when the second doped semiconductor layer is a doped polysilicon layer, the carrier recombination rate can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the hybrid solar cell. Generally, the second doped layer is arranged on the light-receiving surface of the solar cell, and in some embodiments, it can also be arranged on the backlight surface of the solar cell.

[0153] In some embodiments, Figure 6 As shown, the solar cell further includes a second passivation layer 6, and the second passivation layer 6 is located on the side of the second doped layer close to the silicon substrate. That is, the second passivation layer 6 is located between the second doped layer and the silicon substrate. For example, the second passivation layer 6 can be a tunneling oxide layer, so that the second doped layer and the second passivation layer 6 form a tunneling oxide layer passivation contact. The tunneling oxide layer passivation technology can form a tunneling film between the second electrode 9 and the silicon substrate, isolating the second electrode from contacting the silicon substrate, reducing contact recombination losses, and electrons can tunnel through the film without affecting current transfer. At the same time, passivation can bend the surface energy band, reduce the surface recombination losses of the silicon wafer, and can effectively improve the front passivation and metal contact problems.

[0154] In other embodiments, Figure 6 As shown, the solar cell further includes a dielectric layer 12, the dielectric layer 12 covers the side of the second doped layer away from the silicon substrate, and the second electrode 9 is electrically connected to the second doped layer through the dielectric layer 12. The dielectric layer 12 may be provided with an opening corresponding to the second doped layer, and the second electrode 9 is electrically connected to the second doped layer through the opening. Alternatively, the second electrode 9 is electrically connected to the second doped layer by passing through the dielectric layer 12 in a burn-through manner.

[0155] The material of the dielectric layer 12 may include one or more of silicon nitride, silicon oxynitride, and silicon oxide, which can passivate the surface of the semiconductor substrate or doping layer, reduce its carrier recombination rate, and further improve the photoelectric conversion efficiency of the solar cell. In addition, the dielectric layer 12 may be a single-layer structure or a multi-layer structure.

[0156] In the second embodiment, the features of the first crystalline doping region 10 and the first amorphous doping region 3 and the features of the silicon substrate can refer to the first embodiment and will not be described in detail here.

[0157] The present application provides a method for preparing a solar cell, comprising the following steps:

[0158] Step 1: providing a silicon substrate 5, wherein the silicon substrate 5 has a first surface and a second surface opposite to each other;

[0159] Step 2: forming a first doped layer on one side of the first surface, wherein the first doped layer is a first amorphous doped layer;

[0160] Step 3: performing crystallization treatment on the first doped layer, so that a part of the first amorphous doped layer is transformed into a first crystalline doped region 10, and the part that has not been transformed into a first amorphous doped region 3;

[0161] Step 4: forming a first electrode 1 on a side of the first crystal doping region 10 away from the silicon substrate 5; the projection of the first electrode 1 on the silicon substrate 5 overlaps with the projection of the first crystal doping region 10 on the silicon substrate 5, and the projection area of ​​the first electrode 1 on the silicon substrate 5 is smaller than the projection area of ​​the first crystal doping region 10 on the silicon substrate 5;

[0162] Step 5: forming a second doping layer on one side of the second surface, wherein the first doping layer and the second doping layer have opposite doping types;

[0163] Step six: forming a second electrode 9 on a side of the second doped layer away from the silicon substrate 5 .

[0164] It can be understood that forming the second doping layer on one side of the second surface may be performed before forming the first doping layer or after forming the first doping layer.

[0165] In some embodiments, the second doped layer is a polysilicon doped layer. Doped polysilicon has a higher current transmission capacity. Therefore, when the second doped semiconductor layer is a doped polysilicon layer, the carrier recombination rate can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the hybrid solar cell.

[0166] In the above embodiment, the method for preparing the solar cell further includes the steps of: forming a dielectric layer 12 on the side of the second doped layer away from the silicon substrate 5, and the second electrode 9 is electrically connected to the second doped layer through the dielectric layer 12. The dielectric layer 12 may be provided with an opening corresponding to the second doped layer, and the second electrode 9 is electrically connected to the second doped layer through the opening. Alternatively, the second electrode 9 is electrically connected to the second doped layer by passing through the dielectric layer 12 by burning through.

[0167] Before forming the second doping layer, a second passivation layer 6 may be formed on the second surface, and then the second doping layer may be formed on the side of the second passivation layer 6 away from the silicon substrate 5. The second passivation layer 6 may be a tunneling oxide layer.

[0168] In some other embodiments, the second doped layer is a second amorphous doped layer. The method for preparing the solar cell further comprises the steps of: performing a crystallization process on the second doped layer, so that a part of the second doped layer is converted into a second crystalline doped region, and a part that has not been crystallized is a second amorphous doped region;

[0169] The projection of the second electrode on the silicon substrate 5 overlaps with the projection of the second crystal doping region on the silicon substrate 5 , and the projection area of ​​the second electrode on the silicon substrate 5 is smaller than the projection area of ​​the second crystal doping region on the silicon substrate 5 .

[0170] It can be understood that forming the second doping layer on one side of the second surface may be performed before forming the first doping layer or after forming the first doping layer.

[0171] In some embodiments, after the first doped layer is crystallized, before the first electrode 1 is formed on the side of the first crystal doped region away from the silicon substrate 5, a first conductive layer is formed on the side of the first doped layer away from the silicon substrate 5. The conductive layer has a high electrical conductivity and can timely guide the collected carriers to reduce the carrier recombination rate.

[0172] In step one, the silicon wafer is cleaned and textured to obtain a silicon substrate 5 with a textured surface.

[0173] The silicon substrate 5 may be a p-type doped silicon substrate 5 or an n-type doped silicon substrate 5 .

[0174] In some embodiments, the front side of the silicon substrate 5 is a velvet surface, and the back side is a flat surface.

[0175] In some embodiments, both the front and back sides of the silicon substrate 5 are velvet surfaces.

[0176] In some embodiments, the back side of the silicon substrate 5 is a velvet surface, and the front side is a flat surface.

[0177] In some embodiments, both the front and back sides of the silicon substrate 5 are planar.

[0178] In some embodiments, the back side portion of the silicon substrate 5 has a textured surface.

[0179] When the silicon substrate 5 has a suede structure, the actual contact area between the silicon substrate 5 and the amorphous film layer, the amorphous film layer and the TCO film layer, and the TCO film layer and the metal electrode grid line can be increased, thereby reducing the battery series resistance.

[0180] In step 2, a first doped layer is formed on one side of the first surface, wherein the first doped layer is a first amorphous doped layer;

[0181] A second doping layer is formed on one side of the second surface, and the second doping layer is a second amorphous doping layer.

[0182] In some embodiments, Figure 2 As shown, a first passivation layer 4 and a first amorphous doped layer are sequentially formed on the first surface of the silicon substrate 5. The formation methods of the first passivation layer 4 and the first amorphous doped layer are not further limited. For example, the first passivation layer 4 can be prepared by plasma enhanced CVD (PECVD) or hot wire CVD (cat-CVD), and the first amorphous doped layer can be prepared by PECVD.

[0183] In some embodiments, Figure 3 As shown, a second passivation layer 6 and a second amorphous doped layer are formed on one side of the second surface of the silicon substrate 5. The formation method of the second passivation layer 6 and the second amorphous doped layer is not further limited. For example, the second passivation layer 6 can be prepared by plasma enhanced CVD (PECVD) or hot wire CVD (cat-CVD), and the second amorphous doped layer can be prepared by PECVD.

[0184] In step three, if Figure 4 As shown, the first doping layer and the second doping layer are crystallized by irradiating the first doping layer and the second doping layer with a laser, and the amorphous silicon is crystallized under the thermal effect of the laser, so that part of the first amorphous doping layer is converted into a first crystalline doping region 10, and the part that has not been crystallized is the first amorphous doping region 3. At the same time, part of the second amorphous doping layer is converted into a second crystalline doping region 11, and the part that has not been crystallized is the second amorphous doping region 7, and the doping concentration of the doping elements in the first crystalline doping region 10 and the second crystalline doping region 11 is increased.

[0185] In step 4, if Figure 5 As shown, a first electrode 1 is formed on a side of the first doped layer away from the silicon substrate 5, and a second electrode 9 is formed on a side of the second doped layer away from the silicon substrate 5. Before forming the first electrode 1 and the second electrode 9, a first conductive layer 2 is formed on a surface of the first doped layer away from the first passivation layer 4; and a second conductive layer 8 is formed on a surface of the second doped layer away from the second passivation layer 6. The formation methods of the first conductive layer 2 and the second conductive layer 8 are not specifically limited. For example, the first conductive layer 2 and the second conductive layer 8 are formed at the same time, and the first conductive layer 2 and the second conductive layer 8 are formed by PVD (Physical Vapor Deposition), RPD (Rcactivc Plasma Diosition), etc. The first conductive layer 2 and the second conductive layer 8 can be ITO (Indiumtin oxide), IWO (tungsten-doped indium oxide), AZO (aluminum-doped zinc oxide), etc.

[0186] In step 5, the formation methods of the first electrode 1 and the second electrode 9 are not specifically limited. For example, the first electrode 1 and the second electrode 9 can be obtained by electroplating or screen printing.

[0187] The preparation method of the present application, through laser induction, makes the first doped layer have both the first crystalline doped region 10 and the first amorphous doped region 3, so as to provide good contact for the solar cell, effectively reduce the contact resistance (and reduce the series resistance), and at the same time, the laser-induced transformation of amorphous silicon into microcrystalline silicon can greatly increase the production capacity. In addition, the first doped layer and the two ends of the second doped layer are not crystallized, thereby reducing the risk of leakage of the battery.

[0188] The solar cell prepared by the preparation method of the present application is the aforementioned solar cell, and the various parts of the solar cell can refer to the aforementioned description.

[0189] The present application also provides a battery assembly, comprising the aforementioned solar cell.

[0190] Example

[0191] The experimental methods used in the following examples are all conventional methods unless otherwise specified.

[0192] Unless otherwise specified, the materials and reagents used in the following examples can be obtained from commercial sources.

[0193] Example 1.1

[0194] The method for preparing a solar cell of this embodiment comprises the following steps:

[0195] Step 1: Polish and clean the silicon wafer, and perform texturing on the light-incident surface.

[0196] Step 2: On one side of the silicon wafer, PECVD is used to sequentially deposit a 6nm thick intrinsic hydrogenated amorphous silicon passivation layer (first passivation layer) and a 20nm thick amorphous silicon doping layer (first doping layer), and the doping type is boron. On the front side of the battery, PECVD is used to sequentially deposit a 4nm thick intrinsic hydrogenated amorphous silicon passivation layer (second passivation layer) and an 11nm thick doped amorphous silicon doping layer (second doping layer), and the doping element is phosphorus.

[0197] Step 3: Use a 532nm green nano laser to scan the first doping layer and the second doping layer of the entire cell. The scanning width is 30μm and the scanning length is through the entire cell. In the first doping layer, a microcrystalline silicon doping region is formed by laser-induced crystallization (the total width of the first crystallized doping region is 2.5% of the width of the first doping layer), and the non-crystallized portion is the first amorphous doping region. In the second doping layer, a microcrystalline silicon doping region is formed by laser-induced crystallization (the total width of the second crystallized doping region is 2.5% of the width of the second doping layer), and the non-crystallized portion is the second amorphous doping region.

[0198] Step 4: Using a wet process, hydrofluoric acid is used to clean the silicon oxide produced on the surfaces of the first doping layer and the second doping layer.

[0199] Step 5: Using a PVD process, a 65 nm thick TCO film is deposited on the surfaces of the first doping layer and the second doping layer as a lateral conductive layer.

[0200] Step six: Use laser transfer to print metal gate lines (first electrode and second electrode) on the conductive layers on both sides respectively. The projection of the gate lines on the silicon substrate is located within the projection of the first crystal doping region and the second crystal doping layer on the silicon substrate, and the centers coincide. The projection area of ​​the gate lines accounts for 2% of the projection area of ​​the first doping layer and the second doping layer, and the width of the gate lines is 2% of the width of the first doping layer and the second doping layer.

[0201] Step 7: Curing the cell at 200°C for 45 minutes, and then conducting IV test screening. The parallel resistance and series resistance of the solar cell were tested using the FCT650 machine under standard test conditions.

[0202] The performance parameters of the solar cell are shown in Table 1.

[0203] The difference between Example 2 and Example 3 and Example 1 is that the total width of the first crystal doping region is different, and the other parameters are the same. See Table 1 for details.

[0204] The difference between Example 4 to Example 7 and Example 1 is that the widths of the first amorphous doping regions 3 located at both ends of the first doping layer are different, and the other parameters are the same. See Table 1 for details.

[0205] The difference between Comparative Example 1 and Example 1 is that there is no laser processing step in Comparative Example 1, and other parameters are the same as those in Example 1. The entire first doped layer is the first amorphous doped region 3, and the entire second doped layer is the second amorphous doped region. The various parameters of the solar cell of Comparative Example 1 are shown in Table 1.

[0206] The difference between Comparative Example 2 and Example 1 is that the projection of the first electrode on the silicon substrate completely overlaps with the projection of the first crystal doping region on the silicon substrate, and the projection areas are the same, and other parameters are the same. See Table 1 for details.

[0207] The difference between Comparative Example 3 and Example 1 is that the total width of the first crystal doping region is different, and other parameters are the same. See Table 1 for details.

[0208] The difference between Comparative Example 4 and Example 1 is that the first doping layer in Comparative Example 4 is a whole layer of the first microcrystalline silicon doping region without an amorphous silicon doping region, and the second doping layer is a whole layer of the second microcrystalline silicon doping region without an amorphous silicon doping region. The various parameters of the solar cell of Comparative Example 4 are shown in Table 1.

[0209] The difference between Comparative Example 5 and Example 1 is that the projection of the first electrode on the silicon substrate cross-overlaps with the projection of the first crystal doping region on the silicon substrate, and the overlap range is 20%, and other parameters are the same. See Table 1 for details.

[0210] Table 1 shows the performance parameters of the solar cells of various embodiments and comparative examples.

[0211]

[0212]

[0213] Summary: From Table 1, it can be seen that the solar cell of the present application has a smaller IV test series resistance and a larger IV test parallel resistance. The smaller the IV test series resistance, the smaller the contact resistance of the solar cell, and the larger the IV test parallel resistance, the smaller the leakage risk of the solar cell.

[0214] Although the embodiments of the present application are described above in conjunction with the accompanying drawings, the present application is not limited to the above specific embodiments and application fields, and the above specific embodiments are merely illustrative and instructive, rather than restrictive. A person of ordinary skill in the art can also make many forms under the guidance of this specification and without departing from the scope of protection of the claims of the present application, all of which belong to the protection of the present application.

Claims

1. A solar cell, wherein: A silicon substrate is provided, wherein the silicon substrate has a first surface and a second surface opposite to each other, a first doping layer and a first electrode are sequentially stacked on the first surface, the first doping layer comprises a first crystalline doping region and a first amorphous doping region adjacent to each other along a first direction; a second doping layer and a second electrode are sequentially stacked on the second surface of the silicon substrate, the doping type of the first doping layer is opposite to that of the second doping layer; and the first direction is parallel to the first surface; A projection of the first electrode on the silicon substrate overlaps with a projection of the first crystal doping region on the silicon substrate, and a projection area of ​​the first electrode on the silicon substrate is smaller than a projection area of ​​the first crystal doping region on the silicon substrate.

2. The solar cell according to claim 1, wherein: The second doped layer includes a first region and a second region adjacent to each other along the first direction, and the crystallization rate of the second region is greater than that of the first region; the projection of the second electrode on the silicon substrate overlaps with the projection of the second region on the silicon substrate, and the projection area of ​​the second electrode on the silicon substrate is smaller than the projection area of ​​the second region on the silicon substrate.

3. The solar cell according to claim 2, wherein: The first region is a second amorphous doping region, and the second region is a second crystalline doping region.

4. The solar cell according to claim 1, wherein: The second doped layer includes doped polysilicon.

5. The solar cell according to claim 4, wherein: The solar cell further comprises a second passivation layer, wherein the second passivation layer is located on a side of the second doping layer close to the silicon substrate; and / or, The solar cell further comprises a dielectric layer, wherein the dielectric layer covers a side of the second doped layer away from the silicon substrate, and the second electrode passes through the dielectric layer and is electrically connected to the second doped layer.

6. The solar cell according to claim 1, wherein: In the first crystal doping region, at least a portion away from the silicon substrate has crystals.

7. The solar cell according to claim 3, wherein: The total width of the first crystalline doping region is 0% to 100% of the width of the first doping layer, excluding 0% and 100%; and / or, The total width of the second crystalline doping region is 0% to 100% of the width of the second doping layer, excluding 0% and 100%.

8. The solar cell according to claim 3, wherein: In the width direction, the first amorphous doped region includes first amorphous doped regions A located at both ends of the first doped layer, and the width of the first amorphous doped region A is 0.05 to 6 mm, preferably 0.5 to 1 mm; and / or In the width direction, the second amorphous doping region includes second amorphous doping regions A located at two ends of the second doping layer, and the width of the second amorphous doping region A is 0.05 to 6 mm, preferably 0.5 to 1 mm.

9. The solar cell according to any one of claims 1 to 8, wherein: The first crystal doping region is a first microcrystalline doping region, a first nanocrystalline doping region or a first polycrystalline doping region.

10. The solar cell according to any one of claims 1 to 8, wherein: The first amorphous doped region is selected from one of a first amorphous silicon doped region, a first amorphous silicon carbide doped region or a first amorphous silicon oxide doped region; and / or The first crystalline doped region is selected from one of a first crystalline silicon doped region, a first crystalline silicon carbide doped region or a first crystalline silicon oxide doped region.

11. The solar cell according to any one of claims 3 to 8, wherein: The crystallization rate of the first crystal doping region is 0.01-100%; and / or The crystallization rate of the second crystal doping region is 0.01-100%.

12. A method for preparing a solar cell, wherein: The steps include: Providing a silicon substrate having a first surface and a second surface opposite to each other; forming a first doped layer on one side of the first surface, wherein the first doped layer is a first amorphous doped layer; Performing a crystallization process on the first doped layer, so that a part of the first amorphous doped layer is transformed into a first crystalline doped region, and a part that has not been crystallized is the first amorphous doped region; forming a first electrode on a side of the first crystalline doped region away from the silicon substrate; forming a second doping layer on one side of the second surface, wherein the first doping layer and the second doping layer have opposite doping types; forming a second electrode on a side of the second doped layer away from the silicon substrate; A projection of the first electrode on the silicon substrate overlaps with a projection of the first crystal doping region on the silicon substrate, and a projection area of ​​the first electrode on the silicon substrate is smaller than a projection area of ​​the first crystal doping region on the silicon substrate.

13. The preparation method according to claim 12, wherein: The second doped layer is a polysilicon doped layer.

14. The preparation method according to claim 12, wherein: The second doped layer is a second amorphous doped layer; the method for preparing the solar cell further comprises the steps of: Performing a crystallization process on the second doping layer, so that a part of the second doping layer is transformed into a second crystalline doping region, and a part that has not been crystallized is a second amorphous doping region; A projection of the second electrode on the silicon substrate overlaps with a projection of the second crystal doping region on the silicon substrate, and a projection area of ​​the second electrode on the silicon substrate is smaller than a projection area of ​​the second crystal doping region on the silicon substrate.

15. The preparation method according to any one of claims 12 to 14, wherein After the first doping layer is crystallized and before the first electrode is formed on the side of the first crystal doping region away from the silicon substrate, the method further includes forming a first conductive layer on the side of the first doping layer away from the silicon substrate.

16. The preparation method according to any one of claims 12 to 14, wherein The crystallization process for the first doping layer is to irradiate the first doping layer with laser.

17. A battery assembly, wherein: The invention comprises the solar cell according to any one of claims 1 to 11 or the solar cell prepared by the preparation method according to any one of claims 12 to 16.

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