Micro light emitting diode display device and method of manufacturing micro light emitting diode display device

Abstract

The invention discloses a micro light-emitting diode display device and a method for manufacturing the micro light-emitting diode display device. The micro light emitting diode display device comprises a driving backboard and a plurality of pixel units. Each pixel unit comprises a conductive column, a first electrode, a light-emitting structure and a second electrode. The conductive column and the first electrode are sequentially arranged on the driving backboard and are electrically connected with each other. The light-emitting structure is disposed on the first electrode, and the second electrode is disposed on the light-emitting structure. The light emitting structure includes a first doped layer, an active layer, and a second doped layer. The second doped layer is electrically connected with the first electrode, and the first doped layer is electrically connected with the second electrode. The area of the surface, back to the active layer, of the second doping layer in the light-emitting structure is larger than that of the surface, back to the active layer, of the first doping layer. According to the invention, the structure of the micro light-emitting diode does not need to be etched, so that the edge of the micro light-emitting diode is prevented from being damaged, and the light-emitting efficiency and the manufacturing yield are improved.

Description

Technical Field

[0001] The present invention relates to a micro light emitting diode display, and in particular to a micro light emitting diode display device and a method for manufacturing the micro light emitting diode display device. Background Art

[0002] With the development of display device manufacturing technology, display devices that use light-emitting diodes as the light source of each pixel, such as micro-LED display devices, have gradually become one of the main types of display devices. In the manufacture of micro-LED display devices, current technology uses mass transfer technology, first making LED grains on a transition carrier, and then transferring the LED grains from the transition carrier to the substrate. However, for high-resolution and flexible display devices, current mass transfer technology is difficult to achieve high transfer accuracy and high yield. Although relevant industry practitioners have recently proposed to directly manufacture micro-LED display devices on wafers, their structure and process steps are obviously complicated. On the other hand, the conventional method of manufacturing micro-LEDs requires etching the structure, which will cause greater damage to the edges of the micro-LEDs and cause leakage, resulting in affecting their luminous efficiency. Summary of the invention

[0003] The object of the present invention is to provide a micro-LED display device and a method for manufacturing the micro-LED display device, which does not require etching of the micro-LED structure to avoid damage to its edges and leakage, thereby improving the luminous efficiency and manufacturing yield.

[0004] According to the above purpose, the present invention provides a micro-light-emitting diode display device, which includes a driving backplane and a plurality of pixel units. Each of the pixel units includes at least one conductive column, a first electrode, a light-emitting structure, and a second electrode. The at least one conductive column is disposed on the driving backplane and electrically connected to the driving backplane. The first electrode is disposed on the at least one conductive column and electrically connected to the at least one conductive column. The light-emitting structure is disposed on the first electrode and electrically connected to the first electrode. The light-emitting structure includes a first doped layer, an active layer, and a second doped layer, wherein the active layer is located between the first doped layer and the second doped layer, and the second doped layer is electrically connected to the first electrode. The second electrode is disposed on the light-emitting structure and electrically connected to the first doped layer of the light-emitting structure. The area of ​​the surface of the second doped layer in the light-emitting structure facing away from the active layer is greater than the area of ​​the surface of the first doped layer facing away from the active layer.

[0005] According to an embodiment of the present invention, a vertical cross-sectional profile of each of the plurality of light emitting structures is a trapezoid.

[0006] According to another embodiment of the present invention, the first doping layer includes a plurality of n-type dopants, the second doping layer includes a plurality of p-type dopants, and the second doping layer is electrically connected to the corresponding driving circuit in the driving backplane through the first electrode and the at least one conductive column.

[0007] According to another embodiment of the present invention, the material of the first electrode includes metal, and the first electrode is used to reflect the light generated by the corresponding active layer.

[0008] According to another embodiment of the present invention, the material of the second electrode includes a transparent conductive material.

[0009] According to another embodiment of the present invention, each of the pixel units further includes a color conversion layer disposed on the light emitting structure.

[0010] According to another embodiment of the present invention, the micro LED display device further includes an isolation structure disposed between the plurality of pixel units and separating the plurality of pixel units.

[0011] According to another embodiment of the present invention, the micro LED display device further includes a black matrix structure, which is disposed on the isolation structure and overlaps with the isolation structure in a vertical projection direction of the micro LED display device.

[0012] According to another embodiment of the present invention, the driving backplane is a complementary metal-oxide semiconductor (CMOS) driving backplane or a thin film transistor (TFT) driving backplane.

[0013] According to the above-mentioned purpose, the present invention further proposes a method for manufacturing a micro-light-emitting diode display device, which includes: providing a patterned sapphire substrate, wherein the patterned sapphire substrate defines a plurality of grooves; forming a plurality of light-emitting structures in the plurality of grooves, respectively, wherein each of the plurality of light-emitting structures includes a first doped layer, an active layer and a second doped layer formed in sequence, and an area of ​​the second doped layer facing away from the active layer is larger than an area of ​​the first doped layer facing away from the active layer; forming a plurality of first electrodes on the plurality of light-emitting structures, respectively, wherein the plurality of first electrodes are respectively electrically connected to the plurality of second doped layers of the plurality of light-emitting structures; forming a plurality of conductive pillars on the plurality of first electrodes, respectively, wherein the plurality of conductive pillars are respectively electrically connected to the plurality of first electrodes; electrically connecting the plurality of conductive pillars to a driving backplane; releasing the patterned sapphire substrate; forming a plurality of second electrodes on the plurality of first doped layers of the plurality of light-emitting structures, respectively, and wherein the plurality of second electrodes are respectively electrically connected to the plurality of first doped layers of the plurality of light-emitting structures.

[0014] According to an embodiment of the present invention, between releasing the patterned sapphire substrate and forming the plurality of second electrodes, the method further includes forming an isolation structure between the plurality of light emitting structures, wherein the isolation structure separates the plurality of light emitting structures.

[0015] According to another embodiment of the present invention, after forming the plurality of second electrodes, the method further includes forming a plurality of color conversion layers on the plurality of light emitting structures respectively.

[0016] The beneficial effect of the present invention is at least that it is not necessary to etch the structure of the micro-LED to avoid damage to its edge, thereby improving the light emitting efficiency and the manufacturing yield. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] For a more complete understanding of the embodiments and their advantages, reference is now made to the following description taken in conjunction with the accompanying drawings, in which:

[0018] Figure 1 is a partial cross-sectional schematic diagram of a micro light emitting diode display device according to an embodiment of the present invention;

[0019] Figure 2 Schematically depicted Figure 1 The planar distribution of some components in the micro-LED display device shown;

[0020] FIG. 3A to FIG. 3I Schematic cross-sectional view of various stages of a method for manufacturing a micro light emitting diode display device according to an embodiment of the present invention;

[0021] Figure 4 is another cross-sectional schematic diagram of a patterned sapphire substrate according to an embodiment of the present invention;

[0022] Figure 5 FIG. 4 is a cross-sectional diagram of a stage of manufacturing a micro-LED display device according to an alternative embodiment of the present invention. DETAILED DESCRIPTION

[0023] The following is a detailed discussion of the embodiments of the present disclosure. However, it is understood that the embodiments provide many applicable concepts that can be implemented in a variety of specific contexts. The embodiments discussed and disclosed are for illustration only and are not intended to limit the scope of the present disclosure.

[0024] The terms used in this article are only for describing specific embodiments and are not intended to limit the scope of the patent application. Unless otherwise limited, the singular forms of "a", "an" or "the" may also be used to represent plural forms.

[0025] It is to be understood that, although the terms “first”, “second”, etc. may be used herein to describe various features, these terms should not limit these features. These terms are only used to distinguish one feature from another.

[0026] The use of spatially relative terms is intended to describe different orientations of an element when in use or operation and is not limited to the orientation depicted in the drawings. The element may be otherwise oriented (rotated 90 degrees or at other orientations), and the spatially relative descriptions used herein may be interpreted in the same manner.

[0027] For simplicity and clarity of description, reference numerals and / or letters may be repeated in various embodiments herein, but this does not imply a causal relationship between the various embodiments and / or configurations discussed.

[0028] Figure 1 It is a partial cross-sectional schematic diagram of a micro-LED display device 100 according to an embodiment of the present invention. The micro-LED display device 100 has a plurality of pixel units PU arranged in an array. Each pixel may include a plurality of pixel units PU of different colors (for example, red, green and blue pixel units) for displaying images, but is not limited thereto. The present invention does not limit the number of pixel units PU in a pixel. The micro-LED display device 100 may be an active array display device or a passive array display device. In the present embodiment, a pixel may include three pixel units PU, and the three pixel units PU include pixel units 110A, 110B, and 110C. Pixel units 110A, 110B, and 110C are used to display different colors, respectively. For example, one, another, and the remaining one of the pixel units 110A, 110B, and 110C may be a red pixel unit, a green pixel unit, and a blue pixel unit, respectively. For ease of explanation, Figure 1Only the cross-sectional structure of three pixel units 110A, 110B, and 110C in a single pixel is shown. In the micro-LED display device 100, the pixel unit PU is disposed on the driving backplane BP, and the driving backplane BP includes a driving circuit (not shown) for driving the pixel unit PU located above it. The pixel unit PU includes a light-emitting structure EL, a first electrode ET1, a second electrode ET2, and a conductive column CP. The first electrode ET1 is electrically connected to the light-emitting structure EL, the conductive column CP is electrically connected to the first electrode ET1, and the conductive column CP is disposed on the driving backplane BP and electrically connected to the corresponding driving circuit. For example, in an embodiment in which the micro-LED display device 100 is an active array display device, the driving backplane BP includes a plurality of driving circuits, and each driving circuit corresponding to each pixel unit PU includes a switching transistor and a driving transistor electrically connected to each other, and the conductive column CP of each pixel unit PU is electrically connected to the corresponding driving transistor, so that the driving transistor drives the light-emitting structure EL of the corresponding pixel unit PU. The substrate of the driving backplane BP can be a rigid substrate or a flexible substrate, such as a silicon substrate, a glass substrate, a polyimide (PI) substrate, a plastic substrate, a combination of the above and / or other suitable materials, but not limited thereto. In some embodiments, the driving backplane BP is a complementary metal-oxide semiconductor (CMOS) driving backplane or a thin film transistor (TFT) driving backplane, but not limited thereto. In the present embodiment, the micro-light emitting diode display device 100 may further include an insulating layer INS, which is disposed between the driving backplane BP and the pixel unit PU. The insulating layer INS may include, for example, silicon oxide, silicon nitride, silicon oxynitride and / or other suitable dielectric materials. The insulating layer INS has a through hole TH, and the conductive column CP passes through the through hole TH of the insulating layer INS and is electrically connected to the driving circuit of the driving backplane BP (not shown). The conductive column CP may include metal elements such as copper, titanium, tungsten, aluminum or other similar elements, or an alloy or compound formed by any combination of the above metal elements, but not limited thereto. In the present embodiment, each pixel unit PU includes at least one conductive column CP ( Figure 1 It is taken as an example that each pixel unit PU includes a plurality of conductive pillars CP).

[0029] A plurality of first electrodes ET1 are respectively disposed in the pixel units 110A, 110B, and 110C, and the first electrodes ET1 of each pixel unit 110A, 110B, and 110C are disposed on the insulating layer INS and the corresponding conductive pillars CP and are respectively electrically connected to the corresponding conductive pillars CP. A plurality of light-emitting structures EL are respectively disposed in the pixel units 110A, 110B, and 110C, and are respectively disposed on the corresponding first electrodes ET1 and are respectively electrically connected to the corresponding first electrodes ET1. A plurality of second electrodes ET2 are respectively disposed in the pixel units 110A, 110B, and 110C, and are respectively disposed on the corresponding light-emitting structures EL and are respectively electrically connected to the corresponding light-emitting structures EL. Specifically, each pixel unit PU includes a first electrode ET1, a light-emitting structure EL, a second electrode ET2, and a conductive pillar CP, and each pixel unit PU is electrically connected to a driving circuit (not shown) of a driving backplane BP via its respective conductive pillars CP.

[0030] Each light-emitting structure EL may be a light-emitting diode structure, such as a micro light-emitting diode structure. In the present embodiment, each light-emitting structure EL is a vertical light-emitting diode structure, which includes an active layer AL and a first doping layer DL1 and a second doping layer DL2 respectively disposed on opposite sides of the active layer AL, wherein the first doping layer DL1 and the second doping layer DL2 are respectively electrically connected to the second electrode ET2 and the first electrode ET1 located in the same pixel unit PU, and the active layer AL is sandwiched between the first doping layer DL1 and the second doping layer DL2 (for example, opposite sides of the active layer AL are respectively directly in contact with the first doping layer DL1 and the second doping layer DL2). In the present embodiment, either the first doping layer DL1 or the second doping layer DL2 may be a single-layer structure or a multi-layer stacked structure.

[0031] The active layer AL may include, for example, a single layer or a multi-quantum well (MQW) structure, which may be composed of, for example, a gallium nitride (GaN) layer and an indium gallium nitride (InGaN) layer, or, for example, a gallium indium phosphide (GaInP) layer and an aluminum gallium indium phosphide (AlGaInP) layer, but is not limited thereto. The first doped layer DL1 and the second doped layer DL2 have different dopant types, that is, one and the other of the first doped layer DL1 and the second doped layer DL2 are a p-type semiconductor layer and an n-type semiconductor layer, respectively. For example, one and the other of the first doped layer DL1 and the second doped layer DL2 may be a p-type gallium nitride (p-GaN) layer and an n-type gallium nitride (n-GaN) layer, respectively, or may be a p-type aluminum gallium indium phosphide (p-AlGaInP) layer and an n-type aluminum gallium indium phosphide (n-AlGaInP) layer, respectively, but is not limited thereto. The p-type semiconductor layer / gallium nitride layer / aluminum gallium indium phosphide layer and the n-type semiconductor layer / gallium nitride layer / aluminum gallium indium phosphide layer are respectively a semiconductor layer / gallium nitride layer / aluminum gallium indium phosphide layer containing p-type dopants (such as magnesium, zinc, calcium, barium, beryllium, etc.) and a semiconductor layer / gallium nitride layer / aluminum gallium indium phosphide layer containing n-type dopants (such as silicon, germanium, tin, strontium, titanium, etc.).

[0032] In this embodiment, the second electrode ET2 may be a light-transmitting electrode, so that the light generated by the active layer AL can be emitted through the second electrode ET2 to make the pixel unit PU emit light, and the first electrode ET1 may be a light-reflecting electrode, so that the light generated by the active layer AL can be reflected by the first electrode ET1 and then emitted through the second electrode ET2 to improve the light-emitting efficiency of the pixel unit PU, so the surface BS of the light-emitting structure EL close to the first electrode ET1 and the surface TS close to the second electrode ET2 can be respectively referred to as a reflection surface and a light-emitting surface. In this embodiment, the surface BS of the light-emitting structure EL may be the surface of the second doped layer DL2 facing away from the active layer AL, and the surface TS of the light-emitting structure EL may be the surface of the first doped layer DL1 facing away from the active layer AL. In each light-emitting structure EL, the area of ​​the surface BS of the light-emitting structure EL (i.e., the area on the XY plane formed by the X-axis direction and the Y-axis direction) is greater than the area of ​​the surface TS (i.e., the area on the XY plane), that is, the area of ​​the reflection surface is greater than the area of ​​its light-emitting surface. Specifically, in the present embodiment, the second doped layer DL2, the active layer AL and the first doped layer DL1 are arranged in sequence along the Z-axis direction, the area of ​​the surface BS of the light emitting structure EL is the area of ​​the surface BS of the light emitting structure EL on the XY plane perpendicular to the Z-axis direction, and the area of ​​the surface TS of the light emitting structure EL is the area of ​​the surface TS of the light emitting structure EL on the XY plane perpendicular to the Z-axis direction. Compared with the existing process, under the condition of the same pixel unit size, the present invention can obtain better luminous efficiency through the design method of the light emitting structure EL of the above-mentioned pixel unit PU (that is, the area of ​​the surface BS of the light emitting structure EL is greater than the area of ​​the surface TS). In some embodiments, the reflective surface of the light emitting structure EL is the contact surface between the second doped layer DL2 and the first electrode ET1, and the light emitting surface of the light emitting structure EL is the contact surface between the first doped layer DL1 and the second electrode ET2. Figure 2 The planar distribution (i.e., the XY plane perpendicular to the Z-axis direction) of the driving backplane BP and the surface BS and TS of the light emitting structure EL in the micro LED display device 100 is schematically shown, wherein the planar distribution of the surface TS of the light emitting structure EL represents the top view of the light emitting surface of the light emitting structure EL, and the planar distribution of the surface BS of the light emitting structure EL represents the top view of the reflective surface of the light emitting structure EL. Figure 2As shown, in each pixel unit 110A, 110B, and 110C, the planar distribution area of ​​the surface BS of the light-emitting structure EL is larger than the planar distribution area of ​​the surface TS of the light-emitting structure EL, that is, the area of ​​the reflective surface in the light-emitting structure EL is larger than the area of ​​its light-emitting surface. For example, the width WTS of the surface TS of the light-emitting structure EL may be approximately 3 microns, and the width WBS of the surface BS of the light-emitting structure EL may be approximately 5 microns. In addition, the center point of the planar pattern of the surface TS of the light-emitting structure EL is substantially aligned with the center of the planar pattern of the surface BS of the light-emitting structure EL. Specifically, the area of ​​the vertical projection of the surface BS of the light-emitting structure EL on the driving backplane BP is larger than the area of ​​the vertical projection of the surface TS of the light-emitting structure EL on the driving backplane BP, and the vertical projection of the surface TS of the light-emitting structure EL on the driving backplane BP is located in the vertical projection of the surface BS of the light-emitting structure EL on the driving backplane BP.

[0033] It should be noted that in Figure 2 In the example of FIG. 1 , the plane patterns of the surfaces TS and BS of the light emitting structure EL are rectangular. In other examples, the plane patterns of the surfaces TS and BS of the light emitting structure EL may also be other shapes, such as but not limited to circular, elliptical, hexagonal, etc.

[0034] In some embodiments, the cross-sectional profile of each light emitting structure EL along a vertical plane (eg, an XZ plane or a YZ plane) is a trapezoid. Figure 1 In other embodiments, the vertical cross-sectional profile of each light emitting structure EL is a shape different from a trapezoid and the width of the first doped layer DL1 in the X-axis direction is smaller than the width of the second doped layer DL2 in the X-axis direction.

[0035] According to the dopant type of the first doping layer DL1 and the second doping layer DL2, the first electrode ET1 and the second electrode ET2 may be an anode and a cathode, or a cathode and an anode, respectively. For example, if the first doping layer DL1 and the second doping layer DL2 are a p-type semiconductor layer and an n-type semiconductor layer, respectively, the first electrode ET1 and the second electrode ET2 are a cathode and an anode, respectively; if the first doping layer DL1 and the second doping layer DL2 are an n-type semiconductor layer and a p-type semiconductor layer, respectively, the first electrode ET1 and the second electrode ET2 are an anode and a cathode, respectively. In the present embodiment, the first doping layer DL1 and the second doping layer DL2 are an n-type semiconductor layer and a p-type semiconductor layer, respectively, and the first electrode ET1 and the second electrode ET2 are an anode and a cathode, respectively, for example, but not limited thereto. In the present embodiment, the first electrodes ET1 of each pixel unit PU may be electrically insulated from each other, and the first electrodes ET1 of each pixel unit PU may be electrically connected to the driving circuit of the driving backplane BP through their respective conductive pillars CP, so that the driving circuit of the driving backplane BP can control the light emission of each pixel unit PU. For example, in an embodiment where the micro-LED display device 100 is an active matrix display device, the driving circuit corresponding to each pixel unit PU may include a switch transistor and a driving transistor electrically connected to each other, and the first electrode ET1 of each pixel unit PU may be electrically connected to the drain of the corresponding driving transistor through the respective conductive pillars CP, but is not limited thereto. In addition, the second electrode ET2 of each pixel unit PU may be electrically connected to a ground potential or a common potential, but is not limited thereto. For example, the second electrodes ET2 of all pixel units PU in the micro-LED display device 100 may be electrically connected to each other, but is not limited thereto. In addition to being an electrode electrically connected to the light emitting structure EL, the first electrode ET1 of the pixel unit PU may also be used as a reflective layer to reflect the light generated by the active layer AL, so the first electrode ET1 may include metal, such as silver, chromium, tungsten, tantalum, titanium, molybdenum, aluminum, copper and other metal materials or other suitable metal materials, or an alloy or compound formed by any combination of the above metal materials. The first electrode ET1 may be a single-layer structure, and the single-layer structure includes a metal material, or the first electrode ET1 may be a multi-layer structure, and at least one layer of the multi-layer structure includes a metal material. In addition, in some embodiments where the first electrode ET1 is a multilayer structure, the multilayer structure may include a transparent conductive layer in addition to at least one metal layer. For example, in an embodiment where the first electrode ET1 is a double-layer structure, one layer of the double-layer structure may include a metal material for reflecting light, and the other layer of the double-layer structure may include a transparent conductive material such as indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, indium oxide, etc., but is not limited thereto.In addition to serving as an electrode electrically connected to the light-emitting structure EL, the second electrode ET2 can also allow the light generated by the active layer AL and the light reflected by the first electrode ET1 to pass through to make the pixel unit PU emit light. Therefore, the second electrode ET2 can include a transparent conductive material, such as indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, indium oxide, combinations of the above and / or other suitable transparent conductive materials.

[0036] In some embodiments, the micro-LED display device 100 further includes an isolation structure ISO, which is disposed between any two adjacent pixel units PU and physically separates any two adjacent pixel units PU. The planar pattern of the isolation structure ISO (i.e., the pattern of the XY plane) can be a grid pattern, which defines the area of ​​all pixel units PU in the micro-LED display device 100. The isolation structure ISO may include silicon oxide, silicon nitride, silicon oxynitride, photoresist material, a combination of the above and / or other suitable materials. In some embodiments, the top surface of the isolation structure ISO is coplanar with the light emitting surface of the light emitting structure EL (i.e., the surface TS of the light emitting structure EL), but is not limited thereto.

[0037] In the present embodiment, the pixel unit PU may further include a color conversion layer CCL, and the micro-LED display device 100 may further include a protective layer PL. A plurality of color conversion layers CCL are respectively disposed above the light emitting structures EL and the second electrodes ET2 of the plurality of pixel units PU, and the protective layer PL is disposed on the color conversion layer CCL. The plurality of color conversion layers CCL include color conversion layers CF1, CF2, and CF3. Each color conversion layer CF1, CF2, and CF3 may include quantum dots, phosphors, color filter elements, combinations thereof, and / or other suitable materials. Figure 1In the embodiment, the pixel units 110A, 110B, and 110C include color conversion layers CF1, CF2, and CF3, respectively, but are not limited thereto. The color conversion layers CF1, CF2, and CF3 may be red, green, and blue color conversion layers, respectively. For example, in an embodiment in which the color conversion layers CF1, CF2, and CF3 include red light quantum dots, green light quantum dots, and blue light quantum dots, respectively, the light generated by the light emitting structure EL of the pixel unit 110A may excite the red light quantum dots in the color conversion layer CF1 to generate red light, the light generated by the light emitting structure EL of the pixel unit 110B may excite the green light quantum dots in the color conversion layer CF2 to generate green light, and the light generated by the light emitting structure EL of the pixel unit 110C may excite the blue light quantum dots in the color conversion layer CF3 to generate blue light. In some embodiments, a portion of the pixel units 110A, 110B, and 110C do not include a color conversion layer. For example, in an embodiment in which the light-emitting structures EL of pixel units 110A, 110B, and 110C all generate blue light, the pixel unit 110A may include a color conversion layer CF1 having red light quantum dots, and the blue light generated by the light-emitting structure EL of the pixel unit 110A may excite the red light quantum dots in the color conversion layer CF1 to generate red light; the pixel unit 110B may include a color conversion layer CF2 having green light quantum dots, and the blue light generated by the light-emitting structure EL of the pixel unit 110B may excite the green light quantum dots in the color conversion layer CF2 to generate green light; and the pixel unit 110C does not need to include a color conversion layer, and the blue light generated by the light-emitting structure EL of the pixel unit 110C may be used as the color displayed by the pixel unit 110C. The protective layer PL is used to cover and protect the components located thereunder (including the color conversion layer CCL, the light-emitting structure EL, the first electrode ET1, the second electrode ET2 and other components). The material thereof may be a light-transmitting insulating layer, for example, including titanium oxide, aluminum oxide, titanium oxide and / or other suitable transparent dielectric materials, so that the light generated by the pixel unit PU can penetrate the protective layer PL.

[0038] In addition, the micro-LED display device 100 further includes a black matrix structure BM, which is disposed between any two adjacent pixel units PU. The plane pattern of the black matrix structure BM (i.e., the pattern in the XY plane) can be a grid pattern, which defines the light-emitting area of ​​each pixel unit PU in the micro-LED display device 100 (i.e., the area in the grid pattern that does not have the black matrix structure BM can be the light-emitting area of ​​each pixel unit PU). The black matrix structure BM is disposed between the isolation structure ISO and the protective layer PL in the Z-axis direction. In the vertical projection direction of the micro-LED display device 100 (i.e., in the Z-axis direction), the black matrix structure BM overlaps with the isolation structure ISO.

[0039] FIG. 3A to FIG. 3ISchematic cross-sectional view of various stages of a method for manufacturing a micro light emitting diode display device according to an embodiment of the present invention. Figure 4 FIG. 1 is another cross-sectional view of a patterned sapphire substrate according to an embodiment of the present invention. Figure 3A As shown, a patterned sapphire substrate (aluminum oxide substrate) PSS is provided to define a groove U. The patterned sapphire substrate PSS has a plurality of convex strips R ( Figure 3A Only a plurality of convex strips R extending along the Y-axis direction are illustrated, and each groove U is defined by two adjacent convex strips R extending along the X-axis direction and two adjacent convex strips R extending along the Y-axis direction. The cross-sectional profile of the groove U along a vertical plane (such as an XZ plane or a YZ plane) is a trapezoid. Figure 3A As shown in FIG. 1 , the width of the groove U increases gradually from bottom to top, while the width of the ridge R decreases gradually from bottom to top, so the top width WUT of the groove U is greater than the bottom width WUB. For example, the top width WUT and the bottom width WUB of the groove U may be approximately 5 microns and 3 microns, respectively. In addition, the cross-sectional profile of each ridge R along a vertical plane (e.g., an XZ plane or a YZ plane) may be a triangle (e.g., Figure 3A as shown) or trapezoidal (as Figure 4 ), but not limited thereto.

[0040] Then, if Figure 3BAs shown, a light emitting structure EL is formed on a patterned sapphire substrate PSS and in each groove U. In some embodiments, the step of forming the light emitting structure EL includes sequentially forming a first doped layer DL1, an active layer AL, and a second doped layer DL2 in the groove U. The active layer AL may be formed of, for example, gallium nitride, indium gallium nitride, indium gallium phosphide, aluminum gallium indium phosphide, and / or other suitable materials. In addition, the formed active layer AL may include, for example, a single layer or a multiple quantum well layer structure, which may be composed of, for example, a gallium nitride layer and an indium gallium nitride layer, or, for example, a indium gallium phosphide layer and an aluminum gallium indium phosphide layer, but is not limited thereto. The formed first doped layer DL1 and the second doped layer DL2 have different dopant types. If the first doped layer DL1 and the second doped layer DL2 are formed as an n-type semiconductor layer and a p-type semiconductor layer, respectively, the first doped layer DL1 can be formed by doping the semiconductor layer with an n-type dopant (e.g., silicon, germanium, tin, strontium, titanium, etc.), and the second doped layer DL2 can be formed by doping the semiconductor layer with a p-type dopant (e.g., magnesium, zinc, calcium, barium, beryllium, etc.). The first doped layer DL1 and the second doped layer DL2 can be formed of, for example, gallium nitride, indium gallium nitride, indium gallium phosphide, aluminum gallium indium phosphide, and / or other suitable materials, but are not limited thereto. The first doped layer DL1, the active layer AL, and the second doped layer DL2 can be formed in sequence by, for example, chemical vapor deposition (CVD), metal-organic chemical vapor deposition (CVD), molecular beam epitaxy (MBE), and / or other suitable methods. The thickness TK of the light emitting structure EL is less than or equal to the depth DP of the recess U. In this embodiment, the thickness TK of the light emitting structure EL is preferably smaller than the depth DP of the groove U, so that in the subsequent process, an electrode (ie, Figure 3C For example, the thickness TK of the light emitting structure EL may be about 4.5 micrometers, and the depth DP of the groove U (ie, the height of the convex strip R) may be about 5 micrometers. Figure 1 , Figure 2 , Figure 3A as well as Figure 3B In this embodiment, the bottom width WUB of the groove U may be equal to Figure 1 The width WTS of the surface TS of the light emitting structure EL (ie, the surface of the first doped layer DL1 facing away from the active layer AL) is as follows. Figure 3A After forming a buffer layer (such as a gallium nitride or aluminum nitride buffer layer) in the groove U, Figure 3B The step of forming the light emitting structure EL in the groove U is described above, but is not limited thereto.

[0041] Afterwards, if Figure 3C As shown, a first electrode ET1 is formed on the light emitting structure EL, and an insulating layer INS is formed on the first electrode ET1 and the patterned sapphire substrate PSS. The first electrode ET1 may include a metal material, such as metal elements such as chromium, tungsten, tantalum, titanium, molybdenum, aluminum, copper, or other similar elements, or an alloy or compound formed by any combination of the above metal elements. In some embodiments, the first electrode ET1 may be a multilayer structure, the multilayer structure includes at least one metal layer and a transparent conductive layer, and the transparent conductive layer includes a transparent conductive material, such as indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, indium oxide, etc., but is not limited thereto. In the present embodiment, the first electrode ET1 includes a metal with high reflectivity, so it can be used as a reflective layer for reflecting light (such as light generated by the corresponding active layer AL). The first electrode ET1 can be formed by physical vapor deposition (PVD), chemical vapor deposition and / or other suitable methods. The insulating layer INS may include, for example, silicon oxide, silicon nitride, silicon oxynitride and / or other suitable dielectric materials, and may be formed by physical vapor deposition, chemical vapor deposition, atomic layer deposition (ALD) and / or other suitable methods. In the present embodiment, the first doped layer DL1 and the second doped layer DL2 are respectively an n-type semiconductor layer and a p-type semiconductor layer, and the first electrode ET1 and the second electrode ET2 are respectively an anode and a cathode, so that the first electrodes ET1 of each pixel unit PU can be electrically insulated from each other.

[0042] Then, if Figure 3D As shown, conductive pillars CP are formed in the insulating layer INS, which are respectively electrically connected (e.g., directly contacted) with the first electrodes ET1. A portion of the insulating layer INS may be removed by lithography and etching to form a through hole TH to expose a portion of the upper surface of the first electrode ET1, and then a conductive material is filled in the through hole TH by, for example, plating and / or other suitable methods to form a conductive pillar CP, so that the formed conductive pillars CP are respectively electrically connected to the corresponding first electrodes ET1. The above-mentioned conductive material may be, for example, a metal element such as copper, titanium, tungsten, aluminum, or other similar elements, or an alloy or compound formed by any combination of the above-mentioned metal elements, but is not limited thereto, and the above-mentioned plating method may be, for example, electroplating, electroless plating, immersion plating, and / or other similar methods. In some embodiments, the top surface of the formed conductive pillar CP is coplanar with the upper surface of the insulating layer INS, but is not limited thereto.

[0043] Afterwards, if Figure 3E As shown, Figure 3DThe structure and the driving backplane BP are matched with each other (that is, Figure 3D The structure is coupled to the driving backplane BP), wherein the insulating layer INS faces the driving backplane BP, and the conductive pillars CP are electrically connected to the driving backplane BP. The driving backplane BP can be a driving backplane including a driving circuit (not shown) and / or other circuits for driving the light-emitting structure EL, such as but not limited to a complementary oxide metal semiconductor driving backplane or a thin film transistor driving backplane. In addition, the substrate of the driving backplane BP can be, for example, a silicon substrate, a glass substrate, a polyimide (PI) substrate, a plastic substrate, a combination of the above and / or other suitable materials, but is not limited thereto.

[0044] Then, if Figure 3F As shown, the release patterned sapphire substrate PSS (about Figure 3E For example, a laser lift-off method may be used, where a laser beam is first irradiated on the interface between the patterned sapphire substrate PSS and the light emitting structure EL to form a peelable interface (for example, in an embodiment where a gallium nitride buffer layer is provided between the patterned sapphire substrate PSS and the light emitting structure EL, the laser beam may vaporize the gallium nitride buffer layer to form a peelable interface), and then the patterned sapphire substrate PSS is removed from the light emitting structure EL. Figure 3E The structure LA is formed by removing the structure LA, wherein the structure LA includes the light emitting structure EL, the first electrode ET1, the insulating layer INS, the conductive pillars CP and the driving backplane BP, but the method of releasing the patterned sapphire substrate PSS of the present invention is not limited thereto. In other embodiments, the patterned sapphire substrate PSS can be peeled off by a mechanical peeling method. Figure 5 FIG. 4 is a cross-sectional diagram of a stage of manufacturing a micro-LED display device according to an alternative embodiment of the present invention. Figure 5 The intermediate stage of manufacturing the micro-LED display device shown can be replaced by Figure 3B An intermediate stage in the fabrication of a micro-LED display device is shown. Figure 5 and Figure 3B The contents shown are similar, except that Figure 3A After the step of providing the patterned sapphire substrate PSS, a two-dimensional material layer TD may be formed on the patterned sapphire substrate PSS, and then a light emitting structure EL may be formed on the two-dimensional material layer TD to form Figure 5 structure. Figure 5 After the structure is formed, a process of forming a first electrode ET1 and a protective layer PL on the second doping layer DL2 can be performed (similar to Figure 3C A process of forming a through hole TH in the protective layer PL and a process of forming a conductive pillar CP in the through hole TH (similar to Figure 3D Process), the process of driving backplane BP (similar to Figure 3E A process) and a lift-off process are performed to lift off the patterned sapphire substrate PSS to form a Figure 3F The process after peeling off the patterned sapphire substrate PSS is the same as Figure 3G-3I , which will not be described in detail here. The two-dimensional material layer TD can be formed of a two-dimensional material, such as hexagonal boron nitride (hBN) or other materials suitable for forming the light emitting structure EL thereon and easy to release the patterned sapphire substrate PSS in a subsequent peeling process (such as a mechanical peeling process). The two-dimensional material layer TD can be formed by growing a two-dimensional material on the patterned sapphire substrate PSS by epitaxy or other suitable methods.

[0045] Afterwards, if Figure 3G As shown, an isolation structure ISO that physically separates the light emitting structures EL is formed between the light emitting structures EL. The planar pattern of the isolation structure ISO may be a grid pattern that defines regions of the pixel units PU that respectively contain the light emitting structures EL. The isolation structure ISO may be formed of silicon oxide, silicon nitride, silicon oxynitride, titanium dioxide, a photoresist material, a combination of the foregoing, and / or other suitable materials. The isolation structure ISO may be formed, for example, by physical vapor deposition, chemical vapor deposition, and / or other suitable methods. In some embodiments, the top surface of the formed isolation structure ISO is coplanar with the light emitting surface of the light emitting structure EL (i.e., the top surface of the first doping layer DL1), but is not limited thereto.

[0046] Then, if Figure 3H As shown, a second electrode ET2 is formed on the light emitting structure EL and the isolation structure ISO. The second electrodes ET2 are electrically connected to the light emitting structures EL, for example, they are directly in contact with the first doping layer DL1 in the light emitting structure EL, but are not limited thereto. The second electrode ET2 is a light-transmitting electrode, which may be formed of a transparent conductive material, such as indium tin oxide, indium zinc oxide, tin oxide, zinc oxide, indium oxide, combinations thereof and / or other suitable transparent conductive materials, so that the light generated by the underlying active layer AL (i.e., the active layer AL in the same pixel unit as the second electrode ET2) may pass through. The second electrode ET2 may be formed, for example, by physical vapor deposition, evaporation, sputtering and / or other suitable methods. Figure 3H In the structure shown, the surface BS close to the first electrode ET1 and the surface TS close to the second electrode ET2 of the light emitting structure EL can be respectively called a reflection surface and a light emitting surface. In each light emitting structure EL, the area of ​​its reflection surface is larger than the area of ​​its light emitting surface.

[0047] Afterwards, if Fig. 3IAs shown, a color conversion layer CCL is formed on the light emitting structure EL and the second electrode ET2. The multiple color conversion layers CCL include color conversion layers CF1, CF2, and CF3, and the color conversion layers CF1, CF2, and CF3 are used to make different pixel units display corresponding colors, for example, respectively display red, green, and blue. Each color conversion layer CF1, CF2, and CF3 may include quantum dots, phosphors, color filter elements, combinations thereof, and / or other suitable materials. For example, in an embodiment in which the color conversion layer CCL includes quantum dots, the color conversion layer CCL may be manufactured by processes such as quantum dot inkjet.

[0048] In addition, a black matrix structure BM may be formed on the isolation structure ISO. Fig. 3I As shown, in the vertical projection direction (i.e., in the Z-axis direction), the black matrix structure BM overlaps with the isolation structure ISO. The plane pattern of the black matrix structure BM can be a grid pattern. For example, the black matrix structure BM can be first formed on the light-emitting structure EL and the second electrode ET2, and then the material used to form the color conversion layers CF1, CF2, and CF3 is filled into the gaps defined by the black matrix structure BM. The black matrix structure BM can be formed of, for example, black resin, chromium or chromium oxide or other opaque materials, and can be formed by, for example, coating, developing, etching and / or other suitable methods. After forming the color conversion layer CCL and the black matrix structure BM, a protective layer PL can be formed on the color conversion layer CCL and the black matrix structure BM. The protective layer PL can be formed of, for example, titanium oxide, aluminum oxide, titanium oxide and / or other suitable transparent dielectric materials, and can be formed by, for example, chemical vapor deposition, plasma enhanced chemical vapor deposition (PECVD) and / or other suitable methods.

[0049] Compared with the conventional technology, the present invention does not need to etch the structure of the micro-LED to avoid damage to its edge and leakage, thereby improving the luminous efficiency and production yield. In addition, the present invention adopts two-dimensional crystal orientation (C-plane (0001)) control in the production of the light-emitting structure, so it can achieve high stability, and can accurately control the thickness and width of each layer of the structure in the light-emitting structure to achieve high brightness and high luminous stability. Furthermore, in each stage of the micro-LED display device, the light-emitting structure is separated by convex strips or isolation structures defined by the patterned sapphire substrate, so the formed micro-LED display device will not have the problem of light-emitting structures contacting each other. The present invention also further improves the luminous efficiency of the pixel unit by designing the light-emitting structure of the pixel unit so that the area of ​​the reflective surface of the light-emitting structure is larger than the area of ​​its light-emitting surface. Therefore, the present invention is conducive to forming a micro-LED display device with high resolution, high performance and high production yield. In other applications, the light-emitting structure of the present invention can also be transferred to the substrate using mass transfer technology after the stripping process to produce a display device with high luminous efficiency.

[0050] Although the present invention has been disclosed as above by way of embodiments, it is not intended to limit the present invention. Any person having ordinary knowledge in the technical field may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be determined by the definition of the attached claims.

Claims

1. A micro light emitting diode display device, characterized in that: Include: a driving backplane, comprising a plurality of driving circuits; and A plurality of pixel units, each of the pixel units comprising: At least one conductive column, disposed on the driving back plate and electrically connected to the driving back plate; a first electrode disposed on the at least one conductive post and electrically connected to the at least one conductive post; a light-emitting structure disposed on the first electrode and electrically connected to the first electrode, wherein the light-emitting structure comprises a first doped layer, an active layer and a second doped layer, the active layer is located between the first doped layer and the second doped layer, and the second doped layer is electrically connected to the first electrode; and a second electrode, disposed on the light emitting structure and electrically connected to the first doped layer of the light emitting structure; The area of ​​the surface of the second doped layer in the light emitting structure facing away from the active layer is larger than the area of ​​the surface of the first doped layer facing away from the active layer.

2. The micro light emitting diode display device according to claim 1, characterized in that: The vertical cross-sectional profile of the light emitting structure is a trapezoid.

3. The micro light emitting diode display device according to claim 1, characterized in that: The first doping layer includes a plurality of n-type dopants, the second doping layer includes a plurality of p-type dopants, and the second doping layer is electrically connected to the corresponding driving circuit in the driving backplane through the first electrode and the at least one conductive column.

4. The micro-LED display device according to claim 1, characterized in that: The material of the first electrode includes metal.

5. The micro light emitting diode display device according to claim 1, characterized in that: The material of the second electrode includes a transparent conductive material.

6. The micro-LED display device according to claim 1, characterized in that: Each of the pixel units further comprises: A color conversion layer is disposed on the light emitting structure.

7. The micro-LED display device according to claim 1, characterized in that: Also includes: An isolation structure is disposed between the plurality of pixel units and separates the plurality of pixel units.

8. The micro light emitting diode display device according to claim 7, characterized in that: Also includes: A black matrix structure is disposed on the isolation structure and overlaps with the isolation structure in a vertical projection direction of the micro-LED display device.

9. The micro light emitting diode display device according to claim 1, characterized in that: The driving backplane is a complementary oxide metal semiconductor driving backplane or a thin film transistor driving backplane.

10. A method for manufacturing a micro light emitting diode display device, characterized in that: Include: Providing a patterned sapphire substrate, wherein the patterned sapphire substrate defines a plurality of grooves; forming a plurality of light-emitting structures in the plurality of grooves respectively, wherein each of the plurality of light-emitting structures comprises a first doped layer, an active layer and a second doped layer formed in sequence, and an area of ​​a surface of the second doped layer facing away from the active layer is larger than an area of ​​a surface of the first doped layer facing away from the active layer; forming a plurality of first electrodes on the plurality of light emitting structures respectively, wherein the plurality of first electrodes are electrically connected to the plurality of second doping layers of the plurality of light emitting structures respectively; forming a plurality of conductive pillars on the plurality of first electrodes respectively, the plurality of conductive pillars being electrically connected to the plurality of first electrodes respectively; Electrically connecting the plurality of conductive pillars to a driving backplane; releasing the patterned sapphire substrate; as well as A plurality of second electrodes are respectively formed on the plurality of first doping layers of the plurality of light emitting structures, and the plurality of second electrodes are respectively electrically connected to the plurality of first doping layers of the plurality of light emitting structures.

11. The method according to claim 10, characterized in that Between releasing the patterned sapphire substrate and forming the plurality of second electrodes, the method further comprises: An isolation structure is formed between the plurality of light emitting structures, wherein the isolation structure separates the plurality of light emitting structures.

12. The method according to claim 10, characterized in that After forming the plurality of second electrodes, the method further includes forming a plurality of color conversion layers on the plurality of light emitting structures, respectively.

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