Display device, method for manufacturing the same, and electronic device including the same

Abstract

A display device and a method for manufacturing the same are provided. According to one or more embodiments of the present disclosure, a display device includes: a substrate; a pixel electrode over the substrate; an organic layer over the pixel electrode; a light emitting element over the organic layer and including a contact electrode in contact with the organic layer; and a connection electrode connected to the pixel electrode and to the contact electrode, on a side surface of the organic layer, and on a side surface of the contact electrode.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0147339 filed in the Korean Intellectual Property Office on October 31, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] One or more embodiments of the present disclosure relate to a display device, a method for manufacturing the same, and an electronic device including the same. Background Art

[0004] With the development of an information-oriented society, there is an increasing demand for display devices for displaying images in various ways. The display device may be a flat panel display device such as a liquid crystal display, a field emission display, and a light-emitting display. The light-emitting display may include an organic light-emitting display and an ultra-small light-emitting display, the organic light-emitting display including an organic light-emitting diode element as a light-emitting element, and the ultra-small light-emitting display including an ultra-small light-emitting diode element (hereinafter, referred to as a micro light-emitting diode element) as a light-emitting element.

[0005] When manufacturing an ultra-small light-emitting display, the micro-light-emitting element may be properly bonded to the pixel electrode of the display panel, but the micro-light-emitting element may not be electrically connected to the pixel electrode due to tilting or falling. Due to the failure of bonding between the micro-light-emitting element and the pixel electrode, the micro-light-emitting element may not emit light. Summary of the invention

[0006] Aspects of embodiments of the present disclosure provide a display device capable of reducing or preventing a micro light emitting element from becoming unable to be electrically connected to a pixel electrode due to tilting or falling, and a method for manufacturing the same.

[0007] However, the embodiments of the present disclosure are not limited to those described herein. The above and other embodiments of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs by referring to the detailed description of the present disclosure given below.

[0008] According to one or more embodiments of the present disclosure, a display device is provided, which includes: a substrate; a pixel electrode above the substrate; an organic layer above the pixel electrode; a light-emitting element above the organic layer and including a contact electrode in contact with the organic layer; and a connecting electrode connected to the pixel electrode and to the contact electrode, on a side surface of the organic layer and on a side surface of the contact electrode.

[0009] The light emitting element may also include: a first semiconductor layer above the contact electrode; an active layer above the first semiconductor layer; a second semiconductor layer above the active layer; and a passivation layer on a side surface of the first semiconductor layer, on a side surface of the active layer, and on a side surface of the second semiconductor layer, wherein the connecting electrode is on the passivation layer.

[0010] The display device may further include a first organic layer covering the connection electrode, wherein a portion of the passivation layer is exposed without being covered by the first organic layer.

[0011] The display device may further include: a second organic layer over the first organic layer and covering a portion of the passivation layer; and a common electrode over top surfaces of the second organic layer and the second semiconductor layer.

[0012] The display device may also include: a dam covering an edge of the pixel electrode and an edge of the connecting electrode; a first light blocking layer above the common electrode and overlapping with the dam in the thickness direction of the substrate; a second light blocking layer above the first light blocking layer; a light conversion layer or a light transmitting layer above the common electrode, overlapping with the light emitting element in the thickness direction of the substrate, and in an area defined by the first light blocking layer and the second light blocking layer; and a color filter above the light conversion layer or the light transmitting layer.

[0013] The contact electrode may cover at least a portion of the passivation layer.

[0014] The contact electrode may be on a bottom surface of the first semiconductor layer of the light emitting element and on a bottom surface of the passivation layer.

[0015] A length of the contact electrode in the first direction may be smaller than a length of a bottom surface of the first semiconductor layer in the first direction.

[0016] The connection electrode may be on a bottom surface of the first semiconductor layer.

[0017] The connection electrode may be on a bottom surface of the passivation layer.

[0018] A side surface of the contact electrode may protrude more than a side surface of the organic layer.

[0019] The connection electrode may be on a portion of a bottom surface of the contact electrode.

[0020] A side surface of the organic layer may protrude more than a side surface of the contact electrode.

[0021] The connection electrode may be over a top surface of the organic layer that is exposed and not covered by the contact electrode.

[0022] The thickness of the organic layer may be greater than the thickness of the pixel electrode.

[0023] The thickness of the organic layer may be greater than the thickness of the contact electrode.

[0024] A portion of a top surface of the pixel electrode may be exposed without being covered by the organic layer, wherein the connection electrode is over the portion of the top surface of the pixel electrode.

[0025] According to one or more embodiments of the present disclosure, there is provided a display device including: a substrate; a pixel electrode and a common electrode above the substrate and spaced apart from each other; an organic layer above the pixel electrode and the common electrode; a light-emitting element above the organic layer and including a first contact electrode and a second contact electrode in contact with the organic layer; a first connecting electrode connected to the pixel electrode and the first contact electrode on a portion of a side surface of the organic layer and on a side surface of the first contact electrode; and a second connecting electrode connected to the common electrode and the second contact electrode on another portion of the side surface of the organic layer and on a side surface of the second contact electrode.

[0026] A portion of a top surface of the pixel electrode may be exposed without being covered by the organic layer, wherein the first connection electrode is over the portion of the top surface of the pixel electrode.

[0027] The light emitting element may be defined by: a first portion including a first contact electrode, a first semiconductor layer, an active layer and a second semiconductor layer; a second portion including a second contact electrode and a second semiconductor layer and spaced apart from the first portion; and a third portion connected to the first portion and the second portion and including the second semiconductor layer.

[0028] An organic layer may be between the first portion and the second portion.

[0029] The light emitting element may further include a passivation layer, the first portion, the second portion, and the third portion each include the passivation layer and the passivation layer defines an outer surface of the first portion, an outer surface of the second portion, and a side surface of the third portion.

[0030] The first connection electrode may be on an outer surface of the first portion and on a portion of a side surface of the third portion, wherein the second connection electrode is on the outer surface of the second portion and another portion of the side surface of the third portion.

[0031] According to one or more embodiments of the present disclosure, a method for manufacturing a display device is provided, the method comprising: forming a pixel electrode on a substrate; forming an adhesive layer covering the pixel electrode; fixing a light-emitting element to the adhesive layer; forming an organic layer by removing a portion of the adhesive layer to expose an edge of a top surface of the pixel electrode; forming connecting electrodes that respectively connect the pixel electrode to contact electrodes of the light-emitting element; and forming a common electrode on the top surface of each of the light-emitting elements.

[0032] Forming the pixel electrode on the substrate and forming the adhesive layer covering the pixel electrode may include using a mask.

[0033] Forming a connecting electrode that connects the pixel electrode to the contact electrode of the light-emitting element, respectively, may include: forming a first connecting electrode layer covering the pixel electrode, the organic layer and the light-emitting element; forming a second connecting electrode layer by removing a portion of the first connecting electrode layer using a mask; forming a dam covering the edge of the pixel electrode; forming a third organic layer covering the dam; and forming a connecting electrode by etching the second connecting electrode layer exposed and not covered by the third organic layer.

[0034] According to one or more embodiments of the present disclosure, an electronic device including a display device for providing an image is provided. The display device includes: a substrate; a pixel electrode, which is above the substrate; an organic layer, which is above the pixel electrode; a light-emitting element, which is above the organic layer and includes a contact electrode in contact with the organic layer; and a connecting electrode, which is connected to the pixel electrode and the contact electrode, on a side surface of the organic layer, and on a side surface of the contact electrode.

[0035] According to the foregoing and other embodiments of the present disclosure, an adhesive layer (or a temporary adhesive layer or a temporary fixing layer) is formed on the pixel electrode, and after a portion of each of the plurality of light-emitting elements is embedded in the adhesive layer, the adhesive layer is completely cured, thereby fixing the plurality of light-emitting elements to the adhesive layer. Therefore, in the process of transferring the plurality of light-emitting elements to the display panel, the possibility of the plurality of light-emitting elements tilting or falling can be reduced or prevented. Therefore, each of the plurality of light-emitting elements can be reduced or prevented from becoming unable to be electrically connected to the pixel electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] The above and other aspects of the present disclosure will become more apparent by describing embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0037] Figure 1 is a perspective view showing a display device according to one or more embodiments;

[0038] Figure 2 is a layout diagram showing a display device according to one or more embodiments;

[0039] Figure 3 is a block diagram showing a display device according to one or more embodiments;

[0040] Figure 4 is an equivalent circuit diagram showing a sub-pixel according to one or more embodiments;

[0041] Figure 5 is an equivalent circuit diagram showing a sub-pixel according to one or more other embodiments;

[0042] Figure 6is a layout diagram showing pixels of a display area according to one or more embodiments;

[0043] Figure 7 It is shown along Figure 6 A cross-sectional view of the display panel taken along line I1-I1';

[0044] Figure 8 It is shown Figure 7 A cross-sectional view of an example of a region A;

[0045] Fig. 9 It is shown Figure 7 A cross-sectional view of another example of region A;

[0046] Fig.10 It is shown Figure 7 A cross-sectional view of another example of region A;

[0047] Fig.11 It is shown along Figure 6 A cross-sectional view of the display panel taken along line I1-I1';

[0048] Fig.12 It is shown Fig.11 A cross-sectional view of an example of region B;

[0049] Fig.13 It is shown Fig.11 A cross-sectional view of another example of region B;

[0050] Fig.14 It is shown Fig.11 A cross-sectional view of yet another example of region B;

[0051] Fig.15 It is shown along Figure 6 A cross-sectional view of the display panel taken along line I1-I1';

[0052] Fig.16 It is shown Fig.15 A cross-sectional view of an example of a region C;

[0053] Fig.17 It is shown Fig.15 A cross-sectional view of another example of a region C;

[0054] Fig.18 It is shown Fig.15 A cross-sectional view of yet another example of region C;

[0055] Fig.19 is a layout diagram showing pixels of a display area according to one or more embodiments;

[0056] Fig. 20 It is shown along Fig.19A cross-sectional view of the display panel taken along line I2-I2';

[0057] Fig.21 It is shown Fig. 20 A cross-sectional view of an example of a region D;

[0058] Fig. 22 It is shown Fig. 20 A cross-sectional view of another example of a region D;

[0059] Fig.23 It is shown Fig. 20 A cross-sectional view of yet another example of a region D;

[0060] Fig.24 It is shown along Fig.19 A cross-sectional view of the display panel taken along line I2-I2';

[0061] Fig.25 It is shown Fig.24 A cross-sectional view of an example of a region E;

[0062] Fig.26 It is shown Fig.24 A cross-sectional view of yet another example of a region E;

[0063] Fig. 27 It is shown Fig.24 A cross-sectional view of yet another example of a region E;

[0064] Fig.28 It is shown along Fig.19 A cross-sectional view of the display panel taken along line I2-I2';

[0065] Fig.29 It is shown Fig.28 A cross-sectional view of an example of a region F;

[0066] Fig.30 It is shown Fig.28 A cross-sectional view of yet another example of a region F;

[0067] Fig.31 It is shown Fig.28 A cross-sectional view of yet another example of a region F;

[0068] Fig.32 is a flowchart illustrating a method for manufacturing a display device according to one or more embodiments;

[0069] Figures 33 to 41 is a cross-sectional view illustrating a method for manufacturing a display device according to one or more embodiments;

[0070] Fig.42 is a diagram showing a virtual reality device including a display device according to one or more embodiments;

[0071] Fig.43 is a diagram showing a smart watch including a display device according to one or more embodiments;

[0072] Fig.44 is a diagram showing a dashboard and a center instrument panel of a car including a display device according to one or more embodiments; and

[0073] Fig.45 is a diagram illustrating a transparent display device including a display device according to one or more embodiments. DETAILED DESCRIPTION

[0074] By referring to the detailed description and the accompanying drawings of the embodiments, the aspects of the embodiments of the present disclosure and the methods for realizing the same can be more easily understood. Hereinafter, the embodiments will be described in more detail with reference to the accompanying drawings. However, the described embodiments can be implemented in various forms and should not be construed as being limited to the embodiments shown herein. On the contrary, these embodiments are provided as examples so that the present disclosure will be thorough and complete, and the aspects and features of the present disclosure will be fully conveyed to those skilled in the art. Therefore, processes, elements and techniques that are not necessary for a person of ordinary skill in the art to fully understand the aspects and features of the present disclosure may not be described.

[0075] Unless otherwise specified, throughout the drawings and written description, the same reference numerals, characters, or combinations thereof denote the same elements, and therefore, description thereof will not be repeated. In addition, parts not related to the description of one or more embodiments may not be shown to make the description clear.

[0076] In the drawings, the relative sizes of elements, layers, and regions may be exaggerated for clarity. In addition, the use of cross-hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Therefore, unless specified, the presence or absence of cross-hatching or shading does not convey or indicate any preference or requirement for specific materials, material properties, dimensions, proportions, commonalities between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements.

[0077] Various embodiments are described herein with reference to cross-sectional views as schematic diagrams of embodiments and / or intermediate structures. Therefore, variations in the shapes of the figures due to, for example, manufacturing techniques and / or tolerances are to be expected. In addition, the specific structural or functional descriptions disclosed herein are merely exemplary for the purpose of describing embodiments according to the present disclosure. Therefore, the embodiments disclosed herein should not be interpreted as being limited to the shapes of the specifically shown regions, but rather are to include deviations in shapes due to, for example, manufacturing.

[0078] For example, an implanted region shown as a rectangle may have rounded or curved features and / or a gradient of implant concentration at its edges, rather than a binary change from an implanted region to a non-implanted region. Similarly, a buried region formed by implantation may result in some implantation in the region between the buried region and the surface through which the implantation occurs. Therefore, the regions shown in the accompanying drawings are schematic in nature, and their shapes are not intended to illustrate the actual shape of regions of the device and are not intended to be limiting. In addition, as will be appreciated by those skilled in the art, the described embodiments may be modified in a variety of different ways without departing from the spirit or scope of the present disclosure.

[0079] In the detailed description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various embodiments. However, it is apparent that various embodiments can be practiced without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid unnecessary confusion of various embodiments.

[0080] For ease of explanation, spatial relative terms such as "below", "below", "down", "below", "above", "on", etc. may be used herein to describe the relationship between an element or feature and another (some) element or feature as shown in the drawings. It will be understood that, in addition to the orientation depicted in the drawings, spatial relative terms are intended to include different orientations of the device in use or in operation. For example, if the device in the drawings is turned over, the element described as being "below" or "below" or "below" other elements or features will be oriented "above" other elements or features. Therefore, the exemplary terms "below" and "below" can include both above and below orientations. The device can be oriented in other ways (for example, rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein should be interpreted accordingly. Similarly, when the first part is described as being arranged "on" the second part, this means that the first part is arranged on the upper or lower side of the second part based on the direction of gravity, without being limited to its upper side.

[0081] Furthermore, in this specification, the phrase “on a plane” or “in a plan view” means observing a target portion from the top, and the phrase “in cross section” means observing a cross section formed by vertically cutting the target portion from a side surface.

[0082] It will be understood that when an element, layer, region, or component is referred to as being "formed on," "on," "connected to," or "coupled to" another element, layer, region, or component, it may be directly formed on, directly on, directly connected to, or directly coupled to, or indirectly formed on, indirectly on, indirectly connected to, or indirectly coupled to, such that one or more intervening elements, layers, regions, or components may be present. For example, when an element, layer, region, or component is referred to as being "electrically connected" or "electrically coupled to" another element, layer, region, or component, it may be directly electrically connected or directly electrically coupled to another element, layer, region, and / or component, or there may be intervening elements, layers, regions, or components. However, "directly connected / directly coupled" refers to one component being directly connected or directly coupled to another component without an intermediate component. Meanwhile, other expressions describing the relationship between components, such as "between," "directly between," or "adjacent to" and "directly adjacent to," can be similarly interpreted. In addition, it will be understood that when an element or layer is referred to as being "between" two elements or layers, it can be the only element or layer between the two elements or layers, or one or more intervening elements or layers may also be present.

[0083] For the purposes of the present disclosure, expressions such as "at least one of," "one of," and "selected from," when used with a list of elements, modify the entire list of elements and do not modify the individual elements in the list. For example, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" can be interpreted as any combination of only X, only Y, only Z, two or more of X, Y, and Z, such as, for example, XYZ, XYY, XZ, YZ, and ZZ, or any variation thereof. Similarly, expressions such as "at least one of A and B" can include A, B, or A and B. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. For example, expressions such as "A and / or B" can include A, B, or A and B. In addition, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure."

[0084] It will be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the spirit and scope of the present disclosure, the first element, first component, first region, first layer or first part described below may be referred to as the second element, second component, second region, second layer or second part.

[0085] In the example, the x-axis, y-axis and / or z-axis are not limited to the three axes of the rectangular coordinate system, and can be interpreted in a broader sense. For example, the x-axis, y-axis and z-axis can be perpendicular to each other, or can represent different directions that are not perpendicular to each other. The same applies to the first direction, the second direction and / or the third direction.

[0086] The terms used herein are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "an" are intended to also include the plural forms, unless the context clearly indicates otherwise. It will also be understood that when used in this specification, the terms "comprises", "comprising", "have", "having", "includes" and "including" specify the presence of stated features, wholes, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof.

[0087] As used herein, the terms "substantially," "about," "approximately," and similar terms are used as approximate terms and not as terms of degree, and are intended to allow for the inherent deviations of measured or calculated values ​​that will be recognized by one of ordinary skill in the art. In view of the measurements in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system), "about" or "approximately" as used herein include the value and mean within an acceptable deviation range for a particular value as determined by one of ordinary skill in the art. For example, the term "approximately" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the value.

[0088] When one or more embodiments can be implemented differently, a specific process order can be performed differently from the described order. For example, two processes described in succession can be performed substantially simultaneously, or in the reverse order of the described order.

[0089] In addition, any numerical range disclosed and / or listed herein is intended to include all sub-ranges of the same numerical precision contained in the range described. For example, the range of "1.0 to 10.0" is intended to include all sub-ranges between the described minimum value 1.0 and the described maximum value 10.0 (and including this number), for example, having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Any maximum numerical limit described herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit described in this specification is intended to include all higher numerical limits contained therein. Therefore, the applicant reserves the right to modify this specification (including claims) to explicitly record any sub-ranges contained in the range explicitly described herein.

[0090] The electronic device or electrical device and / or any other related device or component described herein according to one or more embodiments of the present disclosure can be implemented using any appropriate hardware, firmware (e.g., application-specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, the various components of these devices can be formed on an integrated circuit (IC) chip or on separate IC chips. In addition, the various components of these devices can be implemented on a flexible printed circuit film, a tape carrier package (TCP), a printed circuit board (PCB), or formed on a substrate.

[0091] In addition, the various components of these devices can be processes or threads running on one or more processors in one or more computing devices that execute computer program instructions and interact with other system components for performing the various functions described herein. Computer program instructions are stored in such a memory that can be implemented in a computing device using a standard storage device, such as, for example, a random access memory (RAM). Computer program instructions can also be stored in other non-temporary computer-readable media, such as, for example, a CD-ROM, a flash drive, etc. In addition, those skilled in the art will recognize that, without departing from the spirit and scope of the present disclosure, the functions of various computing devices can be combined or integrated into a single computing device, or the functions of a particular computing device can be distributed across one or more other computing devices.

[0092] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having, for example, a meaning consistent with their meaning in the context of the relevant art and / or this specification, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0093] Figure 1 is a perspective view showing a display device according to one or more embodiments.

[0094] refer to Figure 1 The display device 10 is a device for displaying moving images or still images. The display device 10 can be used as a display screen of various devices such as televisions, laptop computers, monitors, billboards, and Internet of Things (IOT) devices, and portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra mobile PCs (UMPCs).

[0095] The display device 10 may be a light-emitting display device such as an organic light-emitting display using an organic light-emitting diode, a quantum dot light-emitting display including a quantum dot light-emitting layer, an inorganic light-emitting display including an inorganic semiconductor, and a micro light-emitting display using a micro or nano light-emitting diode (LED). In the following description, it is assumed that the display device 10 is a micro light-emitting display device, but the present disclosure is not limited thereto. Meanwhile, in order to simplify the description, the ultra-small light-emitting diode is referred to as a light-emitting element hereinafter.

[0096] The display device 10 includes a display panel 100 , a display driving circuit 250 , a circuit board 300 , and a power supply circuit 500 .

[0097] In a plan view, the display panel 100 may be formed in a rectangular shape having a short side in a first direction DR1 and a long side in a second direction DR2 intersecting the first direction DR1. An angle where the short side in the first direction DR1 and the long side in the second direction DR2 meet may be rounded to have a curvature (e.g., a predetermined curvature), or may be a right angle. The planar shape of the display panel 100 is not limited to a rectangular shape, and may be formed in another polygonal shape, a circular shape, or an elliptical shape. The display panel 100 may be formed to be flat, but is not limited thereto. For example, the display panel 100 may include a curved portion formed at the left and right ends and having a constant curvature or a varying curvature. In addition, the display panel 100 may be flexibly formed so that it may be curved, bent, folded, or curled.

[0098] The substrate SUB of the display panel 100 (see Figure 7 ) may include a main area MA and a sub-area SBA.

[0099] The main area MA may include a display area DA for displaying an image and a non-display area NDA as a peripheral area of ​​the display area DA. The display area DA may include a plurality of pixels for displaying an image. For example, a pixel may include a first sub-pixel emitting a first light, a second sub-pixel emitting a second light, and a third sub-pixel emitting a third light.

[0100] The sub-region SBA may protrude from one side of the main region MA in the second direction DR2. Figure 1 2 shows that the sub-region SBA is unfolded, but the sub-region SBA may be bent, and in this case, a portion of the display panel 100 corresponding to the sub-region SBA may be arranged on the bottom surface of a portion of the display panel 100 corresponding to the main region MA. In the case where the sub-region SBA is bent, the portion of the display panel 100 corresponding to the sub-region SBA may overlap with a portion of the display panel 100 corresponding to the main region MA in the third direction DR3 which is the thickness direction of the display panel 100. The display driving circuit 250 may be arranged in the sub-region SBA.

[0101] The display driving circuit 250 may generate signals and voltages for driving the display panel 100. The display driving circuit 250 may be formed as an integrated circuit (IC) and attached to the display panel 100 by a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method, but the present disclosure is not limited thereto. For example, the display driving circuit 250 may be attached to the circuit board 300 by a chip on film (COF) method.

[0102] The circuit board 300 may be attached to one end of the sub-area SBA of the display panel 100. Therefore, the circuit board 300 may be electrically connected to the display panel 100 and the display driving circuit 250. The display panel 100 and the display driving circuit 250 may receive digital video data, timing signals, and driving voltages through the circuit board 300. The circuit board 300 may be a flexible printed circuit board, a rigid printed circuit board, or a flexible film such as a chip on film.

[0103] The power circuit 500 may generate a plurality of panel driving voltages according to a power voltage from the outside. The power circuit 500 may be formed as an integrated circuit (IC) and attached to the circuit board 300 by a COF method.

[0104] Figure 2 is a layout diagram showing a display device according to one or more embodiments. Figure 2 The sub-area SBA is shown unfolded without bending.

[0105] refer to Figure 2 , the display panel 100 may include a main area MA and a sub-area SBA.

[0106] The main area MA may include a display area DA displaying an image and a non-display area NDA as a peripheral area of ​​the display area DA. The display area DA may occupy most of the main area MA. The display area DA may be located at the center of the main area MA.

[0107] The display area DA may include a plurality of pixels PX for displaying an image, and each of the plurality of pixels PX may include a plurality of sub-pixels SPX. The pixel PX may be defined as a sub-pixel group of a minimum unit capable of representing a white grayscale.

[0108] The non-display area NDA may be located adjacent to the display area DA. The non-display area NDA may be an area outside the display area DA. The non-display area NDA may surround the display area DA. The non-display area NDA may be an edge area of ​​the display panel 100.

[0109] The first scan driver SDC1 and the second scan driver SDC2 may be located in the non-display area NDA. The first scan driver SDC1 may be located at one side (e.g., the left side) of the display panel 100, and the second scan driver SDC2 may be located at the other side (e.g., the right side) of the display panel 100, but the present disclosure is not limited thereto. Each of the first scan driver SDC1 and the second scan driver SDC2 may be electrically connected to the display driving circuit 250 through a scan fan-out line. Each of the first scan driver SDC1 and the second scan driver SDC2 may receive a scan control signal input from the display driving circuit 250, may generate a scan signal in response to the scan control signal, and may output the generated scan signal to the scan line.

[0110] The sub-region SBA may protrude from one side of the main region MA in the second direction DR2. The length of the sub-region SBA in the second direction DR2 may be less than the length of the main region MA in the second direction DR2. The length of the sub-region SBA in the first direction DR1 may be substantially equal to or less than the length of the main region MA in the first direction DR1. The sub-region SBA may be foldable so that a portion of the display panel 100 corresponding to the sub-region SBA is located below a portion of the display panel 100 corresponding to the main region MA. In this case, a portion of the display panel 100 corresponding to the sub-region SBA may overlap a portion of the display panel 100 corresponding to the main region MA in the third direction DR3.

[0111] The sub-area SBA may include a connection area CA, a pad area PA, and a bending area BA.

[0112] The connection area CA is an area protruding from one side of the main area MA in the second direction DR2. One side of the connection area CA may be adjacent to the non-display area NDA of the main area MA, and the other side of the connection area CA may be adjacent to the bending area BA.

[0113] The pad area PA is an area in which the pad PD and the display driving circuit 250 are located. The display driving circuit 250 may be attached to the driving pad of the pad area PA using a conductive adhesive member such as an anisotropic conductive film. The circuit board 300 may be attached to the pad PD of the pad area PA using a conductive adhesive member such as an anisotropic conductive film. One side of the pad area PA may be adjacent to the bending area BA.

[0114] The bending area BA is an area that can be bent. When the bending area BA is bent, a portion of the display panel 100 corresponding to the pad area PA may be located below portions of the display panel 100 corresponding to the connection area CA and the main area MA. The bending area BA may be located between the connection area CA and the pad area PA. One side of the bending area BA may be adjacent to the connection area CA, and the other side of the bending area BA may be adjacent to the pad area PA.

[0115] Figure 3 is a block diagram illustrating a display device according to one or more embodiments.

[0116] refer to Figure 3 , the display area DA includes a plurality of pixels PX, a plurality of scan lines, a plurality of emission control lines EL, and a plurality of data lines DL.

[0117] A plurality of pixels PX may be arranged in a matrix form in a first direction DR1 and a second direction DR2. A plurality of scan lines and a plurality of emission control lines EL may extend in the first direction DR1 while being arranged in the second direction DR2. A plurality of data lines DL may extend in the second direction DR2 while being arranged in the first direction DR1. The plurality of scan lines include a plurality of write scan lines GWL, a plurality of control scan lines GCL, a plurality of initialization scan lines GIL, and a plurality of bias scan lines GBL.

[0118] Each of the plurality of sub-pixels SPX may be connected to any one of the plurality of write scan lines GWL, any one of the plurality of control scan lines GCL, any one of the plurality of initialization scan lines GIL, any one of the plurality of bias scan lines GBL, any one of the plurality of emission control lines EL, and any one of the plurality of data lines DL. Each of the plurality of sub-pixels SPX may receive a data voltage of the data line DL according to a write scan signal of the write scan line GWL, and may emit light from its light emitting element according to the data voltage.

[0119] The non-display area NDA includes a first scan driver SDC1 , a second scan driver SDC2 , and a display driving circuit 250 .

[0120] Each of the first scan driver SDC1 and the second scan driver SDC2 may include a write scan signal output unit 611, a control scan signal output unit 612, an initialization scan signal output unit 613, a bias scan signal output unit 614, and an emission signal output unit 615. Each of the write scan signal output unit 611, the control scan signal output unit 612, the initialization scan signal output unit 613, the bias scan signal output unit 614, and the emission signal output unit 615 may receive a scan timing control signal SCS from the timing control circuit 251. The write scan signal output unit 611 may generate a write scan signal according to the scan timing control signal SCS received from the timing control circuit 251, and may output them sequentially to the write scan line GWL. The control scan signal output unit 612 may generate a control scan signal in response to the scan timing control signal SCS, and may output them sequentially to the control scan line GCL. The initialization scan signal output unit 613 may generate an initialization scan signal in response to the scan timing control signal SCS, and may output them sequentially to the initialization scan line GIL. The bias scan signal output unit 614 may generate bias scan signals according to the scan timing control signal SCS and may sequentially output them to the bias scan line GBL. The emission signal output unit 615 may generate emission control signals according to the scan timing control signal SCS and sequentially output them to the emission control line EL.

[0121] The display driving circuit 250 includes a timing control circuit 251 and a data driving circuit 252 .

[0122] The data driving circuit 252 may receive the digital video data DATA and the data timing control signal DCS from the timing control circuit 251. The data driving circuit 252 converts the digital video data DATA into analog data voltages in response to the data timing control signal DCS and outputs them to the data line DL. In this case, the sub-pixel SPX may be selected by the write scan signal of the first scan driver SDC1 and the second scan driver SDC2, and the data voltage may be provided to the selected sub-pixel SPX.

[0123] The timing control circuit 251 may receive digital video data DATA and a timing signal from the outside. The timing control circuit 251 may generate a scan timing control signal SCS and a data timing control signal DCS for controlling the display panel 100 in response to the timing signal. The timing control circuit 251 may output the scan timing control signal SCS to the first scan driver SDC1 and the second scan driver SDC2. The timing control circuit 251 may output the digital video data DATA and the data timing control signal DCS to the data driving circuit 252.

[0124] The power supply circuit 500 may generate a plurality of panel driving voltages according to a power voltage from the outside. For example, the power supply circuit 500 may generate a first driving voltage VDD, a second driving voltage VSS, and a third driving voltage VINT, and provide them to the display panel 100.

[0125] Figure 4 is an equivalent circuit diagram illustrating a sub-pixel according to one or more embodiments.

[0126] refer to Figure 4 , the sub-pixel SPX according to one or more embodiments may be connected to the scan line, the emission control line EL, and the data line DL. For example, the sub-pixel SPX may be connected to the write scan line GWL, the initialization scan line GIL, the control scan line GCL, the bias scan line GBL, the emission control line EL, and the data line DL.

[0127] The subpixel SPX according to one or more embodiments includes a driving transistor DT, a switching element, a capacitor C1 and a light emitting element LE. The switching element includes first, second, third, fourth, fifth and sixth transistors ST1, ST2, ST3, ST4, ST5 and ST6.

[0128] The driving transistor DT includes a gate electrode, a first electrode, and a second electrode. The driving transistor DT controls a drain-source current Ids (hereinafter, referred to as a "driving current") flowing between the first electrode and the second electrode according to a data voltage applied to the gate electrode.

[0129] The light emitting element LE may be a micro light emitting diode element. The light emitting element LE may emit light according to the driving current Ids. The emission amount of the light emitting element LE may be proportional to the driving current Ids. The anode electrode of the light emitting element LE may be connected to the first electrode of the fourth transistor ST4 and the second electrode of the sixth transistor ST6, and its cathode electrode may be connected to the second power line VSL to which the second power voltage is applied.

[0130] The capacitor C1 is formed between the gate electrode of the driving transistor DT and the first power line VDL to which the first power voltage is applied. The first power voltage may be a voltage having a level higher than that of the second power voltage. One electrode of the capacitor C1 may be connected to the gate electrode of the driving transistor DT, and the other electrode thereof may be connected to the first power line VDL.

[0131] like Figure 4 As shown in , the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5 and the sixth transistor ST6 and the driving transistor DT may all be formed as P-type MOSFETs. In this case, the active layer of each of the driving transistor DT and the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5 and the sixth transistor ST6 may be formed of polysilicon.

[0132] The gate electrode of the second transistor ST2 may be connected to the write scan line GWL, and the gate electrode of the first transistor ST1 may be connected to the control scan line GCL. The gate electrode of the third transistor ST3 may be connected to the initialization scan line GIL, and the gate electrode of the fourth transistor ST4 may be connected to the bias scan line GBL. Because the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 are formed as P-type MOSFETs, they may be turned on when a scan signal of a gate low voltage and an emission signal are applied to the control scan line GCL, the initialization scan line GIL, the write scan line GWL, the bias scan line GBL, and the emission control line EL. One electrode of the third transistor ST3 and one electrode of the fourth transistor ST4 may be connected to the initialization voltage line VIL.

[0133] Figure 5 is an equivalent circuit diagram illustrating a sub-pixel according to one or more other embodiments.

[0134] refer to Figure 5, the driving transistor DT, the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 may be configured as a P-type metal oxide semiconductor field effect transistor (MOSFET), and the first transistor ST1 and the third transistor ST3 may be configured as an N-type MOSFET. The active layer of each of the driving transistor DT, the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 configured as a P-type MOSFET may be formed of polysilicon, and the active layer of each of the first transistor ST1 and the third transistor ST3 configured as an N-type MOSFET may be formed of an oxide semiconductor. In this case, the transistor whose active layer is formed of polysilicon and the transistor whose active layer is formed of an oxide semiconductor may be located on different layers.

[0135] Since the first transistor ST1 and the third transistor ST3 are formed as N-type MOSFETs, the first transistor ST1 may be turned on when a control scan signal of a gate high voltage is applied to the control scan line GCL, and the third transistor ST3 may be turned on when an initialization scan signal of a gate high voltage is applied to the initialization scan line GIL. On the contrary, since the second transistor ST2, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 are formed as P-type MOSFETs, they may be turned on when an emission signal of a gate low voltage and a scan signal are applied to each of the write scan line GWL, the bias scan line GBL, and the emission control line EL.

[0136] Optionally, in Figure 4 In the embodiment, the fourth transistor ST4 may be formed as an N-type MOSFET. In this case, the active layer of the fourth transistor ST4 may also be formed of an oxide semiconductor. When the fourth transistor ST4 is formed as an N-type MOSFET, it may be turned on when a bias scan signal of a gate high voltage is applied to the bias scan line GBL.

[0137] Alternatively, in one or more embodiments, the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, the sixth transistor ST6, and the driving transistor DT may all be formed as N-type MOSFETs. In this case, the active layer of each of the driving transistor DT and the first transistor ST1, the second transistor ST2, the third transistor ST3, the fourth transistor ST4, the fifth transistor ST5, and the sixth transistor ST6 may be formed of an oxide semiconductor.

[0138] Figure 6 is a diagram showing a layout of pixels of a display area according to one or more embodiments.

[0139] refer to Figure 6, each of the plurality of pixels PX in the display area DA may include a first sub-pixel SPX1 , a second sub-pixel SPX2 , and a third sub-pixel SPX3 .

[0140] The plurality of pixels PX may be arranged in a matrix form. In each of the plurality of pixels PX, a first sub-pixel SPX1, a second sub-pixel SPX2, and a third sub-pixel SPX3 may be arranged in a first direction DR1.

[0141] The first sub-pixel SPX1 may emit a first light, the second sub-pixel SPX2 may emit a second light, and the third sub-pixel SPX3 may emit a third light. Here, the first light may be light of a red wavelength band, the second light may be light of a green wavelength band, and the third light may be light of a blue wavelength band. For example, the blue wavelength band may be a wavelength band of light whose main peak wavelength is in the range of 370nm to 460nm, the green wavelength band may be a wavelength band of light whose main peak wavelength is in the range of 480nm to 560nm, and the red wavelength band may be a wavelength band of light whose main peak wavelength is in the range of 600nm to 750nm. However, the present disclosure is not limited thereto, and each of the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3 may emit any one of the first light, the second light, and the third light.

[0142] The first subpixel SPX1 includes a first pixel electrode PXE1, a plurality of light emitting elements LE and a first light conversion layer QDL1. The second subpixel SPX2 includes a second pixel electrode PXE2, a plurality of light emitting elements LE and a second light conversion layer QDL2. The third subpixel SPX3 includes a third pixel electrode PXE3, a plurality of light emitting elements LE and a light transmissive layer TPL.

[0143] The light emitting element LE of the first sub-pixel SPX1, the light emitting element LE of the second sub-pixel SPX2, and the light emitting element LE of the third sub-pixel SPX3 emit light in a blue wavelength band, and the first light conversion layer QDL1 and the second light conversion layer QDL2 are suitable for wavelength conversion. However, the present disclosure is not limited thereto, and when the light emitting element LE of the first sub-pixel SPX1 emits light of a first color, the light emitting element LE of the second sub-pixel SPX2 emits light of a second color, and the light emitting element LE of the third sub-pixel SPX3 emits light of a third color, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be omitted. Each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3 may have a rectangular planar shape having a short side in the first direction DR1 and a long side in the second direction DR2. The area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be set according to the light conversion efficiency of the first light conversion layer QDL1 and the light conversion efficiency of the second light conversion layer QDL2.

[0144] For example, Figure 6As shown in , the area of ​​the second pixel electrode PXE2 may be greater than the area of ​​the first pixel electrode PXE1, and the area of ​​the first pixel electrode PXE1 may be greater than the area of ​​the third pixel electrode PXE3. When the length of the first pixel electrode PXE1 in the first direction DR1, the length of the second pixel electrode PXE2 in the first direction DR1, and the length of the third pixel electrode PXE3 in the first direction DR1 are the same, the length of the second pixel electrode PXE2 in the second direction DR2 may be longer than the length of the first pixel electrode PXE1 in the second direction DR2, and the length of the first pixel electrode PXE1 in the second direction DR2 may be longer than the length of the third pixel electrode PXE3 in the second direction DR2. However, the present disclosure is not limited thereto, and the length of the first pixel electrode PXE1 in the first direction DR1, the length of the second pixel electrode PXE2 in the first direction DR1, and the length of the third pixel electrode PXE3 in the first direction DR1 may be the same, and the length of the first pixel electrode PXE1 in the second direction DR2, the length of the second pixel electrode PXE2 in the second direction DR2, and the length of the third pixel electrode PXE3 in the second direction DR2 may be different. Alternatively, the length of the first pixel electrode PXE1 in the second direction DR2, the length of the second pixel electrode PXE2 in the second direction DR2, and the length of the third pixel electrode PXE3 in the second direction DR2 may be the same, and the length of the first pixel electrode PXE1 in the first direction DR1, the length of the second pixel electrode PXE2 in the first direction DR1, and the length of the third pixel electrode PXE3 in the first direction DR1 may be different. Optionally, the length of the first pixel electrode PXE1 in the first direction DR1, the length of the second pixel electrode PXE2 in the first direction DR1, the length of the third pixel electrode PXE3 in the first direction DR1, the length of the first pixel electrode PXE1 in the second direction DR2, the length of the second pixel electrode PXE2 in the second direction DR2, and the length of the third pixel electrode PXE3 in the second direction DR2 may be the same. Optionally, the length of any two pixel electrodes among the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3 in the first direction DR1 and the length in the second direction DR2 may be the same, and the length of another pixel electrode in the first direction DR1 and the length in the second direction DR2 may be different from the length of any two pixel electrodes in the first direction DR1 and the length in the second direction DR2.

[0145] The first pixel electrode PXE1 may be electrically connected to the fourth transistor ST4 of the first sub-pixel SPX1 through the first connection hole CT1 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5The second pixel electrode PXE2 may be electrically connected to the fourth transistor ST4 of the second sub-pixel SPX2 through the second connection hole CT2 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5 ). The third pixel electrode PXE3 may be electrically connected to the fourth transistor ST4 of the third sub-pixel SPX3 through the third connection hole CT3 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5 )'s second electrode.

[0146] A plurality of light emitting elements LE may be located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. The same number of light emitting elements LE may be located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. For example, two light emitting elements LE may be located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. The plurality of light emitting elements LE may emit the third light, that is, light in the blue wavelength band.

[0147] However, the present disclosure is not limited thereto, and one light emitting element LE may be located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3, or two or more light emitting elements LE, for example, three light emitting elements LE or four light emitting elements LE may be located thereon. When two or more light emitting elements LE are located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3, even if a contact failure occurs between one of the light emitting elements LE and the pixel electrode, the other light emitting elements LE can emit light by contacting the pixel electrode, which is advantageous because no repair is required.

[0148] The first light conversion layer QDL1 may completely overlap the first pixel electrode PXE1 and the plurality of light emitting elements LE of the first sub-pixel SPX1. The area of ​​the first light conversion layer QDL1 may be greater than the area of ​​the first pixel electrode PXE1. The first light conversion layer QDL1 may emit light by converting or shifting the peak wavelength of incident light to another corresponding peak wavelength. For example, the first light conversion layer QDL1 may convert or shift the third light emitted from the plurality of light emitting elements LE of the first sub-pixel SPX1 into the first light.

[0149] The second light conversion layer QDL2 may completely overlap with the plurality of light emitting elements LE of the second sub-pixel SPX2 and the second pixel electrode PXE2. The area of ​​the second light conversion layer QDL2 may be greater than the area of ​​the second pixel electrode PXE2. The second light conversion layer QDL2 may emit light by converting or shifting the peak wavelength of the incident light to another corresponding peak wavelength. For example, the second light conversion layer QDL2 may convert or shift the third light emitted from the plurality of light emitting elements LE of the second sub-pixel SPX2 into the second light.

[0150] The light-transmitting layer TPL may completely overlap the plurality of light-emitting elements LE of the third subpixel SPX3 and the third pixel electrode PXE3. The light-transmitting layer TPL may directly transmit incident light. For example, the light-transmitting layer TPL may directly transmit the third light emitted from the plurality of light-emitting elements LE of the third subpixel SPX3.

[0151] Figure 7 It is shown along Figure 6 1 is a cross-sectional view of the display panel taken along line I1-I1'. Figure 8 It is shown Figure 7 An example cross-sectional view of region A.

[0152] refer to Figure 7 and Figure 8 , the substrate SUB may be made of an insulating material such as glass or a polymer resin. When the substrate SUB is made of a polymer resin, it may be a flexible substrate that can be stretched. The polymer resin may include an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and / or a polyimide resin.

[0153] The barrier layer BR may be located on the substrate SUB. The barrier layer BR is a layer for protecting the transistors of the thin film transistor layer TFTL from moisture penetration through the substrate SUB susceptible to moisture penetration. The barrier layer BR may be formed as a plurality of inorganic layers alternately stacked. For example, the barrier layer BR may be formed of a multilayer in which one or more inorganic layers of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer are alternately stacked.

[0154] The first thin film transistor TFT1 may be located on the barrier layer BR. The first thin film transistor TFT1 may be Figure 5 Any one of the fourth transistor ST4 and the sixth transistor ST6 shown in FIG. The first thin film transistor TFT1 may include a first active layer ACT1 and a first gate electrode G1.

[0155] The first active layer ACT1 of the first thin film transistor TFT1 may be located on the barrier layer BR. The first active layer ACT1 of the first thin film transistor TFT1 may include polycrystalline silicon, single crystalline silicon, low temperature polycrystalline silicon, or amorphous silicon.

[0156] The first active layer ACT1 may include a first channel region CHA1, a first source region S1, and a first drain region D1. The first channel region CHA1 may be a region overlapping with the first gate electrode G1 in a third direction DR3 that is a thickness direction of the substrate SUB. The first source region S1 may be located on one side of the first channel region CHA1, and the first drain region D1 may be located on the other side of the first channel region CHA1. The first source region S1 and the first drain region D1 may be regions that do not overlap with the first gate electrode G1 in the third direction DR3. The first source region S1 and the first drain region D1 may be regions having conductivity by doping a silicon semiconductor with ions.

[0157] The first gate insulating layer 131 may be on the first channel region CHA1, the first source region S1, and the first drain region D1 of the first thin film transistor TFT1. The first gate insulating layer 131 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0158] The first gate metal layer GTL1 may be located on the first gate insulating layer 131. The first gate metal layer GTL1 may include a first capacitor electrode CAE1 and a first gate electrode G1 of the first thin film transistor TFT1. The first gate electrode G1 may overlap the first active layer ACT1 in the third direction DR3. Figure 7 The first gate electrode G1 and the first capacitor electrode CAE1 are shown to be spaced apart from each other, but the first gate electrode G1 and the first capacitor electrode CAE1 may be connected to each other. The first gate metal layer GTL1 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0159] The second gate insulating layer 132 may be on the first gate electrode G1 of the first thin film transistor TFT1 and the first capacitor electrode CAE1. The second gate insulating layer 132 may be formed of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0160] The second gate metal layer GTL2 may be located on the second gate insulating layer 132. The second gate metal layer GTL2 may include a second capacitor electrode CAE2. The second capacitor electrode CAE2 may overlap the first capacitor electrode CAE1 in the third direction DR3. Since the second gate insulating layer 132 has a dielectric constant (eg, a predetermined dielectric constant), the capacitor C1 ( Figure 5) may be formed of a first capacitor electrode CAE1, a second capacitor electrode CAE2, and a second gate insulating layer 132 therebetween. The second gate metal layer GTL2 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0161] The first interlayer insulating layer 141 may be positioned on the second capacitor electrode CAE2. The first interlayer insulating layer 141 may be formed of an inorganic layer (eg, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0162] The second thin film transistor TFT2 may be located on the first interlayer insulating layer 141. The second thin film transistor TFT2 may be Figure 5 Any one of the first transistor ST1 and the third transistor ST3 shown in FIG. The second thin film transistor TFT2 may include a second active layer ACT2 and a second gate electrode G2.

[0163] The second active layer ACT2 of the second thin film transistor TFT2 may be located on the first interlayer insulating layer 141. The second active layer ACT2 may include an oxide semiconductor. For example, the second active layer ACT2 may include IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0164] The second active layer ACT2 may include a second channel region CHA2, a second source region S2, and a second drain region D2. The second channel region CHA2 may be a region overlapping with the second gate electrode G2 in the third direction DR3. The second source region S2 may be located on one side of the second channel region CHA2, and the second drain region D2 may be located on the other side of the second channel region CHA2. The second source region S2 and the second drain region D2 may be regions that do not overlap with the second gate electrode G2 in the third direction DR3. The second source region S2 and the second drain region D2 may be regions having conductivity by doping an oxide semiconductor with ions.

[0165] The third gate insulating layer 133 may be located on the second active layer ACT2 of the second thin film transistor TFT2. The third gate insulating layer 133 may be formed of an inorganic layer (eg, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0166] The third gate metal layer GTL3 may be located on the third gate insulating layer 133. The third gate metal layer GTL3 may include a second gate electrode G2 of the second thin film transistor TFT2. The second gate electrode G2 may overlap the second active layer ACT2 in the third direction DR3. The third gate metal layer GTL3 may be formed as a single layer or a multilayer made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof.

[0167] The second interlayer insulating layer 142 may be located on the second gate electrode G2 of the second thin film transistor TFT2. The second interlayer insulating layer 142 may be formed of an inorganic layer (eg, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0168] The first data metal layer DTL1 may be located on the second interlayer insulating layer 142. The first data metal layer DTL1 may include a first source connection electrode SBE3, a second source connection electrode SBE1, and a third source connection electrode SBE2. The first source connection electrode SBE3 may be connected to the first drain region D1 of the first active layer ACT1 through a first source contact hole PCT1 penetrating the first gate insulating layer 131, the second gate insulating layer 132, the first interlayer insulating layer 141, the third gate insulating layer 133, and the second interlayer insulating layer 142. The second source connection electrode SBE1 may be connected to the second source region S2 of the second active layer ACT2 through a second source connection contact hole BCT1 penetrating the second interlayer insulating layer 142 and the third gate insulating layer 133. The third source connection electrode SBE2 may be connected to the second drain region D2 of the second active layer ACT2 through a third source connection contact hole BCT2 penetrating the second interlayer insulating layer 142 and the third gate insulating layer 133. The first data metal layer DTL1 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, the first data metal layer DTL1 may include a first layer made of titanium (Ti), a second layer made of aluminum (Al), and a third layer made of titanium (Ti).

[0169] A first organic layer 160 for flattening or planarizing a stepped portion caused by the first thin film transistor TFT1 and the second thin film transistor TFT2 may be located on the first source connection electrode SBE3, the second source connection electrode SBE1, and the third source connection electrode SBE2. The first organic layer 160 may be formed of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0170] The second data metal layer DTL2 may be located on the first organic layer 160. The second data metal layer DTL2 may include a fourth source connection electrode SBE4. The fourth source connection electrode SBE4 may be connected to the first source connection electrode SBE3 through a second pixel contact hole PCT2 penetrating the first organic layer 160. The second data metal layer DTL2 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, the second data metal layer DTL2 may include a first layer made of titanium (Ti), a second layer made of aluminum (Al), and a third layer made of titanium (Ti).

[0171] The second organic layer 180 may be located on the fourth source connection electrode SBE4. The second organic layer 180 may be formed of an organic layer such as acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0172] The light emitting element layer may be located on the second organic layer 180. The light emitting element layer may include pixel electrodes PXE1, PXE2, and PXE3, a light emitting element LE, a common electrode CE, and an organic layer 210.

[0173] The pixel electrode layer PXL may be located on the second organic layer 180. The pixel electrode layer PXL may include a first pixel electrode PXE1, a second pixel electrode PXE2, and a third pixel electrode PXE3. In the first sub-pixel SPX1, the first pixel electrode PXE1 may be connected to the second organic layer 180 through a first connection hole CT1 (see Figure 6 ) is connected to the fourth source connection electrode SBE4. In the second sub-pixel SPX2, the second pixel electrode PXE2 can be connected to the second source connection electrode SBE4 by the second connection hole CT2 (see FIG. 1 ) penetrating the second organic layer 180. Figure 6 ) is connected to the fourth source connection electrode SBE4. In the third sub-pixel SPX3, the third pixel electrode PXE3 can be formed through the third connection hole CT3 (see FIG. 1 ) penetrating the second organic layer 180. Figure 6 ) is connected to the fourth source connection electrode SBE4.

[0174] In the first subpixel SPX1, the first pixel electrode PXE1 may be connected to the first source region S1 or the first drain region D1 of the first thin film transistor TFT1 through the first source connection electrode SBE3 and the fourth source connection electrode SBE4. Therefore, in the first subpixel SPX1, a voltage controlled by the first thin film transistor TFT1 may be applied to the first pixel electrode PXE1.

[0175] In addition, in the second subpixel SPX2, the second pixel electrode PXE2 can be connected to the first source region S1 or the first drain region D1 of the first thin film transistor TFT1 through the first source connection electrode SBE3 and the fourth source connection electrode SBE4. Therefore, in the second subpixel SPX2, the voltage controlled by the first thin film transistor TFT1 can be applied to the second pixel electrode PXE2.

[0176] In addition, in the third subpixel SPX3, the third pixel electrode PXE3 may be connected to the first source region S1 or the first drain region D1 of the first thin film transistor TFT1 through the first source connection electrode SBE3 and the fourth source connection electrode SBE4. Therefore, in the third subpixel SPX3, the voltage controlled by the first thin film transistor TFT1 may be applied to the third pixel electrode PXE3.

[0177] The pixel electrode layer PXL may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy thereof. For example, in order to reduce the resistance of each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3, the pixel electrode layer PXL may be formed as a multilayer made of copper (Cu) having a low sheet resistance or an alloy of titanium (Ti) and copper (Cu).

[0178] The bank 190 may cover the edges of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. The bank 190 may be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. The bank 190 may include a light blocking material to reduce or prevent light of the light emitting element LE of any one sub-pixel from traveling to an adjacent sub-pixel. For example, the bank 190 may contain an organic black pigment or an inorganic black pigment such as carbon black.

[0179] The organic layer 210 may be located on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. The organic layer 210 is used to temporarily fix or adhere the plurality of light emitting elements LE to reduce or prevent the possibility of them tilting or falling during the process of transferring the plurality of light emitting elements LE to the display panel 100. That is, the organic layer 210 may be a layer for false adhesion of the plurality of light emitting elements LE on each of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. In order to promote false adhesion, the thickness of the organic layer 210 may be greater than the thickness of each of the pixel electrodes PXE1, PXE2, and PXE3, and may be greater than the thickness of the contact electrode CTE.

[0180] The organic layer 210 may be a photosensitive organic layer such as a photoresist. Alternatively, the organic layer 210 may be formed of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0181] The organic layer 210 will be described in detail later in conjunction with Figures 32 to 41 Give a description.

[0182] A plurality of light emitting elements LE may be positioned on the organic layer 210 . Figure 7 It is shown that each of the plurality of light emitting elements LE is a vertical micro LED extending in the third direction DR3. The vertical micro LED refers to an LED having a structure in which a first semiconductor layer SEM1, an active layer MQW, and a second semiconductor layer SEM2 are sequentially arranged in the third direction DR3 as a vertical direction.

[0183] Each of the plurality of light emitting elements LE may have a reverse tapered cross-sectional shape. That is, each of the plurality of light emitting elements LE may have a trapezoidal cross-sectional shape in which the width of the top surface is wider than the width of the bottom surface. However, the present disclosure is not limited thereto, and each of the plurality of light emitting elements LE may have a trapezoidal cross-sectional shape in which the width of the top surface is narrower than the width of the bottom surface, or may have a cross-sectional shape in which the width of the top surface and the width of the bottom surface are the same.

[0184] Each of the plurality of light emitting elements LE may be made of an inorganic material such as gallium nitride (GaN). Each of the plurality of light emitting elements LE may have a length of several to several hundred μm in each of the first direction DR1, the second direction DR2, and the third direction DR3. For example, each of the plurality of light emitting elements LE may have a length of 100 μm or less in each of the first direction DR1, the second direction DR2, and the third direction DR3.

[0185] Each of the plurality of light emitting elements LE may be formed by growing on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light emitting elements LE may be directly transferred from the semiconductor substrate to the pixel electrodes PXE1, PXE2, and PXE3 of the display panel 100. Alternatively, the plurality of light emitting elements LE may be transferred to the pixel electrodes PXE1, PXE2, and PXE3 of the display panel 100 by an electrostatic method using an electrostatic head or an imprinting method using an elastic polymer material such as PDMS or silicone resin as a transfer substrate.

[0186] The light emitting element LE may include a contact electrode CTE, a first semiconductor layer SEM1, an active layer MQW, a second semiconductor layer SEM2, and a passivation layer INS.

[0187] The contact electrode CTE may be located on the organic layer 210. The contact electrode CTE may be located on the entire bottom surface and a portion of the side surface of the first semiconductor layer SEM1. In addition, the contact electrode CTE may be located on the passivation layer INS positioned on the side surface of the first semiconductor layer SEM1. The contact electrode CTE may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0188] The first semiconductor layer SEM1 may be located on the contact electrode CTE. A length of a bottom surface of the first semiconductor layer SEM1 in the first direction DR1 or in the second direction DR2 may be smaller than a length of the contact electrode CTE in the first direction DR1 or in the second direction DR2. The first semiconductor layer SEM1 may be formed of GaN doped with a first conductive type dopant such as Mg, Zn, Ca, or Ba.

[0189] The active layer MQW may be located on the first semiconductor layer SEM1. The active layer MQW may emit light by recombining electron-hole pairs according to an electrical signal applied through the first and second semiconductor layers SEM1 and SEM2.

[0190] The active layer MQW may include a material having a single quantum well structure or a multiple quantum well structure. When the active layer MQW includes a material having a multiple quantum well structure, the active layer MQW may have a structure in which a plurality of well layers and barrier layers are alternately stacked. At this time, the well layer may be formed of InGaN, and the barrier layer may be formed of GaN or AlGaN, but the present disclosure is not limited thereto. Alternatively, the active layer MQW may have a structure in which a semiconductor material having a large energy band gap and a semiconductor material having a small energy band gap are alternately stacked, and may include other group III, group IV or group V semiconductor materials according to the wavelength band of the emitted light.

[0191] When the active layer MQW includes InGaN, the color of the emitted light may vary according to the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer MQW may shift to the red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer MQW may shift to the blue wavelength band. For example, the active layer MQW of the light emitting element LE that emits the third light (light in the blue wavelength band) may contain 10 wt % to 20 wt % of indium (In).

[0192] The second semiconductor layer SEM2 may be located on the first semiconductor layer SEM1. The second semiconductor layer SEM2 may be doped with a second conductive type dopant such as Si, Ge, Se, Sn, etc. For example, the second semiconductor layer SEM2 may be n-GaN doped with N-type Si.

[0193] The electron blocking layer may be located between the first semiconductor layer SEM1 and the active layer MQW. The electron blocking layer may be a layer for suppressing or preventing too many electrons from flowing into the active layer MQW. For example, the electron blocking layer may be AlGaN or p-AlGaN doped with p-type Mg. The electron blocking layer may be omitted.

[0194] The superlattice layer may be located between the active layer MQW and the second semiconductor layer SEM2. The superlattice layer may be a layer for relieving stress between the second semiconductor layer SEM2 and the active layer MQW. For example, the superlattice layer may be formed of InGaN or GaN. The superlattice layer may be omitted.

[0195] The passivation layer INS may be located on the side surface of the first semiconductor layer SEM1, the side surface of the active layer MQW, and the side surface of the second semiconductor layer SEM2. The passivation layer INS may be a layer for protecting the side surface of the light emitting element LE. The passivation layer INS may be formed of an inorganic layer (e.g., a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0196] The connection electrode BE connects the contact electrode CTE of the light emitting element LE to a corresponding one of the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3. The connection electrode BE may be located on the top surface of the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3 that is exposed and not covered by the organic layer 210. In addition, the connection electrode BE may be located on the side surface of the organic layer 210 and the side surface of the contact electrode CTE. In addition, the connection electrode BE may be located on a portion of the side surface of the light emitting element LE. For example, the connection electrode BE may be located on a portion of the passivation layer INS of the light emitting element LE.

[0197] The connection electrode BE may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the connection electrode BE may be made of a transparent conductive material (TCO) such as indium tin oxide (ITO) or indium zinc oxide (IZO) capable of transmitting light.

[0198] When the connection electrode BE is made of a metal material having high reflectivity such as aluminum (Al), light traveling in the lateral direction of the light emitting element LE among the light emitted from the active layer MQW of the light emitting element LE can be reflected from the connection electrode BE and can travel in the upward direction of the light emitting element LE. Therefore, the loss of light from the light emitting element LE can be reduced, which makes it possible to increase the light efficiency of the light emitting element LE. The connection electrode BE can be formed as a single layer of metal having high reflectivity, or can be formed as a multilayer such as titanium (Ti) / aluminum (Al) / titanium (Ti) or ITO / aluminum (Al) / ITO.

[0199] The third organic layer 191 may cover a portion of the side surface of each of the plurality of light emitting elements LE and the bank 190. In addition, the third organic layer 191 covers the connection electrode BE, but at least a portion of the connection electrode BE may be exposed without being covered by the third organic layer 191. The third organic layer 191 may be formed of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0200] The fourth organic layer 192 may be located on the third organic layer 191. The fourth organic layer 192 may cover a portion of a side surface of each of the plurality of light emitting elements LE. The fourth organic layer 192 may be located on at least a portion of the connection electrode BE that is exposed and not covered by the third organic layer 191. A top surface of each of the plurality of light emitting elements LE may be exposed and not covered by the fourth organic layer 192. The fourth organic layer 192 may be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like.

[0201] The third organic layer 191 and the fourth organic layer 192 are layers for flattening or planarizing stepped portions caused by the plurality of light emitting elements LE. When the third organic layer 191 has a height covering most of the side surfaces of the plurality of light emitting elements LE, the fourth organic layer 192 may be omitted.

[0202] The common electrode CE may be located on the top surface of each of the plurality of light emitting elements LE and the top surface of the fourth organic layer 192. The common electrode CE may be a common layer formed for the first sub-pixel SPX1, the second sub-pixel SPX2, and the third sub-pixel SPX3. The common electrode CE may be made of a transparent conductive material (TCO) such as indium tin oxide (ITO) and indium zinc oxide (IZO) capable of transmitting light.

[0203] Meanwhile, the pixel electrodes PXE1 , PXE2 , and PXE3 may be referred to as anode electrodes or first electrodes, and the common electrode CE may be referred to as cathode electrode or second electrode.

[0204] The first capping layer CAP1 may be located on the common electrode CE. The first capping layer CAP1 may be formed of an inorganic layer (eg, a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0205] The light blocking layer BM, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be located on the first capping layer CAP1. However, the present disclosure is not limited thereto, and a third light conversion layer may be located instead of the light-transmitting layer TPL. In this case, the third light conversion layer may include a material different from that of the first light conversion layer QDL1 and the second light conversion layer QDL2. For example, the first light conversion layer QDL1 may include quantum dots that convert light in a blue wavelength band into light in a red wavelength band, the second light conversion layer QDL2 may include quantum dots that convert light in a blue wavelength band into light in a green wavelength band, and the third light conversion layer may include a blue phosphor. In addition, each of the first light conversion layer QDL1, the second light conversion layer QDL2, and the third light conversion layer may include a material such as titanium dioxide (TiO 2 ) light dispersant and quantum dots. In this case, the titanium dioxide (TiO 2 ) particles may be greater than the titanium dioxide (TiO 2 ) particles or the amount of titanium dioxide (TiO 2 )The number of particles.

[0206] The first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be formed by separating the light-blocking layer BM. Therefore, the first light conversion layer QDL1 may be located on the first capping layer CAP1 in the first sub-pixel SPX1, the second light conversion layer QDL2 may be located on the first capping layer CAP1 in the second sub-pixel SPX2, and the light-transmitting layer TPL may be located on the first capping layer CAP1 in the third sub-pixel SPX3. The light-blocking layer BM may overlap with the dam 190 in the third direction DR3, and may not overlap with the plurality of light-emitting elements LE.

[0207] The first light conversion layer QDL1 may convert a portion of the third light (light in the blue wavelength band) emitted from the light emitting element LE into the first light (light in the red wavelength band). The first light conversion layer QDL1 may include a first base resin BRS1 and first wavelength conversion particles WCP1. The first base resin BRS1 may include a light-transmitting organic material. For example, the first base resin BRS1 may contain epoxy resin, acrylic resin, cardo resin, or imide resin. The first wavelength conversion particles WCP1 may convert a portion of the third light (light in the blue wavelength band) emitted from the light emitting element LE into the first light (light in the red wavelength band). The first wavelength conversion particles WCP1 may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials. The first light conversion layer QDL1 may also include a material such as titanium dioxide (TiO 2 ) light dispersant.

[0208] The second light conversion layer QDL2 may convert a portion of the third light (light in the blue wavelength band) emitted from the light emitting element LE into a second light (light in the green wavelength band). The second light conversion layer QDL2 may include a second base resin BRS2 and second wavelength conversion particles WCP2. The second base resin BRS2 may include a light-transmitting organic material. For example, the second base resin BRS2 may include an epoxy resin, an acrylic resin, a cardo resin, or an imide resin. The second wavelength conversion particles WCP2 may convert a portion of the third light (light in the blue wavelength band) emitted from the light emitting element LE into a second light (light in the green wavelength band). The second wavelength conversion particles WCP2 may be quantum dots (QD), quantum rods, fluorescent materials, or phosphorescent materials. The second light conversion layer QDL2 may also include materials such as titanium dioxide (TiO 2 ) light dispersant.

[0209] The light-transmitting layer TPL may include a light-transmitting organic material. For example, the light-transmitting layer TPL may include epoxy resin, acrylic resin, cardo resin, imide resin, or the like.

[0210] The light blocking layer BM may include a first light blocking layer BM1 and a second light blocking layer BM2 stacked in sequence. The length of the first light blocking layer BM1 in the first direction DR1 or the length of the first light blocking layer BM1 in the second direction DR2 may be longer than the length of the second light blocking layer BM2 in the first direction DR1 or the length of the second light blocking layer BM2 in the second direction DR2. The length (e.g., thickness or height) of the first light blocking layer BM1 in the third direction DR3 may be greater than the length (e.g., thickness or height) of the second light blocking layer BM2 in the third direction DR3. The first light blocking layer BM1 and the second light blocking layer BM2 may be formed of an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, etc. For example, the first light blocking layer BM1 and the second light blocking layer BM2 may contain an organic black pigment or an inorganic black pigment such as carbon black.

[0211] The second capping layer CAP2 may be located on the first capping layer CAP1 and the light blocking layer BM. The second capping layer CAP2 may be located on the side surface and the top surface of the light blocking layer BM. That is, the second capping layer CAP2 may be located on the side surface of the first light blocking layer BM1 and the side surface and the top surface of the second light blocking layer BM2. The second capping layer CAP2 is used to protect the first wavelength conversion particles WCP1 of the first light conversion layer QDL1 and the second wavelength conversion particles WCP2 of the second light conversion layer QDL2 from moisture penetration, and therefore may surround the upper portion, the lower portion and (multiple) side surfaces of the first light conversion layer QDL1 and the second light conversion layer QDL2.

[0212] The reflective layer RF may be located between the light blocking layer BM and the first light conversion layer QDL1, between the light blocking layer BM and the second light conversion layer QDL2, and between the light blocking layer BM and the light-transmitting layer TPL. The reflective layer RF may be located on the second capping layer CAP2 positioned on the side surface of the first light blocking layer BM1 and the side surface of the second light blocking layer BM2. The reflective layer RF is used to reflect light traveling in a lateral direction from the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL.

[0213] The reflective layer RF may include a metal material having high reflectivity such as aluminum (Al). The thickness of the reflective layer RF may be about 0.1 μm.

[0214] Optionally, the reflective layer RF may include M (M is an integer of 2 or more) pairs of first and second layers having different refractive indices to serve as a distributed Bragg reflector (DBR). In this case, the M first layers and the M second layers may be arranged alternately. The first and second layers may be formed of an inorganic layer (e.g., a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer).

[0215] The third capping layer CAP3 may be located on the second capping layer CAP2, the first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL. The third capping layer CAP3 may be formed of an inorganic layer (e.g., a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer). The first light conversion layer QDL1, the second light conversion layer QDL2, and the light-transmitting layer TPL may be encapsulated by the first capping layer CAP1, the second capping layer CAP2, and the third capping layer CAP3. The refractive index of the third capping layer CAP3 may be lower than the refractive index of the second capping layer CAP2. In addition, the refractive index of the third capping layer CAP3 may be lower than the refractive index of the fifth organic layer 193.

[0216] The fifth organic layer 193 may be positioned on the third capping layer CAP3. The fifth organic layer 193 may be formed of acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0217] A plurality of color filters CF1, CF2, and CF3 may be located on the fifth organic layer 193. The plurality of color filters CF1, CF2, and CF3 may include a first color filter CF1, a second color filter CF2, and a third color filter CF3. However, the present disclosure is not limited thereto, and if the light emitting element LE of the first subpixel SPX1 emits light of a first color, if the light emitting element LE of the second subpixel SPX2 emits light of a second color, and if the light emitting element LE of the third subpixel SPX3 emits light of a third color, the first light conversion layer QDL1, the second light conversion layer QDL2, the light transmitting layer TPL, and the light blocking layer BM may be omitted, the fifth organic layer 193 may be located on the common electrode CE, and the plurality of color filters CF1, CF2, and CF3 may be located on the fifth organic layer 193, or the plurality of color filters CF1, CF2, and CF3 may be omitted.

[0218] The first color filter CF1 located in the first sub-pixel SPX1 can transmit the first light (light in the red wavelength band), and can absorb or block the third light (light in the blue wavelength band). Therefore, the first color filter CF1 can transmit the first light (light in the red wavelength band) converted by the first light conversion layer QDL1 among the third light (light in the blue wavelength band) emitted from the light emitting element LE, and can absorb or block the third light (light in the blue wavelength band) not converted by the first light conversion layer QDL1. Therefore, the first sub-pixel SPX1 can emit the first light (light in the red wavelength band).

[0219] The second color filter CF2 located in the second sub-pixel SPX2 can transmit the second light (light in the green wavelength band), and can absorb or block the third light (light in the blue wavelength band). Therefore, the second color filter CF2 can transmit the second light (light in the green wavelength band) converted by the second light conversion layer QDL2 among the third light (light in the blue wavelength band) emitted by the light emitting element LE, and can absorb or block the third light (light in the blue wavelength band) not converted by the second light conversion layer QDL2. Therefore, the second sub-pixel SPX2 can emit the second light (light in the green wavelength band).

[0220] The third color filter CF3 located in the third subpixel SPX3 can transmit the third light (light in the blue wavelength band). Therefore, the third color filter CF3 can transmit the third light (light in the blue wavelength band) emitted from the light emitting element LE and passing through the light-transmitting layer TPL. Therefore, the third subpixel SPX3 can emit the third light (light in the blue wavelength band).

[0221] Each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 is used to block external light incident from the outside. For example, the first color filter CF1 located in the first subpixel SPX1 blocks the second light as light in the green wavelength band and the third light as light in the blue wavelength band incident from the outside, so that the purity (color purity) of the color corresponding to the first light as light in the red wavelength band can be improved.

[0222] The first, second, and third color filters CF1, CF2, and CF3 overlapped in the third direction DR3 may overlap the bank 190 and the light blocking layer BM in the third direction DR3.

[0223] A sixth organic layer 194 for planarization may be positioned on the plurality of color filters CF1, CF2, and CF3. The sixth organic layer 194 may be formed of acrylic resin, epoxy resin, phenol resin, polyamide resin, polyimide resin, or the like.

[0224] refer to Figure 7 and Figure 8 , the organic layer 210 is located on the first pixel electrode PXE1, the second pixel electrode PXE2, and the third pixel electrode PXE3, and the contact electrode CTE of the light emitting element LE is connected to the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3 using the connecting electrode BE. Therefore, during the process of transferring the plurality of light emitting elements LE to the display panel 100, the organic layer 210 can reduce or prevent the possibility of the plurality of light emitting elements LE being tilted or falling. In addition, despite the presence of the organic layer 210, the contact electrode CTE of the light emitting element LE can be electrically connected to the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3.

[0225] In addition, the contact electrode CTE is located on the passivation layer INS positioned on the side surface of the first semiconductor layer SEM1, so that the contact area between the contact electrode CTE and the connection electrode BE can be increased. Therefore, the contact resistance between the contact electrode CTE and the connection electrode BE can be reduced, and the contact electrode CTE and the connection electrode BE can be connected more stably.

[0226] In addition, the side surface of the contact electrode CTE and the side surface of the organic layer 210 are aligned so that a stepped portion may not be formed at the interface between the contact electrode CTE and the organic layer 210 .

[0227] Fig. 9 It is shown Figure 7 A cross-sectional view of another example of region A.

[0228] Corresponds to Fig. 9 One or more embodiments corresponding to Figure 8 The difference between one or more embodiments of the present invention is that the side surface of the contact electrode CTE protrudes more than the side surface of the organic layer 210, and ... Fig. 9 In one or more embodiments of the present invention, the Figure 8 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0229] refer to Fig. 9 , the side surface of the contact electrode CTE protrudes more (e.g., protrudes outward) than the side surface of the organic layer 210, so that a portion of the bottom surface of the contact electrode CTE may be exposed. Therefore, the connection electrode BE may be located on the side surface of the organic layer 210 and a portion of the side surface and bottom surface of the contact electrode CTE.

[0230] According to the corresponding Fig. 9 In one or more embodiments, the connection electrode BE also contacts a portion of the bottom surface of the contact electrode CTE, and the contact area between the contact electrode CTE and the connection electrode BE can be increased. Therefore, the contact resistance between the contact electrode CTE and the connection electrode BE can be reduced, and the contact electrode CTE and the connection electrode BE can be connected more stably.

[0231] The width of the organic layer 210 may be the same as the width of the bottom surface of the light emitting element LE, but the present disclosure is not limited thereto. For example, the width of the organic layer 210 may be smaller than the width of the bottom surface of the light emitting element LE. In contrast, the width of the contact electrode CTE may be greater than the width of the bottom surface of the light emitting element LE. At the same time, the width of the organic layer 210 may be defined as the length of the organic layer 210 in the first direction DR1 or the length in the second direction DR2. The width of the bottom surface of the light emitting element LE may be defined as the length of the bottom surface of the light emitting element LE in the first direction DR1 or the length in the second direction DR2. The width of the contact electrode CTE may be defined as the length of the contact electrode CTE in the first direction DR1 or the length in the second direction DR2.

[0232] Fig.10 It is shown Figure 7 A cross-sectional view of yet another example of region A.

[0233] Corresponds to Fig.10 One or more embodiments corresponding to Figure 8 The difference between one or more embodiments of the present invention is that the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, and ... Fig.10 In one or more embodiments of the present invention, the Figure 8 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0234] refer to Fig.10 , the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the contact electrode CTE. Therefore, the connection electrode BE may be located on a portion of the side surface and the top surface of the organic layer 210 and the side surface of the contact electrode CTE. In addition, the width of the contact electrode CTE may be greater than the width of the bottom surface of the light emitting element LE, and the width of the organic layer 210 may be greater than the width of the contact electrode CTE.

[0235] Fig.11 It is shown along Figure 6 1 is a cross-sectional view of the display panel taken along line I1-I1'. Fig.12 It is shown Fig.11 An example cross-sectional view of region B.

[0236] Corresponds to Fig.11 and Fig.12 One or more embodiments corresponding to Figure 7 and Figure 8 One or more embodiments of the present invention differ in that the contact electrode CTE is not located on the passivation layer INS located on the side surface of the first semiconductor layer SEM1. Fig.11 and Fig.12 In the implementation method of Figure 7 and Figure 8 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0237] According to the corresponding Fig.11 and Fig.12 According to one or more embodiments of the present invention, the side surface of the contact electrode CTE may be aligned with the side surface of the organic layer 210. Therefore, the side surface of the contact electrode CTE, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be connected to be flat. Therefore, the possibility of disconnection of the connection electrode BE on the side surface of the contact electrode CTE, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be reduced or prevented.

[0238] In addition, the side surface of the contact electrode CTE and the side surface of the organic layer 210 are aligned so that a stepped portion may not be formed at the interface between the contact electrode CTE and the organic layer 210 .

[0239] Fig.13 It is shown Fig.11 A cross-sectional view of another example of region B.

[0240] Corresponds to Fig.13 One or more embodiments corresponding to Fig.12 The difference between one or more embodiments of the present invention is that the side surface of the contact electrode CTE protrudes more than the side surface of the organic layer 210, and ... Fig.13 In one or more embodiments of the present invention, the Fig.12 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0241] refer to Fig.13 The side surface of the contact electrode CTE protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the contact electrode CTE may be exposed. Therefore, the connection electrode BE may be located on the side surface of the organic layer 210 and a portion of the side surface and bottom surface of the contact electrode CTE.

[0242] The width of the organic layer 210 may be smaller than the width of the bottom surface of the light emitting element LE, but the present disclosure is not limited thereto. For example, the width of the organic layer 210 may be the same as the width of the bottom surface of the light emitting element LE. On the contrary, the width of the contact electrode CTE may be greater than the width of the bottom surface of the light emitting element LE.

[0243] According to the corresponding Fig.13In one or more embodiments, the connection electrode BE also contacts a portion of the bottom surface of the contact electrode CTE, so that the contact area between the contact electrode CTE and the connection electrode BE can be increased. Therefore, the contact resistance between the contact electrode CTE and the connection electrode BE can be reduced, and the contact electrode CTE and the connection electrode BE can be connected more stably. In addition, the width of the contact electrode CTE can be greater than the width of the bottom surface of the light emitting element LE, and the width of the organic layer 210 can be greater than the width of the contact electrode CTE.

[0244] Fig.14 It is shown Fig.11 A cross-sectional view of yet another example of region B.

[0245] Corresponds to Fig.14 One or more embodiments corresponding to Fig.12 The difference between one or more embodiments of the present invention is that the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, and ... Fig.14 In one or more embodiments of the present invention, the Fig.12 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0246] refer to Fig.14 , the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the contact electrode CTE. Therefore, the connection electrode BE may be located on a portion of the side surface and the top surface of the organic layer 210 and the side surface of the contact electrode CTE.

[0247] Fig.15 It is shown along Figure 6 1 is a cross-sectional view of the display panel taken along line I1-I1'. Fig.16 It is shown Fig.15 An example cross-sectional view of region C.

[0248] Corresponds to Fig.15 and Fig.16 One or more embodiments corresponding to Figure 7 and Figure 8 One or more embodiments of the present invention differ in that the contact electrode CTE is located on a portion of the bottom surface of the first semiconductor layer SEM1. Fig.15 and Fig.16 In the implementation method of Figure 7 and Figure 8 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0249] According to the corresponding Fig.15 and Fig.16In one or more embodiments, the contact electrode CTE is located on a portion of the bottom surface of the first semiconductor layer SEM1, so that the length of the contact electrode CTE in the first direction DR1 (or the length in the second direction DR2) is less than the length of the bottom surface of the first semiconductor layer SEM1 in the first direction DR1 (or the length in the second direction DR2). The contact electrode CTE is not located on the passivation layer INS positioned on the side surface of the first semiconductor layer SEM1.

[0250] The edge of the top surface of the organic layer 210 may be exposed without being covered by the contact electrode CTE, so that the connection electrode BE may be located on the edge of the top surface of the organic layer 210. In addition, the connection electrode BE may be located on at least a portion of the bottom surface of the first semiconductor layer SEM1 and the bottom surface of the passivation layer INS.

[0251] In addition, the width of the organic layer 210 may be greater than the width of the contact electrode CTE. The width of the bottom surface of the first semiconductor layer SEM1 may be greater than the width of the contact electrode CTE.

[0252] Fig.17 It is shown Fig.15 A cross-sectional view of another example of region C of FIG.

[0253] Corresponds to Fig.17 One or more embodiments corresponding to Fig.16 The difference between one or more embodiments of the present invention is that the side surface of the contact electrode CTE protrudes more than the side surface of the organic layer 210, and ... Fig.17 In one or more embodiments of the present invention, the Fig.16 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0254] refer to Fig.17 The side surface of the contact electrode CTE protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the contact electrode CTE may be exposed. Therefore, the connection electrode BE may be located on the side surface of the organic layer 210 and a portion of the side surface and bottom surface of the contact electrode CTE.

[0255] According to the corresponding Fig.17 In one or more embodiments, the connection electrode BE also contacts a portion of the bottom surface of the contact electrode CTE, so that the contact area between the contact electrode CTE and the connection electrode BE can be increased. Therefore, the contact resistance between the contact electrode CTE and the connection electrode BE can be reduced, and the contact electrode CTE and the connection electrode BE can be connected more stably.

[0256] In addition, the width of the organic layer 210 may be smaller than the width of the contact electrode CTE. The width of the bottom surface of the light emitting element LE may be larger than the width of the contact electrode CTE.

[0257] Fig.18 It is shown Fig.15 A cross-sectional view of yet another example of region C.

[0258] Corresponds to Fig.18 One or more embodiments corresponding to Fig.16 The difference between one or more embodiments of the present invention is that the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, and ... Fig.18 In one or more embodiments of the present invention, the Fig.16 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0259] refer to Fig.18 , the side surface of the organic layer 210 protrudes more than the side surface of the contact electrode CTE, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the contact electrode CTE. Therefore, the connection electrode BE may be located on a portion of the side surface and the top surface of the organic layer 210 and the side surface of the contact electrode CTE.

[0260] In addition, the width of the organic layer 210 may be greater than the width of the contact electrode CTE. The width of the bottom surface of the light emitting element LE may be greater than the width of the contact electrode CTE. The width of the organic layer 210 may be greater than the width of the bottom surface of the light emitting element LE.

[0261] Fig.19 is a diagram showing a layout of pixels of a display area according to one or more embodiments.

[0262] Corresponds to Fig.19 One or more embodiments corresponding to Figure 6 The difference between one or more embodiments of the present invention is that the first sub-pixel SPX1 further includes a first common electrode CE1 (eg, see Fig. 20 ), the second sub-pixel SPX2 further includes a second common electrode CE2 (eg, see Fig. 20 ), and the third sub-pixel SPX3 further includes a third common electrode CE3 (eg, see Fig. 20 ). Fig.19 In one or more embodiments of the present invention, the Figure 6 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0263] refer to Fig.19Each of the first pixel electrode PXE1, the second pixel electrode PXE2, the third pixel electrode PXE3, the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 may have a rectangular planar shape. The area of ​​the first sub-pixel SPX1, the area of ​​the second sub-pixel SPX2, and the area of ​​the third sub-pixel SPX3 may be set according to the light conversion efficiency of the first light conversion layer QDL1 and the light conversion efficiency of the second light conversion layer QDL2.

[0264] For example, Fig.19 As shown in , the area of ​​the second pixel electrode PXE2 may be greater than the area of ​​the first pixel electrode PXE1, and the area of ​​the first pixel electrode PXE1 may be greater than the area of ​​the third pixel electrode PXE3. In addition, the area of ​​the second common electrode CE2 may be greater than the area of ​​the first common electrode CE1, and the area of ​​the first common electrode CE1 may be greater than the area of ​​the third common electrode CE3.

[0265] The first pixel electrode PXE1 may have the same area as the first common electrode CE1 , the second pixel electrode PXE2 may have the same area as the second common electrode CE2 , and the third pixel electrode PXE3 may have the same area as the third common electrode CE3 , but the present disclosure is not limited thereto.

[0266] In the first subpixel SPX1, the first pixel electrode PXE1 and the first common electrode CE1 may be arranged to be spaced apart from each other in the second direction DR2. In the second subpixel SPX2, the second pixel electrode PXE2 and the second common electrode CE2 may be arranged to be spaced apart from each other in the second direction DR2. In the third subpixel SPX3, the third pixel electrode PXE3 and the third common electrode CE3 may be arranged to be spaced apart from each other in the second direction DR2.

[0267] The first pixel electrode PXE1 may be electrically connected to the fourth transistor ST4 of the first sub-pixel SPX1 through the first connection hole CT1 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5 The second pixel electrode PXE2 may be electrically connected to the fourth transistor ST4 of the second sub-pixel SPX2 through the second connection hole CT2 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5 ). The third pixel electrode PXE3 may be electrically connected to the fourth transistor ST4 of the third sub-pixel SPX3 through the third connection hole CT3 (see Figure 4 and Figure 5 ) and is electrically connected to its sixth transistor ST6 (see Figure 4 and Figure 5 )'s second electrode.

[0268] The first common electrode CE1 may be connected to the second power line VSL through the fourth connection hole CT4, and the second driving voltage VSS is applied to the second power line VSL. The second common electrode CE2 may be connected to the second power line VSL through the fifth connection hole CT5. The third common electrode CE3 may be connected to the second power line VSL through the sixth connection hole CT6. Therefore, the second driving voltage VSS may be applied to the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3.

[0269] Fig. 20 It is shown along Fig.19 A cross-sectional view of the display panel taken along line I2-I2'. Fig.21 It is shown Fig. 20 An example cross-sectional view of region D of FIG.

[0270] Corresponds to Fig. 20 and Fig.21 One or more embodiments corresponding to Figure 7 and Figure 8 One or more embodiments of the present invention are different in that the light emitting element LE is a flip-type micro-LED. Fig. 20 and Fig.21 In the implementation method of Figure 7 and Figure 8 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0271] refer to Fig. 20 and Fig.21 , the light emitting element LE may be a flip-type micro LED. The flip-type micro LED refers to an LED in which the contact electrodes CTE1 and CTE2 are formed on one surface (eg, the bottom surface) of the light emitting element LE.

[0272] A pixel electrode layer PXL including pixel electrodes PXE1, PXE2, and PXE3 and common electrodes CE1, CE2, and CE3 may be located on the second organic layer 180. A bank 190 may not be located on at least one edge of each of the pixel electrodes PXE1, PXE2, and PXE3 and at least one edge of each of the common electrodes CE1, CE2, and CE3.

[0273] For example, the bank 190 may not be located on one edge of the first pixel electrode PXE1 and one edge of the first common electrode CE1 facing each other. The bank 190 may be located on edges other than the one edge of the first pixel electrode PXE1 and on edges other than the one edge of the first common electrode CE1.

[0274] In addition, the bank 190 may not be located on one edge of the second pixel electrode PXE2 and one edge of the second common electrode CE2 facing each other. The bank 190 may be located on other edges of the second pixel electrode PXE2 except the one edge, and on other edges of the second common electrode CE2 except the one edge.

[0275] In addition, the bank 190 may not be located on one edge of the third pixel electrode PXE3 and one edge of the third common electrode CE3 facing each other. The bank 190 may be located on other edges of the third pixel electrode PXE3 except the one edge, and on other edges of the third common electrode CE3 except the one edge.

[0276] The light emitting element LE includes a first portion LEP1, a second portion LEP2, and a third portion LEP3. The first portion LEP1 and the second portion LEP2 may be spaced apart from each other. The third portion LEP3 may be connected to the first portion LEP1 and the second portion LEP2. The third portion LEP3 may be located on the first portion LEP1 and the second portion LEP2.

[0277] The first portion LEP1 includes a first contact electrode CTE1, a first semiconductor layer SEM1, an active layer MQW, a second semiconductor layer SEM2 and a passivation layer INS. The second portion LEP2 includes a second contact electrode CTE2, a second semiconductor layer SEM2 and a passivation layer INS, and the third portion LEP3 includes a second semiconductor layer SEM2 and a passivation layer INS.

[0278] The first semiconductor layer SEM1 may be located on the first contact electrode CTE1 , the active layer MQW may be located on the first semiconductor layer SEM1 , and the second semiconductor layer SEM2 may be located on the active layer MQW.

[0279] The second semiconductor layer SEM2 of the third portion LEP3 may be connected to the second semiconductor layers SEM2 of the first and second portions LEP1 and 2. The second semiconductor layers SEM2 of the first, second and third portions LEP1 and LEP3 may be integrally formed.

[0280] The first contact electrode CTE1 may be located on at least a portion of the outer surface and the bottom surface of the first semiconductor layer SEM1. The second contact electrode CTE2 may be located on at least a portion of the outer surface and the bottom surface of the second semiconductor layer SEM2 of the second portion LEP2. The first contact electrode CTE1 and the second contact electrode CTE2 may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0281] The passivation layer INS may define the outer surface of the first portion LEP1, the outer surface of the second portion LEP2, and the side surface of the third portion LEP3. For example, the passivation layer INS may be located on the outer surface of the first semiconductor layer SEM1 in the first portion LEP1, the outer surface of the active layer MQW, and the outer surface of the second semiconductor layer SEM2. In addition, the passivation layer INS may be located on the outer surface of the second semiconductor layer SEM2 in the second portion LEP2. In addition, the passivation layer INS may be located on the side surface of the second semiconductor layer SEM2 in the third portion LEP3.

[0282] The organic layer 210 may be located on the bottom surface of the first contact electrode CTE1 and the bottom surface of the second contact electrode CTE2 and may be located between the first contact electrode CTE1 and the second contact electrode CTE2. In addition, the organic layer 210 may be located between the first semiconductor layer SEM1 of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2.

[0283] although Fig.21 It is shown that the empty space ES is located between the active layer MQW of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2 and between the second semiconductor layer SEM2 of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2, and the organic layer 210 may also be located between the active layer MQW of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2. Alternatively, the organic layer 210 may be located between the active layer MQW of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2 and between the second semiconductor layer SEM2 of the first portion LEP1 and the second semiconductor layer SEM2 of the second portion LEP2.

[0284] The first connection electrode BE1 connects the first contact electrode CTE1 to the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3. The first connection electrode BE1 may be located on the top surface of the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3 that is exposed and not covered by the organic layer 210. In addition, the first connection electrode BE1 may be located on the side surface of the organic layer 210 and the side surface of the first contact electrode CTE1. In addition, the first connection electrode BE1 may be located on a portion of the outer surface of the first portion LEP1 and the side surface of the third portion LEP3 of the light emitting element LE. The first connection electrode BE1 may be located on a portion of the passivation layer INS of the light emitting element LE.

[0285] The second connection electrode BE2 connects the second contact electrode CTE2 to a corresponding one of the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3. The second connection electrode BE2 may be located on a top surface of a corresponding one of the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3 that is exposed and not covered by the organic layer 210. In addition, the second connection electrode BE2 may be located on a side surface of the organic layer 210 and a side surface of the second contact electrode CTE2. In addition, the second connection electrode BE2 may be located on an outer surface of the second portion LEP2 and on a portion of a side surface of the third portion LEP3 of the light emitting element LE. The second connection electrode BE2 may be located on a portion of the passivation layer INS of the light emitting element LE.

[0286] Each of the first connection electrode BE1 and the second connection electrode BE2 may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, each of the first connection electrode BE1 and the second connection electrode BE2 may be made of a transparent conductive material (TCO) capable of transmitting light, such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0287] When each of the first connection electrode BE1 and the second connection electrode BE2 is made of a metal material such as aluminum (Al) having high reflectivity, light emitted from the active layer MQW of the light emitting element LE, which travels in a lateral direction of the light emitting element LE, can be reflected from the connection electrode BE and travel in an upward direction of the light emitting element LE. Therefore, the loss of light from the light emitting element LE can be reduced, which makes it possible to increase the light efficiency of the light emitting element LE.

[0288] refer to Fig. 20 and Fig.21, the organic layer 210 is located on the first pixel electrode PXE1, the second pixel electrode PXE2, the third pixel electrode PXE3, the first common electrode CE1, the second common electrode CE2, and the third common electrode CE3. In addition, the first contact electrode CTE1 of the light emitting element LE is connected to the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3 using the first connection electrode BE1. In addition, the second contact electrode CTE2 of the light emitting element LE is connected to the first common electrode CE1, the second common electrode CE2, or the third common electrode CE3 using the second connection electrode BE2. Therefore, in the process of transferring the plurality of light emitting elements LE to the display panel 100, the organic layer 210 can reduce or prevent the possibility of the plurality of light emitting elements LE tilting or falling. In addition, despite the presence of the organic layer 210, the first contact electrode CTE1 of the light emitting element LE can be electrically connected to the first pixel electrode PXE1, the second pixel electrode PXE2, or the third pixel electrode PXE3. In addition, despite the presence of the organic layer 210 , the second contact electrode CTE2 of the light emitting element LE may be electrically connected to the first common electrode CE1 , the second common electrode CE2 , or the third common electrode CE3 .

[0289] In addition, the first contact electrode CTE1 is located on the passivation layer INS defining the outer surface of the first portion LEP1 of the light emitting element LE. Therefore, the contact area between the first contact electrode CTE1 and the first connection electrode BE1 can be increased. Therefore, the contact resistance between the first contact electrode CTE1 and the first connection electrode BE1 can be reduced, and the first contact electrode CTE1 and the first connection electrode BE1 can be connected more stably.

[0290] In addition, the second contact electrode CTE2 is located on the passivation layer INS defining the outer surface of the second portion LEP2 of the light emitting element LE. Therefore, the contact area between the second contact electrode CTE2 and the second connection electrode BE2 can be increased. Therefore, the contact resistance between the second contact electrode CTE2 and the second connection electrode BE2 can be reduced, and the second contact electrode CTE2 and the second connection electrode BE2 can be connected more stably.

[0291] Fig. 22 It is shown Fig. 20 A cross-sectional view of another example of region D of FIG.

[0292] Corresponds to Fig. 22 One or more embodiments corresponding to Fig.21 One or more embodiments of the present invention are different in that an outer surface of the first contact electrode CTE1 protrudes more than a side surface of the organic layer 210, and an outer surface of the second contact electrode CTE2 protrudes more than a side surface of the organic layer 210, and in the case corresponding to Fig. 22In one or more embodiments of the present invention, the Fig.21 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0293] refer to Fig. 22 The outer surface of the first contact electrode CTE1 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the first contact electrode CTE1 may be exposed. Therefore, the first connection electrode BE1 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the first contact electrode CTE1.

[0294] In addition, the outer surface of the second contact electrode CTE2 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the second contact electrode CTE2 may be exposed. Therefore, the second connection electrode BE2 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the second contact electrode CTE2.

[0295] According to the corresponding Fig. 22 In one or more embodiments, the first connection electrode BE1 also contacts a portion of the bottom surface of the first contact electrode CTE1, so that the contact area between the first contact electrode CTE1 and the first connection electrode BE1 can be increased. Therefore, the contact resistance between the first contact electrode CTE1 and the first connection electrode BE1 can be reduced, and the first contact electrode CTE1 and the first connection electrode BE1 can be connected more stably.

[0296] In addition, the second connection electrode BE2 also contacts a portion of the bottom surface of the second contact electrode CTE2, so that the contact area between the second contact electrode CTE2 and the second connection electrode BE2 can be increased. Therefore, the contact resistance between the second contact electrode CTE2 and the second connection electrode BE2 can be reduced, and the second contact electrode CTE2 and the second connection electrode BE2 can be connected more stably.

[0297] Fig.23 It is shown Fig. 20 A cross-sectional view of yet another example of region D.

[0298] Corresponds to Fig.23 One or more embodiments corresponding to Fig. 22 One or more embodiments of the present invention are different in that the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, and corresponds to Fig.23 In one or more embodiments of the present invention, the Fig. 22 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0299] refer to Fig.23 , the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the first contact electrode CTE1 and the second contact electrode CTE2. Therefore, the first connection electrode BE1 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the first contact electrode CTE1. In addition, the second connection electrode BE2 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the second contact electrode CTE2.

[0300] Fig.24 It is shown along Fig.19 A cross-sectional view of the display panel taken along line I2-I2'. Fig.25 It is shown Fig.24 An example cross-sectional view of region E.

[0301] Corresponds to Fig.24 and Fig.25 One or more embodiments corresponding to Fig.21 and Fig. 22 One or more embodiments of the present invention differ in that the first contact electrode CTE1 is not located on the passivation layer INS defining the outer surface of the first portion LEP1 of the light emitting element LE, and the second contact electrode CTE2 is not located on the passivation layer INS defining the outer surface of the second portion LEP2 of the light emitting element LE. Fig.24 and Fig.25 In one or more embodiments of the present invention, the Fig.21 and Fig. 22 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0302] According to the corresponding Fig.24 and Fig.25 In one or more embodiments, the outer surface of the first contact electrode CTE1 may be aligned with the side surface of the organic layer 210. Therefore, the outer surface of the first contact electrode CTE1, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be connected to be flat. Therefore, the possibility of the first connection electrode BE1 being disconnected on the outer surface of the first contact electrode CTE1, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be reduced or prevented.

[0303] In addition, the outer surface of the second contact electrode CTE2 may be aligned with the side surface of the organic layer 210. Therefore, the outer surface of the second contact electrode CTE2, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be connected to be flat. Therefore, the possibility of disconnection of the second connection electrode BE2 on the outer surface of the second contact electrode CTE2, the side surface of the organic layer 210, and one surface (e.g., the outer surface) of the passivation layer INS may be reduced or prevented.

[0304] Fig.26 It is shown Fig.24 A cross-sectional view of yet another example of region E.

[0305] Corresponds to Fig.26 One or more embodiments corresponding to Fig.25 One or more embodiments of the present invention are different in that an outer surface of the first contact electrode CTE1 protrudes more than a side surface of the organic layer 210, and an outer surface of the second contact electrode CTE2 protrudes more than a side surface of the organic layer 210, and in the case corresponding to Fig.26 In one or more embodiments of the present invention, the Fig.25 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0306] refer to Fig.26 The outer surface of the first contact electrode CTE1 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the first contact electrode CTE1 may be exposed. Therefore, the first connection electrode BE1 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the first contact electrode CTE1.

[0307] In addition, the outer surface of the second contact electrode CTE2 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the second contact electrode CTE2 may be exposed. Therefore, the second connection electrode BE2 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the second contact electrode CTE2.

[0308] According to the corresponding Fig.26 In one or more embodiments, the first connection electrode BE1 also contacts a portion of the bottom surface of the first contact electrode CTE1, so that the contact area between the first contact electrode CTE1 and the first connection electrode BE1 can be increased. Therefore, the contact resistance between the first contact electrode CTE1 and the first connection electrode BE1 can be reduced, and the first contact electrode CTE1 and the first connection electrode BE1 can be connected more stably.

[0309] In addition, the second connection electrode BE2 also contacts a portion of the bottom surface of the second contact electrode CTE2, so that the contact area between the second contact electrode CTE2 and the second connection electrode BE2 can be increased. Therefore, the contact resistance between the second contact electrode CTE2 and the second connection electrode BE2 can be reduced, and the second contact electrode CTE2 and the second connection electrode BE2 can be connected more stably.

[0310] Fig. 27 It is shown Fig.24 A cross-sectional view of yet another example of region E.

[0311] Corresponds to Fig. 27 One or more embodiments corresponding to Fig.25 One or more embodiments of the present invention are different in that the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, and corresponds to Fig. 27 In one or more embodiments of the present invention, the Fig.25 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0312] refer to Fig. 27 , the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the first contact electrode CTE1 and the second contact electrode CTE2. Therefore, the first connection electrode BE1 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the first contact electrode CTE1. In addition, the second connection electrode BE2 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the second contact electrode CTE2.

[0313] Fig.28 It is shown along Fig.19 A cross-sectional view of the display panel taken along line I2-I2'. Fig.29 It is shown Fig.28 An example cross-sectional view of region F.

[0314] Corresponds to Fig.28 and Fig.29 One or more embodiments corresponding to Fig. 20 and Fig.21 One or more embodiments of the present invention differ in that the contact electrode CTE is located on a portion of the bottom surface of the first semiconductor layer SEM1. Fig.28 and Fig.29 In one or more embodiments of the present invention, the Fig. 20 and Fig.21Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0315] According to the corresponding Fig.28 and Fig.29 In one or more embodiments, the first contact electrode CTE1 is located on a portion of the bottom surface of the first portion LEP1 of the light emitting element LE, such that a length of the first contact electrode CTE1 in the first direction DR1 (or a length in the second direction DR2) is smaller than a length of the bottom surface of the first portion LEP1 in the first direction DR1 (or a length in the second direction DR2). The first contact electrode CTE1 is not located on the passivation layer INS defining an outer surface of the first portion LEP1 of the light emitting element LE.

[0316] The edge of the top surface of the organic layer 210 may be exposed without being covered by the first contact electrode CTE1. Therefore, the first connection electrode BE1 may be located on the edge of the top surface of the organic layer 210 that is exposed without being covered by the first contact electrode CTE1. In addition, the first connection electrode BE1 may be located on the bottom surface of the first semiconductor layer SEM1 of the first portion LEP1 of the light emitting element LE.

[0317] Because the second contact electrode CTE2 is located on a portion of the bottom surface of the second semiconductor layer SEM2 of the second portion LEP2 of the light emitting element LE, the length of the second contact electrode CTE2 in the first direction DR1 (or the length in the second direction DR2) is smaller than the length of the bottom surface of the second semiconductor layer SEM2 of the second portion LEP2 in the first direction DR1 (or the length in the second direction DR2). The second contact electrode CTE2 is not located on the passivation layer INS defining the outer surface of the second portion LEP2 of the light emitting element LE.

[0318] The edge of the top surface of the organic layer 210 may be exposed without being covered by the second contact electrode CTE2. Therefore, the second connection electrode BE2 may be located on the edge of the top surface of the organic layer 210 that is exposed without being covered by the second contact electrode CTE2. In addition, the second connection electrode BE2 may be located on the bottom surface of the second semiconductor layer SEM2 of the second portion LEP2 of the light emitting element LE.

[0319] Fig.30 It is shown Fig.28 A cross-sectional view of yet another example of region F.

[0320] Corresponds to Fig.30 One or more embodiments corresponding to Fig.29One or more embodiments of the present invention are different in that an outer surface of the first contact electrode CTE1 protrudes more than a side surface of the organic layer 210, and an outer surface of the second contact electrode CTE2 protrudes more than a side surface of the organic layer 210, and in the case corresponding to Fig.30 In one or more embodiments of the present invention, the Fig.29 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0321] refer to Fig.30 The outer surface of the first contact electrode CTE1 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the first contact electrode CTE1 may be exposed. Therefore, the first connection electrode BE1 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the first contact electrode CTE1.

[0322] In addition, the outer surface of the second contact electrode CTE2 protrudes more than the side surface of the organic layer 210, so that a portion of the bottom surface of the second contact electrode CTE2 may be exposed. Therefore, the second connection electrode BE2 may be located on the side surface of the organic layer 210 and a portion of the outer surface and the bottom surface of the second contact electrode CTE2.

[0323] According to the corresponding Fig.30 In one or more embodiments, the first connection electrode BE1 also contacts a portion of the bottom surface of the first contact electrode CTE1, so that the contact area between the first contact electrode CTE1 and the first connection electrode BE1 can be increased. Therefore, the contact resistance between the first contact electrode CTE1 and the first connection electrode BE1 can be reduced, and the first contact electrode CTE1 and the first connection electrode BE1 can be connected more stably.

[0324] In addition, the second connection electrode BE2 also contacts a portion of the bottom surface of the second contact electrode CTE2, so that the contact area between the second contact electrode CTE2 and the second connection electrode BE2 can be increased. Therefore, the contact resistance between the second contact electrode CTE2 and the second connection electrode BE2 can be reduced, and the second contact electrode CTE2 and the second connection electrode BE2 can be connected more stably.

[0325] Fig.31 It is shown Fig.28 A cross-sectional view of yet another example of region F.

[0326] Corresponds to Fig.31 One or more embodiments corresponding to Fig.29 One or more embodiments of the present invention are different in that the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, and corresponds to Fig.31 In one or more embodiments of the present invention, the Fig.29 Redundant description of parts that have already been described in one or more embodiments of the present invention.

[0327] refer to Fig.31 , the side surface of the organic layer 210 protrudes more than the outer surface of the first contact electrode CTE1 and the outer surface of the second contact electrode CTE2, so that a portion of the top surface of the organic layer 210 may be exposed without being covered by the first contact electrode CTE1 and the second contact electrode CTE2. Therefore, the first connection electrode BE1 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the first contact electrode CTE1. In addition, the second connection electrode BE2 may be located on a portion of the side surface and the top surface of the organic layer 210 and the outer surface of the second contact electrode CTE2.

[0328] Fig.32 is a flowchart illustrating a method for manufacturing a display device according to one or more embodiments. Figures 33 to 41 is a cross-sectional view illustrating a method for manufacturing a display device according to one or more embodiments. Figures 33 to 41 Shown along Figure 6 An example of a cross section of a display panel taken along line I1 - I1 ′.

[0329] First, if Fig.33 As shown in FIG. 1 , a thin film transistor layer TFTL is formed on a substrate SUB, and pixel electrodes PXE1, PXE2, and PXE3 are formed on the thin film transistor layer TFTL using a mask MSK. Fig.32 Operation S110 in FIG.

[0330] A barrier layer BR is formed on the substrate SUB, and a first channel region CHA1 , a first source region S1 , and a first drain region D1 of the first thin film transistor TFT1 are formed on the barrier layer BR using a photolithography process.

[0331] Then, a first gate insulating layer 131 is formed on the first channel region CHA1, the first source region S1, and the first drain region D1 of the first thin film transistor TFT1. A first capacitor electrode CAE1 and a first gate electrode G1 of the first thin film transistor TFT1 are formed on the first gate insulating layer 131. The first channel region CHA1, the first source region S1, and the first drain region D1 of the first thin film transistor TFT1 may include polycrystalline silicon, single crystal silicon, low temperature polycrystalline silicon, or amorphous silicon.

[0332] Then, a second gate insulating layer 132 is formed on the first capacitor electrode CAE1 and the first gate electrode G1 of the first thin film transistor TFT1. A second capacitor electrode CAE2 is formed on the second gate insulating layer 132 using a photolithography process.

[0333] Then, a first interlayer insulating layer 141 is formed on the second capacitor electrode CAE2. A second channel region CHA2, a second source region S2, and a second drain region D2 of the second thin film transistor TFT2 are formed on the first interlayer insulating layer 141 using a photolithography process. The second channel region CHA2, the second source region S2, and the second drain region D2 of the second thin film transistor TFT2 may include an oxide semiconductor including indium (In), gallium (Ga), and oxygen (O).

[0334] Then, a third gate insulating layer 133 is formed on the second channel region CHA2, the second source region S2 and the second drain region D2 of the second thin film transistor TFT2. A second gate electrode G2 of the second thin film transistor TFT2 is formed on the third gate insulating layer 133 using a photolithography process.

[0335] Then, a second interlayer insulating layer 142 is formed on the second gate electrode G2 of the second thin film transistor TFT2. In addition, a first source contact hole PCT1 penetrating the first gate insulating layer 131, the second gate insulating layer 132, the first interlayer insulating layer 141, the third gate insulating layer 133, and the second interlayer insulating layer 142, a second source connection contact hole BCT1 penetrating the second interlayer insulating layer 142 and the third gate insulating layer 133, and a third source connection contact hole BCT2 penetrating the second interlayer insulating layer 142 and the third gate insulating layer 133 may be formed using a photolithography process. In addition, a first source connection electrode SBE3, a second source connection electrode SBE1, and a third source connection electrode SBE2 are formed on the second interlayer insulating layer 142 using a photolithography process.

[0336] Then, a first organic layer 160 is formed on the first source connection electrode SBE3, the second source connection electrode SBE1, and the third source connection electrode SBE2. A fourth source connection electrode SBE4 is formed on the first organic layer 160 using a photolithography process.

[0337] Then, a second organic layer 180 is formed on the fourth source connection electrode SBE4, and pixel electrodes PXE1, PXE2, and PXE3 are formed on the second organic layer 180 using a photolithography process. For example, after forming a pixel electrode layer covering the entire second organic layer 180 and a photoresist covering the entire pixel electrode layer, the pixel electrode layer is exposed by removing the photoresist overlapping the opening OA of the mask MSK, and then, the pixel electrodes PXE1, PXE2, and PXE3 are formed by etching the exposed pixel electrode layer. The photoresist may be removed by an ashing process.

[0338] Second, if Fig.34As shown in FIG. 1 , an adhesive layer 210_1 (or a temporary adhesive layer or a temporary fixing layer) is formed on the pixel electrodes PXE1, PXE2, and PXE3 ( Fig.32 Operation S120 in FIG.

[0339] The adhesive layer 210_1 is used to temporarily fix or adhere the plurality of light emitting elements LE to reduce or prevent the possibility of them tilting or falling during the process of transferring the plurality of light emitting elements LE to the display panel 100. To this end, the thickness of the adhesive layer 210_1 may be 2 μm or less, but the present disclosure is not limited thereto.

[0340] The adhesive layer 210_1 may be a photosensitive organic layer such as a photoresist. Alternatively, the adhesive layer 210_1 may be formed of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, or the like.

[0341] Third, if Fig.35 As shown in FIG. 2 , a plurality of light emitting elements LE are fixed to the adhesive layer 210_1, and the light emitting element substrate ESUB ( Fig.32 Operation S130 in (a).

[0342] A portion of each of the plurality of light emitting elements LE may be temporarily fixed while being embedded in the adhesive layer 210_1. For example, the contact electrode CTE and the first semiconductor layer SEM1 of each of the plurality of light emitting elements LE may be fixed while being embedded in the adhesive layer 210_1.

[0343] When the adhesive layer 210_1 is a photosensitive organic layer such as a photoresist, the adhesive layer 210_1 is cured at a first temperature, and then a portion of each of the plurality of light emitting elements LE is fixed to the adhesive layer 210_1. Then, the adhesive layer 210_1 may be completely cured at a second temperature higher than the first temperature. The first temperature may be approximately 150 degrees, and the second temperature may be approximately 250 degrees, but the present disclosure is not limited thereto.

[0344] The plurality of light emitting elements LE may be separated from the light emitting element substrate ESUB using a laser lift-off process.

[0345] Fourth, if Fig.36 As shown in FIG. 2 , a portion of the adhesive layer 210_1 is removed to form the organic layer 210 ( Fig.32 Operation S140 in FIG.

[0346] While using the light emitting element LE as a mask, a portion of the adhesive layer 210_1 is removed to form the organic layer 210. That is, the organic layer 210 may be a residue of the adhesive layer 210_1.

[0347] Since the adhesive layer 210_1 on the pixel electrodes PXE1, PXE2, and PXE3 is removed, the top surface edge and side surface of each of the pixel electrodes PXE1, PXE2, and PXE3 may be exposed. When the adhesive layer 210_1 is a photosensitive organic layer such as photoresist, it may be removed by an ashing process.

[0348] Then, as in operations S150 to S170 , a connection electrode BE is formed to connect the pixel electrodes PXE1 , PXE2 , and PXE3 and the contact electrodes CTE of the plurality of light emitting elements LE.

[0349] Fifth, if Fig.37 As shown in FIG. 1 , a first connection electrode layer BE_L1 is formed to cover the pixel electrodes PXE1, PXE2 and PXE3, the organic layer 210 and the plurality of light emitting elements LE ( Fig.32 Operation S150 in FIG.

[0350] Sixth, if Fig.38 As shown in FIG. 1 , a second connection electrode layer BE_L2 ( Fig.32 Operation S160 in .

[0351] The mask MSK may be substantially the same as the mask used to form the pixel electrodes PXE1, PXE2, and PXE3 in operation S110. After forming a photoresist covering the entire first connection electrode layer BE_L1, the first connection electrode layer BE_L1 is exposed by removing the photoresist overlapping the opening OA of the mask MSK, and then, the second connection electrode layer BE_L2 is formed by etching the exposed first connection electrode layer BE_L1. The photoresist may be removed by an ashing process.

[0352] Seventh, such as Fig.39 As shown in FIG. 1 , the bank 190 and the third organic layer 191 are sequentially formed, and the connection electrode BE ( Fig.32 Operation S170 in (a).

[0353] The bank 190 may be formed to cover an edge of each of the pixel electrodes PXE1, PXE2, and PXE3. The third organic layer 191 may cover the bank 190 and a portion of a side surface of each of the plurality of light emitting elements LE.

[0354] The second connection electrode layer BE_L2 exposed without being covered by the third organic layer 191 may be etched. Thus, the third organic layer 191 covers the connection electrode BE, but at least a portion of the connection electrode BE may be exposed without being covered by the third organic layer 191.

[0355] Eighth, such as Fig.40As shown in FIG. 1 , a fourth organic layer 192 is formed, and a common electrode CE ( Fig.32 Operation S180 in .

[0356] Ninth, such as Fig.41 As shown in FIG. 1 , a light blocking layer BM, a first light conversion layer QDL1 and a second light conversion layer QDL2, and color filters CF1, CF2, and CF3 are formed. Fig.32 Operation S190 in (a).

[0357] A first capping layer CAP1 is formed on the common electrode CE, a first light blocking layer BM1 is formed on the first capping layer CAP1, and a second light blocking layer BM2 is formed on the first light blocking layer BM1. The first light blocking layer BM1 and the second light blocking layer BM2 may overlap with the dam 190 in the third direction DR3, and may not overlap with the plurality of light emitting elements LE. The length of the first light blocking layer BM1 in the first direction DR1 or the length of the first light blocking layer BM1 in the second direction DR2 may be longer than the length of the second light blocking layer BM2 in the first direction DR1 or the length of the second light blocking layer BM2 in the second direction DR2.

[0358] Then, the second capping layer CAP2 is formed on the first capping layer CAP1 and the light blocking layer BM, and the reflective layer RF is formed on side surfaces of the first light blocking layer BM1 and the second light blocking layer BM2.

[0359] Then, in the area separated by the first light blocking layer BM1 and the second light blocking layer BM2, a first light conversion layer QDL1 is formed in the area corresponding to the first subpixel SPX1, a second light conversion layer QDL2 is formed in the area corresponding to the second subpixel SPX2, and a light transmitting layer TPL is formed in the area corresponding to the third subpixel SPX3.

[0360] Then, a third capping layer CAP3 is formed on the second capping layer CAP2 , the first light conversion layer QDL1 , the second light conversion layer QDL2 , and the light transmitting layer TPL, and a fifth organic layer 193 is formed on the third capping layer CAP3 .

[0361] Then, a plurality of color filters CF1 , CF2 , and CF3 are formed on the fifth organic layer 193 , and a sixth organic layer 194 is formed on the plurality of color filters CF1 , CF2 , and CF3 .

[0362] although Figures 32 to 41 It is mainly shown that each of the plurality of light emitting elements LE is a vertical micro LED, but each of the light emitting elements LE may be Figures 20 to 31 The flip-type micro-LED shown in .

[0363] like Figures 32 to 41 As shown in FIG, an adhesive layer 210_1 (or a temporary adhesive layer or a temporary fixing layer) is formed on the pixel electrodes PXE1, PXE2, and PXE3, and after a portion of each of the plurality of light emitting elements LE is embedded in the adhesive layer 210_1, the adhesive layer 210_1 is completely cured, thereby fixing the plurality of light emitting elements LE to the adhesive layer 210_1. Therefore, in the process of transferring the plurality of light emitting elements LE to the display panel 100, the possibility of the plurality of light emitting elements LE being tilted or falling can be reduced or prevented. Therefore, the possibility of each of the plurality of light emitting elements LE becoming unable to be electrically connected to the pixel electrodes PXE1, PXE2, and PXE3 can be reduced or prevented.

[0364] Fig.42 is a diagram illustrating a virtual reality device including a display device according to one or more embodiments. Fig.42 A virtual reality device 1 to which a display device 10_1 according to one or more embodiments is applied is shown.

[0365] refer to Fig.42 The virtual reality device 1 according to one or more embodiments may be a glasses-type device. The virtual reality device 1 according to one or more embodiments may include a display device 10_1, a left lens 10a, a right lens 10b, a support frame 20, temples 30a and 30b, a reflective member 40, and a display device storage 50.

[0366] although Fig.42 The virtual reality device 1 including the temples 30a and 30b is shown, but the virtual reality device 1 according to one or more embodiments may be applied to a head mounted display including a headband that can be worn on the head instead of the temples 30a and 30b. That is, the virtual reality device 1 according to one or more embodiments is not limited to Fig.42 Those shown in , and can be applied to various electronic devices in various forms.

[0367] The display device storage 50 may include a display device 10_1 and a reflective member 40. The image displayed on the display device 10_1 may be reflected by the reflective member 40 and provided to the right eye of the user through the right lens 10b. Therefore, the user may view the virtual reality image displayed on the display device 10_1 through the right eye.

[0368] Fig.42The display device storage 50 is shown to be located at the end of the right side of the support frame 20, but the present disclosure is not limited thereto. For example, the display device storage 50 may be located at the left end of the support frame 20, and in this case, the image displayed on the display device 10_1 may be reflected by the reflective member 40 and provided to the left eye of the user through the left lens 10a. Therefore, the user can view the virtual reality image displayed on the display device 10_1 through the left eye. Alternatively, the display device storage 50 may be located at both the left and right ends of the support frame 20. In this case, the user can view the virtual reality image displayed on the display device 10_1 through both the left eye and the right eye.

[0369] Fig.43 is a diagram illustrating a smart watch including a display device according to one or more embodiments.

[0370] refer to Fig.43 The display device 10_2 according to one or more embodiments may be applied to a smart watch 2 which is one of smart devices.

[0371] Fig.44 is a diagram illustrating a dashboard and a center instrument panel of a car including a display device according to one or more embodiments. Fig.43 A car to which the display devices 10_a, 10_b, 10_c, 10_d, and 10_e according to one or more embodiments are applied is shown.

[0372] refer to Fig.43 The display devices 10_a, 10_b and 10_c according to one or more embodiments may be applied to a dashboard of a car, a central instrument panel of a car or a central information display (CID) of a dashboard of a car. In addition, the display devices 10_d and 10_e according to one or more embodiments may be applied to a room mirror display, replacing a side mirror of a car.

[0373] Fig.45 is a diagram illustrating a transparent display device including a display device according to one or more embodiments.

[0374] refer to Fig.45 , the display device 10_3 according to one or more embodiments may be applied to a transparent display device. The transparent display device may display an image IM and may also transmit light. Therefore, a user located at the front side of the transparent display device may view an object RS or a background at the rear side of the transparent display device and an image IM displayed on the display device 10_3. When the display device 10_3 is applied to a transparent display device, the substrate SUB of the display device 10_3 may include a light transmitting portion capable of transmitting light, or may be made of a material capable of transmitting light.

[0375] However, it should be understood that the aspects of the embodiments of the present disclosure are not limited to the aspects described herein. By referring to the claims (equivalents thereof should be included therein), the above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs.

Claims

1. A display device, comprising: substrate; A pixel electrode, located above the substrate; an organic layer, above the pixel electrode; a light emitting element, which is above the organic layer and includes a contact electrode in contact with the organic layer; as well as A connection electrode, connected to the pixel electrode and to the contact electrode, is on a side surface of the organic layer and on a side surface of the contact electrode.

2. The display device according to claim 1, wherein: The light emitting element further comprises: a first semiconductor layer, above the contact electrode; an active layer, above the first semiconductor layer; a second semiconductor layer over the active layer; and a passivation layer on a side surface of the first semiconductor layer, on a side surface of the active layer, and on a side surface of the second semiconductor layer, Wherein, the connecting electrode is on the passivation layer.

3. The display device according to claim 2, further comprising a first organic layer covering the connecting electrode, in, A portion of the passivation layer is exposed without being covered by the first organic layer.

4. The display device according to claim 3, further comprising: a second organic layer over the first organic layer and covering the portion of the passivation layer; as well as A common electrode is above a top surface of the second organic layer and a top surface of the second semiconductor layer.

5. The display device according to claim 4, further comprising: a bank covering an edge of the pixel electrode and an edge of the connection electrode; a first light blocking layer, above the common electrode and overlapping the bank in a thickness direction of the substrate; a second light blocking layer, above the first light blocking layer; a light conversion layer or a light-transmitting layer, over the common electrode, overlapping the light-emitting element in the thickness direction of the substrate, and in a region defined by the first light-blocking layer and the second light-blocking layer; as well as A color filter is disposed on the light conversion layer or the light-transmitting layer.

6. The display device according to claim 2, wherein: The contact electrode covers at least a portion of the passivation layer.

7. The display device according to claim 2, wherein: The contact electrode is on a bottom surface of the first semiconductor layer of the light emitting element and on a bottom surface of the passivation layer.

8. The display device according to claim 2, wherein: The length of the contact electrode in the first direction is smaller than the length of the bottom surface of the first semiconductor layer in the first direction.

9. The display device according to claim 2, wherein: The connection electrode is on a bottom surface of the first semiconductor layer.

10. The display device according to claim 2, wherein: The connection electrode is on a bottom surface of the passivation layer.

11. The display device according to claim 1, wherein: The side surface of the contact electrode protrudes more than the side surface of the organic layer.

12. The display device according to claim 11, wherein: The connection electrode is on a portion of a bottom surface of the contact electrode.

13. The display device according to claim 1, wherein: The side surface of the organic layer protrudes more than the side surface of the contact electrode.

14. The display device according to claim 13, wherein: The connection electrode is over an upper surface of the organic layer that is exposed and not covered by the contact electrode.

15. The display device according to claim 1, wherein: The thickness of the organic layer is greater than the thickness of the pixel electrode.

16. The display device according to claim 1, wherein: The thickness of the organic layer is greater than the thickness of the contact electrode.

17. The display device according to claim 1, wherein: A portion of a top surface of the pixel electrode is exposed without being covered by the organic layer, and Wherein, the connecting electrode is above the portion of the top surface of the pixel electrode.

18. A display device comprising: substrate; a pixel electrode and a common electrode, which are above the substrate and spaced apart from each other; an organic layer, above the pixel electrode and the common electrode; a light emitting element, which is above the organic layer and includes a first contact electrode and a second contact electrode in contact with the organic layer; a first connection electrode connected to the pixel electrode and the first contact electrode, on a portion of a side surface of the organic layer and on a side surface of the first contact electrode; as well as A second connection electrode, connected to the common electrode and the second contact electrode, is on another portion of the side surface of the organic layer and on a side surface of the second contact electrode.

19. The display device according to claim 18, wherein: A portion of a top surface of the pixel electrode is exposed without being covered by the organic layer, and Wherein, the first connecting electrode is above the portion of the top surface of the pixel electrode.

20. The display device according to claim 18, wherein: The light emitting element is defined as: A first part, comprising the first contact electrode, a first semiconductor layer, an active layer and a second semiconductor layer; a second portion including the second contact electrode and the second semiconductor layer and spaced apart from the first portion; as well as The third portion is connected to the first portion and the second portion and includes the second semiconductor layer.

21. The display device according to claim 20, wherein: The organic layer is between the first portion and the second portion.

22. The display device according to claim 20, wherein: The light emitting element further includes a passivation layer, the first portion, the second portion, and the third portion each include the passivation layer, and the passivation layer defines an outer surface of the first portion, an outer surface of the second portion, and a side surface of the third portion.

23. The display device according to claim 20, wherein: The first connection electrode is on the outer surface of the first portion and on a portion of the side surface of the third portion, and The second connecting electrode is on the outer surface of the second portion and another portion of the side surface of the third portion.

24. A method for manufacturing a display device, the method comprising: forming a pixel electrode on a substrate; forming an adhesive layer covering the pixel electrode; fixing a light emitting element to the adhesive layer; forming an organic layer by removing a portion of the adhesive layer to expose an edge of a top surface of the pixel electrode; forming connection electrodes for connecting the pixel electrodes to the contact electrodes of the light emitting elements respectively; as well as A common electrode is formed on a top surface of each of the light emitting elements.

25. The method according to claim 24, wherein: Forming the pixel electrode on the substrate and forming the adhesive layer covering the pixel electrode includes using a mask.

26. The method according to claim 25, wherein: Forming the connection electrodes for connecting the pixel electrodes to the contact electrodes of the light emitting elements respectively comprises: forming a first connection electrode layer covering the pixel electrode, the organic layer and the light emitting element; forming a second connection electrode layer by removing a portion of the first connection electrode layer using the mask; forming a bank covering an edge of the pixel electrode; forming a third organic layer covering the bank; and The connection electrode is formed by etching the second connection electrode layer that is exposed without being covered by the third organic layer.

27. An electronic device for providing an image, comprising: Display, including: substrate; A pixel electrode, located above the substrate; an organic layer, above the pixel electrode; a light emitting element over the organic layer and including a contact electrode in contact with the organic layer; and A connection electrode, connected to the pixel electrode and the contact electrode, is on a side surface of the organic layer and on a side surface of the contact electrode.

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