Display panel and display device

Abstract

The invention provides a display panel and a display device.The display panel comprises a substrate, a pixel limiting layer, an etching barrier layer and a plurality of light-emitting elements, the pixel limiting layer is located on one side of the substrate, and the pixel limiting layer comprises a plurality of pixel openings and pixel limiting parts surrounding the pixel openings; the etching barrier layer is located on the substrate and located between the adjacent pixel openings, and the pixel limiting part is provided with an isolation groove which exposes at least part of the etching barrier layer; at least part of each light-emitting element is correspondingly arranged in the corresponding pixel opening, each light-emitting element comprises a light-emitting functional layer and a first electrode which are arranged in a stacked mode, the first electrode is located on the side, away from the substrate, of the light-emitting functional layer, and the first electrode of each light-emitting element and at least part of the light-emitting functional layer extend to the surface of the side, away from the substrate, of the corresponding pixel limiting part. According to the display panel, the uniformity of the isolation grooves can be improved, and then the brightness uniformity of the display panel is improved.

Description

Technical Field

[0001] The present disclosure relates to the technical field of display panels, and in particular to a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) has the advantages of simple preparation process, low cost, high contrast, wide viewing angle, low power consumption, etc. It is one of the most popular technologies in flat panel display technology. Among them, AMOLED (Active-matrix organic light emitting diode) display is the mainstream direction of the current market, and the market demand is huge.

[0003] Currently, the display effect of OLED displays needs to be improved. Summary of the invention

[0004] In view of this, an object of the present disclosure is to provide a display panel and a display device, which can improve the uniformity of the isolation grooves, thereby improving the brightness uniformity of the display panel.

[0005] Based on the above objectives, the present disclosure discloses a first aspect that provides a display panel, the display panel comprising:

[0006] substrate;

[0007] A pixel defining layer, located on one side of the substrate, the pixel defining layer comprising a plurality of pixel openings and a pixel defining portion enclosed by the pixel openings;

[0008] An etch stop layer is located on the substrate and between adjacent pixel openings, and the pixel defining portion is provided with an isolation groove exposing at least a portion of the etch stop layer;

[0009] and a plurality of light-emitting elements, at least a portion of each of the light-emitting elements is correspondingly arranged in the pixel opening, the light-emitting element comprises a light-emitting functional layer and a first electrode which are stacked, the first electrode is located on a side of the light-emitting functional layer away from the substrate, the first electrode of the light-emitting element and at least a portion of the light-emitting functional layer extend to a surface of a side of the pixel defining portion away from the substrate, and are disconnected at the isolation groove.

[0010] In one embodiment, the isolation groove penetrates a portion of the pixel defining portion, the etching stop layer is disposed in the same layer as the pixel defining portion, and the pixel defining portion covers a portion of the etching stop layer;

[0011] Preferably, the orthographic projection of the isolation groove on the substrate surrounds the orthographic projection of the pixel opening on the substrate;

[0012] Preferably, the orthographic projection of the etch stop layer on the substrate surrounds the orthographic projection of the pixel opening on the substrate;

[0013] Preferably, the width of the isolation groove gradually decreases in a direction away from the substrate;

[0014] Preferably, the orthographic projection of a side of the isolation groove close to the substrate on the substrate is located within the orthographic projection range of the etch stop layer on the substrate;

[0015] Preferably, a distance between an edge of an orthographic projection of a side of the isolation groove facing away from the substrate on the substrate and an edge of an orthographic projection of the etch stop layer on the substrate is between 2 and 3 micrometers.

[0016] In one embodiment, the display panel further comprises a planarization layer, and the planarization layer is located on a side of the pixel defining layer close to the substrate;

[0017] Preferably, the isolation groove comprises a first sub-isolation groove and a second sub-isolation groove which are connected, the first sub-isolation groove penetrates the pixel defining portion, the second sub-isolation groove penetrates a portion of the planarization layer, the etch stop layer is arranged in the same layer as the planarization layer, and the planarization layer covers a portion of the etch stop layer;

[0018] Preferably, part of the pixel defining portion extends into the first sub-isolation groove;

[0019] Preferably, the orthographic projection of the etch stop layer on the substrate is outside the orthographic projection range of the pixel defining portion on the substrate.

[0020] In one embodiment, the display panel further comprises an inorganic layer, and the inorganic layer is located on a side of the pixel defining layer close to the substrate;

[0021] Preferably, the isolation groove further comprises a third sub-isolation groove communicating with the first sub-isolation groove and the second sub-isolation groove, and the third sub-isolation groove penetrates the inorganic layer;

[0022] Preferably, part of the pixel defining portion extends into the third sub-isolation groove;

[0023] Preferably, the material of the inorganic layer includes any one of silicon nitride, polysilicon and indium gallium zinc oxide.

[0024] In one embodiment, the width of the second sub-isolation groove gradually decreases in a direction away from the substrate;

[0025] Preferably, the distance between the edge of the orthographic projection of the side wall of the second sub-isolation groove away from the substrate and the edge of the orthographic projection of the side wall of the second sub-isolation groove close to the substrate on the substrate is greater than or equal to 0.5 microns.

[0026] In one embodiment, the etch stop layer includes a first portion and a second portion, and the planarization layer covers at least a portion of the first portion;

[0027] A distance between an edge of an orthographic projection of a side of the second sub-isolation groove facing away from the substrate and an edge of an orthographic projection of a side of the first portion facing away from the second portion on the substrate is between 2 and 3 micrometers.

[0028] In one embodiment, the material of the etch stop layer includes at least one of a metal material, a metal oxide material or a compound material;

[0029] Preferably, the material of the etch stop layer includes any one of silicon nitride, polysilicon and indium gallium zinc oxide.

[0030] In one embodiment, each of the light-emitting elements further comprises a second electrode, and the second electrode is located on a side of the light-emitting functional layer close to the substrate.

[0031] Preferably, the pixel defining portion covers at least a portion of a gap between adjacent second electrodes and an edge of the second electrode.

[0032] In one embodiment, the light-emitting functional layer includes a first light-emitting layer, a charge generation layer, and a second light-emitting layer sequentially stacked in a direction away from the substrate;

[0033] Preferably, the charge generation layer is disconnected at the isolation groove;

[0034] Preferably, the first light-emitting layer, the charge generation layer and the second light-emitting layer are all disconnected at the isolation groove.

[0035] A second aspect of the present disclosure provides a display device, which includes the above-mentioned display panel.

[0036] Compared with the prior art, the display panel provided by the present disclosure provides an etching barrier layer so that the depths of multiple isolation grooves in the display panel are consistent, thereby improving the uniformity of the multiple isolation grooves and further improving the brightness uniformity of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the present disclosure or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 It is a schematic cross-sectional view of a display panel in the prior art;

[0039] Figure 2 A partial cross-sectional view of a display panel provided in the first aspect of the present disclosure is shown in FIG1;

[0040] Figure 3 for Figure 2 The enlarged schematic diagram of part A in the middle;

[0041] Figure 4 for Figure 2 A partial top view of the display panel;

[0042] Figure 5 A second schematic cross-sectional view of a portion of a display panel provided in the first aspect of the present disclosure;

[0043] Figure 6 for Figure 5 The enlarged schematic diagram of part B in the middle;

[0044] Figure 7 for Figure 5 A partial top view of the display panel;

[0045] Figure 8 This is a schematic diagram of the layered structure of the light-emitting functional layer provided in the first aspect of the present disclosure. DETAILED DESCRIPTION

[0046] In order to make the objectives, technical solutions and advantages of the present disclosure more clearly understood, the present disclosure is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.

[0047] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the embodiments of the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0048] Figure 1 It is a partial cross-sectional schematic diagram of a display panel in the prior art, in which an isolation groove 500 is arranged between two adjacent light-emitting elements. However, due to poor process uniformity, on the one hand, there is asymmetry between one of the isolation grooves relative to the two sides of the adjacent light-emitting elements, and the isolation effect will be different, thereby causing leakage difference, affecting brightness and uniformity. At the same time, multiple isolation grooves in the display panel may also be the same, resulting in differences in isolation effects of different isolation grooves, affecting brightness and uniformity.

[0049] Based on the above reasons, the present application provides a display panel and a display device, wherein the display panel can improve the uniformity of the isolation grooves, thereby improving the brightness uniformity of the display panel.

[0050] Next, combine Figure 2-Figure 8 The display panel provided in the first aspect of the present application is described, and the display panel includes a substrate 10, a pixel defining layer, an etching stop layer 60, and a plurality of light-emitting elements 40. The pixel defining layer is located on one side of the substrate 10, and the pixel defining layer includes a plurality of pixel openings 32 and a pixel defining portion 31 enclosed in the pixel openings 32; the etching stop layer 60 is located on the substrate 10 and between adjacent pixel openings 32, and the pixel defining portion 31 is provided with an isolation groove 50 exposing at least a portion of the etching stop layer 60; at least a portion of each light-emitting element 40 is correspondingly arranged in the pixel opening 32 In the embodiment, the light-emitting element 40 includes a light-emitting functional layer 42 and a first electrode 43 which are stacked. The first electrode 43 is located on the side of the light-emitting functional layer 42 away from the substrate 10. The first electrode 43 of the light-emitting element 40 and at least part of the light-emitting functional layer 42 extend to the surface of the pixel defining portion 31 on the side away from the substrate 10, and are disconnected at the isolation groove 50. In this embodiment, an etching barrier layer 60 is provided to make the depths of multiple isolation grooves 50 in the display panel consistent, thereby improving the uniformity of the multiple isolation grooves 50, thereby improving the brightness uniformity of the display panel.

[0051] In the present disclosure, the substrate 10 includes a substrate and an array layer. The substrate can be a rigid substrate or a flexible substrate. When the substrate is a rigid substrate, the material of the substrate can be glass or silicon wafer, etc. When the substrate is a flexible substrate, the material of the substrate can be polyethersulfone (PES), polyacrylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyarylate, polyimide (PI), polycarbonate (PC) or cellulose acetate propionate (CAP), etc. The array layer includes a plurality of pixel driving circuits located in the display area, and the light-emitting element 40 is electrically connected to the pixel driving circuit. For example, the pixel driving circuit may include a plurality of transistors TFT, capacitors, etc., for example, formed in various forms such as 2T1C (i.e., 2 transistors (TFT) and 1 capacitor (C)), 3T1C or 7T2C. The pixel driving circuit is connected to the light-emitting element 40 to control the switching state and the luminous brightness of the light-emitting element 40. The array layer is generally composed of inorganic film layers such as a metal layer, a semiconductor layer (active layer), and an insulating layer. By patterning these inorganic film layers, a driving circuit for controlling the light-emitting element 40 to emit light can be formed. There are many ways to implement its specific circuit structure, which will not be repeated here.

[0052] Reference 2- Figure 8Each light-emitting element 40 includes a second electrode 41, a light-emitting functional layer 42 and a first electrode 43 which are stacked. The second electrode 41 is located on the substrate 10, the light-emitting functional layer 42 is located on the side of the second electrode 41 away from the substrate 10, and the first electrode 43 is located on the side of the light-emitting functional layer 42 away from the substrate 10. The light-emitting functional layer 42 may include one light-emitting layer or multiple light-emitting layers. An exemplary light-emitting functional layer 42 includes two light-emitting layers, such as a first light-emitting layer 421 and a second light-emitting layer 423. The second light-emitting layer 423 is located on the side of the first light-emitting layer 421 away from the substrate 10, and the first electrode 43 is located on the side of the second light-emitting layer 423 away from the substrate 10. The following takes the light-emitting functional layer 42 including two light-emitting layers as an example to schematically illustrate some embodiments of the present disclosure. The light-emitting functional layer 42 also includes a charge generation layer 422 (Charge Generation Layer, CGL) located between the first light-emitting layer 421 and the second light-emitting layer 423. The charge generation layer 422 (CGL) can connect the first light-emitting layer 421 and the second light-emitting layer 423 in series to realize a tandem EL design. The charge generation layer 422 (CGL) can be configured to generate carriers, transport carriers, and inject carriers. Exemplarily, the charge generation layer 422 (CGL) can include an N-type charge generation layer 422 (n-CGL) and a P-type charge generation layer 422 (p-CGL). Further, the charge generation layer 422 (CGL) is disconnected at the isolation groove 50, so that in a pixel working state (i.e., a pixel emits light), the current will not be transmitted from the first electrode 43 through the charge generation layer 422 (CGL) located on both sides of the isolation groove 50 to other adjacent pixels, thereby avoiding lateral leakage caused by the charge generation layer 422 (CGL) located on both sides of the isolation groove 50, reducing the lateral crosstalk between the light-emitting elements 40 in the adjacent pixel openings 32, and improving the color purity of the display panel. In each light-emitting element 40, the light-emitting functional layer 42 may further include a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL) and an electron injection layer (EIL). All film layers of the light-emitting functional layer 42 may be disconnected at the isolation groove 50, such as the hole injection layer (HIL), hole transport layer (HTL), electron transport layer (ETL), electron injection layer (EIL), first light-emitting layer 421, second light-emitting layer 423 and charge generation layer 422 (CGL) mentioned above may all be disconnected at the isolation groove 50, which is beneficial to further reduce the probability of crosstalk between the light-emitting elements 40 in adjacent pixel openings 32.

[0053] Exemplarily, the first electrode 43 is a cathode layer, and the material of the first electrode 43 includes a metal or an alloy. For example, the material of the first electrode 43 includes a Mg / Ag alloy. The material and structure of the first electrode 43 can be set as needed, and the second electrode 41 layer is an anode layer, and the second electrode 41 layer is made of a conductive material. For example, the material of the second electrode 41 layer includes a metal and a conductive metal oxide. For example, the second electrode 41 layer adopts a structure in which indium tin oxide (ITO), silver (Ag), and indium tin oxide (ITO) are stacked. The material and structure of the second electrode 41 layer can be set as needed.

[0054] The display panel also includes a planarization layer 20, which is located on a side of the light-emitting element 40 close to the substrate 10. By setting the planarization layer 20, the flatness of the film layer can be further improved on the basis of the substrate 10. The material of the planarization layer 20 includes an insulating material. Optionally, the material of the planarization layer 20 includes at least one of SiOx, AlOx, HfOx, SiOxNy, and SiNx.

[0055] The display panel also includes a pixel defining layer located on the substrate 10, and the pixel defining layer is located on the side of the planarization layer 20 away from the substrate 10. The pixel defining layer includes a plurality of pixel defining portions 31 and a plurality of pixel openings 32 formed by the plurality of pixel defining portions 31. At least a portion of the light-emitting element 40 is located in the pixel opening 32, and the pixel defining portion 31 covers at least a portion of the gap between adjacent second electrodes 41 and the edge of the second electrode 41.

[0056] In the present embodiment, the orthographic projection of the isolation groove 50 on the substrate 10 surrounds the orthographic projection of the pixel opening 32 on the substrate; the orthographic projection of the etching stop layer 60 on the substrate 10 surrounds the orthographic projection of the pixel opening 32 on the substrate 10; the first electrode 43 is formed by full-surface vapor deposition during the manufacturing process, and in order to avoid lateral leakage between adjacent light-emitting units 40, an isolation groove is provided so that the first electrode 43 and the light-emitting functional layer 42 of adjacent light-emitting units are disconnected at the isolation groove.

[0057] refer to Figure 2-Figure 4In one embodiment, the isolation groove 50 runs through part of the pixel defining portion 31, the etching stop layer 60 is arranged in the same layer as the pixel defining layer, and the pixel defining portion 31 covers part of the etching stop layer 60. On the one hand, the etching stop layer 60 can block the pixel defining portion 31 in the etching step, thereby preventing the pixel defining portion 31 from being over-etched in the process of etching the pixel defining portion 31 to form the isolation groove 50. On the other hand, the depths of multiple isolation grooves 50 in the display panel are consistent, improving the uniformity of multiple isolation grooves 50, thereby improving the uniformity of the brightness of the display panel. In the direction away from the substrate 10, the width of the isolation groove 50 gradually decreases; this design makes the isolation groove 50 form an undercut structure, or it can be said that the angle between the side wall of the isolation groove and the surface where the substrate is located is less than or equal to 90°, so that at least part of the film layer of the light-emitting functional layer 42 (such as the charge generation layer 422) and the first electrode 43 are disconnected at the isolation groove 50. From the top view, the first electrode 43 will be Figure 4 The connection is disconnected at point b, thereby reducing the lateral crosstalk between the light-emitting elements 40 in adjacent pixel openings 32 and improving the brightness uniformity of the display panel.

[0058] Exemplarily, when there is one capacitor in the driving circuit, the capacitance difference calculation formula is as follows: When there are two capacitors in the driving circuit, the capacitance difference calculation formula is as follows: The Undercut depth calculated by the capacitance difference is greater than or equal to 0.5 microns. The Undercut depth here specifically refers to the distance L1 between the edge of the projection of the side wall of the isolation groove 50 away from the substrate 10 and the edge of the projection of the side wall of the isolation groove 50 close to the substrate 10 on the substrate 10. The distance L1 is greater than or equal to 0.5 microns.

[0059] Furthermore, the orthographic projection of the side of the isolation groove 50 close to the substrate 10 on the substrate 10 is within the orthographic projection range of the etch stop layer 60 on the substrate 10; that is, in the direction parallel to the surface of the substrate 10, the width of the isolation groove 50 is smaller than the width of the etch stop layer 60. Such a design can effectively play the role of the etch stop layer 60, avoid over-engraving of the isolation groove 50, and cause the depth of multiple isolation grooves 50 in the display panel to be inconsistent, thereby affecting the brightness uniformity of the display panel. Exemplarily, the distance L2 between the edge of the orthographic projection of the side of the isolation groove 50 away from the substrate 10 on the substrate 10 and the edge of the orthographic projection of the etch stop layer 60 on the substrate 10 is between 2-3 microns.

[0060] refer to Figure 5-Figure 7In another embodiment, the isolation groove 50 includes a first sub-isolation groove 51 and a second sub-isolation groove 52 which are connected. The first sub-isolation groove 51 passes through the pixel defining portion 31, and the second sub-isolation groove 52 passes through a portion of the planarization layer 20. The etching barrier layer 60 is arranged on the same layer as the planarization layer 20, and the planarization layer 20 covers a portion of the etching barrier layer 60. On the one hand, by setting the etching barrier layer 60, the planarization layer 20 can be blocked in the etching step, thereby avoiding excessive etching of the planarization layer 20 during the process of etching the planarization layer 20 to form the second sub-isolation groove 52. On the other hand, the depths of multiple second sub-isolation grooves 52 of the display panel are made consistent, thereby improving the uniformity of the multiple second sub-isolation grooves 52, thereby improving the brightness uniformity of the display panel. Part of the pixel defining portion 31 extends into the second sub-isolation groove 52, and at the same time, the orthographic projection of the etch stop layer 60 on the substrate 10 is located outside the orthographic projection range of the pixel defining portion 31 on the substrate 10, that is, the etch stop layer 60 overlaps with the projection of the pixel defining portion 31 on the substrate 10. It can also be understood that the etch stop layer 60 does not completely cover the bottom of the second sub-isolation groove 52, but only extends to the planarization layer 20 corresponding to one side wall of the second sub-isolation groove 52. Specifically, the etch stop layer 60 includes a first portion 61 and a second portion 62, wherein the planarization layer 20 covers the first portion 61 and the second portion 62. For at least a portion of a portion 61, a spacing L3 between an edge of a projection of the second sub-isolation groove 52 on the side facing away from the substrate 10 and an edge of a projection of the first portion 61 on the side facing away from the second portion 62 on the substrate 10 is between 2 and 3 microns (e.g., 2 microns, 2.5 microns, 3 microns), and further, a spacing L4 between an edge of a projection of the first portion 61 on the side facing away from the second portion 62 and an edge of a projection of the second portion 62 on the side facing away from the first portion 61 on the substrate 10 is between 4 and 6 microns (e.g., 4 microns, 5 microns, 6 microns).

[0061] It should be noted that the formation of the isolation groove 50 (second sub-isolation groove 52) can be specifically achieved in combination with a hard mask layer (Hard mask), such as forming a hard mask layer (hard mask) on the pixel definition layer or the planarization layer by chemical vapor deposition (CVD) or physical vapor deposition (PVD) method, etching the hard mask layer to form a patterned hard mask layer, the patterned hard mask layer covers the surface of the pixel definition layer or the planarization layer 20 away from the substrate 10, and has a hard mask layer opening at a predetermined position for forming a recess, and uses the patterned hard mask layer as a mask to etch the pixel definition layer or the planarization layer 20 to form the isolation groove 50 (second sub-isolation groove 52).

[0062] Continue to refer Figure 5-Figure 7In one embodiment, the display panel further includes an inorganic layer 70 located between the second electrode 41 and the planarization layer 20, that is, the inorganic layer 70 is located on the side of the pixel defining layer 31 close to the substrate 10 and on the side of the planarization layer 20 away from the substrate 10, and the isolation groove further includes a third sub-isolation groove 53 connecting the first sub-isolation groove 51 and the second sub-isolation groove 52, and the third sub-isolation groove 53 runs through the inorganic layer 70. By setting the inorganic layer 70, the second sub-isolation groove 52 forms an undercut structure, that is, along the direction away from the substrate 10, the width of the third sub-isolation groove 53 gradually decreases; the second sub-isolation groove 52 adopts an undercut structure, and in the subsequent process of forming the light-emitting functional layer 42 and the first electrode 43, at least part of the film layers of the first electrode 43 and the light-emitting functional layer 42 (such as the charge generation layer 422 and the hole injection layer) will be disconnected at the second sub-isolation groove 52, and from the top view, the first electrode 43 will be Figure 7 The second sub-isolation groove 52 is disconnected at a, thereby avoiding failure of the light-emitting element 40. Exemplarily, the Undercut depth is calculated by the capacitance difference to be greater than or equal to 0.5 microns. The Undercut depth here specifically refers to the distance L5 between the edge of the positive projection of the side wall of the second sub-isolation groove 52 on the substrate 10 away from the substrate 10 and the edge of the positive projection of the side wall of the second sub-isolation groove 52 on the substrate 10 close to the substrate 10. The distance L5 is greater than or equal to 0.5 microns.

[0063] In one embodiment, the material of the etch stop layer 60 includes at least one of a metal material, a metal oxide material or a compound material; illustratively, the material of the etch stop layer 60 includes any one of silicon nitride, polysilicon and indium gallium zinc oxide.

[0064] A second aspect of the present disclosure further provides a display device, which includes a display panel according to any one of the first aspects.

[0065] The display device may be, for example, a display, a television, a digital camera, a mobile phone, a tablet computer, a navigator, or any other product or component with a display function. The display device in the embodiment of the present application is based on the same inventive concept as the display panel in the embodiment of the first aspect, and has the same beneficial effects as the display panel in the embodiment of the first aspect.

[0066] It should be noted that the above describes some embodiments of the present disclosure. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0067] The embodiments of the present disclosure are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present disclosure should be included in the scope of protection of the present disclosure.

Claims

1. A display panel, characterized in that: include: substrate; A pixel defining layer, located on one side of the substrate, the pixel defining layer comprising a plurality of pixel openings and a pixel defining portion enclosed by the pixel openings; An etch stop layer is located on the substrate and between adjacent pixel openings, and the pixel defining portion is provided with an isolation groove exposing at least a portion of the etch stop layer; and a plurality of light-emitting elements, at least a portion of each of the light-emitting elements is correspondingly arranged in the pixel opening, the light-emitting element comprises a light-emitting functional layer and a first electrode which are stacked, the first electrode is located on a side of the light-emitting functional layer away from the substrate, the first electrode of the light-emitting element and at least a portion of the light-emitting functional layer extend to a surface of a side of the pixel defining portion away from the substrate, and are disconnected at the isolation groove.

2. The display panel according to claim 1, wherein: The isolation groove penetrates a portion of the pixel defining portion, the etching stop layer is arranged in the same layer as the pixel defining portion, and the pixel defining portion covers a portion of the etching stop layer; Preferably, the orthographic projection of the isolation groove on the substrate surrounds the orthographic projection of the pixel opening on the substrate; Preferably, the orthographic projection of the etch stop layer on the substrate surrounds the orthographic projection of the pixel opening on the substrate; Preferably, the width of the isolation groove gradually decreases in a direction away from the substrate; Preferably, the orthographic projection of a side of the isolation groove close to the substrate on the substrate is located within the orthographic projection range of the etch stop layer on the substrate; Preferably, a distance between an edge of an orthographic projection of a side of the isolation groove facing away from the substrate on the substrate and an edge of an orthographic projection of the etch stop layer on the substrate is between 2 and 3 micrometers.

3. The display panel according to claim 1, wherein: The display panel further comprises a planarization layer, wherein the planarization layer is located on a side of the pixel defining layer close to the substrate; Preferably, the isolation groove comprises a first sub-isolation groove and a second sub-isolation groove which are connected, the first sub-isolation groove penetrates the pixel defining portion, the second sub-isolation groove penetrates a portion of the planarization layer, the etch stop layer is arranged in the same layer as the planarization layer, and the planarization layer covers a portion of the etch stop layer; Preferably, part of the pixel defining portion extends into the first sub-isolation groove; Preferably, the orthographic projection of the etch stop layer on the substrate is outside the orthographic projection range of the pixel defining portion on the substrate.

4. The display panel according to claim 3, wherein: The display panel further comprises an inorganic layer, and the inorganic layer is located on a side of the pixel defining layer close to the substrate; Preferably, the isolation groove further comprises a third sub-isolation groove communicating with the first sub-isolation groove and the second sub-isolation groove, and the third sub-isolation groove penetrates the inorganic layer; Preferably, part of the pixel defining portion extends into the third sub-isolation groove; Preferably, the material of the inorganic layer includes any one of silicon nitride, polysilicon and indium gallium zinc oxide.

5. The display panel according to claim 3, wherein: The width of the second sub-isolation groove gradually decreases in a direction away from the substrate; Preferably, the distance between the edge of the orthographic projection of the side wall of the second sub-isolation groove away from the substrate and the edge of the orthographic projection of the side wall of the second sub-isolation groove close to the substrate on the substrate is greater than or equal to 0.5 microns.

6. The display panel according to claim 3, wherein: The etch stop layer comprises a first portion and a second portion, and the planarization layer covers at least a portion of the first portion; A distance between an edge of an orthographic projection of a side of the second sub-isolation groove facing away from the substrate and an edge of an orthographic projection of a side of the first portion facing away from the second portion on the substrate is between 2 and 3 micrometers.

7. The display panel according to claim 1, wherein: The material of the etching stop layer includes at least one of a metal material, a metal oxide material or a compound material; Preferably, the material of the etch stop layer includes any one of silicon nitride, polysilicon and indium gallium zinc oxide.

8. The display panel according to claim 1, wherein: Each of the light-emitting elements further includes a second electrode, which is located on a side of the light-emitting functional layer close to the substrate. Preferably, the pixel defining portion covers at least a portion of a gap between adjacent second electrodes and an edge of the second electrode.

9. The display panel according to claim 8, wherein: The light-emitting functional layer comprises a first light-emitting layer, a charge generating layer and a second light-emitting layer sequentially stacked in a direction away from the substrate; Preferably, the charge generation layer is disconnected at the isolation groove; Preferably, the first light-emitting layer, the charge generation layer and the second light-emitting layer are all disconnected at the isolation groove.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 9.

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