Display panel, preparation method thereof and display device

Abstract

The invention discloses a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, a plurality of sub-pixels and a pixel definition layer. The sub-pixels are arranged on one side of the substrate, each sub-pixel comprises a first electrode, a light-emitting functional layer and a second electrode which are arranged in a stacked mode, and each light-emitting functional layer comprises a plurality of sub-film layers. The pixel definition layer is arranged on one side of the substrate and comprises a plurality of pixel openings which are arranged at intervals, and a protruding part and a gap are arranged between every two adjacent pixel openings; at least one sub-film layer of every two adjacent sub-pixels is broken at the top of the corresponding protruding part, and the second electrodes of every two adjacent sub-pixels sink in the gaps and are electrically connected.

Description

Technical Field

[0001] The present disclosure belongs to the field of display technology, and in particular relates to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] OLED (Organic Light-Emitting Diode) technology has the advantages of low cost, short response time, high brightness, low driving voltage and flexible light source. It can be applied to display fields such as smart phones, computers, and televisions.

[0003] The luminescence principle of OLED devices is as follows: under voltage drive, electrons are injected from the cathode into the electron transport layer, and then migrate to the light-emitting layer through the electron transport layer; holes are injected from the anode into the hole transport layer, and then also migrate to the light-emitting layer through the hole transport layer; electrons and holes meet in the light-emitting layer to form excitons, which excite the light-emitting molecules to emit visible light. Summary of the invention

[0004] The embodiments of the present disclosure provide a display panel and a method for manufacturing the same, as well as a display device, thereby avoiding the accompanying light emission between sub-pixels due to crosstalk, and improving the color saturation and panel color gamut of a monochrome picture.

[0005] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by the practice of the present disclosure.

[0006] A first aspect of an embodiment of the present disclosure provides a display panel, including:

[0007] substrate substrate;

[0008] A plurality of sub-pixels are arranged on one side of the base substrate, wherein the sub-pixels include a first electrode, a light-emitting functional layer and a second electrode which are stacked, and the light-emitting functional layer includes a plurality of sub-film layers;

[0009] A pixel definition layer is arranged on one side of the base substrate, and includes a plurality of pixel openings arranged at intervals, and a protrusion and a gap are arranged between two adjacent pixel openings;

[0010] At least one of the sub-membrane layers of two adjacent sub-pixels is disconnected at the top of the protruding portion, and the second electrodes of two adjacent sub-pixels are sunken at the gap and electrically connected.

[0011] Optionally, the plurality of sub-membrane layers include a hole transport layer, and the hole transport layers of two adjacent sub-pixels are disconnected at the top of the protruding portion; or

[0012] The plurality of sub-film layers include a stacked hole transport layer and a light-emitting material layer. In two adjacent sub-pixels, the hole transport layer of one and the light-emitting material layer of the other are disconnected at the top of the protrusion.

[0013] Optionally, the light-emitting functional layer includes a first light-emitting functional layer and a second light-emitting functional layer stacked together, a charge generation layer is provided between the first light-emitting functional layer and the second light-emitting functional layer, the first light-emitting functional layer and the charge generation layer constitute a light-emitting functional structure layer, and the light-emitting functional structure layers of two adjacent sub-pixels are disconnected at the top of the protrusion.

[0014] Optionally, it also includes:

[0015] A metal layer is disposed on one side of the substrate;

[0016] An insulating layer is arranged on a side of the metal layer away from the base substrate, and the insulating layer includes a plurality of first through holes arranged at intervals;

[0017] The raised portion is provided with a second through hole, the second through hole, the first through hole and the gap are interconnected, and the second electrode sunk into the gap is electrically connected to the metal layer through the first through hole and the second through hole.

[0018] Optionally, the metal layer includes a ground terminal, and the second electrode sunk into the gap is electrically connected to the ground terminal through the first through hole and the second through hole.

[0019] Optionally, the first through hole is filled with a conductive material, and the conductive material is different from a material used to prepare the second electrode.

[0020] Optionally, the multiple sub-membrane layers of two adjacent sub-pixels are disconnected at the top of the protruding portion;

[0021] The second electrodes of two adjacent sub-pixels are sunk to the bottom of the gap and are electrically connected.

[0022] Optionally, the second electrodes of the sub-pixels are arranged in the same layer.

[0023] Optionally, the plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction intersects the second direction;

[0024] The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel;

[0025] In the first direction, a first distance is provided between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the light-emitting area of ​​the first sub-pixel, and a second distance is provided between a side of the second sub-pixel close to the first sub-pixel and a side of the protrusion facing the light-emitting area of ​​the second sub-pixel, and the sum of the first distance and the second distance is less than the width of the gap.

[0026] Optionally, the plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction intersects the second direction;

[0027] In the first direction, the width of the gap is smaller than the width of the pixel opening.

[0028] Optionally, the plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction intersects the second direction;

[0029] The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel;

[0030] The gap includes a first gap and a second gap spaced apart from each other, the light-emitting functional layer of the first sub-pixel includes a first sub-layer and a second sub-layer located on the top of the protruding portion, and in the first direction, the first gap is located between the first sub-layer and the second sub-layer, and the second gap is located between the second sub-layer and the at least one sub-membrane layer of the second sub-pixel.

[0031] Optionally, there is a third distance between the first gap and the second gap at sides close to each other, and the third distance is greater than or equal to 2 μm, or the third distance is greater than or equal to 4 μm.

[0032] Optionally, it also includes:

[0033] A supporting portion, arranged on a side of the protruding portion away from the substrate;

[0034] The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect;

[0035] The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel;

[0036] The light-emitting functional layer of the first sub-pixel includes a first sub-layer and a second sub-layer located on the top of the protruding portion. In the first direction, the supporting portion is located between the first sub-layer and the second sub-layer, and the gap is located between the second sub-layer and the at least one sub-membrane layer of the second sub-pixel.

[0037] Optionally, there is a fourth distance between the support portion and a side of the gap that are close to each other, and the fourth distance is greater than or equal to 2 μm, or the fourth distance is greater than or equal to 4 μm.

[0038] Optionally, in the first direction, there is a fifth distance between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the light-emitting area of ​​the first sub-pixel; or

[0039] In the first direction, there is a sixth distance between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the pixel opening of the first sub-pixel, and the sixth distance is greater than the fifth distance.

[0040] Optionally, the plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction intersects the second direction;

[0041] In the first direction, there is a seventh distance between a side of the light-emitting functional layer of the sub-pixel away from the pixel opening and a side of the protrusion facing the pixel opening of the sub-pixel, and the value range of the seventh distance is: 1 μm to 5 μm.

[0042] Optionally, the light-emitting functional layer comprises a plurality of light-emitting material layers stacked in layers, and each of the light-emitting material layers emits light of a different color;

[0043] The display panel further includes:

[0044] The color filter layer is arranged on a side of the second electrode away from the base substrate, or on a side of the first electrode away from the base substrate. The color filter layer includes a plurality of color filter units, and the color filter units are configured to filter the light emitted by each of the luminescent material layers of the sub-pixels.

[0045] Optionally, the base substrate is a rigid substrate or a flexible substrate, and a density of the gaps on the rigid substrate is greater than a density of the gaps on the flexible substrate.

[0046] A second aspect of the embodiments of the present disclosure provides a display device, comprising a display panel as described in any one of the first aspects.

[0047] A third aspect of the embodiments of the present disclosure provides a method for manufacturing a display panel, comprising:

[0048] providing a substrate base plate;

[0049] forming a plurality of sub-pixels and a pixel definition layer on the base substrate;

[0050] The plurality of sub-pixels are arranged on one side of the base substrate, the sub-pixels include a first electrode, a light-emitting functional layer and a second electrode which are stacked, and the light-emitting functional layer includes a plurality of sub-film layers;

[0051] The pixel definition layer is arranged on one side of the base substrate, and includes a plurality of pixel openings arranged at intervals, and a protrusion and a gap are arranged between two adjacent pixel openings;

[0052] At least one of the sub-membrane layers of two adjacent sub-pixels is disconnected at the top of the protruding portion, and the second electrodes of two adjacent sub-pixels are sunken at the gap and electrically connected.

[0053] Optionally, forming a plurality of sub-pixels and a pixel definition layer on the substrate includes:

[0054] forming first electrodes of the plurality of sub-pixels on the base substrate;

[0055] forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate, wherein the spacer columns are located on the top of the protrusion;

[0056] Vapor-depositing a light-emitting functional layer of each sub-pixel on the pixel definition layer and the isolation column;

[0057] peeling off the isolation column;

[0058] A second electrode of each of the sub-pixels is formed on the light-emitting functional layer.

[0059] Optionally, the plurality of sub-membrane layers include a hole transport layer, and in a direction perpendicular to the base substrate, a height of the isolation column is greater than a height of the hole transport layer and less than a total height of the plurality of sub-membrane layers.

[0060] Optionally, the light-emitting functional layer includes a first light-emitting functional layer and a second light-emitting functional layer stacked together, a charge generation layer is provided between the first light-emitting functional layer and the second light-emitting functional layer, and in a direction perpendicular to the substrate, the maximum height of the isolation column is greater than the sum of the heights of the first light-emitting functional layer and the charge generation layer, and the height of the isolation column is less than the sum of the heights of the first light-emitting functional layer, the charge generation layer and the second light-emitting functional layer.

[0061] Optionally, the height of the isolation column ranges from: to Alternatively, the height of the isolation column can be in the range of: to

[0062] Optionally, forming the pixel definition layer and a plurality of spaced-apart isolation columns on the base substrate includes:

[0063] forming a pixel definition material layer on the base substrate, and forming a support material layer on the pixel definition material layer;

[0064] Synchronously etching the pixel definition material layer and the support material layer to form the pixel definition layer and a plurality of support portions spaced apart on the pixel definition layer;

[0065] forming an isolation column material layer on the pixel definition layer, and etching the isolation column material layer;

[0066] A plurality of spacer columns are formed on the pixel definition layer and are spaced apart from each other. The spacer columns are spaced apart from the support portion.

[0067] Optionally, forming the pixel definition layer and a plurality of spaced-apart isolation columns on the base substrate includes:

[0068] forming a pixel definition layer on the base substrate, and forming an isolation column material layer and a support material layer on the pixel definition layer;

[0069] The support material layer and the isolation column material layer are synchronously etched to form a plurality of spaced support portions and a plurality of spaced isolation columns on the pixel definition layer, wherein the isolation columns and the support portions are spaced apart from each other.

[0070] Optionally, before forming the second electrode of each sub-pixel on the light-emitting functional layer, the method further includes:

[0071] The support portion is peeled off.

[0072] Optionally, before forming the first electrodes of the plurality of sub-pixels on the base substrate, the method further includes:

[0073] forming a metal layer on the base substrate;

[0074] forming an insulating layer on the metal layer, wherein the insulating layer comprises a plurality of first through holes arranged at intervals;

[0075] The step of forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate comprises:

[0076] forming a pixel definition layer on the insulating layer, wherein the protrusion of the pixel definition layer comprises a second through hole, and the second through hole, the first through hole and the gap are interconnected;

[0077] A plurality of spacer columns are formed on the pixel definition layer and are arranged at intervals. The spacer columns are made of a conductive material, and the conductive material is deposited into the first through hole and the second through hole.

[0078] Optionally, the conductive material used to prepare the isolation column is different from the material used to prepare the second electrode.

[0079] The display panel provided by the embodiment of the present disclosure includes: a substrate, a plurality of sub-pixels and a pixel definition layer. The plurality of sub-pixels are arranged on one side of the substrate, and the sub-pixels include a first electrode, a light-emitting functional layer and a second electrode arranged in a stacked manner, and the light-emitting functional layer includes a plurality of sub-film layers. The pixel definition layer is arranged on one side of the substrate, and includes a plurality of pixel openings arranged at intervals and a convex portion arranged between two adjacent pixel openings; wherein at least one sub-film layer of two adjacent sub-pixels is disconnected at the top of the convex portion, and the second electrode of the two adjacent sub-pixels is sunken at the gap and electrically connected. Thus, since at least one sub-film layer of two adjacent sub-pixels is disconnected at the top of the convex portion, the migration of carriers between the light-emitting functional layers of adjacent sub-pixels is blocked, and the accompanying light emission caused by low grayscale crosstalk between adjacent sub-pixels is avoided, thereby effectively improving the color saturation of the monochrome picture and improving the color gamut of the OLED display panel; in addition, a second electrode is sunken at the gap, which can further block the migration of holes between the light-emitting functional layers of adjacent sub-pixels and improve the display effect.

[0080] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0081] The drawings herein are incorporated into the specification and constitute a part of the specification, showing embodiments consistent with the present disclosure, and together with the specification, are used to explain the principles of the present disclosure. Obviously, the drawings described below are only some embodiments of the present disclosure, and for ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0082] Figure 1 A partial cross-sectional structural schematic diagram of a display panel in the related art is shown;

[0083] Figure 2 A schematic diagram of a first partial cross-sectional structure of a display panel according to an embodiment of the present disclosure is shown;

[0084] Figure 3 A schematic plan view of a display panel according to an embodiment of the present disclosure is shown;

[0085] Figure 4 A second partial cross-sectional structural schematic diagram of a display panel according to an embodiment of the present disclosure is shown;

[0086] Figure 5 Another partial cross-sectional structural schematic diagram of an embodiment of the present disclosure is shown;

[0087] Figure 6 Shows Figure 2 The enlarged view of the part in the dotted box;

[0088] Figure 7 A third partial cross-sectional schematic diagram of the display panel according to the embodiment of the present disclosure is shown;

[0089] Figure 8 Shows Figure 7 The enlarged view of the part in the middle dashed box;

[0090] Fig. 9 A fourth partial cross-sectional schematic diagram of the display panel according to the embodiment of the present disclosure is shown;

[0091] Fig.10 Shows Fig. 9 The enlarged view of the part in the middle dashed box;

[0092] Fig.11 A fifth partial structural schematic diagram of a display panel according to an embodiment of the present disclosure is shown;

[0093] Fig.12 A sixth partial structural schematic diagram of a display panel according to an embodiment of the present disclosure is shown;

[0094] Fig.13 A schematic diagram showing the structure of a display device according to an embodiment of the present disclosure is shown;

[0095] Fig.14 A first flow chart showing a method for manufacturing a display panel according to an embodiment of the present disclosure;

[0096] Fig.15 A second flow chart showing the method for manufacturing a display panel according to an embodiment of the present disclosure;

[0097] Fig.16 A third flow chart of the method for manufacturing a display panel according to an embodiment of the present disclosure is shown.

[0098] Among them, 1'-pixel definition layer; 2'-anode layer; 3'-first hole transport layer; 4'-first luminescent material layer; 5'-second hole transport layer; 6'-second luminescent material layer; 7'-contact part.

[0099] 200-display panel; 20-substrate; 21-sub-pixel; 21A-first electrode; 21B-light-emitting functional layer; 21B1-hole transport layer; 21B2-light-emitting material layer; 21C-second electrode; 21D-first light-emitting functional layer; 21E-second light-emitting functional layer; 21F-charge generation layer; 22-pixel definition layer; 22A-pixel opening; 22B-raised portion; 22C-second through hole; 23-gap; 231-first gap; 232-second gap; 24-metal layer; 25-insulating layer; 251-first through hole; 26-first sub-pixel; 27-second sub-pixel; 28-first sub-layer; 29-second sub-layer; 30-support portion; 31-color film layer; 32-isolation column; 321-first isolation portion; 322-second isolation portion; 201-pixel definition material layer; 300-display device. DETAILED DESCRIPTION

[0100] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. Obviously, the described embodiments are only part of the embodiments of the present disclosure, not all of the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present disclosure.

[0101] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0102] The flowcharts shown in the accompanying drawings are only exemplary and do not necessarily include all the contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps can be decomposed, and some operations / steps can be combined or partially combined, so the actual execution order may change according to actual conditions.

[0103] It should also be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the objects used in this way can be interchanged where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those shown or described.

[0104] As used herein, "about," "approximately," "substantially" includes the stated value and the average value that is within an acceptable range of deviation from the particular value, where the acceptable range of deviation is determined by one of ordinary skill in the art taking into account the measurements in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0105] As used herein, "parallel", "perpendicular", and "equal" include the situations described and situations similar to the situations described, and the range of the similar situations is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the errors associated with the measurement of a particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism may be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity may also be, for example, a deviation within 5°. "Equal" includes absolute equality and approximate equality, wherein the acceptable deviation range of approximate equality may be, for example, the difference between the two equalities is less than or equal to 5% of either one.

[0106] The proportions of the drawings in this disclosure can be used as a reference in the actual process, but are not limited to this. For example: the width-to-length ratio of the channel, the thickness and spacing of each film layer, the width and spacing of each signal line can be adjusted according to actual needs. The number of pixels in the display substrate and the number of sub-pixels in each pixel are not limited to the numbers shown in the figures. The drawings described in this disclosure are only structural schematic diagrams, and one method of this disclosure is not limited to the shapes or values ​​shown in the drawings.

[0107] In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate, or the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this disclosure can be understood according to specific circumstances.

[0108] In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain electrode) and a source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0109] In this specification, the first electrode may be a drain electrode and the second electrode may be a source electrode, or the first electrode may be a source electrode and the second electrode may be a drain electrode. In the case of using transistors with opposite polarities or when the direction of current changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" may be interchanged.

[0110] In this specification, "electrical connection" includes the case where components are connected together through an element having some kind of electrical function. There is no particular limitation on the "element having some kind of electrical function" as long as it can transmit and receive electrical signals between the connected components. Examples of "element having some kind of electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, etc.

[0111] Devices, other components with various functions, etc.

[0112] In this specification, "film" and "layer" may be interchanged. For example, "conductive layer" may be replaced by "conductive film". Similarly, "insulating film" may be replaced by "insulating layer".

[0113] In this specification, triangles, rectangles, trapezoids, pentagons or hexagons are not strictly defined.

[0114] It can be an approximate triangle, rectangle, trapezoid, pentagon or hexagon, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0115] The term "about" in the present disclosure refers to a numerical value that is not strictly limited to a limit and allows for process and measurement errors.

[0116] It should be noted that OLED (Organic Light-Emitting Diode) technology has the advantages of low cost, short response time, high brightness, low driving voltage and flexible light source, and can be applied to display fields such as smart phones, computers, and televisions.

[0117] The luminescence principle of OLED devices is as follows: under voltage drive, electrons are injected from the cathode into the electron transport layer, and then migrate to the light-emitting layer through the electron transport layer; holes are injected from the anode into the hole transport layer, and then also migrate to the light-emitting layer through the hole transport layer; electrons and holes meet in the light-emitting layer to form excitons, which excite the light-emitting molecules to emit visible light.

[0118] Figure 1 A partial cross-sectional structural schematic diagram of a display panel in the related art is shown.

[0119] In the related art, OLED display panels use a certain evaporation sequence to prepare sub-pixels of three colors. During the evaporation process, it is inevitable that the light-emitting functional layers of sub-pixels of different colors overlap, for example, the hole transport layers of adjacent sub-pixels overlap. Figure 1 As shown, the display panel of the related art includes: a substrate, a pixel definition layer 1', an anode layer 2', a first hole transport layer 3', a first light-emitting material layer 4', a second hole transport layer 5' and a second light-emitting material layer 6'. Among them, the second hole transport layer 5' is in contact with the light-emitting functional layer of the first sub-pixel, and the contact portion 7' ​​is, and the light-emitting functional layer includes the first hole transport layer 3' and the first light-emitting material layer 4'. The excited state energy level structure of the second hole transport layer 5' of the second sub-pixel matches the first hole transport layer 3' or the first light-emitting material layer 4' of the first sub-pixel, or has a strong carrier transport capacity for the hole transport layer of the first sub-pixel, etc., so that the holes generated in the second sub-pixel are transmitted to the light-emitting functional layer of the first sub-pixel through the light-emitting functional layer at the overlap, and radiate light, so that the accompanying light emission of other colors under the monochrome screen of the panel is caused by low grayscale crosstalk, affecting the display quality.

[0120] In view of this, the embodiment of the present disclosure provides a display panel below, which can avoid the accompanying light emission caused by low grayscale crosstalk between adjacent sub-pixels to a certain extent, thereby effectively improving the color saturation of the monochrome picture and improving the color gamut of the OLED display panel. The display panel of the embodiment of the present disclosure will be described below in conjunction with specific drawings.

[0121] Figure 2 A first partial cross-sectional structural schematic diagram of a display panel according to an embodiment of the present disclosure is shown.

[0122] In a first aspect, an embodiment of the present disclosure provides a display panel 200, comprising: a base substrate 20, a plurality of sub-pixels 21 and a pixel definition layer 22. The plurality of sub-pixels 21 are arranged on one side of the base substrate 20, and the sub-pixels 21 include a first electrode 21A, a light-emitting functional layer 21B and a second electrode 21C arranged in a stacked manner, and the light-emitting functional layer 21B includes a plurality of sub-film layers. The pixel definition layer 22 is arranged on one side of the base substrate 20, and includes a plurality of pixel openings 22A arranged at intervals, a protrusion 22B and a gap 23 arranged between two adjacent pixel openings 22A, and exemplarily, the gap 23 is located on the side of the protrusion 22 away from the base substrate 20. Among them, at least one of the sub-film layers of two adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, and the second electrodes 21C of the two adjacent sub-pixels 21 are sunken and electrically connected at the gap 23, and exemplarily, the sides of the second electrodes 21C of the two adjacent sub-pixels 21 that are close to each other are sunken and electrically connected at the gap 23.

[0123] For ease of understanding, an example is given of at least one of the sub-film layers of two adjacent sub-pixels 21 being disconnected at the top of the protruding portion 22B. For example, two adjacent sub-pixels 21 include sub-pixels 21A and sub-pixels 21B, at least one sub-film layer of sub-pixel 21A (hereinafter referred to as film layer a for simplicity) is partially overlapped on the top of the protruding portion 22B, at least one sub-film layer of sub-pixel 21B (hereinafter referred to as film layer b for simplicity) is also partially overlapped on the top of the protruding portion 22B, and the film layer a and the film layer b are disconnected between the sides close to each other, that is, the orthographic projection of the film layer a on the base substrate 20 and the orthographic projection of the film layer b on the base substrate 20 do not overlap each other, so that there is a gap 23 between the sides close to each other of the film layer a and the film layer b. Among them, the top of the protruding portion 22B refers to the surface of the side of the protruding portion 22B away from the base substrate 20. As a result, the migration of carriers between the light-emitting functional layers 21B of adjacent sub-pixels 21 is blocked, and the accompanying light emission (color mixing problem) caused by low-grayscale crosstalk between adjacent sub-pixels 21 is avoided, thereby effectively improving the color saturation of the monochrome picture and improving the color gamut of the OLED display panel 200.

[0124] It is understood that, in the preparation process, before evaporating the light-emitting functional layer 21B of each color sub-pixel 21, an isolation column 32 may be formed on the raised portion 22B of the pixel definition layer 22, for example, an undercut structure of an "inverted trapezoidal" isolation column 32, a "T"-shaped isolation column 32, an "I-shaped" isolation column 32, etc. is formed, and the isolation column 32 is located between two adjacent pixel openings 22A and is arranged around the pixel opening 22A. The isolation column 32 can be used to separate at least one sub-film layer of the light-emitting functional layer 21B of two adjacent sub-pixels 21 in the subsequent process, thereby preventing mutual crosstalk between the sub-pixels 21. Exemplarily, the isolation column 32 may be formed by a plurality of stacked metal layers 24, such as a Ti (titanium)-Al (aluminum)-Ti (titanium) stacked structure; or, the isolation column 32 may also be formed by an inorganic insulating layer 25 and / or an organic layer, which is not limited in the embodiments of the present disclosure.

[0125] Subsequently, at least one sub-film layer of each color sub-pixel 21 is evaporated on the base substrate 20 in a certain order. The isolation column 32 is peeled off after at least one sub-film layer is evaporated, for example, the isolation column 32 is peeled off after the hole transport layer 21B1 of each sub-pixel 21 is evaporated; or, the isolation column 32 is peeled off after the hole transport layer 21B1 and the light-emitting material layer 21B2 of each sub-pixel 21 are evaporated; or, when preparing a tandem device, the tandem device includes at least two light-emitting functional layers 21B connected in series, and a charge generation layer 21F is arranged between adjacent light-emitting functional layers 21B, then the isolation column 32 is peeled off after the first light-emitting functional layer 21B and the charge generation layer 21F are evaporated; or, after each sub-film layer is prepared, the isolation column 32 is peeled off, and after the isolation column 32 is peeled off, at least one film layer of adjacent sub-pixels 21 is disconnected from each other, and a gap 23 is formed at the position of the isolation column 32.

[0126] It can be understood that since each sub-film layer of the light-emitting functional layer 21B has a certain amount of carriers, the carrier intensities in different sub-film layers are different; although the isolation column 32 is peeled off in different process sections, the sub-film layer isolation effects between adjacent sub-pixels 21 are different, but the setting of the isolation column 32 can at least isolate the carrier transmission between adjacent sub-pixels 21 to a certain extent, thereby reducing the low-grayscale crosstalk between adjacent sub-pixels 21 and reducing the accompanying luminescence problem between adjacent sub-pixels 21.

[0127] In the embodiment of the present disclosure, since at least one sub-membrane layer of adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B and a gap 23 is formed, when the second electrode 21C is subsequently prepared, the second electrode 21C will be deposited at the gap 23, so that in the direction perpendicular to the base substrate 20, the height of the second electrode 21C in the gap 23 is lower than the height of the second electrode 21C on the light-emitting functional layer 21B at the position of the protrusion 22B, that is, the side of the second electrode 21C of the same sub-pixel 21 away from the light-emitting area sinks at the gap 23. In addition, the second electrodes 21C of the two adjacent sub-pixels 21 are electrically connected at the gap 23, so that the second electrode 21C can be shared. During preparation, each second electrode 21C can be set in the same layer, that is, the second electrode 21C is overlapped on the entire surface, that is, it is prepared simultaneously in the same process section, thereby improving the process efficiency.

[0128] In some embodiments, the luminous colors of two adjacent sub-pixels 21 may be different or the same, which is not limited here.

[0129] Figure 3 FIG. 2 is a schematic plan view of a display panel 200 according to an embodiment of the present disclosure.

[0130] In the embodiment of the present disclosure, the display panel 200 may include: a display area and a frame area. The frame area is arranged around the display area; or, the frame area is located on at least one side of the display area, for example, the non-display area may be located on one side of the display area, or, it may be located on multiple sides of the display area, such as the non-display area may surround the outside of the display area.

[0131] In some embodiments, the display area may include a plurality of pixel units P arranged in an array. Figure 3 As shown, the display area is provided with a plurality of pixel units P arranged in an array in a first direction and a second direction. For example, the first direction can be Figure 3 The Y axis in the figure is represented by Figure 3 For example, multiple pixels P can be arranged into M rows and N columns, where M and N are integers greater than 2. Figure 3 Only a few pixel units P are shown as an example of arrangement, and ellipsis indicates other pixel units not shown. The first direction Y indicates the pixel column direction, and the second direction X indicates the pixel row direction. The first direction Y and the second direction X intersect, for example, are perpendicular to each other. It should be noted that Figure 3 The arrangement of the pixel units shown in the figure is for illustration only and is not intended to be limiting. The actual arrangement is determined according to the needs of the product.

[0132] In some embodiments, each pixel unit P may include a plurality of sub-pixels 21, and each sub-pixel 21 may display a single color or more than one color. For example, the plurality of sub-pixels 21 may include a sub-pixel p1, a sub-pixel p2, and a sub-pixel p3, and the sub-pixel p1, the sub-pixel p2, and the sub-pixel p3 are sub-pixels 21 of different colors, such as red, green, and blue. The brightness (grayscale) of the sub-pixels 21 of different colors in each pixel unit can be adjusted, and the display of multiple colors can be realized by color combination and superposition, thereby realizing full-color display.

[0133] Each sub-pixel 21 may include a light-emitting device and a pixel driving circuit for driving the light-emitting device. For example, the light-emitting device may be an organic light-emitting diode (OLED) or a quantum dot organic light-emitting diode (QLED). For example, the red sub-pixel 21 may include a light-emitting device for emitting red light, the green sub-pixel 21 may include a light-emitting device for emitting green light, and the blue sub-pixel 21 may include a light-emitting device for emitting blue light.

[0134] The pixel driving circuit may include electronic components such as multiple transistors and capacitors. For example, the pixel driving circuit may include three transistors and one capacitor, forming a 3T1C (i.e., a driving transistor, two switching transistors and one capacitor). It may also include more than three transistors and at least one capacitor, such as a 4T1C (i.e., a driving transistor, three switching transistors and one capacitor), a 5T1C (i.e., a driving transistor, four switching transistors and one capacitor) or a 7T1C (i.e., a driving transistor, six switching transistors and one capacitor), etc. Among them, the transistor may be a thin film transistor (TFT), a metal oxide semi conductor (MOS) or other switching devices with the same characteristics.

[0135] It can be understood that the transistor may include a control electrode, a first electrode, and a second electrode. The control electrode is the gate of the transistor, the first electrode is one of the source and drain of the transistor, and the second electrode is the other of the source and drain of the transistor. Since the source and drain of the transistor may be symmetrical in structure, the source and drain may be structurally indistinguishable, so the source of the transistor is called the first electrode, and may also be called the second electrode.

[0136] In some embodiments, the substrate 20 may be a rigid substrate, which may include, for example, a glass substrate, a PMMA (Polymethyl methacrylate) substrate, a silicon substrate, etc. In this case, the display panel 200 may be a rigid display panel 200 .

[0137] In some other embodiments, the substrate 20 may be a flexible substrate. The flexible substrate may include, for example, a PET (Polyethylene terephthalate) substrate, a PEN (Polyethylenenaphthalate diformic acid glycol ester) substrate, or a PI (Polyimide) substrate. In this case, the display panel 200 may be a flexible display panel 200.

[0138] The display panel 200 further includes a driving circuit layer (not shown in the figure) stacked between the first electrode 21A and the base substrate 20. The driving circuit layer is configured to form the above-mentioned pixel driving circuit of each sub-pixel 21. For example, the driving circuit layer may include a plurality of pixel driving circuits distributed in an array in the first direction Y and the second direction X. For example, in addition to the pixel driving circuit, the driving circuit layer may also be used to form a sensing element such as an ambient light sensor and its driving element integrated under the screen, which is specifically set according to actual needs, and this embodiment does not limit this.

[0139] like Figure 2 As shown, the pixel opening 22A exposes at least a portion of the first electrode 21A. For example, the orthographic projection of the pixel opening 22A on the base substrate 20 is located within the orthographic projection range of the first electrode 21A on the base substrate 20.

[0140] The light-emitting functional layer 21B is disposed on the side of the first electrode 21A away from the base substrate 20. For example, a portion of the light-emitting functional layer 21B is located in the corresponding pixel opening 22A, is electrically connected to the corresponding first electrode 21A, and can extend from the side wall of the pixel definition layer 22 facing the pixel opening 22A to the top of the protrusion 22B located on the pixel definition side, and is disconnected from the light-emitting functional layer 21B of the adjacent sub-pixel 21 at the top of the protrusion 22B, so that there is a gap 23 between the sides of the light-emitting functional layers 21B of the two adjacent sub-pixels 21 that are close to each other.

[0141] In some embodiments, the light-emitting functional layer 21B may include a light-emitting material layer 21B2 (EML) and a functional material layer stacked with the light-emitting material layer 21B2. For example, the functional material layer may include: one or more of a hole injection layer (HIL), a hole transport layer 21B1 (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), which may be specifically configured according to actual needs, and the present disclosure does not limit this.

[0142] In some embodiments, the plurality of sub-film layers include a hole transport layer 21B1, and the hole transport layers 21B1 of two adjacent sub-pixels 21 are disconnected 23 at the top of the protrusion 22B; or

[0143] The plurality of sub-film layers include a stacked hole transport layer 21B1 and a light emitting material layer 21B2. In two adjacent sub-pixels 21, the hole transport layer 21B1 of one and the light emitting material layer 21B2 of the other are disconnected 23 at the top of the protrusion 22B.

[0144] It is understood that when the OLED device is a single device, there is one light-emitting functional layer 21B, and one light-emitting functional layer 21B may include the above-mentioned light-emitting material layer 21B2 (EML) and a functional material layer stacked with the light-emitting material layer 21B2. For example, the functional material layer may include: one or more of a hole injection layer (HIL), a hole transport layer 21B1 (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0145] It can be understood that, since the excited state energy level structures of the hole transport layers 21B1 of adjacent sub-pixels 21 match (or the carrier transport capability of the hole transport layer 21B1 is strong), or among the adjacent sub-pixels 21, the excited state energy level structure of the hole transport layer 21B1 of one sub-pixel 21 matches the light-emitting material layer 21B2 of another sub-pixel 21, if the light-emitting functional layers 21B of adjacent sub-pixels 21 overlap with each other, the holes of one of the sub-pixels 21 will be transferred to the other sub-pixel 21 through the overlapping hole transport layer 21B1 or the light-emitting material layer 21B2, thereby causing accompanying light emission of other colors in a monochrome screen due to low grayscale crosstalk.

[0146] On this basis, the hole transport layer 21B1 of two adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, or, in two adjacent sub-pixels 21, the hole transport layer 21B1 of one and the light-emitting material layer 21B2 of the other are disconnected at the top of the protrusion 22B, thereby avoiding crosstalk between sub-film layers with strong carrier transport capabilities, and to a certain extent avoiding low grayscale crosstalk that causes accompanying light emission of other colors in a monochrome screen.

[0147] Figure 4 A second partial cross-sectional structural schematic diagram of the display panel 200 according to an embodiment of the present disclosure is shown.

[0148] In some embodiments, the light-emitting functional layer 21B includes a first light-emitting functional layer 21D and a second light-emitting functional layer 21E stacked together, a charge generation layer 21F (CGL) is provided between the first light-emitting functional layer 21D and the second light-emitting functional layer 21E, the first light-emitting functional layer 21D and the charge generation layer 21F constitute a light-emitting functional structural layer, and the light-emitting functional structural layers of the two adjacent sub-pixels 21 are disconnected 23 at the top of the protrusion 22B.

[0149] It can be understood that when the OLED device is a tandem device, the light-emitting functional layer 21B includes a first light-emitting functional layer 21D and a second light-emitting functional layer 21E stacked, and a charge generation layer 21F is provided between the first light-emitting functional layer 21D and the second light-emitting functional layer 21E. Among them, any one between the first light-emitting functional layer 21D and the second light-emitting functional layer 21E includes a light-emitting material layer 21B2 (EML) and a functional material layer stacked with the light-emitting material layer 21B2. For example, the functional material layer may include: one or more of a hole injection layer (HIL), a hole transport layer 21B1 (HTL), an electron transport layer (ETL), and an electron injection layer (EIL).

[0150] It can be understood that, since the excited state energy level structures of the hole transport layers 21B1 of adjacent sub-pixels 21 match each other (or the carrier transport capability of the hole transport layer 21B1 is relatively strong), or in adjacent sub-pixels 21, the excited state energy level structure of the hole transport layer 21B1 of one sub-pixel 21 matches the light-emitting material layer 21B2 of another sub-pixel 21, if the light-emitting functional layers 21B of adjacent sub-pixels 21 overlap each other, it will cause the holes of one of the sub-pixels 21 to pass through the overlapping hole transport layer 21B1. Or the light-emitting material layer 21B2 is transferred to another sub-pixel 21, thereby causing accompanying light emission of other colors in a monochrome screen due to low grayscale crosstalk; in addition, since the charge generation layer 21F has a strong carrier transport capability, if the charge generation layer 21F between two adjacent sub-pixels 21 is overlapped, it may also cause the holes in one of the sub-pixels 21 to be transferred to the other sub-pixel 21 through the overlapping hole transport layer 21B1 or the light-emitting material layer 21B2, thereby causing accompanying light emission of other colors in a monochrome screen due to low grayscale crosstalk.

[0151] On this basis, the light-emitting functional structural layers of two adjacent sub-pixels 21 are disconnected at the top of the protrusion 22B, that is, the first light-emitting functional layer 21D of two adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, and the charge generation layer 21F of two adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, thereby avoiding crosstalk between sub-film layers with strong carrier transmission capabilities, and to a certain extent avoiding low grayscale crosstalk that causes accompanying light emission of other colors in a monochrome screen.

[0152] The second electrode 21C is stacked on the side of the light-emitting functional layer 21B away from the base substrate 20. The light-emitting device of each sub-pixel 21 includes a second electrode 21C stacked on the light-emitting functional layer 21B of the sub-pixel 21.

[0153] One of the first electrode 21A and the second electrode 21C is the anode of the light-emitting device, and the other is the cathode of the light-emitting device. Taking the first electrode 21A as the anode and the second electrode 21C as the cathode as an example, the first electrode 21A can be, for example, a composite structure composed of a transparent conductive oxide film / metal film / transparent conductive oxide film stacked in sequence. The material of the transparent conductive oxide film is, for example, any one of ITO (Indium tin oxide) and IZO (Indium zinc oxide), and the material of the metal film is, for example, any one of gold (Au), silver (Ag), nickel (Ni) and platinum (Pt). Alternatively, the first electrode 21A can also be a single-layer structure, and the material of the single-layer structure can be any one of ITO, IZO, Au, Ag, Ni, and Pt. The second electrode 21C can be, for example, a metal film with a certain transmittance, such as any one of aluminum (Al), silver (Ag) and magnesium (Mg), or any one of magnesium-silver alloy and aluminum-lithium alloy.

[0154] It is understandable that, taking the second electrode 21C as a cathode as an example, the thickness of the cathode directly determines the transmittance, and the cathode resistance will affect the uniformity of the OLED panel, such as display brightness, touch refresh rate, etc. Therefore, improving the IR Drop (voltage drop) problem of the cathode plays an important role in improving the display effect of the OLED (such as display brightness, touch refresh rate, etc.).

[0155] Figure 5 Another partial cross-sectional structural schematic diagram of an embodiment of the present disclosure is shown.

[0156] In some embodiments, the display panel 200 further includes: a metal layer 24 and an insulating layer 25. The metal layer 24 is disposed on one side of the base substrate 20. The insulating layer 25 is disposed on a side of the metal layer 24 away from the base substrate 20, and the insulating layer 25 includes a plurality of first through holes 251 disposed at intervals. The protrusion 22B is provided with a second through hole 22C, the second through hole 22C, the first through hole 251 and the gap 23 are interconnected, and the second electrode 21C sunk into the gap 23 is electrically connected to the metal layer 24 through the first through hole 251 and the second through hole 22C.

[0157] Exemplarily, the metal layer 24 may be a source-drain (SD) metal layer 24. If the source-drain metal layer 24 includes multiple layers, the metal layer 24 may be the source-drain metal layer 24 closest to the anode layer. The insulating layer 25 may be a planarization layer (PLN), which has insulating properties.

[0158] It can be understood that the second through hole 22C, the first through hole 251 and the gap 23 are interconnected, which means that: in the direction perpendicular to the base substrate 20, the positions of the second through hole 22C, the first through hole 251 and the gap 23 correspond, so that the cathode material can be deposited in the gap 23 and then continue to sink to the first through hole 251 and the second through hole 22C, thereby being electrically connected to the metal layer 24.

[0159] It is understandable that on the base substrate 20, a first through hole 251 is provided in the raised portion 22B between the light-emitting areas of at least two adjacent sub-pixels 21, so that the cathode material can be connected to the source-drain metal layer 24. Different numbers of the first through holes 251 may result in different IR drops of the cathode material, which can be specifically set according to actual needs and is not limited here.

[0160] It is understandable that, in the process flow, if the light-emitting functional layer 21B between adjacent sub-pixels 21 is separated by an isolation column 32, when the isolation column 32 is formed on the pixel definition layer 22, the material of the isolation column 32 will enter the first through hole 251 and the second through hole 22C and contact the metal layer 24. At this time, the isolation column 32 is made of a conductive material, so that the first through hole 251 and the second through hole 22C are filled with a conductive material; after the isolation column 32 is peeled off, a gap 23 is left at the position of the isolation column 32. When the cathode layer is subsequently prepared, the cathode material will enter the gap 23 and contact the conductive material in the through hole, thereby achieving electrical connection with the metal layer 24. Exemplarily, if different materials are used to prepare the cathode and the isolation column 32, the first through hole 251 is filled with a conductive material, and the conductive material is different from the material used to prepare the second electrode 21C; or, if the same material is used to prepare the cathode and the isolation column 32, the first through hole 251 is filled with a conductive material, and the conductive material is the same as the material used to prepare the second electrode 21C.

[0161] It can be understood that after the conductive material of the isolation column 32 is deposited into the first through hole 251 and the second through hole 22C, the subsequently prepared cathode is connected to the source-drain metal layer 24, that is, the conductive material of the isolation column 32 can serve as an auxiliary electrode of the cathode to achieve electrical connection between the cathode and the source-drain metal layer 24.

[0162] In some embodiments, the metal layer 24 includes a ground terminal, and the second electrode 21C sunk into the gap 23 is electrically connected to the ground terminal through the first through hole 251 and the second through hole 22C.

[0163] It can be understood that the cathode is connected to the ground terminal via hole on the source and drain metal layer 24, that is, the cathode is connected to the VSS (English: Voltage Source and Sink, Chinese: ground terminal) via hole on the source and drain metal layer 24, so that the VSS line of the cathode is overlapped in the plane, which can reduce the voltage drop of the VSS line compared to the cathode being connected to the VSS at the edge of the display panel 200, thereby reducing the display power consumption, improving the display uniformity, and improving the display brightness and touch refresh rate. In addition, since the sub-pixel 21 is located in the display area, the cathode is connected to the VSS via hole on the source and drain metal layer 24, and the VSS line of the cathode does not need to be routed in the frame area, thereby achieving the VSS line of the cathode overlapping in the plane, thereby realizing a narrow frame design, for example, the two side frames of the GOA (Gate Driver on Array) can be reduced by 0.1mm to 0.3mm, such as 0.1mm, 0.2mm or 0.3mm.

[0164] It is understandable that when the base substrate 20 is a rigid substrate or a flexible substrate, the effects brought about by the above cathode wiring method may be different.

[0165] For example: for rigid substrates, the cathode IR drop is reduced by at least 70%, and when the RGB sub-pixels 21 share the cathode routing, the power consumption is saved by 10%. For example: at high brightness of 3500nit, according to the RGB data range simulated by the single OLED device, the Vss of RGB can be set to the range of R sub-pixel 21: 1.7-5.17V, G sub-pixel 21: 2.22-5.06V, B sub-pixel 21: 0.92-4.87V. In theory, the voltage difference can be saved by 0.3V. Another example: at high brightness of 2000nit, according to the RGB data range simulated by the Tandem OLED device, the Vss of RGB can be set to the range of R sub-pixel 21: 4.73V, G sub-pixel 21: 4.77V, B sub-pixel 21: 3.97V. In theory, the voltage difference can be saved by 0.8V.

[0166] Continue to see Figures 2 to 5 In some embodiments, the multiple sub-membrane layers of two adjacent sub-pixels 21 are disconnected 23 at the top of the protrusion 22B; the second electrodes 21C of two adjacent sub-pixels 21 sink to the bottom of the gap 23 and are electrically connected.

[0167] Figure 6 Shows Figure 2 Enlarged view of the part within the dotted box.

[0168] In some embodiments, the plurality of sub-pixels 21 are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect. Two adjacent sub-pixels 21 include a first sub-pixel 26 and a second sub-pixel 27; in the first direction, a first distance d1 is provided between a side of the first sub-pixel 26 close to the second sub-pixel 27 and a side of the protrusion 22B facing the light-emitting area of ​​the first sub-pixel 26, and a second distance d2 is provided between a side of the second sub-pixel 27 close to the first sub-pixel 26 and a side of the protrusion 22B facing the light-emitting area of ​​the second sub-pixel 27, and the sum of the first distance d1 and the second distance d2 is less than the width W1 of the gap 23.

[0169] It can be understood that, in order to ensure the electrical connection between the cathode and the metal layer 24, at least one sub-membrane layer of adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, that is, isolated from each other. The sum of the overlapping widths of the light-emitting functional layers 21B of adjacent sub-pixels 21 overlapped on the same protrusion 22B on the protrusion 22B is less than the width of the gap 23, thereby ensuring that there is a sufficient width of the gap 23 to prevent the light-emitting functional layers 21B of the two sub-pixels 21 from crosstalking with each other, and the larger the width of the gap 23, the more cathode material can sink into the gap 23, thereby ensuring that the cathode material can achieve effective electrical connection with the metal layer 24.

[0170] Please continue to see Figure 6 In some embodiments, the plurality of sub-pixels 21 are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect. In the first direction, the width W1 of the gap 23 is smaller than the width W2 of the pixel opening 22A.

[0171] It can be understood that the gap 23 is located at the top of the raised portion 22B, and the light-emitting functional layer 21B of the sub-pixel 21 is overlapped on the raised portion 22B, so the width of the raised portion 22B is greater than the width of the gap 23. When the width of the gap 23 is smaller than the width of the pixel opening 22A, the effective light-emitting area can be increased and the display effect can be enhanced (a narrower gap 23 means more space for the light-emitting material, thereby increasing the effective light-emitting area of ​​each sub-pixel 21). In addition, the resolution of the display product (the number of pixels per unit area, usually expressed in pixels per inch (PPI)) can also be improved.

[0172] Figure 7 A third partial cross-sectional schematic diagram of the display panel 200 according to the embodiment of the present disclosure is shown.

[0173] In some embodiments, the plurality of sub-pixels 21 are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect. Two adjacent sub-pixels 21 include a first sub-pixel 26 and a second sub-pixel 27; the gap 23 includes a first gap 231 and a second gap 232 spaced apart from each other, and the light-emitting functional layer 21B of the first sub-pixel 26 includes a first sub-layer 28 and a second sub-layer 29 located on the top of the protrusion 22B. In the first direction, the first gap 231 is located between the first sub-layer 28 and the second sub-layer 29, and the second gap 232 is located between the second sub-layer 29 and the at least one sub-membrane layer of the second sub-pixel 27.

[0174] It is understandable that if the FMM (Fine Metal Mask) process is used to prepare the RGB (red, green and blue) sub-pixels 21, it is necessary to provide support for the mask during the preparation process. On this basis, in order to achieve the refinement of the film layer control, a support portion 30 (PS, Photo Spacers) can be separately provided to support the mask, and an isolation column 32 is provided to separate the light-emitting functional layer 21B of the adjacent sub-pixels 21 and the isolation column 32 as an auxiliary cathode. Therefore, in the first direction, a gap is required between the support portion 30 and the isolation column 32, so that after the support portion 30 and the isolation column 32 are peeled off, a first gap 231 and a second gap 232 are formed on the top of the protrusion 22B, the first gap 231 is located between the first sub-layer 28 and the second sub-layer 29, and the second gap 232 is located between the second sub-layer 29 and the at least one sub-film layer of the second sub-pixel 27.

[0175] Figure 8 Shows Figure 7 A magnified view of the part within the dashed box.

[0176] In some embodiments, a third distance d3 is provided between the sides where the first gap 231 and the second gap 232 are close to each other, and the third distance d3 is greater than or equal to 2 μm, or the third distance d3 is greater than or equal to 4 μm, thereby ensuring that no film layer remains on the isolation column 32 or the support portion 30 after etching.

[0177] In some embodiments, the first through hole 251 , the second through hole 22C, and the second gap 232 are interconnected.

[0178] Fig. 9 A fourth partial cross-sectional schematic diagram of the display panel 200 according to the embodiment of the present disclosure is shown.

[0179] In some embodiments, it further includes: a support portion 30, which is disposed on a side of the protruding portion 22B away from the base substrate 20. The plurality of sub-pixels 21 are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect. Two adjacent sub-pixels 21 include a first sub-pixel 26 and a second sub-pixel 27. The light-emitting functional layer 21B of the first sub-pixel 26 includes a first sub-layer 28 and a second sub-layer 29 located on the top of the protruding portion 22B. In the first direction, the support portion 30 is located between the first sub-layer 28 and the second sub-layer 29, and the gap 23 is located between the second sub-layer 29 and the at least one sub-membrane layer of the second sub-pixel 27.

[0180] It is understandable that the shape of the support portion 30 can be any shape, such as the ellipsoid shown in the figure, or a frustum, an inverted trapezoid, a yurt, a pyramid, a triangle, etc., which is not limited here.

[0181] It is understandable that if the FMM (Fine Metal Mask) process is used to prepare the RGB (red, green and blue) sub-pixels 21, it is necessary to provide support for the mask during the preparation process. On this basis, in order to achieve the refinement of the film layer control, a support portion 30 (PS, Photo Spacers) can be separately provided to support the mask, and an isolation column 32 is provided to separate the light-emitting functional layer 21B of the adjacent sub-pixels 21 and the isolation column 32 as an auxiliary cathode. Therefore, in the first direction, a spacing is required between the support portion 30 and the isolation column 32, so that after the isolation column 32 is peeled off (the support portion 30 is not peeled off), a support portion 30 and a gap 23 are formed on the top of the protrusion 22B, and the support portion 30 is located between the first sub-layer 28 and the second sub-layer 29, and the gap 23 is located between the second sub-layer 29 and the at least one sub-film layer of the second sub-pixel 27.

[0182] Fig.10 Shows Fig. 9 A magnified view of the part within the dashed box.

[0183] In some embodiments, a fourth distance d4 is provided between the support portion 30 and a side of the gap 23 that are close to each other, and the fourth distance d4 is greater than or equal to 2 μm, or the fourth distance d4 is greater than or equal to 4 μm.

[0184] It is understandable that during the preparation process, the pixel definition layer 22 (PDL) and the support portion 30 can be formed simultaneously, that is, the halftone process, in which the support portion 30 and the isolation column 32 are prepared in different process sections. To ensure that there is no film layer remaining on the isolation column 32 or the support portion 30 after etching, the fourth distance is greater than or equal to 2μm. Alternatively, during the preparation process, the pixel definition layer 22 (PDL) can be formed first, and then the support portion 30 and the isolation column 32 can be formed simultaneously. Considering two etchings, the fourth distance needs to be greater than or equal to 4μm.

[0185] In some embodiments, in the first direction, a fifth distance d5 is present between a side of the first sub-pixel 26 close to the second sub-pixel 27 and a side of the protrusion 22B facing the light-emitting area of ​​the first sub-pixel 26. Figure 8 Alternatively, in the first direction, a sixth distance d6 exists between a side of the first sub-pixel 26 close to the second sub-pixel 27 and a side of the protrusion 22B facing the pixel opening 22A of the first sub-pixel 26, as shown in FIG. Fig.10 As shown, the sixth distance d6 is greater than the fifth distance d5.

[0186] It can be understood that when the support portion 30 and the isolation column 32 are prepared in different process sections, compared with when the support portion 30 and the isolation column 32 are prepared in the same process section, the width of the sub-pixel 21 overlapping the protrusion 22B is larger when the support portion 30 and the isolation column 32 are prepared in the same process section, for example, the difference between the sixth distance and the fifth distance is 2.

[0187] In some embodiments, the plurality of sub-pixels 21 are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect. In the first direction, there is a seventh distance (e.g., 1 / 2) between a side of the light-emitting functional layer 21B of the sub-pixel 21 away from the pixel opening 22A and a side of the protrusion 22B facing the pixel opening 22A of the sub-pixel 21. Figure 6 d1 or d2 in, or Figure 8 d5 in, or Fig.10 In d6), the value range of the seventh distance is: 1μm to 5μm, for example, 1μm, 2μm, 3μm, 4μm or 5μm.

[0188] Fig.11 A fifth partial structural diagram of the display panel 200 according to an embodiment of the present disclosure is shown; Fig.12 A sixth partial structural schematic diagram of the display panel 200 according to an embodiment of the present disclosure is shown.

[0189] In some embodiments, the light-emitting functional layer 21B includes a plurality of stacked light-emitting material layers 21B2 , and each of the light-emitting material layers 21B2 emits light of a different color.

[0190] It is understood that when the light-emitting functional layer 21B includes a plurality of stacked light-emitting material layers 21B2, for example, it includes a red light-emitting material layer 21B2, a green light-emitting material layer 21B2 and a blue light-emitting material layer 21B2, or includes a yellow light-emitting material layer 21B2 and a blue light-emitting material layer 21B2. In this case, the OLED device can be a WOLED device (white light OLED) or a QOLED (Quantum Dot Light Emitting Diodes, quantum dot light-emitting diode) device.

[0191] In some embodiments, the display panel 200 further includes:

[0192] The color filter layer 31 is arranged on the side of the second electrode 21C away from the base substrate 20 (top emission white light OLED device, such as Fig.11 ), or arranged on a side of the first electrode 21A away from the base substrate 20 (bottom-emitting white light OLED device, such as Fig.12 As shown), the color filter layer 31 includes a plurality of color filter units, and the color filter units are configured to filter the light emitted by each of the light-emitting material layers 21B2 of the sub-pixel 21.

[0193] In some embodiments, the base substrate 20 is a rigid substrate or a flexible substrate, and the density of the gaps 23 on the rigid substrate is greater than the density of the gaps 23 on the flexible substrate.

[0194] It is understandable that for a rigid substrate, due to the limited impact strength and Newton ring requirements, an isolation column 32 may be provided around each sub-pixel 21, so that after the isolation column 32 is peeled off, a plurality of gaps 23 are formed around the sub-pixel 21, and the gaps 23 are provided around the sub-pixel 21. For a flexible substrate, due to the influence of foreign matter on the isolation column 32, the distribution density of the isolation column 32 may be reduced as much as possible on the basis of serving as an auxiliary cathode and isolating the light-emitting functional layer 21B, for example, the ratio of the sub-pixel 21 to the isolation column 32 is 16:1, 18:1, 2.67:1, etc.

[0195] Fig.13 A schematic structural diagram of a display device 300 according to an embodiment of the present disclosure is shown.

[0196] A second aspect of an embodiment of the present disclosure provides a display device 300300, comprising a display panel 200200 as described in any one of the first aspects.

[0197] The display device 300300 provided in the embodiment of the present application includes the display panel 200200 in any of the above embodiments, and the display device 300200 can be any product or component with a display function, such as a mobile phone, a tablet computer, a digital photo frame, an electronic paper, etc. The display device 300300 provided in the embodiment of the present application has all the beneficial effects of the display panel 200200 provided in the embodiment of the present application, and the specific description of the display panel 200200 in the above embodiments can be referred to, and this embodiment will not be repeated here.

[0198] A third aspect of the present disclosure provides a method for manufacturing a display panel 200, including:

[0199] Step S1. Providing a substrate 20;

[0200] Step S2. forming a plurality of sub-pixels 21 and a pixel definition layer 22 on the base substrate 20;

[0201] The plurality of sub-pixels 21 are arranged on one side of the base substrate 20, and the sub-pixels 21 include a first electrode 21A, a light-emitting functional layer 21B and a second electrode 21C which are stacked, and the light-emitting functional layer 21B includes a plurality of sub-film layers;

[0202] The pixel definition layer 22 is arranged on one side of the base substrate 20, including a plurality of pixel openings 22A arranged at intervals, and a protrusion 22B and a gap 23 are arranged between two adjacent pixel openings 22A; wherein, at least one of the sub-membrane layers of two adjacent sub-pixels 21 is disconnected at the top of the protrusion 22B, and the second electrodes 21C of two adjacent sub-pixels 21 are sunken and electrically connected at the gap 23.

[0203] Therefore, the display panel 200 prepared by the preparation method of the display panel 200 of the embodiment of the present disclosure can block the migration of carriers between the light-emitting functional layers 21B of adjacent sub-pixels 21, avoiding the accompanying light emission (color mixing problem) caused by low-grayscale crosstalk between adjacent sub-pixels 21, thereby effectively improving the color saturation of the monochrome picture and improving the color gamut of the OLED display panel 200.

[0204] Fig.14 A first flow chart showing a method for manufacturing a display panel 200 according to an embodiment of the present disclosure; Fig.15 A second flow chart showing a method for manufacturing a display panel 200 according to an embodiment of the present disclosure; Fig.16 A third flow chart of the method for manufacturing the display panel 200 according to the embodiment of the present disclosure is shown.

[0205] Among them, it should be noted that Fig.14The manufacturing process flow chart of the display panel 200 is shown when the isolation column 32 simultaneously serves as a support FMM, an auxiliary cathode, and a partition of the light-emitting functional layer 21B. Fig.14 (a1)-(e1) show partial cross-sectional structural diagrams of the display panel 200 at different process stages.

[0206] In some embodiments, the forming of a plurality of sub-pixels 21 and a pixel definition layer 22 on the base substrate 20 includes:

[0207] Step S21. Forming the first electrodes 21A of the plurality of sub-pixels 21 on the base substrate 20;

[0208] In some embodiments, before forming the first electrodes 21A of the plurality of sub-pixels 21 on the base substrate 20, the method further includes:

[0209] Step S201. Forming a metal layer 24 on the base substrate 20;

[0210] It can be understood that the metal layer 24 can be a source-drain metal layer 24, a metal film is deposited on the base substrate 20, and the metal film is patterned by a patterning process to form a source-drain metal layer 24 pattern, and the source-drain metal layer 24 pattern may include: a source electrode and a drain electrode, a first power line VSS and a second power line VDD, and the first power line VSS is located in the display area. In some embodiments, the source-drain metal layer 24 may also include a two-layer structure of a first source-drain metal layer 24 and a second source-drain metal layer 24. In this case, the first power line VSS and the second power line VDD may be located in the first source-drain metal layer 24, or in the second source-drain metal layer 24, or in both the first source-drain metal layer 24 and the second source-drain metal layer 24, that is, a double-layer wiring is formed.

[0211] Step S202 . Form an insulating layer 25 on the metal layer 24 , wherein the insulating layer 25 includes a plurality of first through holes 251 arranged at intervals.

[0212] Exemplarily, a flat film is coated and patterned through a patterning process to form a flat layer PLN (insulating layer 25), a first through hole 251 is formed on the flat layer, and the flat layer in the first through hole 251 is removed to expose the surface of the source and drain metal layer 24, for example, the surface of the VSS ground terminal.

[0213] Step S22. Forming the pixel definition layer 22 and a plurality of spacer columns 32 disposed at intervals on the base substrate 20, wherein the spacer columns 32 are located on the top of the protruding portion 22B;

[0214] The step of forming the pixel definition layer 22 and a plurality of spacer columns 32 spaced apart from each other on the base substrate 20 includes:

[0215] Step S221A. forming a pixel definition layer 22 on the insulating layer 25, wherein the protrusion 22B of the pixel definition layer 22 includes a second through hole 22C, and the second through hole 22C, the first through hole 251 and the gap 23 are interconnected;

[0216] Exemplarily, a pixel definition film is coated on the base substrate 20 on which the aforementioned pattern is formed, the pixel definition film is patterned by a patterning process, and a pixel definition (PDL) layer is formed by masking, exposure and development processes. The pixel definition layer 22 includes a plurality of spaced-apart pixel openings 22A and a raised portion 22B located between two adjacent pixel openings 22A, wherein the raised portion 22B includes a second through hole 22C.

[0217] Step S222A: forming a plurality of spacer columns 32 spaced apart from each other on the pixel definition layer 22 , wherein the spacer columns 32 are made of a conductive material, and the conductive material is deposited into the first through hole 251 and the second through hole 22C.

[0218] Exemplarily, an organic material film is coated on the base substrate 20 on which the aforementioned pattern is formed, and a pattern of isolation columns 32 is formed through masking, exposure and development processes. The shape of the isolation columns 32 can be an undercut structure of an "inverted trapezoidal" isolation column 32, a "T"-shaped isolation column 32, an "I-shaped" isolation column 32, etc. The conductive material can be a stacked structure of Ti (titanium)-Al (aluminum) or a stacked structure of Ti (titanium)-Al (aluminum)-Ti (titanium), which is not limited here.

[0219] Illustratively, the isolation column 32 includes a first isolation portion 321 and a second isolation portion 322 that are stacked.

[0220] like Fig.15 As shown in (a2)-(c2), in some embodiments, the pixel definition layer 22 and a plurality of spaced-apart isolation columns 32 are formed on the base substrate 20, including:

[0221] Step S221B. forming a pixel definition material layer 201 on the base substrate 20, and forming a support material layer on the pixel definition material layer 201;

[0222] Step S222B. synchronously etching the pixel definition material layer 201 and the support material layer to form the pixel definition layer 22 and a plurality of spaced support portions 30 on the pixel definition layer 22;

[0223] Exemplarily, the pixel definition material layer 201 is patterned by a patterning process, and the pixel definition material layer 201 and the support material layer are simultaneously etched by masking, exposure and development processes.

[0224] Step S223B: forming a material layer of isolation columns 32 on the pixel definition layer 22 , etching the material layer of the isolation columns 32 , and forming a plurality of isolation columns 32 spaced apart from each other on the pixel definition layer 22 , wherein the isolation columns 32 and the support portion 30 are spaced apart from each other.

[0225] Exemplarily, an organic material film is coated on the base substrate 20 with the aforementioned pattern, and a mask, exposure and development process are performed to form a pattern of the isolation column 32. The isolation column 32 and the support portion 30 are spaced apart from each other, which means that in the first direction, there is a gap 23 between the isolation column 32 and the support portion 30 on the side close to each other.

[0226] like Fig.16 As shown in (a3)-(c3), in some embodiments, the pixel definition layer 22 and a plurality of spaced-apart isolation columns 32 are formed on the base substrate 20, including:

[0227] Step S221C. forming a pixel definition layer 22 on the base substrate 20, and forming a spacer column 32 material layer and a support material layer on the pixel definition layer 22;

[0228] Step S222C: synchronously etching the support material layer and the isolation column 32 material layer to form a plurality of spaced support portions 30 and a plurality of spaced isolation columns 32 on the pixel definition layer 22 , wherein the isolation columns 32 and the support portions 30 are spaced apart from each other.

[0229] It is understandable that during the preparation process, if the pixel definition layer 22 (PDL) and the support part 30 are formed simultaneously, that is, the halftone process, the support part 30 and the isolation column 32 are prepared in different process sections. To ensure that there is no film layer remaining on the isolation column 32 or the support part 30 after etching, the fourth distance in the above text is greater than or equal to 2μm. Alternatively, during the preparation process, the pixel definition layer 22 (PDL) can be formed first, and then the support part 30 and the isolation column 32 can be formed simultaneously. Considering two etchings, the fourth distance needs to be greater than or equal to 4μm.

[0230] It should be noted that, in the direction perpendicular to the base substrate 20, the position of the isolation column 32 corresponds to the position of the first through hole 251 and the second through hole 22C, so that when the isolation column 32 is evaporated or deposited on the pixel definition layer 22, the preparation material (conductive material) of the isolation column 32 will fill the first through hole 251 and the second through hole 22C, thereby contacting the source-drain metal layer 24. When the cathode is subsequently prepared, the cathode material is filled into the gap 23 formed after the isolation column 32 is peeled off, so that the cathode contacts the conductive material in the first through hole 251 and the second through hole 22C, and then is electrically connected to the source-drain metal layer 24. Therefore, the conductive material of the isolation column 32 plays the role of an auxiliary cathode.

[0231] Step S23. Vapor-depositing the light-emitting functional layer 21B of each sub-pixel 21 on the pixel definition layer 22 and the isolation column 32;

[0232] In some embodiments, the plurality of sub-film layers include a hole transport layer 21B1, and in a direction perpendicular to the base substrate 20, the height of the isolation column 32 is greater than the height of the hole transport layer 21B1 and less than the total height of the plurality of sub-film layers. Alternatively, the light-emitting functional layer 21B includes a first light-emitting functional layer 21D and a second light-emitting functional layer 21E stacked, and a charge generation layer 21F is provided between the first light-emitting functional layer 21D and the second light-emitting functional layer 21E, and in a direction perpendicular to the base substrate 20, the maximum height of the isolation column 32 is greater than the sum of the heights of the first light-emitting functional layer 21D and the charge generation layer 21F, and the height of the isolation column 32 is less than the sum of the heights of the first light-emitting functional layer 21D, the charge generation layer 21F, and the second light-emitting functional layer 21E.

[0233] In some embodiments, the height of the isolation column 32 ranges from: (Angstrom) to For example or Alternatively, the height of the isolation column 32 may range from: to For example or

[0234] Step S24. Peeling off the isolation column 32;

[0235] In some embodiments, before forming the second electrode 21C of each sub-pixel 21 on the light-emitting functional layer 21B, the method further includes:

[0236] The supporting portion 30 is peeled off.

[0237] It is understandable that in the FMM process, the support portion 30 plays a role in supporting the FMM, so after the light-emitting functional layer 21B is prepared, the support portion 30 can be peeled off. Alternatively, for some display products, such as rigid products, in order to improve the structural stability between the substrates, the support portion 30 may not be peeled off, which is not limited here.

[0238] Step S25 . Form the second electrode 21C of each of the sub-pixels 21 on the light-emitting functional layer 21B.

[0239] In some embodiments, the second electrode 21C is a cathode, and the material of the cathode can be any one of aluminum (Al), silver (Ag) and magnesium (Mg), or any one of magnesium-silver alloy and aluminum-lithium alloy. The conductive material used to prepare the isolation column 32 is different from the material used to prepare the second electrode 21C.

[0240] It can be understood that in order to improve process efficiency, the second electrode 21C of each sub-pixel 21 is arranged on the same layer, that is, the entire surface is overlapped on the light-emitting functional layer 21B, and is sunk in the gap 23 between the light-emitting functional layer 21B of two adjacent sub-pixels 21, and contacts the conductive material in the first through hole 251 and the second through hole 22C, and then is electrically connected to the source-drain metal layer 24, for example, connected to the ground terminal VSS on the source-drain metal layer 24, thereby realizing the in-plane routing of the cathode VSS. Compared with the VSS routing in the border area, it can reduce the IR drop of the cathode, improve the display brightness and touch refresh rate, and realize a narrow border at the same time.

[0241] It should be noted that in the above-mentioned preparation process method, for the display product of the FMM process, the isolation column 32 can be used as the support part 30 to support the FMM, and can also be used as an auxiliary cathode to realize the in-plane VSS routing of the cathode, and can also be used to isolate the light-emitting functional layer 21B of the adjacent sub-pixel 21. For WOLED display products, the isolation column 32 can be used as an auxiliary cathode to realize the in-plane VSS routing of the cathode, and can also be used to isolate the light-emitting functional layer 21B of the adjacent sub-pixel 21. In addition, in order to achieve the refinement of the preparation process, a support part 30 can be set separately to support the FMM, and the isolation column 32 only serves as an auxiliary cathode to realize the in-plane VSS routing of the cathode, and to isolate the light-emitting functional layer 21B of the adjacent sub-pixel 21. At this time, the support part 30 and the isolation column 32 are set at an interval from each other.

[0242] It should be noted that the above embodiments illustrate the present invention rather than limit it, and that those skilled in the art may devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets shall not be construed as a limitation on the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present invention may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc., does not indicate any order. These words may be interpreted as names.

[0243] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. A display panel, characterized in that: include: substrate substrate; A plurality of sub-pixels are arranged on one side of the base substrate, wherein the sub-pixels include a first electrode, a light-emitting functional layer and a second electrode which are stacked, and the light-emitting functional layer includes a plurality of sub-film layers; A pixel definition layer is arranged on one side of the base substrate, and includes a plurality of pixel openings arranged at intervals, and a protrusion and a gap are arranged between two adjacent pixel openings; At least one of the sub-membrane layers of two adjacent sub-pixels is disconnected at the top of the protruding portion, and the second electrodes of the two adjacent sub-pixels are sunken at the gap and electrically connected.

2. The display panel according to claim 1, characterized in that: The plurality of sub-film layers include a hole transport layer, and the hole transport layers of two adjacent sub-pixels are disconnected at the top of the protrusion; or The plurality of sub-film layers include a stacked hole transport layer and a light-emitting material layer. In two adjacent sub-pixels, the hole transport layer of one and the light-emitting material layer of the other are disconnected at the top of the protrusion.

3. The display panel according to claim 1, characterized in that: The light-emitting functional layer includes a first light-emitting functional layer and a second light-emitting functional layer stacked together, a charge generation layer is provided between the first light-emitting functional layer and the second light-emitting functional layer, the first light-emitting functional layer and the charge generation layer constitute a light-emitting functional structural layer, and the light-emitting functional structural layers of two adjacent sub-pixels are disconnected at the top of the protrusion.

4. The display panel according to claim 1, characterized in that: Also includes: A metal layer is disposed on one side of the substrate; An insulating layer is arranged on a side of the metal layer away from the base substrate, and the insulating layer includes a plurality of first through holes arranged at intervals; The raised portion is provided with a second through hole, the second through hole, the first through hole and the gap are interconnected, and the second electrode sunk into the gap is electrically connected to the metal layer through the first through hole and the second through hole.

5. The display panel according to claim 4, characterized in that: The metal layer includes a ground terminal, and the second electrode sunk into the gap is electrically connected to the ground terminal through the first through hole and the second through hole.

6. The display panel according to claim 4, characterized in that: The first through hole is filled with a conductive material, and the conductive material is different from the material used to make the second electrode.

7. The display panel according to claim 1, characterized in that: The multiple sub-membrane layers of two adjacent sub-pixels are disconnected at the top of the protruding portion; The second electrodes of two adjacent sub-pixels are sunk to the bottom of the gap and are electrically connected.

8. The display panel according to claim 1, characterized in that: The second electrodes of the sub-pixels are arranged in the same layer.

9. The display panel according to claim 1, characterized in that: The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect; The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel; In the first direction, a first distance is provided between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the light-emitting area of ​​the first sub-pixel, and a second distance is provided between a side of the second sub-pixel close to the first sub-pixel and a side of the protrusion facing the light-emitting area of ​​the second sub-pixel, and the sum of the first distance and the second distance is less than the width of the gap.

10. The display panel according to claim 1, characterized in that: The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect; In the first direction, the width of the gap is smaller than the width of the pixel opening.

11. The display panel according to claim 1, characterized in that: The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect; The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel; The gap includes a first gap and a second gap spaced apart from each other, the light-emitting functional layer of the first sub-pixel includes a first sub-layer and a second sub-layer located on the top of the protruding portion, and in the first direction, the first gap is located between the first sub-layer and the second sub-layer, and the second gap is located between the second sub-layer and the at least one sub-membrane layer of the second sub-pixel.

12. The display panel according to claim 11, characterized in that: There is a third distance between the first gap and the second gap at sides close to each other, and the third distance is greater than or equal to 2 μm, or the third distance is greater than or equal to 4 μm.

13. The display panel according to claim 1, characterized in that: Also includes: A supporting portion, arranged on a side of the protruding portion away from the substrate; The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect; The two adjacent sub-pixels include a first sub-pixel and a second sub-pixel; The light-emitting functional layer of the first sub-pixel includes a first sub-layer and a second sub-layer located on the top of the protruding portion. In the first direction, the supporting portion is located between the first sub-layer and the second sub-layer, and the gap is located between the second sub-layer and the at least one sub-membrane layer of the second sub-pixel.

14. The display panel according to claim 13, characterized in that: There is a fourth distance between the support portion and a side of the gap that are close to each other, and the fourth distance is greater than or equal to 2 μm, or the fourth distance is greater than or equal to 4 μm.

15. The display panel according to claim 12 or 14, characterized in that: In the first direction, a fifth distance exists between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the light-emitting area of ​​the first sub-pixel; or In the first direction, there is a sixth distance between a side of the first sub-pixel close to the second sub-pixel and a side of the protrusion facing the pixel opening of the first sub-pixel, and the sixth distance is greater than the fifth distance.

16. The display panel according to claim 1, characterized in that: The plurality of sub-pixels are arranged in an array in a first direction and a second direction, and the first direction and the second direction intersect; In the first direction, there is a seventh distance between a side of the light-emitting functional layer of the sub-pixel away from the pixel opening and a side of the protrusion facing the pixel opening of the sub-pixel, and the value range of the seventh distance is: 1 μm to 5 μm.

17. A display device, characterized in that: Comprising a display panel as described in any one of claims 1-16.

18. A method for preparing a display panel, characterized in that: include: providing a substrate base plate; forming a plurality of sub-pixels and a pixel definition layer on the base substrate; The plurality of sub-pixels are arranged on one side of the base substrate, the sub-pixels include a first electrode, a light-emitting functional layer and a second electrode which are stacked, and the light-emitting functional layer includes a plurality of sub-film layers; The pixel definition layer is arranged on one side of the base substrate, and includes a plurality of pixel openings arranged at intervals, and a protrusion and a gap are arranged between two adjacent pixel openings; At least one of the sub-membrane layers of two adjacent sub-pixels is disconnected at the top of the protruding portion, and the second electrodes of the two adjacent sub-pixels are sunken at the gap and electrically connected.

19. The method according to claim 18, characterized in that The forming of a plurality of sub-pixels and a pixel definition layer on the substrate comprises: forming first electrodes of the plurality of sub-pixels on the base substrate; forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate, wherein the spacer columns are located on the top of the protrusion; Vapor-depositing a light-emitting functional layer of each sub-pixel on the pixel definition layer and the isolation column; peeling off the isolation column; A second electrode of each of the sub-pixels is formed on the light-emitting functional layer.

20. The method according to claim 19, characterized in that The multiple sub-film layers include a hole transport layer, and in a direction perpendicular to the base substrate, the height of the isolation column is greater than the height of the hole transport layer and less than the total height of the multiple sub-film layers; or The light-emitting functional layer includes a first light-emitting functional layer and a second light-emitting functional layer stacked together, a charge generation layer is provided between the first light-emitting functional layer and the second light-emitting functional layer, and in a direction perpendicular to the substrate, the maximum height of the isolation column is greater than the sum of the heights of the first light-emitting functional layer and the charge generation layer, and the height of the isolation column is less than the sum of the heights of the first light-emitting functional layer, the charge generation layer and the second light-emitting functional layer.

21. The method according to claim 19, characterized in that The step of forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate comprises: forming a pixel definition material layer on the base substrate, and forming a support material layer on the pixel definition material layer; Synchronously etching the pixel definition material layer and the support material layer to form the pixel definition layer and a plurality of support portions spaced apart on the pixel definition layer; An isolation column material layer is formed on the pixel definition layer, and the isolation column material layer is etched to form a plurality of isolation columns spaced apart from each other on the pixel definition layer, wherein the isolation columns are spaced apart from the support portion.

22. The method according to claim 19, characterized in that The step of forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate comprises: forming a pixel definition layer on the base substrate, and forming an isolation column material layer and a support material layer on the pixel definition layer; The support material layer and the isolation column material layer are synchronously etched to form a plurality of spaced support portions and a plurality of spaced isolation columns on the pixel definition layer, wherein the isolation columns and the support portions are spaced apart from each other.

23. The method according to claim 19, characterized in that Before forming the first electrodes of the plurality of sub-pixels on the substrate, the method further comprises: forming a metal layer on the base substrate; forming an insulating layer on the metal layer, wherein the insulating layer comprises a plurality of first through holes arranged at intervals; The step of forming the pixel definition layer and a plurality of spacer columns arranged at intervals on the base substrate comprises: forming a pixel definition layer on the insulating layer, wherein the protrusion of the pixel definition layer comprises a second through hole, and the second through hole, the first through hole and the gap are interconnected; A plurality of spacer columns are formed on the pixel definition layer and are arranged at intervals. The spacer columns are made of a conductive material, and the conductive material is deposited into the first through hole and the second through hole.

24. The method according to claim 23, characterized in that The conductive material used to prepare the isolation column is different from the material used to prepare the second electrode.

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