Display device and method of repairing same

Abstract

The invention relates to a display device and a method of repairing the same. The display device has an emission area and a non-emission area, and includes: first to third alignment electrodes sequentially arranged in a first direction; a plurality of first light-emitting elements and a plurality of second light-emitting elements, the plurality of first light-emitting elements being disposed between the first alignment electrode and the second alignment electrode, the plurality of second light-emitting elements being disposed between the second alignment electrode and the third alignment electrode; a first electrode electrically connected to a first end portion of each of the plurality of first light emitting elements and the plurality of second light emitting elements; and a second electrode electrically connected to a second end portion of each of the plurality of first light emitting elements and the plurality of second light emitting elements. The emission region may include a first region, a second region, and a third region divided in a second direction. The first electrode may be positioned in the first region and the second region, and may be electrically disconnected in the third region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2023-0147225 filed in the Korean Intellectual Property Office on October 30, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device and a method for repairing the display device. Background Art

[0004] Recently, as interest in information display increases, research and development of display devices are being continuously conducted. Summary of the invention

[0005] The present disclosure may provide a display device having improved reliability by preventing dark spot defects and a method of repairing the display device.

[0006] The display device according to the embodiment may have an emission region and a non-emission region, and may include: a first alignment electrode, a second alignment electrode, and a third alignment electrode, which are sequentially arranged in a first direction; a plurality of first light-emitting elements and a plurality of second light-emitting elements, the plurality of first light-emitting elements are arranged between the first alignment electrode and the second alignment electrode, and the plurality of second light-emitting elements are arranged between the second alignment electrode and the third alignment electrode; a first electrode, electrically connected to the first end portion of each of the plurality of first light-emitting elements and the first end portion of each of the plurality of second light-emitting elements; and a second electrode, electrically connected to the second end portion of each of the plurality of first light-emitting elements and the second end portion of each of the plurality of second light-emitting elements. The emission region may include a first region, a second region, and a third region divided in a second direction intersecting the first direction. In a plan view, the first region may be an upper region of the emission region, the second region may be a lower region of the emission region, and the third region may be a middle region of the emission region. The first electrode may be positioned in the first region and the second region, and may be electrically disconnected in the third region.

[0007] The second electrode may be positioned in the first region, the second region, and the third region. The first electrode may not be positioned in the third region.

[0008] The first electrode may include a first pixel electrode and a third pixel electrode spaced apart from each other. The second electrode may include a second pixel electrode and a fourth pixel electrode spaced apart from each other. The first pixel electrode, the second pixel electrode, the fourth pixel electrode and the third pixel electrode may be sequentially arranged in the first direction at least in the emission region.

[0009] The first pixel electrode may include a 1-1 pixel electrode positioned in the first area and a 1-2 pixel electrode positioned in the second area. The second pixel electrode may include a 2-1 pixel electrode positioned in the first area, a 2-2 pixel electrode positioned in the second area, and a 2-3 pixel electrode positioned in the third area. The third pixel electrode may include a 3-1 pixel electrode positioned in the first area and a 3-2 pixel electrode positioned in the second area. The fourth pixel electrode may include a 4-1 pixel electrode positioned in the first area, a 4-2 pixel electrode positioned in the second area, and a 4-3 pixel electrode positioned in the third area.

[0010] The 1-1 pixel electrode and the 1-2 pixel electrode may be spaced apart from each other. The 3-1 pixel electrode and the 3-2 pixel electrode may be spaced apart from each other.

[0011] The 2-3 pixel electrode may have a narrower width in the first direction than the 2-1 pixel electrode and the 2-2 pixel electrode. The 4-3 pixel electrode may have a narrower width in the first direction than the 4-1 pixel electrode and the 4-2 pixel electrode.

[0012] The display device may further include a contact electrode, which may be positioned in the non-emission region and may connect the 2-1 pixel electrode and the 3-1 pixel electrode.

[0013] The display device may further include: a first sub-electrode positioned in the non-emission region and electrically connected to the first pixel electrode; and a second sub-electrode positioned in the non-emission region and electrically connected to the third pixel electrode. The first sub-electrode may include a 1-1 sub-electrode electrically connected to the 1-1 pixel electrode, a 1-2 sub-electrode electrically connected to the 1-2 pixel electrode, and a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may include a 2-1 sub-electrode electrically connected to the 3-1 pixel electrode, a 2-2 sub-electrode electrically connected to the 3-2 pixel electrode, and a 2-3 sub-electrode electrically connected to the 2-1 sub-electrode and the 2-2 sub-electrode.

[0014] The 1-3 sub-electrode may have a narrower width in the first direction than the 1-1 sub-electrode and the 1-2 sub-electrode. The 2-3 sub-electrode may have a narrower width in the first direction than the 2-1 sub-electrode and the 2-2 sub-electrode.

[0015] The plurality of first light-emitting elements may include a 1a light-emitting element positioned in the first region and electrically connected to the 1-1 pixel electrode and the 2-1 pixel electrode, and a 1b light-emitting element positioned in the second region and electrically connected to the 1-2 pixel electrode and the 2-2 pixel electrode. The plurality of second light-emitting elements may include a 2a light-emitting element positioned in the first region and electrically connected to the 3-1 pixel electrode and the 4-1 pixel electrode, and a 2b light-emitting element positioned in the second region and electrically connected to the 3-2 pixel electrode and the 4-2 pixel electrode.

[0016] Each of the 1a-th light emitting element, the 1b-th light emitting element, the 2a-th light emitting element, and the 2b-th light emitting element may include a first semiconductor layer positioned at a first end portion, a second semiconductor layer positioned at a second end portion, and an active layer positioned between the first semiconductor layer and the second semiconductor layer. The second semiconductor layer may be an n-type semiconductor layer, and the first semiconductor layer may be a p-type semiconductor layer.

[0017] The display device may further include: a color conversion layer disposed on the plurality of first light emitting elements and on the plurality of second light emitting elements; and a color filter layer disposed on the color conversion layer.

[0018] The display device according to the embodiment may have a non-emission region and an emission region that may include a first region, a second region, and a third region divided in a first direction, and may include: a first alignment electrode, a second alignment electrode, and a third alignment electrode, which are sequentially arranged in a second direction intersecting the first direction; a plurality of light emitting elements, which are arranged between the first alignment electrode and the second alignment electrode and between the second alignment electrode and the third alignment electrode; a first pixel electrode, a second pixel electrode, a third pixel electrode, and a fourth pixel electrode, wherein the first pixel electrode, the second pixel electrode, the fourth pixel electrode, and the third pixel electrode may be sequentially arranged in the second direction at least in the emission region; a first sub-electrode, which is positioned in the non-emission region and electrically connected to the first pixel electrode; and a second sub-electrode, which is positioned in the non-emission region and electrically connected to the third pixel electrode. Each of the first pixel electrode, the second pixel electrode, the third pixel electrode, and the fourth pixel electrode may include a first portion positioned in the first region and a second portion positioned in the second region. The first sub-electrode may include a 1-1 sub-electrode electrically connected to the first portion of the first pixel electrode and a 1-2 sub-electrode electrically connected to the second portion of the first pixel electrode. The second sub-electrode may include a 2-1 sub-electrode electrically connected to the first portion of the third pixel electrode and a 2-2 sub-electrode electrically connected to the second portion of the third pixel electrode. Each of the first pixel electrode and the third pixel electrode may be electrically disconnected in the third region.

[0019] The second pixel electrode may be electrically disconnected in the third region. The fourth pixel electrode may further include a third portion positioned in the third region and electrically connected to the first portion of the fourth pixel electrode and the second portion of the fourth pixel electrode. The first sub-electrode may further include a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may further include a 2-3 sub-electrode electrically connected to the 2-1 sub-electrode and the 2-2 sub-electrode.

[0020] The display device may further include a dummy pattern positioned between the first portion of the second pixel electrode and the second portion of the second pixel electrode in the third region and spaced apart from the first portion of the second pixel electrode and the second portion of the second pixel electrode.

[0021] The fourth pixel electrode may be electrically disconnected in the third region. The second pixel electrode may further include a third portion positioned in the third region and electrically connected to the first portion of the second pixel electrode and the second portion of the second pixel electrode. The first sub-electrode may further include a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may further include a 2-3 sub-electrode electrically connected to the 2-1 sub-electrode and the 2-2 sub-electrode.

[0022] Each of the second pixel electrode and the fourth pixel electrode may further include a third portion positioned in the third region and electrically connecting the first portion and the second portion of the corresponding pixel electrode. The first sub-electrode may further include a 1-3 sub-electrode electrically connecting the 1-1 sub-electrode and the 1-2 sub-electrode. The 2-1 sub-electrode and the 2-2 sub-electrode may be spaced apart from each other and may be electrically disconnected.

[0023] Each of the second pixel electrode and the fourth pixel electrode may further include a third portion positioned in the third region and connecting the first portion and the second portion of the corresponding pixel electrode. The second sub-electrode may further include a 2-3 sub-electrode electrically connecting the 2-1 sub-electrode and the 2-2 sub-electrode. The 1-1 sub-electrode and the 1-2 sub-electrode may be spaced apart from each other and may be electrically disconnected.

[0024] According to an embodiment, a method for repairing a display device may include: providing a display device, the display device may have a non-emitting area and an emitting area that may include a first area, a second area, and a third area divided in a first direction, and the display device may include: a first alignment electrode, a second alignment electrode, and a third alignment electrode, which are sequentially arranged in a second direction intersecting the first direction; a plurality of light-emitting elements, which are arranged between the first alignment electrode and the second alignment electrode and between the second alignment electrode and the third alignment electrode, and the plurality of light-emitting elements may include a defective light-emitting element and at least one normal light-emitting element; a first electrode, which is electrically connected to a first end portion of each of the plurality of light-emitting elements, and the first electrode may be disconnected in the third area; and a second electrode, which is electrically connected to a second end portion of each of the plurality of light-emitting elements, and the second electrode may be positioned in the first area to the third area; and separating one of the first electrode and the second electrode, which is electrically connected to at least one normal light-emitting element, from one of the first electrode and the second electrode, which is electrically connected to the defective light-emitting element.

[0025] One of the first electrodes and the second electrodes electrically connected to at least one normal light-emitting element can be positioned in the first direction from one of the first electrodes and the second electrodes electrically connected to a defective light-emitting element, and positioned in the same column as one of the first electrodes and the second electrodes electrically connected to the defective light-emitting element. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The above and other aspects, features and advantageous effects of certain embodiments of the present disclosure will become more apparent from the following description in conjunction with the accompanying drawings.

[0027] Figure 1 is a schematic perspective view showing a light emitting element according to one or more embodiments.

[0028] Figure 2 yes Figure 1 Schematic cross-sectional view of a light-emitting element.

[0029] Figure 3 is a schematic plan view showing a display device according to one or more embodiments.

[0030] Figure 4 It is shown Figure 3 Schematic cross-sectional view of a display panel.

[0031] Figure 5 It is shown that the Figure 3 A schematic circuit diagram of the electrical connection relationship between components in a pixel.

[0032] Figure 6is a schematic plan view showing a display element layer of a pixel according to one or more embodiments.

[0033] Figure 7 It is shown that the Figure 6 Schematic plan view of a first bank, a first electrode, a second electrode, and a light-emitting element in a pixel.

[0034] Figures 8 to 10 It is along Figure 6 A schematic cross-sectional view taken along line II'.

[0035] Fig.11 It is along Figure 6 A schematic cross-sectional view taken along line II-II'.

[0036] Fig.12 A pixel according to one or more embodiments is shown and is Figure 6 Schematic cross-sectional view corresponding to line II'.

[0037] Fig.13 and Fig.14 It shows the repaired Figure 6 Schematic plan view of the state of a pixel.

[0038] Fig.15 It is along Fig.13 A schematic cross-sectional view taken along line III-III'.

[0039] Fig.16 It shows the repaired Figure 6 Schematic plan view of the state of a pixel.

[0040] Fig.17 It is along Fig.16 Schematic cross-sectional view taken along line IV-IV'.

[0041] Fig.18 It shows the repaired Figure 6 Schematic plan view of the state of a pixel.

[0042] Fig.19 It is along Fig.18 A schematic cross-sectional view taken along line V-V'.

[0043] Fig. 20 It shows the repaired Figure 6 Schematic plan view of the state of a pixel.

[0044] Fig.21 It is along Fig. 20 A schematic cross-sectional view taken along line VI-VI'. DETAILED DESCRIPTION

[0045] In the following description, for the purpose of illustration, many specific details are set forth to provide a thorough understanding of various embodiments or implementations of the present invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of the devices or methods disclosed herein. However, it is apparent that various embodiments may be practiced without these specific details or with one or more equivalent arrangements. Here, various embodiments are not necessarily exclusive and are not intended to limit the present disclosure. For example, the specific shape, configuration, and characteristics of an embodiment may be used or implemented in another embodiment.

[0046] Unless otherwise specified, the embodiments shown will be understood to provide features of the present invention. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects of various embodiments (hereinafter, individually or collectively referred to as "elements") may be combined, separated, interchanged and / or rearranged without departing from the concept of the present invention.

[0047] The use of cross hatching and / or shading in the drawings is generally to make the boundaries between adjacent elements clear. Therefore, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between illustrated elements and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the embodiments can be implemented differently, the specific process sequence can be performed differently from the described sequence. For example, two processes described in succession can be performed substantially simultaneously, or in an order opposite to the described order. In addition, the same figure marks and / or reference numerals represent the same elements.

[0048] When an element or layer is referred to as being "on", "connected to" or "coupled to" another element or layer, it may be directly on, directly connected to or directly coupled to another element or layer, or there may be an intervening element or layer. However, when an element or layer is referred to as being "directly on" another element or layer, "directly connected to" or "directly coupled to" another element or layer, there is no intervening element or layer. For this reason, the term "connection" may represent a physical connection, electrical connection and / or fluid connection in the presence or absence of an intervening element. In addition, the X-axis, Y-axis and Z-axis are not limited to the three axes (such as, x-axis, y-axis and z-axis) of a rectangular coordinate system, and may be interpreted in a broader sense. For example, the X-axis, Y-axis and Z-axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other.

[0049] For the purpose of this disclosure, "at least one of A and B" may be interpreted as only A, only B, or any combination of A and B. "At least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0050] Although the terms "first", "second", etc. can be used in this article to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below can be referred to as the second element.

[0051] Spatially relative terms such as "beneath," "below," "under," "lower," "above," "upper," "over," "higher," "side" (e.g., as in "sidewall"), and the like may be used herein for descriptive purposes, and thereby to describe the relationship of one element to another element(s) as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as being "below" or "beneath" other elements or features would then be oriented to be "above" the other elements or features. Thus, the term "below" may encompass both above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and the spatially relative descriptors used herein should be interpreted accordingly.

[0052] The terms used herein are for the purpose of describing a particular embodiment, rather than being intended to be limiting. Unless the context clearly indicates otherwise, as used herein, the singular forms "one", "an" and "the" are intended to also include plural forms. In addition, when used in this specification, the terms "comprise", "comprises", "includes" and / or "includes" represent the existence of stated features, integral bodies, steps, operations, elements, parts and / or its groups, but do not exclude the existence or addition of one or more other features, integral bodies, steps, operations, elements, parts and / or its groups. It should also be noted that, as used herein, the terms "substantially", "about" and other similar terms are used as approximate terms and not as degree terms, and are therefore used to allow for the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0053] Various embodiments are described herein with reference to cross-sectional views and / or exploded views, which are schematic representations of embodiments and / or intermediate structures. Therefore, deviations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are expected. Therefore, the embodiments disclosed herein should not necessarily be construed as limited to the specific illustrated shapes of the regions, but rather will include deviations in shape due to, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and therefore are not necessarily intended to be limiting.

[0054] Unless otherwise defined or implied herein, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. It will also be understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and the present disclosure, and should not be interpreted as an ideal or overly formal meaning unless clearly so defined herein.

[0055] Figure 1 is a schematic perspective view showing a light emitting element LD according to one or more embodiments. Figure 2 yes Figure 1 Schematic cross-sectional view of a light emitting element LD.

[0056] refer to Figure 1 and Figure 2 , the light emitting element LD may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 disposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light emitting element LD may be implemented as a light emitting stack (or a light emitting stack pattern), in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 may be sequentially stacked on each other. However, the type and / or shape of the light emitting element LD may not be limited to Figure 1 The embodiment shown.

[0057] The light emitting element LD may be provided in a shape extending in one direction. In the case where the extending direction of the light emitting element LD is a longitudinal direction, the light emitting element LD may include a first end portion EP1 and a second end portion EP2 which may be opposite to each other in the longitudinal direction. The second semiconductor layer 13 may be positioned at the first end portion EP1 of the light emitting element LD, and the first semiconductor layer 11 may be positioned at the second end portion EP2 of the light emitting element LD. However, the present disclosure is not limited thereto.

[0058] The light emitting element LD can be provided in various shapes. Figure 1As shown, the light emitting element LD may have a rod shape, a bar shape, or a column shape that may be long in the longitudinal direction (e.g., having an aspect ratio greater than 1). The light emitting element LD may include a light emitting diode (LED) that may be manufactured to have an ultra-small size, that is, it may have a diameter D and / or a length L in the range of nanometer scale (or nanometer) to micrometer scale (or micrometer).

[0059] In the case where the light emitting element LD is long in the longitudinal direction, the diameter D of the light emitting element LD may be in the range of about 0.5 μm to about 6 μm, and the length L thereof may be in the range of about 1 μm to about 10 μm. However, the diameter D and the length L of the light emitting element LD may not be limited thereto, and the size of the light emitting element LD may be changed to meet the requirements (or design conditions) of the lighting device or the self-luminous display device to which the light emitting element LD may be applied.

[0060] For example, the first semiconductor layer 11 may include at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include any one of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN semiconductor materials, and may be an n-type semiconductor layer doped with a first conductive dopant (or n-type dopant) such as Si, Ge, or Sn. However, the material constituting the first semiconductor layer 11 may not be limited thereto, and the first semiconductor layer 11 may be made of various other materials.

[0061] The active layer 12 (or emission layer) may be disposed on the first semiconductor layer 11 and may be formed as a single quantum well structure or a multi-quantum well structure. For example, in the case where the active layer 12 is formed as a multi-quantum well structure, the active layer 12 may be formed by periodically and repeatedly stacking a barrier layer, a strain enhancement layer, and a well layer that are a part of the active layer 12. However, the structure of the active layer 12 may not be limited to the above-described embodiments.

[0062] The active layer 12 may emit light having a wavelength of 400 nm to 900 nm and may have a double heterostructure. In an embodiment, a cladding layer doped with a conductive dopant may be formed on the active layer 12 and / or below the active layer 12 in the longitudinal direction of the light emitting element LD. For example, the cladding layer may be formed as an AlGaN layer or an InAlGaN layer. According to an embodiment, the active layer 12 may be formed using a material such as AlGaN or InAlGaN, or various other materials may constitute the active layer 12.

[0063] When a specific voltage or a greater electric field is applied to both end portions of the light emitting element LD, the light emitting element LD emits light when electrons and holes form pairs in the active layer 12. By controlling the light emission of the light emitting element LD using this principle, the light emitting element LD can be used as a light source (or light emitting source) for various light emitting devices (including pixels of a display device).

[0064] The second semiconductor layer 13 may be disposed on the active layer 12, and may include a semiconductor layer of a type different from that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a p-type semiconductor layer doped with a second conductive dopant (or p-type dopant) such as Mg, Zn, Ca, Sr, or Ba. However, the material constituting the second semiconductor layer 13 may not be limited thereto, and the second semiconductor layer 13 may be made of various other materials.

[0065] The first semiconductor layer 11 and the second semiconductor layer 13 may have different thicknesses in the longitudinal direction of the light emitting element LD. For example, the first semiconductor layer 11 may have a relatively thicker thickness than the second semiconductor layer 13 in the longitudinal direction of the light emitting element LD, but the present disclosure may not be limited thereto.

[0066] exist Figure 1 and Figure 2 , the first semiconductor layer 11 and the second semiconductor layer 13 are each shown as including one layer, but the present disclosure may not be limited thereto. In an embodiment, each of the first semiconductor layer 11 and the second semiconductor layer 13 may further include one or more layers, such as a cladding layer and / or a tensile strain barrier reduction (TSBR) layer, depending on the material of the active layer 12.

[0067] According to an embodiment, in addition to the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 described above, the light emitting element LD may further include a contact electrode (hereinafter, referred to as a "first contact electrode") disposed on the second semiconductor layer 13. According to an embodiment, another contact electrode (hereinafter, referred to as a "second contact electrode") disposed at one end portion of the first semiconductor layer 11 may also be included.

[0068] Each of the first contact electrode and the second contact electrode may be an ohmic contact electrode, but may not be limited thereto. According to an embodiment, the first contact electrode and the second contact electrode may be Schottky contact electrodes.

[0069] The materials included in the first contact electrode and the second contact electrode may be the same or different.The first contact electrode and the second contact electrode may be substantially transparent or translucent.

[0070] In an embodiment, the light emitting element LD may further include an insulating film 14. However, according to an embodiment, the insulating film 14 may be omitted or may be provided to cover only some of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0071] The insulating film 14 can prevent an electrical short circuit that may occur when the active layer 12 contacts a conductive material other than the first semiconductor layer 11 and the second semiconductor layer 13. The insulating film 14 can minimize surface defects of the light emitting element LD to improve the life and light emitting efficiency of the light emitting element LD. In addition, in the case of closely arranging a plurality of light emitting elements LD, the insulating film 14 can prevent an undesirable short circuit that may occur between the light emitting elements LD. Whether or not the insulating film 14 is provided is not limited as long as the short circuit between the active layer 12 and the external conductive material can be prevented.

[0072] The insulating film 14 may be provided in a form that completely surrounds the outer peripheral surface of the light emitting stack including the first semiconductor layer 11 , the active layer 12 , and the second semiconductor layer 13 , but the present disclosure is not limited thereto.

[0073] The insulating film 14 may include a transparent insulating material. Various materials having insulating properties may be used as the material of the insulating film 14. The insulating film 14 may be provided in the form of a single layer or in the form of a multilayer including a double layer.

[0074] According to an embodiment, the light emitting element LD may be implemented as a light emitting pattern of a core-shell structure.

[0075] The light emitting element LD described above may be used as a light emitting source (or light source) for various display devices. The light emitting element LD may be manufactured through a surface treatment process.

[0076] Figure 3 is a schematic plan view showing a display device DD according to one or more embodiments. Figure 4 It is shown Figure 3 Schematic cross-sectional view of a display panel DP.

[0077] exist Figure 3 and Figure 4 , for convenience, the structure of the display panel DP provided in the display device DD may be briefly illustrated focusing on a display area DA in which an image may be displayed.

[0078] refer to Figures 1 to 4The display device DD according to the embodiment can be divided into a passive matrix type display device and an active matrix type display device according to a method of driving the light emitting element LD. For example, in the case where the display device DD is implemented as an active matrix type, each of the pixels PXL may include a driving transistor that controls the amount of current supplied to the light emitting element LD and a switching transistor that transmits a data signal to the driving transistor.

[0079] The display panel DP (or display device DD) may be provided in various shapes. For example, the display panel DP may be provided in a rectangular plate shape having two pairs of sides parallel to each other. In the case where the display panel DP is provided in a rectangular plate shape, one pair of sides may be longer than the other pair of sides. Figure 3 In the embodiment, the extending direction of the short side may be the first direction DR1, and the extending direction of the long side may be the second direction DR2.

[0080] At least a portion of the display panel DP may have flexibility, and may be folded at the portion having flexibility, but the present disclosure may not be limited thereto.

[0081] The display panel DP may display an image. The display panel DP may be a self-luminous display panel or a non-luminous display panel.

[0082] The display panel DP may include a substrate SUB and pixels PXL disposed on the substrate SUB.

[0083] The substrate SUB may include a transparent insulating material that transmits light, but the present disclosure is not limited thereto. The substrate SUB may be a rigid substrate or a flexible substrate.

[0084] The rigid substrate may be, for example, a glass substrate, a quartz substrate, a glass ceramic substrate, a crystallized glass substrate, or a combination thereof.

[0085] The flexible substrate may be one of a film substrate and a plastic substrate containing a polymer organic material. For example, the flexible substrate includes at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyether sulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0086] One area of ​​the substrate SUB may be set as a display area DA in which the pixel PXL is disposed, and the remaining area of ​​the substrate SUB may be set as a non-display area NDA. For example, the substrate SUB may include a display area DA including a pixel area PXA in which each pixel PXL may be disposed, and a non-display area NDA disposed around the display area DA (or disposed adjacent to the display area DA).

[0087] The non-display area NDA may be positioned adjacent to the display area DA. The non-display area NDA may be disposed on at least one side of the display area DA. For example, the non-display area NDA may surround the periphery (or edge) of the display area DA. The non-display area NDA may be provided with a line portion electrically connected to each pixel PXL and a driver electrically connected to the line portion to drive the pixel PXL.

[0088] A plurality of pixels PXL may be provided and arranged in a matrix form along pixel rows extending in a first direction DR1 and pixel columns extending in a second direction DR2 intersecting the first direction DR1. The arrangement form of the pixels PXL may not be particularly limited, and the pixels PXL may be arranged in various forms. According to an embodiment, in the case where a plurality of pixels PXL are provided, the pixels PXL may be provided to have different areas (or sizes). For example, in the case where the pixels PXL emit light of different colors, the pixels PXL may have different areas (or sizes) according to the colors or may be provided in different shapes.

[0089] The driver may control driving of each pixel PXL by providing a specific signal and a specific voltage to each pixel PXL through a line portion.

[0090] The display panel DP (or each of the pixels PXL) may include a pixel circuit layer PCL, a display element layer DPL, and an optical layer LCL positioned on a substrate SUB.

[0091] The pixel circuit layer PCL may be disposed on a substrate SUB and may include a transistor and a signal line electrically connected to the transistor. For example, the transistor may have an active pattern (or semiconductor pattern), a gate electrode, a source electrode, and a drain electrode sequentially stacked with each other and an insulating layer disposed therebetween. The semiconductor pattern may include amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon, an organic semiconductor, and / or an oxide semiconductor. The gate electrode, the source electrode, and the drain electrode may include one or a combination of aluminum (Al), copper (Cu), titanium (Ti), molybdenum (Mo), but the present disclosure is not limited thereto. The pixel circuit layer PCL may include one or more insulating layers.

[0092] The display element layer DPL may be disposed on the pixel circuit layer PCL. An emission component including a light emitting element LD that emits light (see Figure 5 The "EMU" in the display element layer DPL may be located in the display element layer DPL. Electrodes electrically connected to the light emitting element LD may be provided in the emission part EMU. The configuration of each pixel PXL will be described in detail below.

[0093] Each pixel PXL may include one or more light emitting elements LD driven by corresponding scan signals and data signals. The light emitting element LD has a small size ranging from nanometer level (or nanometer) to micrometer level (or micrometer) and may be electrically connected in parallel with adjacent light emitting elements, but the present disclosure may not be limited thereto. The light emitting element LD may constitute a light source for each pixel PXL.

[0094] The optical layer LCL may be disposed on the display element layer DPL. The optical layer LCL may convert light emitted from the light emitting element LD into light having excellent color reproducibility to emit light, thereby improving the light emitting efficiency of each pixel PXL. According to an embodiment, the optical layer LCL may include a color conversion layer and a color filter, but the present disclosure is not limited thereto.

[0095] Figure 5 It is shown that the Figure 3 Schematic circuit diagram of the electrical connection relationship between components in the pixel PXL.

[0096] For example, Figure 5 The electrical connection relationship between components included in the pixel PXL applicable to the active matrix display device according to the embodiment is shown. However, the connection relationship between the components of each pixel PXL may not be limited thereto.

[0097] refer to Figures 1 to 5 The pixel PXL may include an emission part EMU generating light having brightness corresponding to the data signal. The pixel PXL may include a pixel circuit PXC for driving the emission part EMU.

[0098] For example, the emission unit EMU may include a first pixel electrode PE1 electrically connected to a first driving power source VDD through a pixel circuit PXC and a first power line PL1, a fourth pixel electrode PE4 electrically connected to a second driving power source VSS through a second power line PL2, and a plurality of light emitting elements LD electrically connected between the first pixel electrode PE1 and the fourth pixel electrode PE4. The first driving power source VDD and the second driving power source VSS may have different potentials so that the light emitting element LD may emit light. For example, the first driving power source VDD may be set as a high potential power source, and the second driving power source VSS may be set as a low potential power source.

[0099] In an embodiment, the emission component EMU may include one or more stages electrically connected in series. Each stage may include a pair of electrodes (e.g., a first electrode and a second electrode) and one or more light-emitting elements LD electrically connected between the pair of electrodes in a forward direction. In an embodiment, the number of stages constituting the emission component EMU and the number of light-emitting elements LD constituting each stage may not be limited. For example, the number of light-emitting elements LD constituting the corresponding stages may be the same or different, and the number of light-emitting elements LD may not be particularly limited.

[0100] For example, the emission unit EMU may include a first stage SET1 including one or more first light emitting elements LD1 and a second stage SET2 including one or more second light emitting elements LD2.

[0101] The first stage SET1 may include a first pixel electrode PE1 (or first electrode), a second pixel electrode PE2 (or second electrode), and one or more first light emitting elements LD1 electrically connected between the first pixel electrode PE1 and the second pixel electrode PE2. Each first light emitting element LD1 may be electrically connected between the first pixel electrode PE1 and the second pixel electrode PE2 in a forward direction. For example, a first end portion EP1 of the first light emitting element LD1 may be electrically connected to the first pixel electrode PE1, and a second end portion EP2 of the first light emitting element LD1 may be electrically connected to the second pixel electrode PE2.

[0102] The second stage SET2 may include a third pixel electrode PE3 (or a first electrode), a fourth pixel electrode PE4 (or a second electrode), and one or more second light emitting elements LD2 electrically connected between the third pixel electrode PE3 and the fourth pixel electrode PE4. Each second light emitting element LD2 may be electrically connected between the third pixel electrode PE3 and the fourth pixel electrode PE4 in the forward direction. For example, a first end portion EP1 of the second light emitting element LD2 may be electrically connected to the third pixel electrode PE3, and a second end portion EP2 of the second light emitting element LD2 may be electrically connected to the fourth pixel electrode PE4.

[0103] The first stage SET1 and the second stage SET2 may be electrically connected in series through the contact electrode CNE.

[0104] The first pixel electrode PE1 and the third pixel electrode PE3 may be first electrodes of corresponding stages (see Figure 6 The second pixel electrode PE2 and the fourth pixel electrode PE4 may be second electrodes of the corresponding stages (see "EL1" in FIG. 1 ), which may be electrically connected to the first end portion EP1 of the light emitting element LD in each stage. Figure 6 ' EL2 ' in the figure), they can be electrically connected to the second end portion EP2 of the light emitting element LD in each stage.

[0105] The first electrode of the emission unit EMU (eg, the first pixel electrode PE1) may be an anode of the emission unit EMU. The last electrode of the emission unit EMU (eg, the fourth pixel electrode PE4) may be a cathode.

[0106] When the light-emitting elements LD are electrically connected in a series / parallel structure, the power efficiency can be improved compared to the case where the same number of light-emitting elements LD are electrically connected only in parallel. In the pixel PXL in which the light-emitting elements LD can be electrically connected in a series / parallel structure, a specific brightness can be presented by some of the light-emitting elements LD in the first stage, thereby reducing the possibility of dark spot defects in the pixel PXL. However, the present disclosure may not be limited to this, and the emission component EMU may be formed by connecting only the light-emitting elements LD in series, or the emission component EMU may be formed by connecting only the light-emitting elements LD in parallel.

[0107] Each of the light-emitting elements LD may include a first end portion EP1 (e.g., a p-type end portion) electrically connected to a first driving power source VDD through at least one electrode (e.g., a first pixel electrode PE1), a pixel circuit PXC, and / or a first power line PL1, and a second end portion EP2 (e.g., an n-type end portion) electrically connected to a second driving power source VSS through at least one electrode (e.g., a fourth pixel electrode PE4) and a second power line PL2. For example, the light-emitting element LD may be electrically connected between the first driving power source VDD and the second driving power source VSS in the forward direction. The light-emitting element LD electrically connected in the forward direction may constitute an effective light source of the emission unit EMU.

[0108] According to an embodiment, the emission unit EMU may further include at least one reverse light emitting element LDr in addition to the light emitting element LD constituting the effective light source.

[0109] The light emitting element LD of the emission unit EMU can emit light having a brightness corresponding to the driving current provided by the corresponding pixel circuit PXC. For example, during each frame period, the pixel circuit PXC can provide a driving current corresponding to the grayscale value of the corresponding frame data to the emission unit EMU. The driving current provided to the emission unit EMU can be shunted to each light emitting element LD. Therefore, when each light emitting element LD emits light having a brightness corresponding to the current flowing therethrough, the emission unit EMU can emit light having a brightness corresponding to the driving current.

[0110] The pixel circuit PXC may be electrically connected to the i-th scan line Si and the j-th data line Dj electrically connected to the corresponding pixel PXL. For example, in the case where the pixel PXL is disposed in the i-th row and the j-th column of the display area DA, the pixel circuit PXC of the pixel PXL may be electrically connected to the i-th scan line Si and the j-th data line Dj in the display area DA. The pixel circuit PXC may be electrically connected to the i-th control line CLi and the j-th sensing line SENj in the display area DA.

[0111] The pixel circuit PXC described above may include first, second and third transistors T1, T2 and T3 and a storage capacitor Cst.

[0112] The first transistor T1 may be a driving transistor for controlling a driving current applied to the emission unit EMU, and may be electrically connected between the first driving power supply VDD and the emission unit EMU. Specifically, the first terminal of the first transistor T1 may be electrically connected to the first driving power supply VDD through the first power line PL1, and the second terminal of the first transistor T1 may be electrically connected to the second node N2. The gate electrode of the first transistor T1 may be electrically connected to the first node N1. The first terminal of the first transistor T1 may be a drain electrode, and the second terminal of the first transistor T1 may be a source electrode.

[0113] The second transistor T2 may be a switching transistor that selects the pixel PXL and activates the pixel PXL in response to the scan signal, and may be electrically connected between the j-th data line Dj and the first node N1. The first terminal of the second transistor T2 may be electrically connected to the j-th data line Dj, and the second terminal of the second transistor T2 may be electrically connected to the first node N1 (or the gate electrode of the first transistor T1). The gate electrode of the second transistor T2 may be electrically connected to the i-th scan line Si. The first terminal and the second terminal of the second transistor T2 may be different terminals. For example, in the case where the first terminal of the second transistor T2 is a drain electrode, the second terminal of the second transistor T2 may be a source electrode.

[0114] In the case where a scan signal of a gate-on voltage (e.g., a high level voltage) is provided from the i-th scan line Si, the second transistor T2 may be turned on to electrically connect the j-th data line Dj and the first node N1. The first node N1 may be a point at which the second terminal of the second transistor T2 and the gate electrode of the first transistor T1 may be electrically connected. The second transistor T2 may transmit a data signal to the gate electrode of the first transistor T1.

[0115] The third transistor T3 may electrically connect the first transistor T1 to the jth sensing line SENj to obtain a sensing signal through the jth sensing line SENj, and may use the sensing signal to detect the characteristics of the pixel PXL, such as the threshold voltage of the first transistor T1. Information related to the characteristics of the pixel PXL may be used to convert image data, so that the characteristic differences between the pixels PXL may be compensated. The second terminal of the third transistor T3 may be electrically connected to the second terminal of the first transistor T1, and the first terminal of the third transistor T3 may be electrically connected to the jth sensing line SENj. The gate electrode of the third transistor T3 may be electrically connected to the i-th control line CLi. The first terminal of the third transistor T3 may be a drain electrode, and the second terminal of the third transistor T3 may be a source electrode.

[0116] The first terminal of the third transistor T3 may be electrically connected to the initialization power supply. The third transistor T3 may be an initialization transistor capable of initializing the second node N2. When a sensing control signal is provided from the i-th control line CLi, the third transistor T3 may be turned on to provide the voltage of the initialization power supply to the second node N2.

[0117] The storage capacitor Cst may include a lower electrode LE (or a first storage electrode) and an upper electrode UE (or a second storage electrode). The lower electrode LE may be electrically connected to the first node N1, and the upper electrode UE may be electrically connected to the second node N2. The storage capacitor Cst may be charged with a gate voltage corresponding to a data signal supplied to the first node N1 during a frame period. Therefore, the storage capacitor Cst may store a voltage corresponding to a difference between a voltage of the gate electrode of the first transistor T1 and a voltage of the second node N2.

[0118] Figure 5 An embodiment in which the first transistor T1, the second transistor T2, and the third transistor T3 can all be n-type transistors is shown, but the present disclosure may not be limited thereto. For example, at least one of the first transistor T1, the second transistor T2, and the third transistor T3 described above can be changed to a p-type transistor. According to an embodiment, the pixel circuit PXC can be electrically connected between the first driving power supply VDD and the emission component EMU.

[0119] The structure of the pixel circuit PXC may be changed and implemented in various ways.

[0120] In the following embodiments, for convenience of description, a horizontal direction in a plan view may be a first direction DR1 , a vertical direction in a plan view may be a second direction DR2 , and a vertical direction in a cross-section may be a third direction DR3 .

[0121] Figure 6 is a schematic plan view illustrating a display element layer DPL of a pixel PXL according to one or more embodiments. Figure 7 It is shown that the Figure 6 Schematic plan view of a first bank BNK1, a pixel electrode PE and a light emitting element LD in a pixel PXL.

[0122] exist Figure 6 and Figure 7 In the drawings, for convenience, illustration of a pixel circuit including a transistor electrically connected to the light emitting element LD may be omitted.

[0123] exist Figure 6 and Figure 7 In the present invention, not only the components included in the pixel PXL but also the region in which the components may be located may be referred to as the pixel PXL.

[0124] refer to Figures 1 to 7 The pixel PXL may be positioned in a pixel area PXA disposed in a substrate SUB. The pixel area PXA may include an emission area EMA and a non-emission area NEA.

[0125] The pixel PXL may include a first bank BNK1 positioned in the non-emission area NEA and a light emitting element LD positioned in the emission area EMA.

[0126] The first bank BNK1 may be a structure that defines an emission area EMA of each of the pixel PXL and the adjacent pixel PXL, and may be, for example, a pixel defining film. In the process of providing (or inserting) the light emitting element LD, the first bank BNK1 may define each emission area EMA to which the light emitting element LD may be provided. The emission area EMA of the pixel PXL may be defined by the first bank BNK1, so that a mixed solution (e.g., ink) including a desired amount and / or type of the light emitting element LD may be provided (input) to the emission area EMA.

[0127] The first bank BNK1 may be configured to include at least one light blocking material and / or reflective material (or scattering material) to prevent a defect in which light leaks between the pixel PXL and the pixel PXL adjacent thereto. According to an embodiment, the first bank BNK1 may include a transparent material (or substance). Examples of transparent materials may include polyamide resins, polyimide-based resins, etc., but the present disclosure is not limited thereto. According to an embodiment, a reflective material layer may be separately provided and / or formed on the first bank BNK1 to further improve the efficiency of light emitted from the pixel PXL.

[0128] The first bank BNK1 may include at least one opening in the pixel area PXA, which exposes components positioned under the first bank BNK1. The emission area EMA of the pixel PXL and the opening of the first bank BNK1 may correspond to each other.

[0129] The electrode separation area ESA may be positioned in the non-emission area NEA of each pixel PXL. The electrode separation area ESA may be an area in which the first alignment electrode ALE1 and the second alignment electrode ALE2 in each pixel PXL may be separated from the first alignment electrode ALE1 and the second alignment electrode ALE2 provided to the pixels PXL arranged in the same pixel column.

[0130] The pixel PXL may include a pixel electrode PE disposed in an emission area EMA, a light emitting element LD electrically connected to the pixel electrode PE, and an alignment electrode ALE disposed at a position corresponding to the pixel electrode PE. For example, a first pixel electrode PE1, a second pixel electrode PE2, a third pixel electrode PE3, a fourth pixel electrode PE4, a light emitting element LD, and a first alignment electrode ALE1, a second alignment electrode ALE2, and a third alignment electrode ALE3 may be disposed in the emission area EMA. The number, shape, size, and arrangement structure of each of the pixel electrode PE and the alignment electrode ALE vary according to the structure of the pixel PXL (or the emission unit EMU).

[0131] For the surface of the substrate SUB on which the pixel PXL may be disposed, the alignment electrode ALE, the light emitting element LD, and the pixel electrode PE may be sequentially disposed, but the present disclosure may not be limited thereto. Figures 8 to 11 The stack structure of the pixel PXL is described.

[0132] The alignment electrodes ALE may be positioned at least in the emission area EMA, may be spaced apart from each other in the first direction DR1 in the emission area EMA, and may each extend in the second direction DR2. The alignment electrodes ALE may include a first alignment electrode ALE1, a second alignment electrode ALE2, and a third alignment electrode ALE3 arranged in the first direction DR1. The first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be arranged to be spaced apart from each other.

[0133] After the light emitting element LD may be provided and aligned in the emission area EMA, the first alignment electrode ALE1 may be separated from the first floating pattern FTP1. Specifically, before the light emitting element LD may be aligned in each emission area EMA, the first alignment electrode ALE1 and the first floating pattern FTP1 may be integrated with each other to constitute a first alignment line for aligning the light emitting element LD. The first floating pattern FTP1 may be electrically connected to the first alignment line through the third contact hole CH3. For example, the first alignment line may be a first power line (see Figure 51). After the alignment process of the light emitting element LD is completed, the first alignment line may be cut in the electrode separation area ESA positioned around the first floating pattern FTP1 to separate the first alignment line into the first alignment electrode ALE1 and the first floating pattern FTP1. The first alignment line may be cut in the electrode separation area ESA between adjacent pixel rows to separate the first alignment electrodes ALE1 of adjacent pixels PXL. In an embodiment, the first alignment electrode ALE1 may be electrically connected to some components of the pixel circuit PXC through the first contact hole CH1. For example, the first alignment electrode ALE1 may be electrically connected to the first transistor T1 and the third transistor T3 of the pixel circuit PXC.

[0134] After the light emitting element LD may be provided and aligned in the emission area EMA, the second alignment electrode ALE2 may be separated from the second floating pattern FTP2. Specifically, before the light emitting element LD may be aligned in each emission area EMA, the second alignment electrode ALE2 and the second floating pattern FTP2 may be integrated with each other to constitute a second alignment line for aligning the light emitting element LD. The second floating pattern FTP2 may be electrically connected to the second alignment line through the sixth contact hole CH6. After completing the alignment process of the light emitting element LD, the second alignment line may be cut in the electrode separation area ESA positioned around the second floating pattern FTP2 to separate the second alignment line into the second alignment electrode ALE2 and the second floating pattern FTP2. The second alignment line may be cut in the electrode separation area ESA between adjacent pixel rows to separate the second alignment electrodes ALE2 of adjacent pixels PXL.

[0135] The third alignment electrode ALE3 can be electrically connected to the second power line through the second contact hole CH2 (see FIG. 14 ) before or after the alignment light emitting element LD. Figure 5 Therefore, the third alignment electrode ALE3 may receive an alignment signal from the second power line PL2 before the light emitting element LD may be aligned, and may receive a voltage of the second driving power source VSS from the second power line PL2 after the light emitting element LD may be aligned.

[0136] Each of the first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may function as an alignment line for receiving a signal (eg, an alignment signal) and aligning the light emitting element LD before the light emitting element LD may be aligned in the emission area EMA of each pixel PXL.

[0137] The first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be provided in a strip shape having a specific width at least in the emission area EMA, but the present disclosure is not limited thereto. The first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may or may not have a curved portion in the non-emission area NEA, and their shapes and / or sizes in the remaining areas except the emission area EMA may not be particularly limited and may be variously changed.

[0138] At least two light emitting elements LD may be aligned in the emission area EMA (or the pixel area PXA). The light emitting element LD may be disposed between the first alignment electrode ALE1 and the second alignment electrode ALE2 and between the second alignment electrode ALE2 and the third alignment electrode ALE3. In a plan view, each of the light emitting elements LD may include a first end portion EP1 and a second end portion EP2, which are positioned at the two end portions (or positioned opposite to each other) in the longitudinal direction (e.g., in the first direction DR1). The second semiconductor layer including a p-type semiconductor layer (see Figure 1 ”13” in FIG. 1 ) may be positioned at the first end portion EP1 (or the p-type end portion), and include a first semiconductor layer of an n-type semiconductor layer (see Figure 1 '11' in ) may be positioned at the second end portion EP2 (or the n-type end portion). The light emitting element LD may be electrically connected in parallel between the first alignment electrode ALE1 and the second alignment electrode ALE2 and between the second alignment electrode ALE2 and the third alignment electrode ALE3.

[0139] The light emitting elements LD may be spaced apart from each other and may be aligned substantially parallel to each other. The spacing distance between the light emitting elements LD may not be particularly limited. According to an embodiment, a plurality of light emitting elements LD may be arranged adjacent to each other to form a group, and a plurality of other light emitting elements LD may be spaced apart from each other by a specific interval to form a group, may have a non-uniform density, and may be aligned in one direction.

[0140] The light emitting element LD may be input (or provided) to the pixel region PXA (or the emission region EMA) by an inkjet printing method, a slit coating method, or various other methods. For example, the light emitting element LD may be mixed in a volatile solvent and input (or provided) to the pixel region PXA by an inkjet printing method or a slit coating method.

[0141] In an implementation, the light emitting element LD may include a first light emitting element LD1 and a second light emitting element LD2 .

[0142] The first light emitting element LD1 may be aligned between the left sides of the first alignment electrode ALE1 and the second alignment electrode ALE2 and may be electrically connected to the first pixel electrode PE1 and the second pixel electrode PE2. The second light emitting element LD2 may be aligned between the right sides of the third alignment electrode ALE3 and the second alignment electrode ALE2 and may be electrically connected to the third pixel electrode PE3 and the fourth pixel electrode PE4.

[0143] A plurality of first light emitting elements LD1 and a plurality of second light emitting elements LD2 may be provided. A first end portion EP1 of each of the first light emitting elements LD1 may be electrically connected to the first pixel electrode PE1 (or the first electrode EL1), and a second end portion EP2 of each of the first light emitting elements LD1 may be electrically connected to the second pixel electrode PE2 (or the second electrode EL2). A first end portion EP1 of each of the second light emitting elements LD2 may be electrically connected to the third pixel electrode PE3 (or the first electrode EL1), and a second end portion EP2 of each of the second light emitting elements LD2 may be electrically connected to the fourth pixel electrode PE4 (or the second electrode EL2).

[0144] The first light emitting element LD1 may be electrically connected in parallel to each other between the first pixel electrode PE1 and the second pixel electrode PE2 , and the second light emitting element LD2 may be electrically connected in parallel to each other between the third pixel electrode PE3 and the fourth pixel electrode PE4 .

[0145] The pixel electrode PE may be disposed in the emission area EMA of the pixel PXL, and may be disposed at a position corresponding to the at least one alignment electrode ALE and the light emitting element LD.

[0146] The pixel electrode PE may include first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4 which may be spaced apart from each other and may be sequentially disposed in the first direction DR1 at least in the emission area EMA.

[0147] The first pixel electrode PE1 may be formed on the first alignment electrode ALE1. The first pixel electrode PE1 may be electrically connected to the first end portion EP1 of each of the first light emitting elements LD1 so that the first end portions EP1 of each of the first light emitting elements LD1 may be electrically connected to each other. The first pixel electrode PE1 may have a bar shape that may extend in the second direction DR2 and may have a certain width in the first direction DR1, but the present disclosure is not limited thereto.

[0148] The second pixel electrode PE2 may be formed on the left side of the second alignment electrode ALE2. The second pixel electrode PE2 may be electrically connected to the second end portion EP2 of each of the first light emitting elements LD1 so that the second end portions EP2 of each of the first light emitting elements LD1 may be electrically connected to each other. The second pixel electrode PE2 may have a bar shape that may extend in the second direction DR2 and may have a certain width in the first direction DR1, but the present disclosure is not limited thereto.

[0149] The third pixel electrode PE3 may be formed on the third alignment electrode ALE3. The third pixel electrode PE3 may be electrically connected to the first end portion EP1 of each of the second light emitting elements LD2 so that the first end portions EP1 of each of the second light emitting elements LD2 may be electrically connected to each other. The third pixel electrode PE3 may have a bar shape that may extend in the second direction DR2 and may have a certain width in the first direction DR1, but the present disclosure is not limited thereto.

[0150] The fourth pixel electrode PE4 may be formed on the right side of the second alignment electrode ALE2. The fourth pixel electrode PE4 may be electrically connected to the second end portion EP2 of each of the second light emitting elements LD2 so that the second end portions EP2 of each of the second light emitting elements LD2 may be electrically connected to each other. The fourth pixel electrode PE4 may have a bar shape that may extend in the second direction DR2 and may have a certain width in the first direction DR1, but the present disclosure is not limited thereto.

[0151] In an embodiment, the second pixel electrode PE2 and the third pixel electrode PE3 may be electrically connected via a contact electrode CNE. For example, the second pixel electrode PE2 and the third pixel electrode PE3 may be electrically connected via a contact electrode CNE positioned in the non-emission area NEA. The contact electrode CNE and the second pixel electrode PE2 and / or the third pixel electrode PE3 may be integral with each other and may be electrically and / or physically connected to the second pixel electrode PE2 and the third pixel electrode PE3.

[0152] The first light emitting element LD1 may be electrically connected in series with the second light emitting element LD2 through the contact electrode CNE. The first pixel electrode PE1 and the second pixel electrode PE2 may form a first stage SET1 together with the first light emitting element LD1 electrically connected in parallel therebetween. The third pixel electrode PE3 and the fourth pixel electrode PE4 may form a second stage SET2 together with the second light emitting element LD2 electrically connected in parallel therebetween. The first pixel electrode PE1 may be a first electrode EL1 of the first stage SET1, and the second pixel electrode PE2 may be a second electrode EL2 of the first stage SET1. The third pixel electrode PE3 may be a first electrode EL1 of the second stage SET2, and the fourth pixel electrode PE4 may be a second electrode EL2 of the second stage SET2. The first pixel electrode PE1 may be an anode of the emission component EMU, and the fourth pixel electrode PE4 may be a cathode of the emission component EMU.

[0153] The first pixel electrode PE1 may be in contact with the first alignment electrode ALE1 through the fourth contact hole CH4 in the non-emission area NEA, and may be electrically connected to the first alignment electrode ALE1. The pixel circuit PXC, the first alignment electrode ALE1, and the first pixel electrode PE1 may be electrically connected through the first contact hole CH1 and the fourth contact hole CH4. In the above-described embodiment, it has been described that the first alignment electrode ALE1 and the first pixel electrode PE1 may be in direct contact with each other and electrically connected to each other through the fourth contact hole CH4, but the present disclosure may not be limited thereto. According to an embodiment, in order to prevent defects due to material characteristics of the first alignment electrode ALE1, the first pixel electrode PE1 may not be in direct contact with the first alignment electrode ALE1, and may be in direct contact with the pixel circuit PXC to be electrically connected to the pixel circuit PXC.

[0154] The fourth pixel electrode PE4 may be in contact with the third alignment electrode ALE3 through the fifth contact hole CH5 in the non-emission area NEA, and may be electrically connected to the third alignment electrode ALE3. The second power line PL2, the third alignment electrode ALE3, and the fourth pixel electrode PE4 may be electrically connected through the second contact hole CH2 and the fifth contact hole CH5. In the above-described embodiment, it has been described that the third alignment electrode ALE3 and the fourth pixel electrode PE4 may be in direct contact with each other and electrically connected to each other through the fifth contact hole CH5, but the present disclosure is not limited thereto. According to an embodiment, in order to prevent defects due to the material characteristics of the third alignment electrode ALE3, the fourth pixel electrode PE4 may not be in direct contact with the third alignment electrode ALE3, and may be in direct contact with the second power line PL2 to be electrically connected to the second power line PL2.

[0155] Between the first pixel electrode PE1 and the fourth pixel electrode PE4, the first light emitting element LD1 and the second light emitting element LD2 can be electrically connected in series through the contact electrode CNE and the second pixel electrode PE2 and the third pixel electrode PE3. In this way, the emission unit EMU of the pixel PXL can be formed by connecting the light emitting elements LD aligned in the emission area EMA in a series / parallel hybrid structure.

[0156] In an embodiment, the pixel PXL may further include at least one sub-electrode electrically connected to the pixel electrode PE positioned at the edge (or outer peripheral portion) of the emission area EMA. For example, the pixel PXL may include at least one sub-electrode electrically connected to the first pixel electrode PE1 and the third pixel electrode PE3 positioned at the edge of the emission area EMA. The sub-electrode may include a first sub-electrode SLT1 electrically connected to the first pixel electrode PE1 and a second sub-electrode SLT2 electrically connected to the third pixel electrode PE3.

[0157] The first sub-electrode SLT1 and the first pixel electrode PE1 may be formed by the same process and may be integrated with each other, but the present disclosure is not limited thereto. The first sub-electrode SLT1 may be positioned in the non-emission area NEA and may overlap with the first bank BNK1. The second sub-electrode SLT2 and the third pixel electrode PE3 may be integrated with each other, but the present disclosure is not limited thereto. The second sub-electrode SLT2 may be positioned in the non-emission area NEA and may overlap with the first bank BNK1.

[0158] In an embodiment, the emission area EMA of the pixel PXL may be divided into a first area A1, a second area A2, and a third area A3 in the second direction DR2. In a plan view, the first area A1 may be an upper area of ​​the emission area EMA, the second area A2 may be a lower area of ​​the emission area EMA, and the third area A3 may be a middle area of ​​the emission area EMA.

[0159] The first pixel electrode PE1 may include a 1-1 pixel electrode PE1a (or a first portion) positioned in the first area A1 and a 1-2 pixel electrode PE1b (or a second portion) positioned in the second area A2. The first pixel electrode PE1 may not be positioned in the third area A3. The first pixel electrode PE1 may be electrically disconnected in the third area A3. The 1-1 pixel electrode PE1a and the 1-2 pixel electrode PE1b may be spaced apart from each other in the third area A3.

[0160] The second pixel electrode PE2 may include a 2-1 pixel electrode PE2a (or a first portion) positioned in the first area A1, a 2-2 pixel electrode PE2b (or a second portion) positioned in the second area A2, and a 2-3 pixel electrode PE2c (or a third portion) positioned in the third area A3. The 2-3 pixel electrode PE2c may be positioned between the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b, and may connect the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b. In an embodiment, the 2-3 pixel electrode PE2c may have a narrower width than the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b in the first direction DR1. Designing the width of the 2-3 pixel electrode PE2c (e.g., the width in the first direction DR1) to be narrow may make laser cutting easier in the process of repairing the dark spot defect of the pixel PXL. However, the present disclosure is not limited thereto, and the 2-3 pixel electrode PE2c may have the same width as the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b.

[0161] The third pixel electrode PE3 may include a 3-1 pixel electrode PE3a (or a first portion) positioned in the first area A1 and a 3-2 pixel electrode PE3b (a second portion) positioned in the second area A2. The third pixel electrode PE3 may not be positioned in the third area A3. The third pixel electrode PE3 may be electrically disconnected in the third area A3. The 3-1 pixel electrode PE3a and the 3-2 pixel electrode PE3b may be spaced apart from each other in the third area A3.

[0162] The fourth pixel electrode PE4 may include a 4-1 pixel electrode PE4a (or a first portion) positioned in the first area A1, a 4-2 pixel electrode PE4b (or a second portion) positioned in the second area A2, and a 4-3 pixel electrode PE4c (or a third portion) positioned in the third area A3. The 4-3 pixel electrode PE4c may be positioned between the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b, and may connect the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b. In an embodiment, the 4-3 pixel electrode PE4c may have a narrower width than the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b in the first direction DR1. Designing the width of the 4-3 pixel electrode PE4c (e.g., the width in the first direction DR1) to be narrow may make laser cutting easier in the process of repairing the dark spot defect of the pixel PXL. However, the present disclosure is not limited thereto, and the 4-3 pixel electrode PE4c may have the same width as the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b.

[0163] At least the first pixel electrode PE1 and the third pixel electrode PE3 positioned at the outer peripheral portion of the emission area EMA may be electrically disconnected in the third area A3. The second pixel electrode PE2 and the fourth pixel electrode PE4 positioned at the inner portion of the emission area EMA may each include a third portion connecting the first portion and the second portion.

[0164] The first sub-electrode SLT1 may include a 1-1 sub-electrode SLT1a electrically connected to the 1-1 pixel electrode PE1a, a 1-2 sub-electrode SLT1b electrically connected to the 1-2 pixel electrode PE1b, and a 1-3 sub-electrode SLT1c electrically connected to the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b. The 1-1 sub-electrode SLT1a may be positioned in a non-emission area NEA corresponding to the first area A1, the 1-2 sub-electrode SLT1b may be positioned in a non-emission area NEA corresponding to the second area A2, and the 1-3 sub-electrode SLT1c may be positioned in a non-emission area NEA corresponding to the third area A3. In the first direction DR1, the 1-3 sub-electrode SLT1c may have a narrower width than the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b. Designing the width of the 1-3 sub-electrode SLT1c (e.g., the width in the first direction DR1) to be narrow may make laser cutting easier in the process of repairing the dark spot defect of the pixel PXL. However, the present disclosure may not be limited thereto, and the 1-3 sub-electrode SLT1c may have the same width as the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b.

[0165] The second sub-electrode SLT2 may include a 2-1 sub-electrode SLT2a electrically connected to the 3-1 pixel electrode PE3a, a 2-2 sub-electrode SLT2b electrically connected to the 3-2 pixel electrode PE3b, and a 2-3 sub-electrode SLT2c electrically connected to the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b. The 2-1 sub-electrode SLT2a may be positioned in a non-emission area NEA corresponding to the first area A1, the 2-2 sub-electrode SLT2b may be positioned in a non-emission area NEA corresponding to the second area A2, and the 2-3 sub-electrode SLT2c may be positioned in a non-emission area NEA corresponding to the third area A3. In the first direction DR1, the 2-3 sub-electrode SLT2c may have a narrower width than the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b. Designing the width of the 2-3 sub-electrode SLT2c (e.g., the width in the first direction DR1) to be narrow may make laser cutting easier in the process of repairing the dark spot defect of the pixel PXL. However, the present disclosure is not limited thereto, and the 2-3 sub-electrode SLT2c may have the same width as the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b.

[0166] In an embodiment, the first light emitting element LD1 may include a 1ath light emitting element LD1a positioned in the first area A1 and a 1bth light emitting element LD1b positioned in the second area A2. The second light emitting element LD2 may include a 2ath light emitting element LD2a positioned in the first area A1 and a 2bth light emitting element LD2b positioned in the second area A2.

[0167] The 1a-th light emitting element LD1a may be electrically connected to the 1-1 pixel electrode PE1a and the 2-1 pixel electrode PE2a. The first end portion EP1 of each of the 1a-th light emitting elements LD1a may be electrically connected to the 1-1 pixel electrode PE1a (or the first electrode EL1), and the second end portion EP2 of each of the 1a-th light emitting elements LD1a may be electrically connected to the 2-1 pixel electrode PE2a (or the second electrode EL2).

[0168] The 1b-th light emitting element LD1b may be electrically connected to the 1-2 pixel electrode PE1b and the 2-2 pixel electrode PE2b. The first end portion EP1 of each of the 1b-th light emitting elements LD1b may be electrically connected to the 1-2 pixel electrode PE1b (or the first electrode EL1), and the second end portion EP2 of each of the 1b-th light emitting elements LD1b may be electrically connected to the 2-2 pixel electrode PE2b (or the second electrode EL2).

[0169] The 2a-th light emitting element LD2a may be electrically connected to the 3-1 pixel electrode PE3a and the 4-1 pixel electrode PE4a. The first end portion EP1 of each of the 2a-th light emitting elements LD2a may be electrically connected to the 3-1 pixel electrode PE3a (or the first electrode EL1), and the second end portion EP2 of each of the 2a-th light emitting elements LD2a may be electrically connected to the 4-1 pixel electrode PE4a (or the second electrode EL2).

[0170] The 2b-th light emitting element LD2b may be electrically connected to the 3-2 pixel electrode PE3b and the 4-2 pixel electrode PE4b. The first end portion EP1 of each of the 2b-th light emitting elements LD2b may be electrically connected to the 3-2 pixel electrode PE3b (or the first electrode EL1), and the second end portion EP2 of each of the 2b-th light emitting elements LD2b may be electrically connected to the 4-2 pixel electrode PE4b (or the second electrode EL2).

[0171] In the following, reference will be made to Figures 8 to 11 A stack structure (or a cross-sectional structure) of the pixel PXL according to the above-described embodiment is described.

[0172] Figures 8 to 10 It is along Figure 6 A schematic cross-sectional view taken along line II'. Fig.11 It is along Figure 6A schematic cross-sectional view taken along line II-II'.

[0173] Fig. 9 and Fig.10 The embodiment is related to the operation of forming the pixel electrode PE and the presence or absence of the third insulating layer INS3. Figure 8 For example, Fig. 9 An embodiment is shown in which the 1-1 pixel electrode PE1a and the 4-1 pixel electrode PE4a may be formed after the 2-1 pixel electrode PE2a and the 3-1 pixel electrode PE3a and the third insulating layer INS3 are formed. Fig.10 An embodiment is shown in which the 2-1 pixel electrode PE2a and the 3-1 pixel electrode PE3a may be formed after the 1-1 pixel electrode PE1a and the 4-1 pixel electrode PE4a and the third insulating layer INS3 are formed.

[0174] exist Figures 8 to 11 In the embodiment, each electrode may be illustrated as a single-layer electrode, and each insulating layer may be illustrated as a single-layer insulating layer to simplify and illustrate the stacking structure (or cross-sectional structure) of the pixel PXL, but the present disclosure may not be limited thereto.

[0175] refer to Figures 1 to 11 , the pixel PXL may include a substrate SUB, a pixel circuit layer PCL and a display element layer DPL.

[0176] The pixel circuit layer PCL and the display element layer DPL may be disposed on the surface of the substrate SUB to overlap with each other. For example, the display area DA of the substrate SUB may include a pixel circuit layer PCL disposed on the surface of the substrate SUB and a display element layer DPL disposed on the pixel circuit layer PCL. However, the mutual positions of the pixel circuit layer PCL and the display element layer DPL on the substrate SUB may vary depending on the implementation. In the case where the pixel circuit layer PCL and the display element layer DPL are separated into separate layers and overlap with each other, sufficient layout space can be ensured in a plan view to form the pixel circuit (see Figure 5 "PXC" in the Figure 5 in the .

[0177] The substrate SUB may include a transparent insulating material that transmits light. The substrate SUB may be a rigid substrate or a flexible substrate.

[0178] In the pixel circuit layer PCL, circuit elements constituting the pixel circuit PXC of the corresponding pixel PXL and specific signal lines electrically connected to the circuit elements may be disposed in each pixel region PXA. In the display element layer DPL, alignment electrodes ALE, light emitting elements LD, and pixel electrodes PE constituting the emission unit EMU of the corresponding pixel PXL may be disposed in each pixel region PXA.

[0179] In addition to the circuit elements and the signal lines, the pixel circuit layer PCL may include one or more insulating layers. For example, the pixel circuit layer PCL may include a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer PSV, and a via layer VIA, which may be sequentially stacked on top of each other in the third direction DR3 on the substrate SUB.

[0180] The buffer layer BFL may be entirely disposed on the substrate SUB. The buffer layer BFL may prevent impurities from diffusing into transistors included in the pixel circuit PXC. The buffer layer BFL may be an inorganic insulating film including an inorganic material. The buffer layer BFL may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x ), but the present disclosure is not limited thereto. The buffer layer BFL may be set as a single layer, but may also be set as a multilayer including at least a double layer. In the case where the buffer layer BFL is set as a multilayer, the corresponding layers may be made of the same material or may be made of different materials. Depending on the material and process conditions of the substrate SUB, the buffer layer BFL may be omitted.

[0181] The gate insulating layer GI may be entirely disposed on the buffer layer BFL. The gate insulating layer GI and the buffer layer BFL may include the same material, or the gate insulating layer GI may include a suitable material among the materials exemplified as the constituent materials of the buffer layer BFL (or a suitable material selected from the materials exemplified as the constituent materials of the buffer layer BFL). For example, the gate insulating layer GI may be an inorganic insulating film including an inorganic material.

[0182] The interlayer insulating layer ILD may be integrally disposed and / or formed on the gate insulating layer GI. The interlayer insulating layer ILD and the buffer layer BFL may include the same material, or the interlayer insulating layer ILD may include at least one suitable material among the materials exemplified as constituent materials of the buffer layer BFL (or at least one suitable material selected from the materials exemplified as constituent materials of the buffer layer BFL).

[0183] The passivation layer PSV may be integrally disposed and / or formed on the interlayer insulating layer ILD. The passivation layer PSV may include the same material as the buffer layer BFL, or may include at least one suitable material among the materials exemplified as the constituent materials of the buffer layer BFL (or at least one suitable material selected from the materials exemplified as the constituent materials of the buffer layer BFL).

[0184] The via layer VIA may be integrally disposed and / or formed on the passivation layer PSV. The via layer VIA may be an inorganic insulating film including an inorganic material, or may be an organic insulating film including an organic material. The inorganic insulating film may include, for example, silicon oxide (SiO x ), Silicon Nitride (SiN x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x The organic insulating film may include, for example, at least one of a polyacrylate-based resin, an epoxy-based resin, a phenolic resin, a polyamide-based resin, a polyimide-based resin, an unsaturated polyester-based resin, a polyphenylene ether-based resin, a polyphenylene sulfide-based resin, and a benzocyclobutene resin.

[0185] The via layer VIA may include a plurality of contact holes. For example, the via layer VIA may be partially opened to include a first contact hole CH1, a second contact hole CH2, a third contact hole CH3, and a sixth contact hole CH6.

[0186] The display element layer DPL may be disposed on the via layer VIA.

[0187] Components of the emission unit EMU may be provided in the display element layer DPL. For example, the bank pattern BNP, the alignment electrode ALE, the first bank BNK1, the light emitting element LD, and the pixel electrode PE may be provided in the display element layer DPL.

[0188] The bank pattern BNP may be positioned on the via layer VIA. For example, the bank pattern BNP may protrude in the third direction DR3 on the surface of the via layer VIA. The region of the alignment electrode ALE disposed on the bank pattern BNP may protrude in the third direction DR3 (or the thickness direction of the substrate SUB).

[0189] The bank pattern BNP may include an inorganic insulating film including an inorganic material, or may include an organic insulating film including an organic material. According to an embodiment, the bank pattern BNP may include a single layer of organic insulating film and / or a single layer of inorganic insulating film, but the present disclosure may not be limited thereto. According to an embodiment, the bank pattern BNP may be provided in the form of a multilayer, wherein at least one organic insulating film and at least one inorganic insulating film may be stacked on each other. However, the material of the bank pattern BNP may not be limited to the embodiments described above, and according to an embodiment, the bank pattern BNP may include a conductive material (or substance).

[0190] The bank pattern BNP may be positioned under each of the first, second, and third alignment electrodes ALE1, ALE2, and ALE3 at least in the emission area EMA, and may overlap the corresponding alignment electrode ALE.

[0191] The bank pattern BNP may have a trapezoidal cross-section whose width becomes narrower upward in the third direction DR3 from a surface (or upper surface) of the via layer VIA, but the present disclosure may not be limited thereto.

[0192] The bank pattern BNP may be used as a reflective member. For example, the bank pattern BNP may be used to direct light emitted from each light emitting element LD toward a display device (see FIG. 1 ) together with the alignment electrode ALE disposed thereon. Figure 3 The reflective member guides the image display direction (“DD” in FIG. 1 ) to improve the brightness efficiency of the pixel PXL.

[0193] The first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be positioned on the bank pattern BNP.

[0194] The first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be disposed coplanar with each other and may have the same thickness in the third direction DR3. The first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be formed simultaneously or continuously by the same process.

[0195] The first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be made of a material having reflectivity to allow light emitted from the light emitting element LD to travel in the image display direction (or forward direction) of the display device DD. For example, the first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be made of a conductive material (or substance). The conductive material may include an opaque metal that is suitable for reflecting light emitted from the light emitting element LD in the image display direction of the display device DD.

[0196] Each of the first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be formed as a single layer, but the present disclosure is not limited thereto. According to an embodiment, each of the first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be provided and / or formed as a multilayer, wherein at least two materials of metal, alloy, conductive oxide, and conductive polymer may be stacked on each other. In order to reduce or minimize distortion caused by signal delay when transmitting a signal to both end portions (e.g., the first end portion EP1 and the second end portion EP2) of each of the light emitting elements LD, each of the first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be formed as a multilayer including at least a double layer.

[0197] In the case where the first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be made of a conductive material having reflectivity, light emitted from the first and second end portions EP1 and EP2 of each of the light emitting elements LD may further travel in the image display direction of the display device DD.

[0198] A first insulating layer INS1 may be disposed on the first, second, and third alignment electrodes ALE1, ALE2, and ALE3.

[0199] The first insulating layer INS1 may be disposed on the alignment electrode ALE and the via layer VIA. The first insulating layer INS1 may be partially opened at least in the non-emission area NEA to expose a component positioned below the first insulating layer INS1. For example, the first insulating layer INS1 may be partially opened to include a fourth contact hole CH4 and a fifth contact hole CH5, through which at least one region of the first insulating layer INS1 in the non-emission area NEA may be removed to expose a region of the first alignment electrode ALE1, and through which another region of the first insulating layer INS1 in the non-emission area NEA may be removed to expose a region of the third alignment electrode ALE3.

[0200] The first insulating layer INS1 may be formed as an inorganic insulating film made of an inorganic material. The first insulating layer INS1 may be provided as a single layer or a plurality of layers.

[0201] The first bank BNK1 may be positioned on the first insulating layer INS1 .

[0202] The first bank BNK1 may be disposed on the first insulating layer INS1 at least in the non-emission area NEA, but the present disclosure is not limited thereto. The first bank BNK1 may be formed between adjacent pixels PXL to surround the emission area EMA of each pixel PXL and constitute a pixel defining film defining the emission area EMA of the corresponding pixel PXL. The first bank BNK1 may be a dam structure that prevents a solution (or ink) mixed with the light emitting element LD from flowing into the emission area EMA of the adjacent pixel PXL in an operation of providing the light emitting element LD to the emission area EMA, or performs control so that a specific amount of solution may be provided to each emission area EMA.

[0203] According to an embodiment, the first bank BNK1 and the bank pattern BNP may be formed by different processes and disposed to be non-coplanar with each other, but the present disclosure may not be limited thereto.

[0204] The light emitting element LD may be provided and aligned in the emission area EMA of the pixel PXL in which the first insulating layer INS1 and the first bank BNK1 may be formed. For example, the light emitting element LD may be provided (or input) to the emission area EMA by an inkjet printing method or the like. The light emitting element LD may be aligned between the alignment electrodes ALE by an electric field generated by a signal (or alignment signal) applied to each of the alignment electrodes ALE. For example, the light emitting element LD may be aligned between the first alignment electrode ALE1 and the second alignment electrode ALE2 and between the second alignment electrode ALE2 and the third alignment electrode ALE3.

[0205] The light emitting element LD may include a first light emitting element LD1 and a second light emitting element LD2 .

[0206] The first light emitting elements LD1 include the 1ath light emitting element LD1a positioned in the first region A1 of the emission area EMA and the 1bth light emitting element LD1b positioned in the second region A2 of the emission area EMA. The first light emitting elements LD1 may each include a first end portion EP1 overlapping the first alignment electrode ALE1 and a second end portion EP2 overlapping the second alignment electrode ALE2.

[0207] The second light emitting element LD2 may include a 2a-th light emitting element LD2a positioned in the first region A1 of the emission area EMA and a 2b-th light emitting element LD2b positioned in the second region A2 of the emission area EMA. The second light emitting element LD2 may include a first end portion EP1 overlapping the third alignment electrode ALE3 and a second end portion EP2 overlapping the second alignment electrode ALE2.

[0208] A second insulating layer INS2 (or an insulating pattern) may be disposed on each of the 1a-th light emitting element LD1a, the 1b-th light emitting element LD1b, the 2a-th light emitting element LD2a, and the 2b-th light emitting element LD2b.

[0209] The second insulating layer INS2 can be positioned on the 1ath light emitting element LD1a, the 1bth light emitting element LD1b, the 2ath light emitting element LD2a, and the 2bth light emitting element LD2b to partially cover the outer peripheral surface (or one surface thereof) of the 1ath light emitting element LD1a, the 1bth light emitting element LD1b, the 2ath light emitting element LD2a, and the 2bth light emitting element LD2b, thereby exposing the first end portion EP1 and the second end portion EP2 of each of the 1ath light emitting element LD1a, the 1bth light emitting element LD1b, the 2ath light emitting element LD2a, and the 2bth light emitting element LD2b to the outside.

[0210] The second insulating layer INS2 may include an inorganic insulating film including an inorganic material, or may include an organic insulating film. For example, the second insulating layer INS2 may include an active layer suitable for protecting each of the 1a-th light emitting element LD1a, the 1b-th light emitting element LD1b, the 2a-th light emitting element LD2a, and the 2b-th light emitting element LD2b (see Figure 1 However, the present disclosure may not be limited thereto, and according to the design conditions of the display device DD (or display panel DP) including the 1a-th light emitting element LD1a, the 1b-th light emitting element LD1b, the 2a-th light emitting element LD2a, and the 2b-th light emitting element LD2b, the second insulating layer INS2 may be provided as an organic insulating film including an organic material. The second insulating layer INS2 may be provided as a single layer or a multilayer.

[0211] Before the second insulating layer INS2 can be formed, in the case where there may be empty gaps between the 1a-th light emitting element LD1a, the 1b-th light emitting element LD1b, the 2a-th light emitting element LD2a, and the 2b-th light emitting element LD2b and the first insulating layer INS1, the empty gaps may be filled with the second insulating layer INS2 during the process of forming the second insulating layer INS2.

[0212] By forming the second insulating layer INS2 on the aligned light emitting element LD, the light emitting element LD can be prevented from being deviated from its aligned position.

[0213] On two end portions (e.g., the first end portion EP1 and the second end portion EP2) of the light emitting element LD that may not be covered by the second insulating layer INS2, different electrodes among the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4 may be formed. For example, the 1-1 pixel electrode PE1a may be formed on the first end portion EP1 of the 1a light emitting element LD1a, and the 2-1 pixel electrode PE2a may be formed on the second end portion EP2 of the 1a light emitting element LD1a. The 1-2 pixel electrode PE1b may be formed on the first end portion EP1 of the 1b light emitting element LD1b, and the 2-2 pixel electrode PE2b may be formed on the second end portion EP2 of the 1b light emitting element LD1b. The 3-1 pixel electrode PE3a may be formed on the first end portion EP1 of the 2a light emitting element LD2a, and the 4-1 pixel electrode PE4a may be formed on the second end portion EP2 of the 2a light emitting element LD2a. The 3-2 pixel electrode PE3b may be formed on the first end portion EP1 of the 2b-th light emitting element LD2b, and the 4-2 pixel electrode PE4b may be formed on the second end portion EP2 of the 2b-th light emitting element LD2b.

[0214] exist Figure 8 In the embodiment of the present invention, the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3 and the fourth pixel electrode PE4 may be formed simultaneously or sequentially by the same process and may be disposed on the same layer. In the case where the pixel electrodes PE disposed on the first end portion EP1 and the second end portion EP2 of each light emitting element LD may be disposed to be coplanar with each other and formed simultaneously or sequentially, the manufacturing process of the pixel PXL may be simplified and the process efficiency may be improved. The first sub-electrode SLT1 electrically connected to the first pixel electrode PE1 and the second sub-electrode SLT2 electrically connected to the third pixel electrode PE3 may be formed simultaneously or sequentially by the same process as the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3 and the fourth pixel electrode PE4.

[0215] According to an embodiment, the pixel electrodes PE disposed on the first end portion EP1 and the second end portion EP2 of each light emitting element LD may be formed by different processes and may be disposed so as not to be coplanar with each other. Fig. 9In the embodiment of the present invention, the 2-1 pixel electrode PE2a (or the second pixel electrode PE2) and the 3-1 pixel electrode PE3a (or the third pixel electrode PE3) may be formed first. The 2-1 pixel electrode PE2a may be in direct contact with the second end portion EP2 of the 1a light emitting element LD1a to be electrically connected to the 1a light emitting element LD1a. The 3-1 pixel electrode PE3a may be in direct contact with the first end portion EP1 of the 2a light emitting element LD2a to be electrically connected to the 2a light emitting element LD2a. In the process of forming the 3-1 pixel electrode PE3a, the 2-1 sub-electrode SLT2a (or the second sub-electrode SLT2) may be formed simultaneously. Thereafter, a third insulating layer INS3 may be formed to cover the 2-1 pixel electrode PE2a and the 3-1 pixel electrode PE3a. The third insulating layer INS3 may include an inorganic insulating film made of an inorganic material, or may include an organic insulating film made of an organic material. The third insulating layer INS3 may be formed as a single layer or multiple layers. The 1-1 pixel electrode PE1a (or the first pixel electrode PE1) and the 4-1 pixel electrode PE4a (or the fourth pixel electrode PE4) may be formed on the third insulating layer INS3. The 1-1 pixel electrode PE1a may be in direct contact with the first end portion EP1 of the 1a-th light emitting element LD1a to be electrically connected to the 1a-th light emitting element LD1a. The 4-1 pixel electrode PE4a may be in direct contact with the second end portion EP2 of the 2a-th light emitting element LD2a to be electrically connected to the 2a-th light emitting element LD2a. In the process of forming the 1-1 pixel electrode PE1a, the 1-1 sub-electrode SLT1a (or the first sub-electrode SLT1) may be formed simultaneously.

[0216] exist Fig.10 In the embodiment, the 1-1 pixel electrode PE1a (or the first pixel electrode PE1), the 1-1 sub-electrode SLT1a (or the first sub-electrode SLT1a), and the 4-1 pixel electrode PE4a (or the fourth pixel electrode PE4) may be first formed on the second insulating layer INS2. Thereafter, the third insulating layer INS3 may be formed to cover the 1-1 pixel electrode PE1a, the 4-1 pixel electrode PE4a, and the 1-1 sub-electrode SLT1a, and the 2-1 pixel electrode PE2a (or the second pixel electrode PE2), the 3-1 pixel electrode PE3a (or the third pixel electrode PE3), and the 2-1 sub-electrode SLT2a (or the second sub-electrode SLT2) may be formed on the third insulating layer INS3.

[0217] As in Fig. 9 and Fig.10In the embodiment, when the pixel electrodes PE disposed on the first end portion EP1 and the second end portion EP2 of each light emitting element LD are arranged to be non-coplanar with each other, the pixel electrodes PE can be separated more stably. Therefore, the electrical stability between the first end portion EP1 and the second end portion EP2 of the light emitting element LD can be further ensured.

[0218] The first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3 and the fourth pixel electrode PE4 may each be made of various transparent conductive materials. For example, each of the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3 and the fourth pixel electrode PE4 may include at least one of various transparent conductive materials such as indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc tin oxide and gallium tin oxide, and may be implemented as substantially transparent or translucent to meet a specific transmittance. Therefore, the light emitted from the first end portion EP1 and the second end portion EP2 of the light emitting element LD may pass through the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3 and the fourth pixel electrode PE4 to be emitted to the outside of the display panel DP.

[0219] At least one overcoat layer (eg, a layer for planarizing the upper surface of the display element layer DPL) may be further disposed on the pixel electrode PE.

[0220] According to an embodiment, the optical layer LCL may be optionally disposed on the display element layer DPL. For example, the optical layer LCL may include a color conversion layer and a color filter layer, which converts the light emitted from the light emitting element LD into light having excellent color reproducibility. Fig.12 The optical layer LCL is described.

[0221] After the light emitting element LD is aligned in the emission area EMA and the pixel electrode PE electrically connected to the light emitting element LD is formed, an inspection may be performed to determine whether there may be a dark spot defect in the pixel PXL. In the case where a defective light emitting element may be in the emission area EMA, the light emitting element LD electrically connected in parallel with the defective light emitting element may not be turned on. Defects may include defects in the light emitting element LD itself, short circuits of the pixel electrode PE positioned at the two end portions of the light emitting element LD, and the like, but the present disclosure may not be limited thereto. In the case where the light emitting element LD is not turned on in the inspection described above and therefore the pixel PXL becomes dark, a process of repairing the defective light emitting element may be performed. For example, by removing the area of ​​the electrode electrically connected to the end portion of the defective light emitting element through laser cutting, the electrode can be floated to perform the repair, whereby the remaining light emitting elements LD that may not be electrically connected to the electrode can be turned on normally. This will be described below with reference to the above. Figures 13 to 15A detailed description is provided regarding repairing of a defective light emitting element.

[0222] Fig.12 A pixel PXL according to one or more embodiments is shown and may be Figure 6 Schematic cross-sectional view corresponding to line II'.

[0223] against Fig.12 In order to avoid redundant description, the differences from the above-described embodiments will be described.

[0224] refer to Figures 1 to 12 , the pixel PXL may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, an optical layer LCL and an encapsulation layer ENC.

[0225] The display element layer DPL may include a bank pattern BNP, a first alignment electrode ALE1, a second alignment electrode ALE2, and a third alignment electrode ALE3, a first bank BNK1, a light emitting element LD, and a first pixel electrode PE1, a second pixel electrode PE2, a third pixel electrode PE3, and a fourth pixel electrode PE4. The optical layer LCL may include a color filter layer CFL. In an embodiment, the optical layer LCL may further include a second bank BNK2 disposed on the first bank BNK1, a color conversion layer CCL disposed on the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4, and a first capping layer CPL1 disposed on the color conversion layer CCL and the second bank BNK2.

[0226] The second bank BNK2 may be disposed on the first bank BNK1 in the non-emission area NEA of the pixel PXL. The second bank BNK2 may surround the emission area EMA of the pixel PXL and may be a dam structure that ultimately defines the emission area EMA by defining a position where the color conversion layer CCL may be provided.

[0227] The second bank BNK2 may include a light blocking material. For example, the second bank BNK2 may be a black matrix, but is not limited thereto. According to an embodiment, the second bank BNK2 may be configured to include at least one light blocking material and / or a reflective material to allow light emitted from the color conversion layer CCL to further travel in the image display direction of the display device DD, thereby improving the light emitting efficiency of the color conversion layer CCL.

[0228] The color conversion layer CCL may include color conversion particles QD corresponding to a specific color. For example, the color conversion layer CCL may include color conversion particles QD that convert the first color light emitted from the light emitting element LD into a second color light (a specific color light or light with an excellent color reproduction rate). In the case where the pixel PXL is a red pixel (or a red sub-pixel), the color conversion layer CCL of the pixel PXL may include color conversion particles QD of red quantum dots, which convert the first color light emitted from the light emitting element LD into a second color light (e.g., red light).

[0229] In the case where the pixel PXL is a green pixel (or a green sub-pixel), the color conversion layer CCL of the pixel PXL may include color conversion particles QD of green quantum dots that convert the first color light emitted from the light emitting element LD into second color light (eg, green light).

[0230] In the case where the pixel PXL is a blue pixel (or a blue sub-pixel), the color conversion layer CCL of the pixel PXL may include color conversion particles QD of blue quantum dots, which convert the first color light emitted from the light-emitting element LD into a second color light (e.g., blue light). In the case where the pixel PXL is a blue pixel (or a blue sub-pixel), according to an embodiment, a light scattering layer LSL including light scattering particles SCT may be provided instead of the color conversion layer CCL including the color conversion particles QD. For example, in the case where the light-emitting element LD emits blue light, the pixel PXL may include a light scattering layer LSL including light scattering particles SCT. According to an embodiment, the light scattering layer LSL described above may be omitted. In the case where the pixel PXL is a blue pixel (or a blue sub-pixel), according to an embodiment, a transparent polymer may be provided instead of the color conversion layer CCL.

[0231] The first capping layer CPL1 may be disposed on the color conversion layer CCL and the second bank BNK2 .

[0232] The first capping layer CPL1 may be entirely disposed in the display area DA in which the pixel PXL may be located to cover the second bank BNK2 and the color conversion layer CCL.

[0233] The first capping layer CPL1 may be an inorganic insulating film including an inorganic material. The first capping layer CPL1 may include silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) and aluminum oxide (AlO x The first capping layer CPL1 may entirely cover the second bank BNK2 and the color conversion layer CCL to prevent external moisture or oxygen from entering the color conversion layer CCL.

[0234] According to an embodiment, the first capping layer CPL1 may have an approximately flat surface while alleviating a step difference caused by a component disposed below the first capping layer CPL1. For example, the first capping layer CPL1 may include an organic insulating film including an organic material, but the present disclosure is not limited thereto. The first capping layer CPL1 may be a common layer commonly disposed to the display area DA.

[0235] The color filter layer CFL may be disposed on the first capping layer CPL1.

[0236] The color filter layer CFL may include a color filter CF corresponding to the emission area EMA of each pixel PXL. For example, the color filter layer CFL may include a first color filter CF1 disposed on the color conversion layer CCL of the pixel PXL (hereinafter, referred to as the "first pixel"), a second color filter CF2 disposed on the color conversion layer of an adjacent pixel adjacent to the first pixel PXL (hereinafter, referred to as the "second pixel"), and a third color filter CF3 disposed on the color conversion layer of an adjacent pixel adjacent to the second pixel.

[0237] The first color filter CF1, the second color filter CF2, and the third color filter CF3 may be arranged in the non-emission area NEA to overlap each other, and may be used as a light shielding member to block light interference between adjacent pixels PXL. Each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 may include a color filter material that selectively transmits the colored light converted in the corresponding color conversion layer CCL. For example, the first color filter CF1 may be a red color filter, the second color filter CF2 may be a green color filter, and the third color filter CF3 may be a blue color filter, but the present disclosure is not limited thereto.

[0238] The encapsulation layer ENC may be disposed on the color filter layer CFL.

[0239] The encapsulation layer ENC may include a second capping layer CPL2. The second capping layer CPL2 may be an inorganic insulating film including an inorganic material, or may be an organic insulating film including an organic material. The second capping layer CPL2 may cover the components positioned below the second capping layer CPL2 as a whole to prevent external moisture or humidity from flowing into the optical layer LCL and the display element layer DPL. According to an embodiment, the second capping layer CPL2 may be used as a planarization layer that mitigates the step difference caused by the components of the optical layer LCL and the display element layer DPL positioned below the second capping layer CPL2.

[0240] The second capping layer CPL2 may be formed as a multilayer. For example, the second capping layer CPL2 may include at least two layers of inorganic insulating films and at least one layer of organic insulating film interposed between the at least two layers of inorganic insulating films. However, the constituent material and / or structure of the second capping layer CPL2 may be changed in various ways. According to an embodiment, at least one outer coating layer, a filler layer and / or another substrate may be further disposed on the second capping layer CPL2.

[0241] In the pixel PXL according to the above-described embodiment, the color conversion layer CCL and the color filter layer CFL may be disposed on the light emitting element LD through a continuous process to emit light having excellent color reproducibility through the color conversion layer CCL and the color filter layer CFL, thereby improving light emitting efficiency.

[0242] According to an embodiment, the color conversion layer CCL and the color filter layer CFL may be formed on a surface of a base substrate (not shown) by a continuous process to constitute an upper substrate, which may be separated from a substrate SUB on which the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4 may be disposed. The upper substrate may be coupled to the display element layer DPL including the first pixel electrode PE1, the second pixel electrode PE2, the third pixel electrode PE3, and the fourth pixel electrode PE4 through an intermediate layer made of an insulating adhesive material.

[0243] Fig.13 and Fig.14 It shows the repaired Figure 6 Schematic plan view of a state of a pixel PXL. Fig.15 It is along Fig.13 A schematic cross-sectional view taken along line III-III'.

[0244] refer to Figure 5 , Figure 6 and Figures 13 to 15 , the pixel PXL may include a first stage electrically connected in series (see Figure 5 "SET1" in the second level (see Figure 5 The transmitting part formed by the "SET2" in Figure 5 in the .

[0245] The first stage SET1 may include a first light emitting element LD1 electrically connected in parallel between the first pixel electrode PE1 and the second pixel electrode PE2, and the second stage SET2 may include a second light emitting element LD2 electrically connected in parallel between the third pixel electrode PE3 and the fourth pixel electrode PE4. In a plan view (or when viewed from above), the first stage SET1 may be positioned at a first side (e.g., left side) of the emission area EMA, and the second stage SET2 may be positioned at a second side (e.g., right side) of the emission area EMA.

[0246] The pixel PXL may include a third light emitting element LD3 electrically connected between the 1-2 pixel electrode PE1b (or the first electrode EL1) and the 2-2 pixel electrode PE2b (or the second electrode EL2). The third light emitting element LD3 may be a defective light emitting element. In the case where the third light emitting element LD3 is present in the pixel PXL, the light emitting element LD (e.g., the first light emitting element LD1) electrically connected in parallel with the third light emitting element LD3 may not be driven normally. An area of ​​the emission area EMA in which the first light emitting element LD1 is disposed (e.g., a first side of the emission area EMA on which the first stage SET1 is positioned) may not be turned on. Therefore, the pixel PXL has a light emitting efficiency of about 50% because only another area of ​​the emission area EMA (e.g., a second side of the emission area EMA on which the second stage SET2 may be positioned) may be turned on. In the case where the pixel PXL has a light emitting efficiency of about 50%, the pixel PXL may be determined to have a dark spot defect, and thus even a light emitting element LD that operates normally may be wasted unnecessarily. Therefore, in an embodiment, a repair process may be performed to reduce the possibility of a dark spot defect in the pixel PXL, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0247] The repair process described above can be performed by checking the position of the defective light-emitting element and using a process such as laser cutting, but the present disclosure may not be limited thereto. In the repair process, for example, a portion of the second pixel electrode PE2 (which may be an electrode electrically connected to the third light-emitting element LD3 (or a defective light-emitting element)) may be removed using a laser, thereby repairing the pixel PXL having a dark spot defect. Specifically, when the position of the third light-emitting element LD3 (which is a defective light-emitting element) is clarified, the 2-3 pixel electrodes (see FIG. 2 ) may be removed from the second pixel electrode PE2 using a laser. Figure 62-2 pixel electrode PE2a and 2-2 pixel electrode PE2b of the second pixel electrode PE2 can be electrically separated. The 2-1 pixel electrode PE2a and 2-2 pixel electrode PE2b, which can be positioned in the same column in the second direction DR2 and constitute the second pixel electrode PE2, can be electrically disconnected in the third area A3 of the emission area EMA. Therefore, the 1a-th light emitting element LD1a electrically connected to the 2-1 pixel electrode PE2a can be electrically separated from the third light emitting element LD3 (or a defective light emitting element) electrically connected to the 2-2 pixel electrode PE2b, so that the 1a-th light emitting element LD1a can be driven normally.

[0248] As described above, in the case where the 1a-th light emitting element LD1a can be driven normally, even the region of the emission area EMA in which the 1a-th light emitting element LD1a can be positioned (for example, the upper end portion of the first side of the emission area EMA) can be turned on. Except for the third light emitting element LD3 and the 1b-th light emitting element LD1b electrically connected to the floating 2-2 pixel electrode PE2b, the remaining light emitting elements LD can be turned on, thereby improving the luminous efficiency of the pixel PXL determined to have a dark spot defect. For example, in the case where all of the 1a-th light emitting elements LD1a and the second light emitting element LD2 can be turned on, the pixel PXL determined to have a dark spot defect can have a luminous efficiency of about 75%. Therefore, the pixel PXL can be repaired, thereby improving the display device (see Figure 3 The reliability of the "DD" in the

[0249] According to the above-described embodiments, the possibility of a dark spot defect in the pixel PXL can be reduced, and an undesirable waste of a normally functioning light emitting element LD can be prevented.

[0250] In the above-described repair process, the 2-3 pixel electrodes PE2c of the second pixel electrode PE2 may be completely removed using a laser, but the present disclosure is not limited thereto. Fig.14 As shown, the 2-1 pixel electrode PE2a may be electrically disconnected from the 2-3 pixel electrode PE2c, and the 2-2 pixel electrode PE2b may be electrically disconnected from the 2-3 pixel electrode PE2c to form a floating dummy pattern DMP in the third area A3 of the emission area EMA. The dummy pattern DMP may be a portion of the 2-3 pixel electrode PE2c that remains in the third area A3. The dummy pattern DMP may be electrically separated from each of the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b.

[0251] Fig.16 It shows the repaired Figure 6Schematic plan view of a state of a pixel PXL. Fig.17 It is along Fig.16 Schematic cross-sectional view taken along line IV-IV'.

[0252] about Fig.16 and Fig.17 In the embodiment of the present invention, the differences from the above-described embodiment will be described to avoid redundant description.

[0253] refer to Figure 5 , Figure 6 , Fig.16 and Fig.17 , the pixel PXL may include a fourth light emitting element LD4 electrically connected between the 3-1 pixel electrode PE3a (or the first electrode EL1) and the 4-1 pixel electrode PE4a (or the second electrode EL2). The fourth light emitting element LD4 may be a defective light emitting element. In the case where the fourth light emitting element LD4 is present in the pixel PXL, the light emitting element LD (e.g., the second light emitting element LD2) electrically connected in parallel with the fourth light emitting element LD4 may not be driven normally. The region of the emission area EMA in which the second light emitting element LD2 is disposed (e.g., the second side of the emission area EMA on which the second stage SET2 is positioned) may not be turned on. Therefore, the pixel PXL has a light emitting efficiency of about 50% because only another region of the emission area EMA (e.g., the first side of the emission area EMA on which the first light emitting element LD1 of the first stage SET1 may be positioned) may be turned on. In the case where the pixel PXL has a light emitting efficiency of about 50%, the pixel PXL may be determined to have a dark spot defect, and thus even a light emitting element LD that operates normally may be wasted unnecessarily. Therefore, in an embodiment, a repair process may be performed to reduce the possibility of a dark spot defect in the pixel PXL, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0254] A portion of the fourth pixel electrode PE4 (which may be an electrode electrically connected to the fourth light emitting element LD4 (or a defective light emitting element)) may be removed using a laser, thereby repairing the pixel PXL having a dark spot defect. Specifically, when the position of the fourth light emitting element LD4 (which is a defective light emitting element) is clarified, the 4-3 pixel electrode (see FIG. 1 ) may be removed from the fourth pixel electrode PE4 using a laser. Figure 64-2 pixel electrode PE4a) so that the 4-1 pixel electrode PE4a electrically connected to the fourth light emitting element LD4 is floated. Through the repair process described above, the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b of the fourth pixel electrode PE4 can be electrically separated. The 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b, which can be positioned in the same column in the second direction DR2 and constitute the fourth pixel electrode PE4, can be electrically disconnected in the third area A3 of the emission area EMA. Therefore, the 2b-th light emitting element LD2b electrically connected to the 4-2 pixel electrode PE4b can be electrically separated from the fourth light emitting element LD4 (or a defective light emitting element) electrically connected to the 4-1 pixel electrode PE4a, so that the 2b-th light emitting element LD2b can be driven normally.

[0255] As described above, in the case where the 2b-th light-emitting element LD2b is driven normally, even the area of ​​the emission area EMA in which the 2b-th light-emitting element LD2b is positioned (for example, the lower end portion of the second side of the emission area EMA) can be turned on. Except for the fourth light-emitting element LD4 and the 2a-th light-emitting element LD2a electrically connected to the floating 4-1 pixel electrode PE4a, the remaining light-emitting elements LD can be turned on, thereby improving the luminous efficiency of the pixel PXL determined to have a dark spot defect. For example, in the case where all of the first light-emitting elements LD1 and the 2b-th light-emitting element LD2b are turned on, the pixel PXL that can be determined to have a dark spot defect can have a luminous efficiency of about 75%. Therefore, the pixel PXL can be repaired, thereby improving the display device (see Figure 3 The reliability of the "DD" in the

[0256] According to the above-described embodiments, the possibility of a dark spot defect in the pixel PXL can be reduced, and an undesirable waste of a normally functioning light emitting element LD can be prevented.

[0257] Fig.18 It shows the repaired Figure 6 Schematic plan view of a state of a pixel PXL. Fig.19 It is along Fig.18 A schematic cross-sectional view taken along line V-V'.

[0258] about Fig.18 and Fig.19 In the embodiment of the present invention, the differences from the above-described embodiment will be described to avoid redundant description.

[0259] refer to Figure 5 , Figure 6 , Fig.18 and Fig.19, the pixel PXL may include a fifth light emitting element LD5 electrically connected between the 3-2 pixel electrode PE3b (or the first electrode EL1) and the 4-2 pixel electrode PE4b (or the second electrode EL2). The fifth light emitting element LD5 may be a defective light emitting element. In the case where the fifth light emitting element LD5 is present in the pixel PXL, the light emitting element LD (e.g., the second light emitting element LD2) electrically connected in parallel with the fifth light emitting element LD5 may not be driven normally. The region of the emission area EMA in which the second light emitting element LD2 is disposed (e.g., the second side of the emission area EMA on which the second stage SET2 is positioned) may not be turned on. Therefore, the pixel PXL has a light emitting efficiency of about 50% because only another region of the emission area EMA (e.g., the first side of the emission area EMA on which the first light emitting element LD1 of the first stage SET1 may be positioned) may be turned on. In the case where the pixel PXL has a light emitting efficiency of about 50%, the pixel PXL may be determined to have a dark spot defect, and thus even a light emitting element LD that operates normally may be wasted unnecessarily. Therefore, in an embodiment, a repair process may be performed to reduce the possibility of a dark spot defect in the pixel PXL, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0260] A portion of the second sub-electrode SLT2 (which may be an electrode electrically connected to the fifth light-emitting element LD5 (or a defective light-emitting element)) may be removed using a laser, thereby repairing the pixel PXL. Specifically, when the position of the fifth light-emitting element LD5 (which is a defective light-emitting element) is clarified, the 2-3 sub-electrode (see FIG. 1 ) may be removed from the second sub-electrode SLT2 using a laser. Figure 6 "SLT2c" in the figure) so that the 3-2 pixel electrode PE3b electrically connected to the fifth light emitting element LD5 is floated. Through the repair process described above, the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b, which are positioned in the same column in the second direction DR2 and constitute the second sub-electrode SLT2, can be electrically disconnected in the non-emission area NEA corresponding to the third area A3 of the emission area EMA. Therefore, the 3-1 pixel electrode PE3a electrically connected to the 2-1 sub-electrode SLT2a and the 3-2 pixel electrode PE3b electrically connected to the 2-2 sub-electrode SLT2b can be electrically separated. Therefore, the 2ath light emitting element LD2a electrically connected to the 3-1 pixel electrode PE3a can be electrically separated from the fifth light emitting element LD5 (or a defective light emitting element) electrically connected to the 3-2 pixel electrode PE3b, so that the 2ath light emitting element LD2a can be driven normally.

[0261] As described above, in the case where the 2a light emitting element LD2a is driven normally, even the area of ​​the emission area EMA in which the 2a light emitting element LD2a is positioned (for example, the upper end portion of the second side of the emission area EMA) can be turned on. Except for the fifth light emitting element LD5 and the 2b light emitting element LD2b electrically connected to the floating 3-2 pixel electrode PE3b, the remaining light emitting elements LD can be turned on, thereby improving the luminous efficiency of the pixel PXL determined to have a dark spot defect. For example, in the case where all of the first light emitting elements LD1 and the 2a light emitting element LD2a are turned on, the pixel PXL determined to have a dark spot defect can have a luminous efficiency of about 75%. Therefore, the pixel PXL can be repaired, thereby improving the display device (see Figure 3 The reliability of the "DD" in the

[0262] According to the above-described embodiments, the possibility of a dark spot defect in the pixel PXL may be reduced, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0263] Fig. 20 It shows the repaired Figure 6 Schematic plan view of a state of a pixel PXL. Fig.21 It is along Fig. 20 A schematic cross-sectional view taken along line VI-VI'.

[0264] about Fig. 20 and Fig.21 In the embodiment of the present invention, the differences from the above-described embodiment will be described to avoid redundant description.

[0265] refer to Figure 5 , Figure 6 , 20 and Fig.21, the pixel PXL may include a sixth light emitting element LD6 electrically connected between the 1-1 pixel electrode PE1a (or the first electrode EL1) and the 2-1 pixel electrode PE2a (or the second electrode EL2). The sixth light emitting element LD6 may be a defective light emitting element. In the case where the sixth light emitting element LD6 is present in the pixel PXL, the light emitting element LD (e.g., the first light emitting element LD1) electrically connected in parallel with the sixth light emitting element LD6 may not be driven normally. The region of the emission area EMA in which the first light emitting element LD1 is disposed (e.g., the first side of the emission area EMA on which the first stage SET1 is positioned) may not be turned on. Therefore, the pixel PXL has a light emitting efficiency of about 50% because only another region of the emission area EMA (e.g., the second side of the emission area EMA on which the second light emitting element LD2 of the second stage SET2 may be positioned) may be turned on. In the case where the pixel PXL has a light emitting efficiency of about 50%, the pixel PXL may be determined to have a dark spot defect, and thus even a light emitting element LD that operates normally may be wasted unnecessarily. Therefore, in this embodiment, a repair process may be performed to reduce the possibility of a dark spot defect in the pixel PXL, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0266] A portion of the first sub-electrode SLT1 (which may be an electrode electrically connected to the sixth light-emitting element LD6 (or a defective light-emitting element)) may be removed using a laser, thereby repairing the pixel PXL. Specifically, when the position of the sixth light-emitting element LD6 (which is a defective light-emitting element) is clarified, the 1-3 sub-electrodes (see Figure 6 "SLT1c" in the figure) so that the 1-1 pixel electrode PE1a electrically connected to the sixth light emitting element LD6 is floated. Through the repair process described above, the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b, which are positioned in the same column in the second direction DR2 and constitute the first sub-electrode SLT1, can be electrically disconnected in the non-emission area NEA corresponding to the third area A3 of the emission area EMA. Therefore, the 1-1 pixel electrode PE1a electrically connected to the 1-1 sub-electrode SLT1a and the 1-2 pixel electrode PE1b electrically connected to the 1-2 sub-electrode SLT1b can be electrically separated. Therefore, the 1bth light emitting element LD1b electrically connected to the 1-2 pixel electrode PE1b can be electrically separated from the sixth light emitting element LD6 (or a defective light emitting element) electrically connected to the 1-1 pixel electrode PE1a, so that the 1bth light emitting element LD1b can be driven normally.

[0267] As described above, in the case where the 1b-th light emitting element LD1b is driven normally, even the region of the emission area EMA in which the 1b-th light emitting element LD1b can be positioned (for example, the lower end portion of the first side of the emission area EMA) can be turned on. Except for the sixth light emitting element LD6 and the 1a-th light emitting element LD1a electrically connected to the floating 1-1 pixel electrode PE1a, the remaining light emitting elements LD can be turned on, thereby improving the luminous efficiency of the pixel PXL determined to have a dark spot defect. For example, in the case where all of the 1b-th light emitting elements LD1b and the second light emitting element LD2 can be turned on, the pixel PXL determined to have a dark spot defect can have a luminous efficiency of about 75%. Therefore, the pixel PXL can be repaired, thereby improving the display device (see Figure 3 The reliability of the "DD" in the

[0268] According to the above-described embodiments, the possibility of a dark spot defect in the pixel PXL may be reduced, thereby preventing an undesirable waste of a normally functioning light emitting element LD.

[0269] According to the display device and the method of repairing the display device of the embodiment, even if a dark spot defect occurs in each pixel, the pixel can be easily repaired to improve the reliability of the display device.

[0270] According to the display device and the method of repairing the display device according to the embodiment, even in the case where a defective light emitting element is provided in each pixel, the pixel can be easily repaired, and each pixel can be normally driven using the remaining light emitting elements.

[0271] Effects according to the embodiments may not be limited to the above-exemplified contents, and more various effects may be included in the specification.

[0272] Although the present disclosure has been described with reference to the embodiments thereof, those skilled in the art or ordinary skilled in the art will appreciate that various modifications and changes may be made to the present disclosure without departing from the spirit and technical scope of the present disclosure described in the appended claims.

[0273] Therefore, the technical scope of the present disclosure may not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

Claims

1. A display device having an emissive region and a non-emissive region, and comprising: The first alignment electrode, the second alignment electrode and the third alignment electrode are sequentially arranged in a first direction; a plurality of first light emitting elements and a plurality of second light emitting elements, wherein the plurality of first light emitting elements are disposed between the first alignment electrode and the second alignment electrode, and the plurality of second light emitting elements are disposed between the second alignment electrode and the third alignment electrode; a first electrode electrically connected to a first end portion of each of the plurality of first light emitting elements and a first end portion of each of the plurality of second light emitting elements; as well as a second electrode electrically connected to a second end portion of each of the plurality of first light emitting elements and a second end portion of each of the plurality of second light emitting elements, wherein The emission area includes a first area, a second area, and a third area divided in a second direction intersecting the first direction, In a plan view, the first region is an upper region of the emission region, the second region is a lower region of the emission region, and the third region is a middle region of the emission region, and The first electrode is positioned in the first region and the second region, and is electrically disconnected in the third region.

2. The display device according to claim 1, wherein: The second electrode is positioned in the first region, the second region and the third region, and The first electrode is not positioned in the third region.

3. The display device according to claim 2, wherein: The first electrode includes a first pixel electrode and a third pixel electrode that are spaced apart from each other. The second electrode includes a second pixel electrode and a fourth pixel electrode spaced apart from each other, and The first pixel electrode, the second pixel electrode, the fourth pixel electrode, and the third pixel electrode are sequentially disposed in the first direction at least in the emission region.

4. The display device according to claim 3, wherein: The first pixel electrode includes a 1-1 pixel electrode positioned in the first area and a 1-2 pixel electrode positioned in the second area, The second pixel electrode includes a 2-1 pixel electrode positioned in the first area, a 2-2 pixel electrode positioned in the second area, and a 2-3 pixel electrode positioned in the third area, The third pixel electrode includes a 3-1 pixel electrode positioned in the first area and a 3-2 pixel electrode positioned in the second area, and The fourth pixel electrode includes a 4-1 pixel electrode positioned in the first region, a 4-2 pixel electrode positioned in the second region, and a 4-3 pixel electrode positioned in the third region.

5. The display device according to claim 4, wherein: The 1-1 pixel electrode and the 1-2 pixel electrode are spaced apart from each other, and The 3-1 pixel electrode and the 3-2 pixel electrode are spaced apart from each other.

6. The display device according to claim 4, wherein: The 2-3 pixel electrode has a narrower width in the first direction than the 2-1 pixel electrode and the 2-2 pixel electrode, and The 4-3 pixel electrode has a width narrower than those of the 4-1 pixel electrode and the 4-2 pixel electrode in the first direction.

7. The display device according to claim 4, further comprising: A contact electrode is positioned in the non-emission region and connects the 2-1 pixel electrode and the 3-1 pixel electrode.

8. The display device according to claim 4, further comprising: a first sub-electrode positioned in the non-emitting region and electrically connected to the first pixel electrode; as well as a second sub-electrode positioned in the non-emitting region and electrically connected to the third pixel electrode, wherein: The first sub-electrode includes a 1-1 sub-electrode electrically connected to the 1-1 pixel electrode, a 1-2 sub-electrode electrically connected to the 1-2 pixel electrode, and a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode, and The second sub-electrode includes a 2-1 sub-electrode electrically connected to the 3-1 pixel electrode, a 2-2 sub-electrode electrically connected to the 3-2 pixel electrode, and a 2-3 sub-electrode electrically connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

9. The display device according to claim 8, wherein: The 1-3 sub-electrode has a narrower width in the first direction than the 1-1 sub-electrode and the 1-2 sub-electrode, and The 2-3 sub-electrode has a narrower width in the first direction than the 2-1 sub-electrode and the 2-2 sub-electrode.

10. The display device according to claim 4, wherein: The plurality of first light emitting elements include a 1a light emitting element positioned in the first region and electrically connected to the 1-1 pixel electrode and the 2-1 pixel electrode, and a 1b light emitting element positioned in the second region and electrically connected to the 1-2 pixel electrode and the 2-2 pixel electrode, and The plurality of second light emitting elements include a 2a light emitting element positioned in the first region and electrically connected to the 3-1 pixel electrode and the 4-1 pixel electrode, and a 2b light emitting element positioned in the second region and electrically connected to the 3-2 pixel electrode and the 4-2 pixel electrode.

11. The display device according to claim 10, wherein: Each of the 1a-th light emitting element, the 1b-th light emitting element, the 2a-th light emitting element, and the 2b-th light emitting element includes a first semiconductor layer positioned at the first end portion, a second semiconductor layer positioned at the second end portion, and an active layer positioned between the first semiconductor layer and the second semiconductor layer, and The second semiconductor layer is an n-type semiconductor layer, and the first semiconductor layer is a p-type semiconductor layer.

12. The display device according to claim 1, further comprising: A color conversion layer is disposed on the plurality of first light-emitting elements and on the plurality of second light-emitting elements; as well as The color filter layer is disposed on the color conversion layer.

13. A display device having a non-emitting area and an emitting area including a first area, a second area, and a third area divided in a first direction, and comprising: A first alignment electrode, a second alignment electrode, and a third alignment electrode are sequentially arranged in a second direction intersecting the first direction; a plurality of light emitting elements disposed between the first alignment electrode and the second alignment electrode and between the second alignment electrode and the third alignment electrode; a first pixel electrode, a second pixel electrode, a third pixel electrode and a fourth pixel electrode, wherein the first pixel electrode, the second pixel electrode, the fourth pixel electrode and the third pixel electrode are sequentially arranged in the second direction at least in the emission region; a first sub-electrode positioned in the non-emission region and electrically connected to the first pixel electrode; and a second sub-electrode positioned in the non-emitting region and electrically connected to the third pixel electrode, wherein: Each of the first to fourth pixel electrodes includes a first portion positioned in the first region and a second portion positioned in the second region, The first sub-electrode includes a 1-1 sub-electrode electrically connected to the first portion of the first pixel electrode and a 1-2 sub-electrode electrically connected to the second portion of the first pixel electrode, The second sub-electrode includes a 2-1 sub-electrode electrically connected to the first portion of the third pixel electrode and a 2-2 sub-electrode electrically connected to the second portion of the third pixel electrode, and Each of the first pixel electrode and the third pixel electrode is electrically disconnected in the third region.

14. The display device according to claim 13, wherein: The second pixel electrode is electrically disconnected in the third region, The fourth pixel electrode further includes a third portion positioned in the third region and electrically connecting the first portion of the fourth pixel electrode and the second portion of the fourth pixel electrode, The first sub-electrode further includes a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode, and The second sub-electrode further includes a 2-3 sub-electrode electrically connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

15. The display device according to claim 14, further comprising: A dummy pattern is positioned between the first portion of the second pixel electrode and the second portion of the second pixel electrode in the third region and is spaced apart from the first portion of the second pixel electrode and the second portion of the second pixel electrode.

16. The display device according to claim 13, wherein: The fourth pixel electrode is electrically disconnected in the third region, The second pixel electrode further includes a third portion positioned in the third region and electrically connecting the first portion of the second pixel electrode and the second portion of the second pixel electrode, The first sub-electrode further includes a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode, and The second sub-electrode further includes a 2-3 sub-electrode electrically connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

17. The display device according to claim 13, wherein: Each of the second pixel electrode and the fourth pixel electrode further includes a third portion positioned in the third region and connecting the first portion and the second portion of the corresponding pixel electrode, The first sub-electrode further includes a 1-3 sub-electrode electrically connected to the 1-1 sub-electrode and the 1-2 sub-electrode, and The 2-1 sub-electrode and the 2-2 sub-electrode are spaced apart from each other and are electrically disconnected.

18. The display device according to claim 13, wherein: Each of the second pixel electrode and the fourth pixel electrode further includes a third portion positioned in the third region and electrically connecting the first portion and the second portion of the corresponding pixel electrode, The second sub-electrode further includes a 2-3 sub-electrode electrically connected to the 2-1 sub-electrode and the 2-2 sub-electrode, and The 1-1 sub-electrode and the 1-2 sub-electrode are spaced apart from each other and are electrically disconnected.

19. A method for repairing a display device, comprising: Provided is a display device having a non-emission area and an emission area including a first area, a second area, and a third area divided in a first direction, and comprising: A first alignment electrode, a second alignment electrode, and a third alignment electrode are sequentially arranged in a second direction intersecting the first direction; a plurality of light emitting elements disposed between the first alignment electrode and the second alignment electrode and between the second alignment electrode and the third alignment electrode, the plurality of light emitting elements including a defective light emitting element and at least one normal light emitting element; a first electrode electrically connected to a first end portion of each of the plurality of light emitting elements, the first electrode being disconnected in the third region; and a second electrode electrically connected to a second end portion of each of the plurality of light emitting elements, the second electrode being positioned in the first to third regions; and One of the first electrode and the second electrode electrically connected to the at least one normal light emitting element is separated from one of the first electrode and the second electrode electrically connected to the defective light emitting element.

20. The method according to claim 19, wherein: The one of the first electrode and the second electrode electrically connected to the at least one normal light-emitting element is positioned in the first direction from the one of the first electrode and the second electrode electrically connected to the defective light-emitting element, and is positioned in the same column as the one of the first electrode and the second electrode electrically connected to the defective light-emitting element.

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