Display panel, display module and display device
By providing a third electrode layer on the first dam of the display panel and a fourth electrode layer on the third electrode layer, the first signal line and the fourth electrode layer are electrically connected to the fourth electrode layer, the problem of a larger width of the existing display panel is solved, and a narrower frame and improved display panel performance are achieved.
Patent Information
- Application Number
- CN202510121675.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-23
- Publication Date
- 2025-05-02
AI Technical Summary
The existing display has a large border width, making it difficult to achieve narrower borders, affecting the performance of the display panel.
By providing a third electrode layer on the first dam and a fourth electrode layer on the third electrode layer, the first signal line and the fourth electrode layer are electrically connected, and the original overlap area is transferred to the top of the first dam, thereby reducing the frame width.
It has achieved a significant reduction in the border width, saving more than 300um of border width, and reducing the border width to less than 0.7mm, improving the performance of the display panel.
Smart Images

Figure CN119923158A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel, a display module and a display device. Background Art
[0002] OLED (Organic Light-Emitting Diode) is an active light-emitting device with a sandwich structure consisting of multiple organic layers and electrodes on both sides. At present, display screens based on AMOLED (Active-matrix organic light-emitting diode) have been commercialized in the fields of smart phones, watches and laptops.
[0003] However, the performance of existing displays needs to be improved. Summary of the invention
[0004] In view of this, the purpose of the present application is to provide a display panel that can reduce the border width, thereby facilitating the realization of a narrower border.
[0005] Based on the above purpose, the present application provides a display panel, including:
[0006] The substrate comprises a display area and a non-display area, wherein the non-display area at least partially surrounds the display area;
[0007] A display layer, located in the display area, comprising a first electrode layer, a light-emitting layer, and a second electrode layer, which are located on one side of the substrate and are sequentially arranged away from the substrate;
[0008] A first dam, located in the non-display area and located on the same side of the substrate as the display layer;
[0009] a third electrode layer, disposed in the same layer as the first electrode layer and located on a side of the first dam away from the substrate, wherein an orthographic projection of the third electrode layer on the substrate at least partially overlaps an orthographic projection of the first dam on the substrate;
[0010] a fourth electrode layer, disposed in the same layer as the second electrode layer and located on a side of the third electrode layer away from the substrate;
[0011] an encapsulation layer, located on a side of the second electrode layer and the fourth electrode layer away from the substrate;
[0012] The first signal line is located in the third electrode layer and is electrically connected to the fourth electrode layer.
[0013] In one embodiment, the encapsulation layer comprises a first encapsulation layer, a second encapsulation layer and a third encapsulation layer which are stacked, the first encapsulation layer and the third encapsulation layer comprise inorganic materials, and the second encapsulation layer comprises organic materials;
[0014] Preferably, the first encapsulation layer covers the side of the second electrode layer and the fourth electrode layer away from the substrate, the second encapsulation layer covers the side of the first encapsulation layer away from the substrate, and partially covers the side of the fourth electrode layer away from the substrate, and the third encapsulation layer covers the side of the second encapsulation layer away from the substrate, and covers the area of the first encapsulation layer not covered by the second encapsulation layer;
[0015] Preferably, the encapsulation layer includes a first encapsulation layer, a second encapsulation layer and a third encapsulation layer, the first encapsulation layer covers the side of the second electrode layer and the fourth electrode layer away from the substrate, the second encapsulation layer covers the side of the first encapsulation layer away from the substrate, and the third encapsulation layer covers the side of the second encapsulation layer away from the substrate.
[0016] In one embodiment, the display panel further includes:
[0017] a second dam located in the non-display area and on a side of the first dam away from the display area;
[0018] Preferably, the orthographic projection of the second encapsulation layer on the substrate partially overlaps with the orthographic projection of the side wall of the second dam close to the display area on the substrate, and the orthographic projection of the side wall of the first dam far from the display area on the substrate is located within the orthographic projection of the second encapsulation layer on the substrate;
[0019] Preferably, the display panel includes a plurality of the first dams, and the display panel includes a plurality of the second dams;
[0020] Preferably, the height of the second dam is greater than the height of the first dam;
[0021] Preferably, the first signal line comprises a negative power line.
[0022] In one embodiment, the encapsulation layer wraps the second electrode layer and the fourth electrode layer, and the orthographic projection of the second electrode layer on the substrate and the orthographic projection of the fourth electrode layer on the substrate are both located inside the orthographic projection of the encapsulation layer on the substrate.
[0023] In one embodiment, the substrate includes a substrate and a planarization layer, the planarization layer is located on one side of the substrate, and the first electrode layer, the third electrode layer, and the first dam are located on a side of the planarization layer away from the substrate.
[0024] In one embodiment, the display panel further includes:
[0025] a first groove, wherein the first groove is located in the planarization layer, in the non-display area and between the first dam and the display area, and the third electrode layer and the fourth electrode layer are partially located in the first groove;
[0026] Preferably, the substrate further comprises an interlayer dielectric layer, the interlayer dielectric layer is located between the substrate and the planarization layer, the planarization layer partially covers the interlayer dielectric layer, and the encapsulation layer covers the area of the interlayer dielectric layer not covered by the planarization layer.
[0027] In one embodiment, the third electrode layer includes a hollow area, and the hollow area connects the substrate and the fourth electrode layer.
[0028] In one embodiment, the display panel further includes:
[0029] A pixel definition layer, wherein the pixel definition layer and the display layer are located on the same side of the substrate, and the pixel definition layer is used to isolate each of the light-emitting layers.
[0030] Based on the same inventive concept, the present application also discloses a display module, which includes any one of the display panels described above.
[0031] Based on the same inventive concept, the present application also discloses a display device, which includes the display module described above.
[0032] Compared with the prior art, the display panel provided by the present application sets the third electrode layer on the first dam and the fourth electrode layer on the third electrode layer. The first signal line in the third electrode layer can be electrically connected to the fourth electrode layer, thereby realizing the transfer of the original overlapping area of the first signal line to above the first dam, which is equivalent to saving the space originally occupied by the overlapping area, and can greatly reduce the border width, which is conducive to achieving a narrower border and improving the performance of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] In order to more clearly illustrate the technical solutions in the present application or related technologies, the drawings required for use in the embodiments or related technical descriptions are briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0034] Figure 1 is a structural schematic diagram of a related display panel;
[0035] Figure 2 is a schematic diagram of a layer structure of a related display panel;
[0036] Figure 3 This is a schematic diagram of the layer structure of a display panel in one embodiment of the present application;
[0037] Figure 4 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0038] Figure 5 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0039] Figure 6 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0040] Figure 7 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0041] Figure 8 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0042] Fig. 9 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0043] Fig.10 This is a schematic diagram of the layer structure of a display panel in another embodiment of the present application;
[0044] Fig.11 FIG. 1 is a schematic diagram of a layer structure of a display panel in another embodiment of the present application.
[0045] Marking Description:
[0046] 100. Display panel;
[0047] 1. substrate; 11. display area; 12. non-display area; 13. underlay; 14. planarization layer; 15. interlayer dielectric layer;
[0048] 2. Display layer; 21. First electrode layer; 22. Light-emitting layer; 23. Second electrode layer;
[0049] 3. Dam; 31. First dam; 32. Second dam;
[0050] 4. third electrode layer; 41. hollow area;
[0051] 5. Fourth electrode layer;
[0052] 6. Encapsulation layer; 61. First encapsulation layer; 62. Second encapsulation layer; 63. Third encapsulation layer;
[0053] 7. The first groove;
[0054] 8. Pixel definition layer. DETAILED DESCRIPTION
[0055] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in combination with specific embodiments and with reference to the accompanying drawings.
[0056] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present application should be the usual meanings understood by people with ordinary skills in the field to which the present application belongs. The "first", "second" and similar words used in the embodiments of the present application do not represent any order, quantity or importance, but are only used to distinguish different components. "Including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.
[0057] Please refer to Figure 1 and 2 As shown, a related display panel 100 includes a substrate 1 . The substrate 1 includes a display area 11 and a non-display area 12 (frame area). The non-display area 12 is arranged around the display area 11 .
[0058] Please continue to refer to Figure 2 As shown, the width of the display area 11 is D1, and the width of the non-display area 12 is D2, wherein the display area 11 is provided with a display layer 2, and the display layer 2 includes a first electrode layer 21, a light-emitting layer 22, and a second electrode layer 23 located on one side of the substrate 1 and arranged away from the substrate 1 in sequence. The non-display area 12 includes an overlap area and a dam area, wherein the width of the overlap area is d1, and the width of the dam area is d2, and the overlap area is provided with a third electrode layer 4 and a fourth electrode layer 5, the third electrode layer 4 and the fourth electrode layer 5 overlap, and the third electrode layer 4 is used to run a signal line, such as a negative power line (ELVSS); the dam area is provided with a dam 3, and the display panel 100 further includes an encapsulation layer 6, the encapsulation layer 6 covers the second electrode layer 23, the fourth electrode layer 5 and the dam 3, and the dam 3 is used to prevent the organic material in the encapsulation layer 6 from overflowing.
[0059] After long-term research, the inventors found that due to the need to ensure the existence of both the overlap area and the dam area, the existing narrow bezel solutions for display panels have limited effect on compressing the bezel width, making it difficult to meet consumers' growing demand for narrow bezels.
[0060] Based on this, the present application provides a display panel solution to solve the above problems.
[0061] Please refer to Figure 1 and 3 As shown, a display panel 100 provided in an embodiment of the present application includes a substrate 1, a display layer 2, a first dam 31, a third electrode layer 4, a fourth electrode layer 5 and an encapsulation layer 6.
[0062] Among them, the substrate 1 includes a display area 11 and a non-display area 12, and the non-display area 12 at least partially surrounds the display area 11; the display layer 2 is located in the display area 11, and the display layer 2 includes a first electrode layer 21, a light-emitting layer 22, and a second electrode layer 23, which are located on one side of the substrate 1 and are arranged away from the substrate 1 in sequence; the first dam 31 is located in the non-display area 12 and is located on the same side of the substrate 1 as the display layer 2; the third electrode layer 4 is arranged in the same layer as the first electrode layer 21 and is located on the side of the first dam 31 away from the substrate 1, and the orthographic projection of the third electrode layer 4 on the substrate 1 at least partially overlaps with the orthographic projection of the first dam 31 on the substrate 1; the fourth electrode layer 5 is arranged in the same layer as the second electrode layer 23 and is located on the side of the third electrode layer 4 away from the substrate 1; the encapsulation layer 6 is located on the same side of the substrate 1 as the first dam 31, and the encapsulation layer 6 is located on the side of the second electrode layer 23 and the fourth electrode layer 5 away from the substrate 1; the first signal line is located in the third electrode layer 4 and is electrically connected to the fourth electrode layer 5.
[0063] The display panel 100 provided in this embodiment, by setting the third electrode layer 4 on the first dam 31 and the fourth electrode layer 5 on the third electrode layer 4, the first signal line in the third electrode layer 4 can be electrically connected to the fourth electrode layer 5, thereby realizing the transfer of the original overlapping area of the first signal line to above the first dam 31, which is equivalent to saving the space originally occupied by the overlapping area, and can greatly reduce the border width, and can save more than 300um of the border width, and reduce the border width to less than 0.7mm, which is conducive to achieving a narrower border and improving the performance of the display panel 100.
[0064] Specifically, in the relevant display panel, the orthographic projection of the overlap area on the substrate 1 does not overlap with the orthographic projection of the dam area on the substrate 1, and the overlap area and the dam area are arranged along the width direction of the non-display area 12. In this embodiment, the orthographic projection of the overlap area on the substrate 1 and the orthographic projection of the dam area on the substrate 1 are at least partially overlapped, and the overlap area and the dam area are arranged along the thickness direction of the display panel 100 instead of being arranged along the width direction of the non-display area 12, thereby greatly reducing the border width. In one embodiment, the first signal line includes a negative power line, and in other embodiments, the first signal line can be a line for transmitting other signals, which is not specifically limited.
[0065] Optionally, the first electrode layer 21 is an anode layer, and the second electrode layer 23 is a cathode layer.
[0066] During preparation, the third electrode layer 4 and the first electrode layer 21 are prepared simultaneously, and the fourth electrode layer 5 and the second electrode layer 23 are prepared simultaneously.
[0067] Please continue to refer to Figure 3 As shown, in one embodiment, the display panel 100 further includes a pixel definition layer 8, the pixel definition layer 8 and the display layer 2 are located on the same side of the substrate 1, and the pixel definition layer 8 is used to isolate each light-emitting layer 22, which is conducive to accurately dividing the position and boundary of each light-emitting layer 22, and ensuring the clarity and accuracy of the displayed image. Among them, the pixel definition layer 8 is partially located in the display area 11, and partially located in the non-display area 12, and the pixel definition layer 8 located in the display area 11 is located between the substrate 1 and the second electrode layer 23.
[0068] Please refer to Figure 4 As shown, in one embodiment, the encapsulation layer 6 includes a first encapsulation layer 61, a second encapsulation layer 62 and a third encapsulation layer 63 which are stacked, the first encapsulation layer 61 and the third encapsulation layer 63 include inorganic materials, and the second encapsulation layer 62 includes organic materials. Inorganic-organic-inorganic three-layer encapsulation is achieved to ensure the encapsulation effect. Among them, the inorganic encapsulation can be prepared by chemical vapor deposition, which is beneficial to improve the density and encapsulation effect of the encapsulation layer, and the organic encapsulation can be prepared by inkjet printing.
[0069] Please continue to refer to Figure 4 As shown, in one embodiment, the first encapsulation layer 61 covers the side of the second electrode layer 23 and the fourth electrode layer 5 away from the substrate 1, the second encapsulation layer 62 covers the side of the first encapsulation layer 61 away from the substrate 1, and partially covers the side of the fourth electrode layer 5 away from the substrate 1, and the third encapsulation layer 63 covers the side of the second encapsulation layer 62 away from the substrate 1, and covers the area of the first encapsulation layer 61 not covered by the second encapsulation layer 62. Exemplarily, the side of the first dam 31 away from the substrate 1 is not covered by the second encapsulation layer 62, and the third encapsulation layer 63 directly contacts the first encapsulation layer 61 on the first dam 31, which is conducive to reducing the risk of overflow of organic materials in the second encapsulation layer 62.
[0070] Please refer to Figure 5As shown, in one embodiment, the encapsulation layer 6 includes a first encapsulation layer 61, a second encapsulation layer 62 and a third encapsulation layer 63, the first encapsulation layer 61 covers the side of the second electrode layer 23 and the fourth electrode layer 5 away from the substrate 1, the second encapsulation layer 62 covers the side of the first encapsulation layer 61 away from the substrate 1, and the third encapsulation layer 63 covers the side of the second encapsulation layer 62 away from the substrate 1, which is conducive to improving the encapsulation effect. It is equivalent to reducing the height of the first dam 31 when the overall thickness of the display panel remains unchanged, which is conducive to making the top of the first dam 31 flatter, and the prepared third electrode layer 4 and fourth electrode layer 5 are also flatter, which is conducive to improving the performance of the display panel.
[0071] Please refer to Figure 6 As shown, in one embodiment, the display panel 100 further includes a second dam 32, which is located in the non-display area 12 and on the side of the first dam 31 away from the display area 11. The second dam 32 is conducive to further improving the packaging effect and avoiding packaging failure. The second dam 32 may include a stacked pixel definition layer and a spacer SPC, and the spacer SPC is located on the side of the display definition layer away from the substrate 1. Preferably, the height of the second dam 32 is greater than the height of the first dam 31, which is conducive to improving the packaging reliability and avoiding overflow of the organic material in the second encapsulation layer 62.
[0072] Preferably, the orthographic projection of the second encapsulation layer 62 on the substrate 1 partially overlaps with the orthographic projection of the side wall of the second dam 32 close to the display area 11 on the substrate 1, and the orthographic projection of the side wall of the first dam 31 away from the display area 11 on the substrate 1 is located within the orthographic projection of the second encapsulation layer 62 on the substrate 1. The outer edge of the first dam 31 of the second encapsulation layer 62 is cut off, which can reduce the width of the frame and is conducive to completely wrapping the third electrode layer 4, the fourth electrode layer 5 and the display layer 2, thereby improving the encapsulation effect.
[0073] Please refer to Figure 7 As shown, in one embodiment, the display panel 100 includes a plurality of first dams 31, and the display panel 100 includes a plurality of second dams 32, which is conducive to further improving the packaging effect. At the same time, the area of the third electrode layer 4 and the fourth electrode layer 5 can be increased, so that the first signal line has sufficient routing space, and a narrower frame can be achieved while satisfying the same area of the third electrode layer 4 and the fourth electrode layer 5. For example, the display panel 100 includes two first dams 31, and the display panel 100 includes two second dams 32, and the two first dams 31 and the two second dams 32 are arranged along the width direction of the non-display area 12. In other embodiments, the number of the first dam 31 and the second dam 32 can be set as needed, and is not specifically limited.
[0074] In one embodiment, the encapsulation layer 6 encapsulates the second electrode layer 23 and the fourth electrode layer 5, and the orthographic projection of the second electrode layer 23 on the substrate 1 and the orthographic projection of the fourth electrode layer 5 on the substrate 1 are both located inside the orthographic projection of the encapsulation layer 6 on the substrate 1. Encapsulating the second electrode layer 23 and the fourth electrode layer 5 with the encapsulation layer 6 is beneficial to improving the encapsulation reliability.
[0075] Please refer to Figure 8 As shown, in one embodiment, the substrate 1 includes a substrate 13 and a planarization layer 14, the planarization layer 14 is located on one side of the substrate 13, and the first electrode layer 21, the third electrode layer 4, and the first dam 31 are located on the side of the planarization layer 14 away from the substrate 13. The planarization layer 14 is conducive to improving the flatness and uniformity of subsequent film layers, and also plays an insulating role, thereby improving the performance of the display panel 100.
[0076] Please refer to Fig. 9 As shown, in one embodiment, the display panel 100 further includes a first groove 7, which is located in the planarization layer 14, in the non-display area 12, and between the first dam 31 and the display area 11, and the third electrode layer 4 and the fourth electrode layer 5 are partially located in the first groove 7. The first groove 7 is conducive to reducing the overflow risk of the organic material in the second encapsulation layer 62 and improving the encapsulation reliability. At the same time, the area of the third electrode layer 4 and the fourth electrode layer 5 can be increased, so that the first signal line has enough routing space, and a narrower frame can be achieved when the area of the third electrode layer 4 and the fourth electrode layer 5 is the same.
[0077] Please refer to Fig.10 As shown, in one embodiment, the substrate 1 further includes an interlayer dielectric layer 15, the interlayer dielectric layer 15 is located between the substrate 13 and the planarization layer 14, the planarization layer 14 partially covers the interlayer dielectric layer 15, and the encapsulation layer 6 covers the area of the interlayer dielectric layer 15 not covered by the planarization layer 14. The encapsulation layer 6 is directly in contact with the interlayer dielectric layer 15, which is conducive to improving the encapsulation effect.
[0078] Reference Fig.11 As shown, in one embodiment, the third electrode layer 4 includes a hollow region 41, and the hollow region 41 connects the substrate 1 and the fourth electrode layer 5, which is conducive to the discharge of gas in the substrate 1, prevents the third electrode layer 4 from being separated from the substrate 1, and ensures the adhesion effect between the third electrode layer 4 and the substrate 1. Specifically, the hollow region 41 can be formed on the third electrode layer 4 by etching or the like. Fig.11 As shown, in one embodiment, part of the second encapsulation layer 62 fills the area between the first dam 31 and the second dam 32 to ensure encapsulation reliability.
[0079] Based on the same inventive concept, another embodiment of the present application further discloses a display module, which includes the display panel 100 in the above embodiment.
[0080] A display module provided in this embodiment has a display panel 100 in which a third electrode layer 4 is disposed on a first dam 31 and a fourth electrode layer 5 is disposed on the third electrode layer 4. The first signal line in the third electrode layer 4 can be electrically connected to the fourth electrode layer 5, thereby realizing the transfer of the original overlapping area of the first signal line to above the first dam 31, which is equivalent to saving the space originally occupied by the overlapping area, and can greatly reduce the frame width, which is conducive to achieving a narrower frame and improving the performance of the display module.
[0081] Based on the same inventive concept, another embodiment of the present application further discloses a display device, which includes the display module in the above embodiment. Further, the display device includes a mobile phone, VR equipment, computer, television, car display equipment, etc.
[0082] A display device provided in this embodiment has a display module including a display panel 100. The display panel 100 arranges a third electrode layer 4 on a first dam 31 and a fourth electrode layer 5 on the third electrode layer 4. The first signal line in the third electrode layer 4 can be electrically connected to the fourth electrode layer 5, thereby transferring the original overlapping area of the first signal line to above the first dam 31, which is equivalent to eliminating the space originally occupied by the overlapping area, and can greatly reduce the border width, which is conducive to achieving a narrower border and improving the performance of the display device.
[0083] Although the present application has been described in conjunction with specific embodiments thereof, many alternatives, modifications and variations of these embodiments will be apparent to those skilled in the art in light of the foregoing description.
[0084] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0085] The embodiments of the present application are intended to cover all such substitutions, modifications and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the embodiments of the present application should be included in the scope of protection of the present application.
Claims
1. A display panel, characterized in that: include: A substrate comprising a display area and a non-display area, wherein the non-display area at least partially surrounds the display area; A display layer, located in the display area, comprising a first electrode layer, a light-emitting layer, and a second electrode layer, which are located on one side of the substrate and are sequentially arranged away from the substrate; A first dam, located in the non-display area and located on the same side of the substrate as the display layer; a third electrode layer, disposed in the same layer as the first electrode layer and located on a side of the first dam away from the substrate, wherein an orthographic projection of the third electrode layer on the substrate at least partially overlaps an orthographic projection of the first dam on the substrate; a fourth electrode layer, disposed in the same layer as the second electrode layer and located on a side of the third electrode layer away from the substrate; an encapsulation layer, located on a side of the second electrode layer and the fourth electrode layer away from the substrate; The first signal line is located in the third electrical layer and is electrically connected to the fourth electrode layer.
2. The display panel according to claim 1, characterized in that: The encapsulation layer comprises a first encapsulation layer, a second encapsulation layer and a third encapsulation layer which are stacked, the first encapsulation layer and the third encapsulation layer comprise inorganic materials, and the second encapsulation layer comprises organic materials; Preferably, the first encapsulation layer covers the side of the second electrode layer and the fourth electrode layer away from the substrate, the second encapsulation layer covers the side of the first encapsulation layer away from the substrate, and partially covers the side of the fourth electrode layer away from the substrate, and the third encapsulation layer covers the side of the second encapsulation layer away from the substrate, and covers the area of the first encapsulation layer not covered by the second encapsulation layer; Preferably, the encapsulation layer includes a first encapsulation layer, a second encapsulation layer and a third encapsulation layer, the first encapsulation layer covers the side of the second electrode layer and the fourth electrode layer away from the substrate, the second encapsulation layer covers the side of the first encapsulation layer away from the substrate, and the third encapsulation layer covers the side of the second encapsulation layer away from the substrate.
3. The display panel according to claim 2, characterized in that: The display panel further includes: a second dam located in the non-display area and on a side of the first dam away from the display area; Preferably, the orthographic projection of the second encapsulation layer on the substrate partially overlaps with the orthographic projection of the side wall of the second dam close to the display area on the substrate, and the orthographic projection of the side wall of the first dam far from the display area on the substrate is located within the orthographic projection of the second encapsulation layer on the substrate; Preferably, the display panel includes a plurality of the first dams, and the display panel includes a plurality of the second dams; Preferably, the height of the second dam is greater than the height of the first dam; Preferably, the first signal line comprises a negative power line.
4. The display panel according to claim 1, characterized in that: The encapsulation layer wraps the second electrode layer and the fourth electrode layer, and the orthographic projection of the second electrode layer on the substrate and the orthographic projection of the fourth electrode layer on the substrate are both located inside the orthographic projection of the encapsulation layer on the substrate.
5. The display panel according to claim 2, characterized in that: The substrate includes a substrate and a planarization layer, wherein the planarization layer is located on one side of the substrate, and the first electrode layer, the third electrode layer, and the first dam are located on a side of the planarization layer away from the substrate.
6. The display panel according to claim 5, characterized in that: The display panel further includes: a first groove, wherein the first groove is located in the planarization layer, in the non-display area and between the first dam and the display area, and the third electrode layer and the fourth electrode layer are partially located in the first groove; Preferably, the substrate further comprises an interlayer dielectric layer, the interlayer dielectric layer is located between the substrate and the planarization layer, the planarization layer partially covers the interlayer dielectric layer, and the encapsulation layer covers the area of the interlayer dielectric layer not covered by the planarization layer.
7. The display panel according to claim 1, characterized in that: The third electrode layer includes a hollow area, and the hollow area connects the substrate and the fourth electrode layer.
8. The display panel according to claim 1, characterized in that: The display panel further includes: A pixel definition layer, wherein the pixel definition layer and the display layer are located on the same side of the substrate, and the pixel definition layer is used to isolate each of the light-emitting layers.
9. A display module, characterized in that: Comprising a display panel as described in any one of claims 1-8.
10. A display device, characterized in that: Comprising the display module as claimed in claim 9.