Display panel, preparation method thereof and display device

Abstract

The display panel comprises a substrate (101), a driving circuit layer (102), a light emitting device layer (EM), a packaging layer (EN) and a gray flat layer (GO), the driving circuit layer (102) is arranged on the substrate (101), the light-emitting device layer (EM) is arranged on the side, away from the substrate (101), of the driving circuit layer (102), the packaging layer (EN) is arranged on the side, away from the substrate (101), of the light-emitting device layer (EM), and the gray flat layer (GO) is arranged on the side, away from the substrate (101), of the packaging layer (EN); wherein the display panel is provided with a main body display area (AA), a sensor area (SS) and a light-transmitting display area (FDC), the main body display area (AA) at least partially surrounds the sensor area (SS) and the light-transmitting display area (FDC), and the gray flat layer (GO) is arranged in the main body display area (AA), the sensor area (SS) and the light-transmitting display area (FDC). The display panel has a thinner thickness, and an ultrathin display panel can be realized.

Description

Display panel and manufacturing method thereof, and display device

[0001] Embodiments of the present disclosure relate to a display panel and a method for manufacturing the same, and a display device.

[0002] OLED (Organic Light Emitting Diode) display devices have a series of advantages such as self-luminescence, high contrast, high definition, wide viewing angle, low power consumption, fast response speed, and low manufacturing cost. They have become one of the key development directions of the new generation of display devices and are therefore receiving more and more attention. At present, how to optimize the structure of display devices is a topic that technicians in this field are constantly studying.

[0003]

[0004] At least one embodiment of the present disclosure provides a display panel, which includes a base substrate, a driving circuit layer, a light-emitting device layer, a packaging layer and a gray flat layer; the driving circuit layer is arranged on the base substrate, the light-emitting device layer is arranged on a side of the driving circuit layer away from the base substrate, the packaging layer is arranged on a side of the light-emitting device layer away from the base substrate, and the gray flat layer is arranged on a side of the packaging layer away from the base substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is arranged in the main display area, the sensor area and the light-transmitting display area.

[0005] For example, the display panel provided by at least one embodiment of the present disclosure further includes: a black matrix layer, arranged on a side of the encapsulation layer away from the base substrate, wherein the gray flat layer is arranged on a side of the black matrix layer away from the base substrate.

[0006] For example, in the display panel provided by at least one embodiment of the present disclosure, the main display area includes a plurality of first sub-pixels, each of the plurality of first sub-pixels includes a first light-emitting device located in the light-emitting device layer, the sensor area includes a plurality of second sub-pixels, each of the plurality of second sub-pixels includes a second light-emitting device located in the light-emitting device layer, the black matrix layer includes a plurality of first light-emitting openings exposing the first light-emitting devices in the main display area, and includes a plurality of second light-emitting openings exposing the second light-emitting devices and a first sensor opening located between the plurality of second light-emitting openings in the sensor area.

[0007] For example, in the display panel provided by at least one embodiment of the present disclosure, the material of the gray flat layer is filled in the multiple first light exit openings, the multiple second light exit openings and the first sensor opening, wherein the area of ​​the material of the gray flat layer filled in the multiple first light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening, and the area of ​​the material of the gray flat layer filled in the multiple second light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening.

[0008] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-transmitting display area includes a plurality of third sub-pixels, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the light-transmitting display area, the ratio of the light-emitting area of ​​the third light-emitting devices to the light-emitting area of ​​the first light-emitting devices is 1:4 to 1:2, and the black matrix layer includes a plurality of annular shading portions in the light-transmitting display area that respectively expose the third light-emitting devices of the plurality of third sub-pixels, and the plurality of annular shading portions are arranged at intervals.

[0009] For example, in the display panel provided by at least one embodiment of the present disclosure, the area of ​​the material of the gray flat layer filled in the plurality of annular light shielding portions is greater than the area of ​​the material of the gray flat layer filled in the first sensor opening.

[0010] For example, in the display panel provided by at least one embodiment of the present disclosure, the first light-emitting device includes a first anode pattern, a first light-emitting pattern and a first cathode layer which are stacked, the first cathode layers of the first light-emitting devices of the multiple first sub-pixels are continuously arranged in the main display area, the third light-emitting devices of the multiple third sub-pixels include a third anode pattern, a third light-emitting pattern and a third cathode pattern which are stacked, and the third cathode patterns of the third light-emitting devices of the multiple third sub-pixels are arranged at intervals in the light-transmitting display area.

[0011] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area, the sensor area includes a second sensor opening that at least partially overlaps with the first sensor opening in a direction perpendicular to the base substrate, and the light-transmitting display area includes a plurality of sub-pixel walls for defining the plurality of third sub-pixel openings, and the plurality of sub-pixel walls are arranged at intervals.

[0012] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-transmitting display area includes a sub-pixel setting area and a sub-pixel removal area, the sub-pixel setting area includes a plurality of third sub-pixels, the sub-pixel removal area does not include sub-pixels, the area ratio of the sub-pixel setting area to the sub-pixel removal area is 1:3 to 1:1, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the sub-pixel setting area, the light-emitting area of ​​the third light-emitting device is equal to the light-emitting area of ​​the first light-emitting device, the sub-pixel setting area also includes a plurality of first wirings arranged at the edges of the plurality of third sub-pixels, the black matrix layer includes in the sub-pixel setting area a plurality of first shielding lines that at least partially overlap with the plurality of first wirings in a direction perpendicular to the base substrate, and is hollowed out in the sub-pixel removal area.

[0013] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer further includes a pixel defining layer for defining sub-pixels, and the pixel defining layer is hollowed out in the sub-pixel removal area.

[0014] For example, in the display panel provided by at least one embodiment of the present disclosure, in a direction perpendicular to the base substrate, the first thickness of the gray flat layer in the main display area is 2μm-3μm, the second thickness of the gray flat layer in the sensor area is 0.2μm-0.5μm higher than the first thickness, and the third thickness of the gray flat layer in the light-transmitting display area is 0.4μm-0.6μm lower than the first thickness.

[0015] For example, the display panel provided by at least one embodiment of the present disclosure also includes: a reflection reduction layer, which is located in the sensor area and the light-transmitting display area, and is located on the side of the second light-emitting device or the third light-emitting device away from the base substrate, wherein the encapsulation layer is located on the side of the reflection reduction layer away from the base substrate.

[0016] For example, in the display panel provided in at least one embodiment of the present disclosure, the material of the anti-reflection layer includes at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride, and the thickness of the anti-reflection layer in the direction perpendicular to the base substrate is 8nm-10nm.

[0017] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area. In the main display area, a first orthographic projection of the sub-pixel opening on the base substrate is located within a second orthographic projection of the first light output opening on the base substrate, and in the sensor area, a third orthographic projection of the second light output opening on the base substrate is located within a fourth orthographic projection of the sub-pixel opening on the base substrate.

[0018] For example, in the display panel provided by at least one embodiment of the present disclosure, the third orthographic projection is shrunk by 1 μm-4 μm relative to the fourth orthographic projection.

[0019] For example, in the display panel provided by at least one embodiment of the present disclosure, the light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area, and the sensor area includes a second sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate, and the second light-emitting devices of the plurality of second sub-pixels include a second anode pattern, a second light-emitting pattern, and a second cathode layer arranged in a stacked manner, and the second cathode layer is continuously arranged in the sensor area and includes a third sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate.

[0020] For example, in the display panel provided by at least one embodiment of the present disclosure, the fifth orthographic projection of the second sensor opening on the base substrate is located within the sixth orthographic projection of the third sensor opening on the base substrate.

[0021] For example, in the display panel provided by at least one embodiment of the present disclosure, the fifth orthographic projection is shrunk by 1 μm-2 μm relative to the sixth orthographic projection.

[0022] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer, the touch layer is arranged on the side of the encapsulation layer away from the base substrate, and includes a touch wiring layer and a touch insulation layer located on the side of the touch wiring layer away from the base substrate, wherein the gray flat layer is arranged on the side of the touch insulation layer away from the base substrate, and the black matrix layer is arranged on the side of the gray flat layer away from the base substrate.

[0023] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer, the touch layer is arranged on the side of the encapsulation layer away from the base substrate, and includes a touch routing layer, the touch routing layer includes a plurality of touch routings, wherein the gray flat layer is arranged on the side of the touch routing layer away from the base substrate and contacts the plurality of touch routings, and the black matrix layer is arranged on the side of the gray flat layer away from the base substrate.

[0024] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer; the touch layer is arranged on the side of the encapsulation layer away from the base substrate, including a touch routing layer, the touch routing layer includes a plurality of touch routings, the black matrix layer is arranged on the side of the touch routing layer away from the base substrate, including a plurality of second shielding lines contacting and covering the plurality of touch routings, wherein the gray flat layer is arranged on the side of the black matrix layer away from the base substrate.

[0025] For example, the display panel provided by at least one embodiment of the present disclosure also includes a touch layer and a black matrix layer; the black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, and the touch layer is arranged on a side of the black matrix layer away from the base substrate, including a touch routing layer, the touch routing layer including a plurality of touch routings, wherein the gray flat layer is arranged on a side of the touch routing layer away from the base substrate.

[0026] For example, the display panel provided by at least one embodiment of the present disclosure further includes: a molybdenum oxide layer, which is located on a side of the plurality of touch lines away from the base substrate, and includes a plurality of cover lines to cover the plurality of touch lines.

[0027] For example, the display panel provided by at least one embodiment of the present disclosure also includes a black matrix layer and a transparent insulating layer; the black matrix layer is arranged on the side of the encapsulation layer away from the base substrate, including a plurality of shading patterns, and the transparent insulating layer is arranged on the side of the black matrix layer away from the base substrate, including a plurality of covering patterns, and the plurality of covering patterns respectively cover the plurality of shading patterns, wherein the gray flat layer is located on the side of the transparent insulating layer away from the base substrate.

[0028] For example, in the display panel provided by at least one embodiment of the present disclosure, the refractive index of the transparent insulating layer is n1, and the refractive index of the gray flat layer is n2, then: n1<n2.

[0029] For example, in the display panel provided by at least one embodiment of the present disclosure, n2-n1≥0.05.

[0030] For example, in the display panel provided by at least one embodiment of the present disclosure, the light transmittance of the gray flat layer is 40%-60%.

[0031] For example, in the display panel provided by at least one embodiment of the present disclosure, the gray flat layer includes a transparent matrix and a light absorbing material dispersed in the transparent matrix.

[0032] For example, in the display panel provided in at least one embodiment of the present disclosure, the light absorbing material includes at least one of oxazine compounds, cyanine compounds, porphyrazine compounds and squarylium compounds.

[0033] At least one embodiment of the present disclosure further provides a display device, which includes the display panel provided by the embodiment of the present disclosure.

[0034] At least one embodiment of the present disclosure also provides a method for preparing a display panel, comprising: providing a base substrate, forming a driving circuit layer on the base substrate, forming a light-emitting device layer on a side of the driving circuit layer away from the base substrate, forming an encapsulation layer on a side of the light-emitting device layer away from the base substrate, and forming a gray flat layer on a side of the encapsulation layer away from the base substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is formed on the main display area, the sensor area and the light-transmitting display area.

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0036] FIG1 is a schematic plan view of a display panel provided by at least one embodiment of the present disclosure;

[0037] FIG2 is a partial cross-sectional schematic diagram of a display panel provided by at least one embodiment of the present disclosure;

[0038] 3 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in a display panel provided by at least one embodiment of the present disclosure;

[0039] FIG4 is a partial cross-sectional schematic diagram of another display panel provided by at least one embodiment of the present disclosure;

[0040] 5A is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in a display panel provided by at least one embodiment of the present disclosure;

[0041] 5B is a partial plan view of a black matrix in a main display area, a sensor area, and a light-transmitting display area of ​​a display panel provided by at least one embodiment of the present disclosure;

[0042] FIG6 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0043] FIG7 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0044] FIG8 is a diagram showing a reflection reduction principle of a reflection reduction layer in a display panel provided by at least one embodiment of the present disclosure;

[0045] FIG9 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0046] FIG10 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in yet another display panel provided by at least one embodiment of the present disclosure;

[0047] FIG11 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0048] 12 is a partial plan view of a main display area, a sensor area, and a light-transmitting display area in yet another display panel provided by at least one embodiment of the present disclosure;

[0049] FIG13 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0050] FIG14 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0051] FIG15 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0052] FIG16 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0053] FIG17 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0054] FIG18 is a partial cross-sectional schematic diagram of yet another display panel provided by at least one embodiment of the present disclosure;

[0055] FIG19 is a schematic plan view of a main display area in a display panel provided by at least one embodiment of the present disclosure; and

[0056] FIG. 20 is a plan view of a sensor area in a display panel provided by at least one embodiment of the present disclosure.

[0057] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0058] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0059] With the increasing demand for display devices such as mobile phones and tablets and the continuous development of display technology, users have increasingly strong requirements for low thickness of display devices. COE (Color filter on encapsulation) technology is to reduce the reflectivity by making a black matrix (BM) and a color filter (CF) on the encapsulation layer, thereby replacing the circular polarizer.

[0060] In COE technology, color filters of different colors are respectively arranged above the light-emitting layers of the light-emitting devices of the sub-pixels of the corresponding colors. The color filters of different colors have high light transmittance to pass the light emitted by the light-emitting devices. The interval areas of the light-emitting devices are blocked by a black matrix, which can absorb most of the external light to achieve the effect of reducing reflection and increasing transmittance.

[0061] At present, the thickness of circular polarizers used in flexible OLED displays is about 50μm, while COE technology can control the thickness to less than 5μm, which can greatly reduce the thickness of display devices. However, users are still pursuing thinner display devices, and manufacturers are still pursuing simpler preparation processes.

[0062] At least one embodiment of the present disclosure provides a display panel and a preparation method thereof, and a display device, wherein the display panel includes a base substrate, a driving circuit layer, a light-emitting device layer, a packaging layer and a gray flat layer; the driving circuit layer is arranged on the base substrate, the light-emitting device layer is arranged on a side of the driving circuit layer away from the base substrate, the packaging layer is arranged on a side of the light-emitting device layer away from the base substrate, and the gray flat layer is arranged on a side of the packaging layer away from the base substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is arranged in the main display area, the sensor area and the light-transmitting display area.

[0063] The above-mentioned display panel provided by the embodiment of the present disclosure uses a gray flat layer instead of the color film in the COE technology, thereby reducing the difficulty of manufacturing the display panel, such as reducing the number of masks for manufacturing the color film, and reducing the consumption of color film materials, while also achieving anti-reflection and anti-reflection and thinning of the display panel.

[0064] The display panel and its manufacturing method, and the display device provided by the embodiments of the present disclosure are described in detail below through several specific embodiments.

[0065] At least one embodiment of the present disclosure provides a display panel, and Fig. 1 shows a plan view of the display panel, and Fig. 2 shows a partial cross-sectional view of the display panel. As shown in Figs. 1 and 2, the display panel includes a substrate 101, a driving circuit layer 102, a light-emitting device layer EM, an encapsulation layer EN, and a gray flat layer GO.

[0066] As shown in FIGS. 1 and 2 , the driving circuit layer 102 is disposed on the substrate 101 and includes a plurality of pixel driving circuits. For example, each pixel driving circuit includes a plurality of thin film transistors and a storage capacitor, and may be formed into a plurality of forms such as 3T1C (i.e., including three thin film transistors and one storage capacitor), 7T1C (i.e., including seven thin film transistors and one storage capacitor), 8T1C (i.e., including eight thin film transistors and one storage capacitor), or 8T2C (i.e., including eight thin film transistors and two storage capacitors). The embodiments of the present disclosure do not limit the form of the plurality of pixel driving circuits in the driving circuit layer 102.

[0067] The light emitting device layer EM is arranged on a side of the driving circuit layer 102 away from the base substrate 101, and includes a plurality of light emitting devices. The plurality of pixel driving circuits in the driving circuit layer 102 are configured to drive the plurality of light emitting devices in the light emitting device layer EM to emit light, thereby realizing display. The plurality of light emitting devices may be, for example, OLED display devices or QLED display devices.

[0068] The encapsulation layer EN is arranged on a side of the light-emitting device layer EM away from the base substrate 101 to encapsulate the multiple light-emitting devices in the light-emitting device layer EM. The encapsulation layer EN may be, for example, a composite encapsulation layer, including multiple sub-encapsulation layers, such as a stack of multiple inorganic encapsulation sub-layers and organic encapsulation sub-layers. For example, the inorganic encapsulation sub-layer may be made of inorganic insulating materials such as silicon oxide, silicon nitride, and silicon oxynitride, and the organic encapsulation sub-layer may be made of organic insulating materials such as polyimide and resin. The embodiments of the present disclosure do not limit the specific form of the encapsulation layer EN.

[0069] The gray flat layer GO is disposed on a side of the encapsulation layer EN away from the base substrate 101 .

[0070] In the embodiments of the present disclosure, the gray flat layer GO has a certain gray scale, and the light transmittance of the gray flat layer GO is lower than the light transmittance of the conventional transparent flat layer. For example, the light transmittance of the gray flat layer GO can be 40%-60%, such as 50%-60%, such as 55%, etc., while the light transmittance of the conventional transparent flat layer is usually above 95%.

[0071] For example, in some embodiments, the gray flat layer GO includes a transparent matrix and a light-absorbing material dispersed in the transparent matrix. For example, the transparent matrix may include an organic insulating material such as polyimide and resin; the light-absorbing material may include at least one of dyes or pigments such as oxazine compounds, cyanine compounds, tetrazolyl compounds, and squarylium compounds.

[0072] For example, in some embodiments, the thickness of the gray flat layer GO (that is, the dimension in the direction perpendicular to the substrate 101, that is, the dimension in the vertical direction in Figure 2) can be 1μm-10μm, for example, 2μm-8μm, for example, 2μm-5μm, for example, 2μm-3μm, for example, 2.2μm, 2.5μm or 2.7μm, etc.

[0073] For example, in some other embodiments, the gray flat layer GO may also have selective light transmittance, such as selectively absorbing light in the range of 480nm-510nm and 560nm-590nm. In this case, the peak transmittance of the gray flat layer GO is 50%-60%.

[0074] In the embodiments of the present disclosure, the gray flat layer GO can replace the color film in the traditional COE technology, thereby reducing the difficulty of manufacturing the display panel, such as reducing the number of masks for manufacturing the color film, and reducing the consumption of the color film material, while also achieving anti-reflection and anti-reflection enhancement and thinning of the display panel.

[0075] For example, as shown in FIG1 , the display panel has a main display area AA, a sensor area SS, and a light-transmitting display area FDC. The main display area AA is the main display area of ​​the display panel. The sensor area SS can also display, and sensors such as ambient light sensors can also be set to achieve other functions besides display. The light-transmitting display area FDC is at least partially light-transmitting, and can be used in combination with devices such as cameras to achieve functions such as taking pictures and videos while displaying.

[0076] As shown in FIG. 1 , the main display area AA at least partially surrounds the sensor area SS and the light-transmitting display area FDC, that is, the sensor area SS and the light-transmitting display area FDC may be at least partially disposed in the main display area AA, so that the entire main display area AA may be displayed.

[0077] For example, the gray flat layer GO is arranged in the main display area AA, the sensor area SS and the light-transmitting display area FDC. Therefore, the main display area AA, the sensor area SS and the light-transmitting display area FDC can all use the gray flat layer GO to replace the color film in the traditional technology, so as to simplify the preparation method of the display panel and achieve the purpose of thinning.

[0078] For example, in some embodiments, as shown in FIG. 2 , the display panel may further include a black matrix layer BM, which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and a gray flat layer GO is disposed on a side of the black matrix layer away from the base substrate 101 .

[0079] For example, in some embodiments, as shown in FIG. 2 , the display panel may further include a touch layer T, which is disposed on a side of the encapsulation layer EN away from the base substrate 101, and in this case, the black matrix layer BM is disposed on a side of the touch layer T away from the base substrate 101. For example, the touch layer T may include a plurality of touch lines for realizing a touch function.

[0080] For example, as shown in FIG2 , the main display area AA includes a plurality of first sub-pixels, each of which includes a first light-emitting device EM1 located in the light-emitting device layer EM, the sensor area SS includes a plurality of second sub-pixels, each of which includes a second light-emitting device EM2 located in the light-emitting device layer EM, the black matrix layer BM includes a plurality of first light-emitting openings BM1 exposing the first light-emitting device EM1 in the main display area AA, the black matrix layer BM includes a plurality of second light-emitting openings BM2 exposing the second light-emitting device EM2 in the sensor area SS, and a first sensor opening BM0 located between the plurality of second light-emitting openings BM2. The plurality of first light-emitting openings BM1 are used to emit light emitted by the plurality of first light-emitting devices EM1, the plurality of second light-emitting openings BM2 are used to emit light emitted by the plurality of second light-emitting devices EM2, and the first sensor opening BM0 is used to transmit light for the sensor to work.

[0081] For example, the sensor area SS is provided with a sensor S, and the sensor S may be combined on a side of the base substrate 101 away from the driving circuit layer 102. For example, the sensor S may be an ambient light sensor, and may sense ambient light through the first sensor opening BM0.

[0082] For example, as shown in Fig. 2, the light-transmitting display area FDC includes a plurality of third sub-pixels, and each third sub-pixel includes a third light-emitting device EM3 located in the light-emitting device layer EM. For example, the arrangement density of the first light-emitting devices EM1 in the main display area AA is greater than or equal to the arrangement density of the third light-emitting devices EM3 ​​in the light-transmitting display area FDC, but the light-emitting area of ​​the third light-emitting device EM3 is smaller than the light-emitting area of ​​the first light-emitting device EM1, for example, the ratio of the light-emitting area of ​​the third light-emitting device EM3 to the light-emitting area of ​​the first light-emitting device EM1 is 1:4 to 1:2, for example, 1:2, 1:3 or 1:4, etc., and the black matrix layer BM includes a plurality of annular light-shielding portions BM3 respectively exposing the third light-emitting devices EM3 ​​of the plurality of third sub-pixels in the light-transmitting display area FDC, and the plurality of annular light-shielding portions BM3 are arranged at intervals.

[0083] Thus, the light-transmitting display area FDC can transmit light except for the area where the third light-emitting device EM3 and the plurality of annular light-shielding portions BM3 are arranged. The light-emitting area of ​​the third light-emitting device EM3 is smaller than that of the first light-emitting device EM1, which can improve the light transmittance of the light-transmitting display area FDC.

[0084] For example, Figure 3 shows a plan schematic diagram of the black matrix layer BM in the main display area AA, the sensor area SS and the light-transmitting display area FDC. As shown in Figures 2 and 3, the material of the gray flat layer GO is filled in the multiple first light exit openings BM1, the multiple second light exit openings BM2 and the first sensor opening BM0. As shown in Figure 3, the area of ​​the material of the gray flat layer GO filled in the multiple first light exit openings BM1 is larger than the area of ​​the material of the gray flat layer GO filled in the first sensor openings BM0, and the area of ​​the material of the gray flat layer GO filled in the multiple second light exit openings BM2 is larger than the area of ​​the material of the gray flat layer GO filled in the first sensor openings BM0.

[0085] For example, as shown in FIG. 3 , the area of ​​the material of the gray flat layer GO filled in the plurality of ring-shaped light shielding portions BM3 is greater than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0 .

[0086] For example, in some embodiments, as shown in FIG3 , in the main display area AA, the plurality of first sub-pixels include a first red sub-pixel R1, a first green sub-pixel G1, and a first blue sub-pixel B1, and one first red sub-pixel R1, two first green sub-pixels G1, and one first blue sub-pixel B1 constitute a first repeating unit in the main display area AA, and the plurality of first repeating units are arranged in an array in the main display area AA. Similarly, in the sensor area SS, the plurality of second sub-pixels include a second red sub-pixel R2, a second green sub-pixel G2, and a second blue sub-pixel B2, and one second red sub-pixel R2, two second green sub-pixels G2, and one second blue sub-pixel B2 constitute a second repeating unit in the sensor area SS, and the plurality of second repeating units are arranged in an array in the sensor area SS. In the light-transmitting display area FDC, multiple third sub-pixels include a third red sub-pixel R3, a third green sub-pixel G3 and a third blue sub-pixel B3. One third red sub-pixel R3, two third green sub-pixels G3 and one third blue sub-pixel B3 constitute a third repeating unit in the light-transmitting display area FDC. Multiple third repeating units are arranged in an array in the light-transmitting display area FDC.

[0087] In this case, the ratio of the light-emitting area of ​​the third light-emitting device EM3 to the light-emitting area of ​​the first light-emitting device EM1 mentioned in the embodiment of the present disclosure is 1:4~1:2, which refers to the comparison of the light-emitting areas of sub-pixels of the same color. For example, the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third red sub-pixel R3 to the light-emitting area of ​​the first light-emitting device EM1 of the first red sub-pixel R1 is 1:4~1:2, the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third green sub-pixel G3 to the light-emitting area of ​​the first light-emitting device EM1 of the first green sub-pixel G3 is 1:4~1:2, and the ratio of the light-emitting area of ​​the third light-emitting device EM3 of the third blue sub-pixel B3 to the light-emitting area of ​​the first light-emitting device EM1 of the first blue sub-pixel B1 is 1:4~1:2.

[0088] In addition, in the embodiment of the present disclosure, the comparison of the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 , the second light exit opening BM2 , and the first sensor opening BM0 is also for sub-pixels of the same color.

[0089] For example, for a first sub-pixel and a second sub-pixel of the same color, a light emitting area of ​​the first light emitting device EM1 is substantially the same as a light emitting area of ​​the second light emitting device EM2.

[0090] For example, in some embodiments, in the main display area AA, taking the area occupied by one first repeating unit on the display substrate as a unit area, for each first sub-pixel, the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 accounts for about 30%-50% of the unit area. For example, the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 of the first blue sub-pixel B1 is greater than the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 of the first red sub-pixel R1, and the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 of the first red sub-pixel R1 is greater than the area of ​​the material of the gray flat layer GO filled in the first light exit opening BM1 of the first green sub-pixel G1.

[0091] For example, in the sensor area SS, taking the area occupied by one second repeating unit on the display substrate as the unit area, for each second sub-pixel, the area of ​​the material of the gray flat layer GO filled in the second light exit opening BM2 accounts for about 30%-50% of the unit area. The area of ​​the material of the gray flat layer GO filled in the second light exit opening BM2 of the second blue sub-pixel B2 is greater than the area of ​​the material of the gray flat layer GO filled in the second light exit opening BM2 of the second red sub-pixel R2, and the area of ​​the material of the gray flat layer GO filled in the second light exit opening BM2 of the second red sub-pixel R2 is greater than the area of ​​the material of the gray flat layer GO filled in the second light exit opening BM2 of the second green sub-pixel G2. For example, the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0 accounts for about 1.8%-6.0% of the unit area.

[0092] For example, in the light-transmitting display area AA, taking the area occupied by one third repeating unit on the display substrate as the unit area, for each third sub-pixel, the area of ​​the annular light shielding portion BM3 accounts for about 20%-28% of the unit area. The area of ​​the material of the gray flat layer GO filled in the annular light shielding portion BM3 of the third blue sub-pixel B3 is greater than the area of ​​the material of the gray flat layer GO filled in the annular light shielding portion BM3 of the third red sub-pixel R3, and the area of ​​the material of the gray flat layer GO filled in the annular light shielding portion BM3 of the third red sub-pixel R3 is greater than the area of ​​the material of the gray flat layer GO filled in the annular light shielding portion BM3 of the third green sub-pixel G3.

[0093] For example, FIG. 19 and FIG. 20 respectively show partial plan views of the main display area AA and the sensor area SS in the display panel provided by at least one embodiment of the present disclosure. As shown in FIG. 20, each second repeating unit is provided with a first sensor opening BM0, and the first sensor opening BM0 is surrounded by a second red sub-pixel R2, two second green sub-pixels G2 and a second blue sub-pixel B2. As shown in FIG. 19, the sub-pixels of the main display area AA and the sensor area SS are arranged in the same manner, except that the black matrix layer BM located in the main display area AA does not have the first sensor opening BM0.

[0094] For example, in some embodiments, as shown in FIG. 2 , in the main display area AA, the first light-emitting device EM1 includes a first anode pattern 11, a first light-emitting pattern 12 and a first cathode layer 13 which are stacked. For example, the first anode pattern 11, the first light-emitting pattern 12 and the first cathode layer 13 are stacked in sequence in a direction away from the base substrate 101, and the first cathode layer 13 of the first light-emitting device EM1 of a plurality of first sub-pixels is continuously arranged in the main display area AA, that is, the first cathode layer 13 is formed entirely in the main display area AA.

[0095] For example, in the sensor area SS, the second light-emitting device EM2 includes a second anode pattern 21, a second light-emitting pattern 22 and a second cathode layer 23 which are stacked. For example, the second anode pattern 21, the second light-emitting pattern 22 and the second cathode layer 23 are stacked in sequence in a direction away from the base substrate 101, and the second cathode layer 23 of the second light-emitting device EM2 of multiple second sub-pixels is continuously arranged in the sensor area SS, that is, the second cathode layer 23 is formed entirely in the sensor area SS.

[0096] For example, in some examples, in the sensor area SS, the second cathode layer 23 may also be arranged at intervals. For example, the pixel defining layer PDL includes a plurality of second sensor openings PDL0 (described in detail later) in the sensor area SS. In a direction perpendicular to the base substrate 101, the plurality of second sensor openings PDL0 do not overlap with the second cathode layer 23, that is, there is no material of the second cathode layer 23 at positions corresponding to the plurality of second sensor openings PDL0.

[0097] For example, in the light-transmitting display area FDC, the third light-emitting device EM3 includes a third anode pattern 31, a third light-emitting pattern 32 and a third cathode pattern 33 which are stacked, and the third anode pattern 31, the third light-emitting pattern 32 and the third cathode pattern 33 are stacked in sequence in a direction away from the base substrate 101, and the third cathode patterns 22 of the third light-emitting devices EM3 ​​of multiple third sub-pixels are arranged at intervals in the light-transmitting display area FDC, that is, in the light-transmitting display area FDC, except for the area where the third light-emitting device EM3 is arranged, there is no cathode material in other areas.

[0098] For example, in some examples, in the sensor area SS, the second cathode layer 23 is arranged at intervals, the pixel defining layer PDL includes a plurality of second sensor openings PDL0, and in a direction perpendicular to the base substrate 101, the plurality of second sensor openings PDL0 do not overlap with the second cathode layer 23, that is, at positions corresponding to the plurality of second sensor openings PDL0, there is no material of the second cathode layer 23; at this time, in the light-transmitting display area FDC, the third cathode patterns 22 are arranged at intervals in the light-transmitting display area FDC, and the interval between adjacent third cathode patterns 22 in the light-transmitting display area FDC is greater than the interval between adjacent second cathode layers 23 in the sensor area SS.

[0099] For example, in the embodiment of the present disclosure, the light emitting area of ​​a light emitting device is equal to the opening area of ​​the sub-pixel opening PDL1 in the corresponding pixel defining layer PDL (described in detail later), and is also equal to the area of ​​the light emitting pattern formed in the sub-pixel opening PDL1.

[0100] For example, as shown in FIG. 2 , the first cathode layer 13, the second cathode layer 23 and the third cathode pattern 33 are arranged in the same layer. Therefore, in the preparation process, the third cathode pattern 33 can be formed by removing the cathode material between adjacent third light-emitting devices. Not setting cathode material between adjacent third light-emitting devices can improve the transmittance of the translucent display area FDC.

[0101] It should be noted that in the embodiments of the present disclosure, "same-layer arrangement" means that two (or more) functional layers or structural layers are in the same layer and are formed of the same material in the hierarchical structure of the display substrate, that is, in the preparation process, the two (or more) functional layers or structural layers can be formed by the same material layer, and the required patterns and structures can be formed by the same composition process.

[0102] For example, as shown in Figure 2, the light-emitting device layer EM also includes a pixel defining layer PDL for defining different sub-pixels. The pixel defining layer PDL includes a plurality of sub-pixel openings PDL1 in the main display area AA, the sensor area SS and the translucent display area FDC, for forming a light-emitting pattern. The pixel defining layer PDL includes a second sensor opening PDL0 in the sensor area SS that at least partially overlaps with the first sensor opening BM0 in a direction perpendicular to the base substrate 101. The pixel defining layer PDL includes a plurality of sub-pixel walls PDL2 for defining a plurality of third sub-pixel openings in the translucent display area FDC. The plurality of sub-pixel walls PDL2 are arranged at intervals. That is, in the translucent display area FDC, except for the plurality of sub-pixel walls PDL2 for defining different sub-pixels, the material of the pixel defining layer PDL does not exist in other areas, thereby improving the light transmittance of the translucent display area FDC.

[0103] For example, in some embodiments, the pixel defining layer PDL may be a black pixel defining layer, so that a second sensor opening PDL0 is provided in the pixel defining layer PDL to transmit light to the sensor S, and the pixel defining layer PDL forms a plurality of spaced sub-pixel walls PDL2 in the light-transmitting display area FDC, which can improve the light transmittance of the light-transmitting display area FDC. For example, the pixel defining layer PDL in the main display area AA, the sensor area SS, and the light-transmitting display area FDC are provided in the same layer, and in the preparation process, the plurality of sub-pixel walls PDL2 in the light-transmitting display area FDC can be formed by removing the material of the pixel defining layer PDL between adjacent third light-emitting devices.

[0104] For example, in some other embodiments, the pixel defining layer PDL may be a light-transmitting pixel defining layer having a high light transmittance. In this case, the light-transmitting pixel defining layer may be provided with the above-mentioned second sensor opening PDL0, or may not be provided with the second sensor opening PDL0. In the light-transmitting display area FDC, the light-transmitting pixel defining layer may be provided at intervals or may be provided continuously.

[0105] For example, in some other embodiments, the plurality of third sub-pixels in the light-transmitting display region FDC may also have different arrangements. For example, FIG4 shows a partial cross-sectional schematic diagram of another display panel provided by at least one embodiment of the present disclosure.

[0106] For example, as shown in FIG4 , the light-transmitting display area FDC may include a sub-pixel setting area FDC1 and a sub-pixel removal area FDC2, wherein the sub-pixel setting area FDC1 includes a plurality of third sub-pixels, and the sub-pixel removal area FDC2 does not include sub-pixels, for example, does not include various structures and materials used to form sub-pixels, such as a pixel defining layer, an anode, a light-emitting layer, and a cathode of a light-emitting device, etc., and the sub-pixel removal area FDC2 is only used for light transmission. For example, the area ratio of the sub-pixel setting area FDC1 to the sub-pixel removal area FDC2 is 1:3 to 1:1, such as 1:1, 1:2, or 1:3.

[0107] For example, FIG5A shows a partial plan view of the main display area AA, the sensor area SS, and the light-transmitting display area FDC in the above embodiment. As shown in FIG5A , the arrangement density of the first light-emitting device EM1 in the main display area AA is equal to the arrangement density of the third light-emitting device EM3 in the sub-pixel setting area FDC1, and is also equal to the arrangement density of the second light-emitting device EM2 in the sensor area SS. The light-emitting area of ​​the third light-emitting device EM3 is equal to the light-emitting area of ​​the first light-emitting device EM1, that is, in the third light-emitting device EM3 and the first light-emitting device EM1 with the same light-emitting color, the light-emitting area of ​​the third light-emitting device EM3 is equal to the light-emitting area of ​​the first light-emitting device EM1; for example, in the second light-emitting device EM2 and the first light-emitting device EM1 with the same light-emitting color, the light-emitting area of ​​the second light-emitting device EM2 is also equal to the light-emitting area of ​​the first light-emitting device EM1.

[0108] For example, in some embodiments, as shown in Figure 5A, the sub-pixel setting area FDC1 may also include a plurality of first wirings L1 arranged at the edges of a plurality of third sub-pixels, as shown in Figures 4 and 5A, the black matrix layer BM in the sub-pixel setting area FDC1 includes a plurality of first shielding lines BM4 that at least partially overlap with the plurality of first wirings L1 in a direction perpendicular to the base substrate 101, and the black matrix layer BM is hollowed out in the sub-pixel removal area FDC2, thereby improving the transmittance of the translucent display area FDC.

[0109] For example, in some embodiments, the plurality of first wirings L1 may be a plurality of touch wirings in the touch layer T. As shown in FIG.

[0110] For example, in the embodiments of FIG4 and FIG5A, the pixel defining layer PDL is also hollowed out in the sub-pixel removal area FDC2 to improve the light transmittance of the light-transmitting display area FDC. For example, the arrangement of the pixel defining layer PDL in the sub-pixel arrangement area FDC1 is substantially the same as the arrangement of the pixel defining layer PDL in the main display area AA and the sensor area SS.

[0111] For example, Fig. 5B shows a partial plan view of the black matrix around the sub-pixel in the embodiment of Fig. 4 and Fig. 5A. As shown in Fig. 4 and Fig. 5B, the black matrix layer BM includes a plurality of first light-emitting openings BM1 exposing a plurality of first sub-pixels of the first light-emitting device EM1 in the main display area AA, and includes a plurality of second light-emitting openings BM2 exposing a plurality of second sub-pixels of the second light-emitting device EM2 in the sensor area SS, and is hollowed out in most areas of the light-transmitting display area FDC.

[0112] For example, as shown in FIG5B , in this embodiment, the material of the plurality of gray flat layers GO is filled in the plurality of first light exit openings BM1, the plurality of second light exit openings BM2, and the first sensor opening BM0, the area of ​​the material of the gray flat layer GO filled in the plurality of first light exit openings BM1 is greater than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0, and the area of ​​the material of the gray flat layer GO filled in the plurality of second light exit openings BM2 is greater than the area of ​​the material of the gray flat layer GO filled in the first sensor opening BM0. For example, the area of ​​the material of the gray flat layer GO filled in the plurality of first light exit openings BM1 is substantially equal to the area of ​​the material of the gray flat layer GO filled in the plurality of second light exit openings BM2.

[0113] For example, in other embodiments, the thickness of the gray flat layer GO in different areas can be set to be different to reduce the reflectivity difference among the light-transmitting display area FDC, the sensor area SS and the main display area AA, so that the visual display effects of the light-transmitting display area FDC, the sensor area SS and the main display area AA are basically the same.

[0114] For example, in some embodiments, as shown in FIG. 6 , in a direction perpendicular to the base substrate 101, a first thickness H1 of the gray flat layer GO in the main display area AA (e.g., a maximum thickness in the main display area AA, and also a thickness at a position where there is no material of the black matrix layer BM) may be 2 μm-3 μm, such as 2.2 μm, 2.5 μm or 2.8 μm, etc.; a second thickness H2 of the gray flat layer GO in the sensor area SS (e.g., a maximum thickness in the sensor area SS, and also a thickness at a position where there is no material of the black matrix layer BM) is 0.2 μm higher than the first thickness H1. m-0.5μm, for example, the second thickness H2 can be 2.2μm-3.5μm, for example, 2.5μm, 2.8μm, 3.0μm or 3.2μm, etc.; the third thickness H3 of the gray flat layer GO in the light-transmitting display area FDC (for example, the maximum thickness in the light-transmitting display area FDC, and also the thickness at a position where there is no material of the black matrix layer BM) is 0.4μm-0.6μm lower than the first thickness H1, for example, 0.5μm lower, for example, the third thickness H3 can be 1.5μm-2.5μm, for example, 1.8μm, 2.0μm or 2.2μm, etc.

[0115] Through experimental verification, taking light with a wavelength of 530nm as an example, when the thickness of the gray flat layer GO is 1.5μm, the light transmittance of the gray flat layer GO is 72%; when the thickness of the gray flat layer GO is 2μm, the light transmittance of the gray flat layer GO is 64%; when the thickness of the gray flat layer GO is 2.5μm, the light transmittance of the gray flat layer GO is 58%; when the thickness of the gray flat layer GO is 3μm, the light transmittance of the gray flat layer GO is 51%; when the thickness of the gray flat layer GO is 3.5μm, the light transmittance of the gray flat layer GO is 46%. In addition, when the second thickness H2 of the gray flat layer GO in the sensor area SS is 0.2 μm higher than the first thickness H1 of the gray flat layer GO in the main display area AA, the reflectivity difference between the sensor area SS and the main display area AA is 0.29%; when the second thickness H2 is 0.3 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 0.44%; when the second thickness H2 is 0.5 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 0.70%; when the second thickness H2 is 0.8 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA is 1.20%.

[0116] Therefore, when the second thickness H2 is 0.2 μm-0.5 μm higher than the first thickness H1, the reflectivity difference between the sensor area SS and the main display area AA can be reduced by about 0.29%-0.7%, and the difference in visual display effects between the sensor area SS and the main display area AA is significantly reduced.

[0117] Therefore, when the thickness of the gray flat layer GO is different, its light transmittance is different. By adjusting the thickness of the gray flat layer GO in different areas, the light transmittance of the gray flat layer GO in different areas can be made different, so that the reflectivity difference in different areas of the display panel is reduced, and the uniformity of the overall visual display effect of the display panel is improved.

[0118] For example, as shown in FIG6 , in this embodiment, the display panel may further include a cover layer CO, which is disposed on a side of the gray flat layer GO away from the base substrate 101 to flatten the gray flat layer GO. For example, the material of the cover layer CO may be an organic insulating material such as polyimide and resin, or an inorganic insulating material such as silicon oxide, silicon nitride, and silicon oxynitride.

[0119] It should be noted that, in FIG. 6 and the following figures, for the sake of simplicity, the base substrate 101 and the driving circuit layer 102 are not shown separately, and their positional relationship can be seen in FIG. 2 and FIG. 4 .

[0120] For example, in other embodiments, the reflectivity difference among the light-transmitting display area FDC, the sensor area SS and the main display area AA may be reduced by other means, so that the overall visual display effects of the light-transmitting display area FDC, the sensor area SS and the main display area AA are basically the same.

[0121] For example, in some embodiments, as shown in Figure 7, the display panel may further include a reflection reduction layer F, which is located in the sensor area SS and the light-transmitting display area FDC, and is located on the side of the second light-emitting device EM2 or the third light-emitting device EM3 away from the substrate 101, that is, located on the side of the second cathode layer 23 and the third cathode pattern 33 away from the substrate 101. At this time, the encapsulation layer EN is located on the side of the reflection reduction layer F away from the substrate 101.

[0122] For example, in some embodiments, the material of the reflection reduction layer F may include at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride. In the direction perpendicular to the base substrate 101, the thickness of the reflection reduction layer F is 8nm-10nm, for example, 8.5nm, 9.0nm or 9.5nm.

[0123] For example, Figure 8 shows a schematic diagram of the principle of reducing the reflectivity by the reflection reduction layer F. As shown in Figure 8, the reflection reduction layer F has an upper surface S1 and a lower surface S2. External light incident on the reflection reduction layer F can be reflected from the upper surface S1 as light L1, and external light incident on the reflection reduction layer F can be reflected from the lower surface S2 as light L2. The phases of the light L1 and the light L2 can be opposite to each other, so interference occurs, thereby greatly reducing the reflectivity of the area where the reflection reduction layer F is set, that is, greatly reducing the reflectivity of the sensor area SS and the light-transmitting display area FDC, so that the overall visual display effects of the light-transmitting display area FDC, the sensor area SS and the main display area AA are basically the same.

[0124] For example, in other embodiments, the reflectivity difference among the light-transmitting display area FDC, the sensor area SS, and the main display area AA can be reduced by differentially designing the black matrix layer in different areas, so that the visual display effects of the light-transmitting display area FDC, the sensor area SS, and the main display area AA are basically the same.

[0125] For example, in some embodiments, as shown in FIG. 9 , the pixel defining layer PDL includes a plurality of sub-pixel openings PDL1 in the main display area AA, the sensor area SS, and the light-transmitting display area. In the main display area AA, the first orthographic projection of the sub-pixel opening PDL1 on the substrate 101 is located within the second orthographic projection of the first light exit opening BM1 on the substrate 101, that is, in the main display area AA, the sub-pixel opening PDL1 is retracted relative to the first light exit opening BM1, for example, the retracted distance W1 is 3 μm-6 μm, for example, 4 μm, 5 μm or 6 μm, etc. In the sensor area SS, the third orthographic projection of the second light exit opening BM2 on the substrate 101 is located within the fourth orthographic projection of the sub-pixel opening PDL1 on the substrate 101, that is, in the sensor area SS, the second light exit opening BM2 is retracted relative to the sub-pixel opening PDL1. For example, the distance W2 by which the second light exit opening BM2 is retracted relative to the sub-pixel opening PDL1 is 1μm-4μm, such as 2μm, 3μm or 4μm, etc., that is, the third orthographic projection is retracted relative to the fourth orthographic projection by 1μm-4μm, such as 2μm, 3μm or 4μm, etc.

[0126] For example, FIG10 shows a partial plan view of the light-transmitting display area FDC, the sensor area SS, and the main display area AA in the embodiment of FIG9. As shown in FIG9 and FIG10, in this embodiment, the black matrix layer BM includes a plurality of annular light-shielding portions BM3 in the light-transmitting display area FDC, and the plurality of annular light-shielding portions BM3 are arranged at intervals. Therefore, the arrangement area of ​​the black matrix layer BM in the light-transmitting display area FDC is much smaller than the arrangement area of ​​the black matrix layer BM in the main display area AA.

[0127] For example, as shown in FIG. 10 , the pixel defining layer PDL includes a second sensor opening PDL0 at least partially overlapping the first sensor opening BM0 in a direction perpendicular to the base substrate 101 in the sensor region SS, and the second sensor opening PDL0 is retracted relative to the first sensor opening BM0 in the black matrix layer BM.

[0128] Through testing, in the above embodiment, the light reflectivity of the sensor area SS can be reduced by about 0.2%-0.6%, so that the light reflectivity difference between the sensor area SS and the main display area AA can be reduced by about 0.2%-0.6%.

[0129] For example, in the embodiment of FIG. 10 , the black matrix layer BM includes a plurality of annular light shielding portions BM3 in the light-transmitting display region FDC, which is basically the same as the implementation of the embodiment of FIG. 2 . For details, please refer to the above embodiment.

[0130] For example, in some other embodiments, as shown in FIG. 11 , the pixel defining layer PDL includes in the sensor area SS a second sensor opening PDL0 at least partially overlapping with the first sensor opening BM0 in a direction perpendicular to the substrate 101. In the sensor area SS, the second cathode layer 23 of the second light-emitting device EM2 is continuously arranged in the sensor area SS and includes a third sensor opening 230 at least partially overlapping with the first sensor opening BM0 in a direction perpendicular to the substrate 101. At the same time, the third sensor opening 230 also at least partially overlaps with the second sensor opening PDL0.

[0131] For example, Fig. 12 shows a partial schematic plan view of the light-transmitting display area FDC, the sensor area SS, and the main display area AA in the embodiment of Fig. 11. As shown in Figs. 11 and 12, the fifth orthographic projection of the second sensor opening PDL0 on the base substrate 101 is located within the sixth orthographic projection of the third sensor opening 230 on the base substrate 101, that is, the second sensor opening PDL0 is retracted relative to the third sensor opening 230, that is, the fifth orthographic projection is retracted relative to the sixth orthographic projection, for example, the retracted distance W3 is 1.0 μm-2.0 μm, such as 1.2 μm, 1.5 μm or 1.8 μm, etc.

[0132] For example, as shown in FIG11 and FIG12, in this embodiment, in the light-transmitting display area FDC, the third cathode patterns 23 of the third light-emitting device EM3 of the third sub-pixel are arranged at intervals, that is, in FIG12, there is no cathode material at the position where the non-light-emitting device with reference numeral 231 is arranged. This can improve the light transmittance of the light-transmitting display area FDC.

[0133] For example, in some embodiments, the first light emitting pattern 12 located in the main display area AA is continuously arranged, the second light emitting pattern 22 located in the sensor area SS is continuously arranged, and the third light emitting pattern 32 located in the light-transmitting display area FDC is arranged at intervals. For example, in some examples, the first light emitting pattern 12 and the second light emitting pattern 22 may also be continuously arranged.

[0134] For example, in some other embodiments, the black matrix layer BM and the gray flat layer GO may also have different configurations.

[0135] For example, as shown in FIG13 , the display panel further includes a touch layer T, which is disposed on a side of the encapsulation layer EN away from the base substrate 101, and the touch layer T includes a touch wiring layer T1 and a touch insulating layer T2 located on a side of the touch wiring layer T1 away from the base substrate 101. For example, the touch insulating layer T2 may be made of an organic insulating material such as polyimide or resin.

[0136] For example, the gray flat layer GO is disposed on a side of the touch insulating layer T2 away from the base substrate 101 , and the black matrix layer BM is disposed on a side of the gray flat layer GO away from the base substrate 101 .

[0137] For example, as shown in FIG13 , the display panel may further include a cover layer CO, which is disposed on a side of the black matrix layer BM away from the base substrate 101 to planarize the black matrix layer BM. For example, the cover layer CO may be an organic cover layer or an inorganic cover layer, the organic cover layer may include an organic insulating material such as polyimide and resin, and the inorganic cover layer may include an inorganic insulating material such as silicon oxide, silicon nitride, and silicon oxynitride.

[0138] For example, as shown in FIG13 , the touch wiring layer T1 may include a first touch wiring layer T11 and a second touch wiring layer T12, the first touch wiring layer T11 is arranged on a side of the second touch wiring layer T12 away from the base substrate 101, and the first touch wiring layer T11 and the second touch wiring layer T12 are separated by an insulating layer T4. For example, the first touch wiring layer T11 and the second touch wiring layer T12 respectively include a plurality of touch wirings, and some of the touch wirings in the first touch wiring layer T11 and the second touch wiring layer T12 may be electrically connected through vias in the insulating layer T4, as a bridge connection structure of the touch wiring layer T1.

[0139] For example, as shown in FIG. 13 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch routing layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0140] For example, in some other embodiments, the touch layer T, the black matrix layer BM and the gray flat layer GO may also have different configurations.

[0141] For example, as shown in FIG14, in some embodiments, the touch layer T is arranged on the side of the encapsulation layer EN away from the base substrate 101, including a touch wiring layer T1, the touch wiring layer T1 includes a plurality of touch wirings T111, and the gray flat layer GO is arranged on the side of the touch wiring layer T1 away from the base substrate 101, and is in contact with the plurality of touch wirings T111, thereby achieving the function of insulating the plurality of touch wirings T111. Compared with the embodiment of FIG13, the touch insulating layer T2 is saved, and in the preparation process, the mask process for making the touch insulating layer T2 is saved. At this time, as shown in FIG14, the black matrix layer BM is arranged on the side of the gray flat layer GO away from the base substrate 101.

[0142] For example, as shown in FIG14 , the touch wiring layer T1 may also include a first touch wiring layer T11 and a second touch wiring layer T12, wherein the first touch wiring layer T11 is disposed on a side of the second touch wiring layer T12 away from the base substrate 101, and the first touch wiring layer T11 and the second touch wiring layer T12 are separated by an insulating layer T4. The first touch wiring layer T11 and the second touch wiring layer T12 each include a plurality of touch wirings, and at this time, the gray flat layer GO contacts and covers the touch wiring T111 in the first touch wiring layer T11 which is further away from the base substrate 101.

[0143] For example, as shown in FIG. 13 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch routing layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0144] For example, in other embodiments, as shown in FIG15 , the touch layer T is disposed on a side of the encapsulation layer EN away from the base substrate 101, including a touch wiring layer T1, the touch wiring layer T1 including a plurality of touch wirings T111, a black matrix layer BM is disposed on a side of the touch wiring layer T1 away from the base substrate 101, including a plurality of second shielding lines BM5 contacting and covering the plurality of touch wirings T11, and a gray flat layer GO is disposed on a side of the black matrix layer BM away from the base substrate 101. Therefore, compared with the embodiment of FIG13 , the touch insulating layer T2 is also saved, and in the manufacturing process, the mask process for manufacturing the touch insulating layer T2 is also saved.

[0145] For example, as shown in FIG15 , the touch wiring layer T1 may also include a first touch wiring layer T11 and a second touch wiring layer T12, wherein the first touch wiring layer T11 is disposed on a side of the second touch wiring layer T12 away from the base substrate 101, and the first touch wiring layer T11 and the second touch wiring layer T12 are separated by an insulating layer T4. The first touch wiring layer T11 and the second touch wiring layer T12 each include a plurality of touch wirings, and at this time, the plurality of second shielding lines BM5 contact and cover the touch wiring T111 in the first touch wiring layer T11 which is further away from the base substrate 101.

[0146] For example, as shown in FIG. 15 , the touch layer T may further include a touch buffer layer T3 , which is disposed on a side of the encapsulation layer EN away from the base substrate 101 , and the touch routing layer T1 is disposed on a side of the touch buffer layer T3 away from the base substrate 101 .

[0147] For example, in other embodiments, as shown in FIG16 , the black matrix layer BM is disposed on the side of the encapsulation layer EN away from the base substrate 101, the touch layer T is disposed on the side of the black matrix layer BM away from the base substrate 101, and includes a touch wiring layer T1, the touch wiring layer T1 includes a plurality of touch wirings T111, and the gray flat layer GO is disposed on the side of the touch wiring layer T1 away from the base substrate 101. Therefore, compared with the embodiment of FIG13 , the touch insulating layer T2 is also saved, and in the preparation process, the mask process for making the touch insulating layer T2 is saved.

[0148] For example, as shown in FIG. 16 , the display panel may further include a molybdenum oxide layer MO, and the material of the molybdenum oxide layer MO includes molybdenum oxide (MO x O y / MoO x The molybdenum oxide layer MO is located on a side of the plurality of touch lines T11 away from the base substrate 101 and includes a plurality of cover lines MO1 to cover the plurality of touch lines T11.

[0149] For example, as shown in FIG16 , the multiple covering lines MO1 may directly contact and cover the multiple touch traces T11, but do not cover the sides of the multiple touch traces T11; or, in other embodiments, as shown in FIG17 , the multiple covering lines MO1 of the molybdenum oxide layer MO may also completely cover the multiple touch traces T11, that is, not only cover the top of the multiple touch traces T11, but also cover the sides of the multiple touch traces T11.

[0150] In the above embodiment, the molybdenum oxide layer MO is substantially black, and covers the plurality of touch lines T11 to reduce the light reflectivity of the plurality of touch lines T11.

[0151] For example, as shown in FIG. 16 and FIG. 17 , the orthographic projection of the molybdenum oxide layer MO on the base substrate 101 is located within the orthographic projection of the black matrix layer BM on the base substrate 101 to ensure the light transmittance of the display panel.

[0152] For example, as shown in FIG. 16 and FIG. 17, in this embodiment, the touch wiring layer T1 may also include a first touch wiring layer T11 and a second touch wiring layer T12, the first touch wiring layer T11 is arranged on a side of the second touch wiring layer T12 away from the base substrate 101, and the first touch wiring layer T11 and the second touch wiring layer T12 are separated by an insulating layer T4. The first touch wiring layer T11 and the second touch wiring layer T12 respectively include a plurality of touch wirings, and at this time, the plurality of cover lines MO1 contact and cover the touch wiring T111 in the first touch wiring layer T11 which is further away from the base substrate 101.

[0153] For example, as shown in Figures 16 and 17, the touch layer T may further include a touch buffer layer T3, which is arranged on the side of the black matrix layer BM away from the base substrate 101, and can flatten the black matrix layer BM. The touch routing layer T1 is arranged on the side of the touch buffer layer T3 away from the base substrate 101.

[0154] For example, in other embodiments, as shown in FIG. 18 , the display panel may further include a transparent insulating layer TO. The black matrix layer BM is disposed on the side of the encapsulation layer EN away from the base substrate 101, and includes a plurality of light shielding patterns BM6, which are used to form the above-mentioned first light exit opening BM1, the second light exit opening BM2, the first sensor opening BM0, and the annular light shielding portion BM3, etc. For example, the transparent insulating layer TO is disposed on the side of the black matrix layer BM away from the base substrate 101, and includes a plurality of covering patterns TO1, and the plurality of covering patterns TO1 respectively cover the plurality of light shielding patterns BM6. For example, the transparent insulating layer TO is in a grid shape as a whole, and the pattern of the transparent insulating layer TO as a whole is substantially the same as the pattern of the black matrix layer BM as a whole. The plurality of covering patterns TO1 cover the black matrix layer BM and are in direct contact with the black matrix layer BM. At this time, the gray flat layer GO is located on the side of the transparent insulating layer TO away from the base substrate 101, for example, in direct contact with the plurality of covering patterns TO1.

[0155] For example, in the above embodiment, the refractive index of the transparent insulating layer TO is n1, and the refractive index of the gray flat layer GO is n2, then: n1<n2. Therefore, when the light emitted by the light-emitting device is emitted to the transparent insulating layer TO and the gray flat layer GO, it will be refracted. As shown by the arrow in FIG18, the light emitted by the light-emitting device is more inclined to be emitted in a direction perpendicular to the display panel, thereby improving the light output rate of the display panel, thereby improving the light output brightness of the display panel and reducing power consumption.

[0156] For example, in some embodiments, n2-n1≥0.05, so as to further improve the light extraction efficiency of the display panel, enhance the light extraction brightness of the display panel, and reduce power consumption.

[0157] The embodiments of the present disclosure do not limit the materials of each functional layer. For example, the base substrate 101 can be a rigid substrate such as glass, quartz, or a flexible substrate such as polyimide, and the multiple touch lines of the touch wiring layer T1 can be made of metal materials or alloy materials such as copper (Cu), aluminum (Al), titanium (Ti), molybdenum (Mo), etc., for example, formed into a single-layer metal layer structure or a multi-layer metal layer structure. The touch buffer layer T3 of the touch wiring layer T can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, and the insulating layer T4 can also be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride, or organic insulating materials such as polyimide and resin.

[0158] For example, the pixel defining layer PDL may be made of organic insulating materials such as polyimide and resin. When the pixel defining layer PDL is a black pixel defining layer, its material may include organic insulating materials such as polyimide and resin as a base material, and may also include other black dyes or pigments.

[0159] For example, the anode of each light-emitting device can be made of transparent metal oxides such as indium tin oxide (ITO), indium zinc oxide (IZO), and gallium zinc oxide (GZO), the cathode material can be lithium (Li), aluminum (Al), magnesium (Mg), silver (Ag) and other metal materials, and the light-emitting pattern can include organic light-emitting materials or quantum dot light-emitting materials.

[0160] For example, the display panel may further include other structures besides the above structures. For details, please refer to the relevant technology and will not be described in detail here.

[0161] At least one embodiment of the present disclosure provides a display device, which includes any of the above-mentioned display panels. The display device has the advantages of being thin and easy to manufacture.

[0162] For example, the display device may be any product or component with a display function, such as a mobile phone, a tablet computer, a television, a monitor, a notebook computer, a digital photo frame, a navigator, or the like.

[0163] At least one embodiment of the present disclosure further provides a method for preparing a display panel. Referring to FIGS. 1 and 2 , the method includes: providing a base substrate 101, forming a driving circuit layer 102 on the base substrate 101, forming a light-emitting device layer EM on a side of the driving circuit layer 102 away from the base substrate 101, forming an encapsulation layer EN on a side of the light-emitting device layer EM away from the base substrate 101, and forming a gray flat layer GO on a side of the encapsulation layer EN away from the base substrate 101; wherein the display panel has a main display area AA, a sensor area SS and a light-transmitting display area FDC, the main display area AA at least partially surrounds the sensor area SS and the light-transmitting display area FDC, and the gray flat layer GO is formed in the main display area AA, the sensor area SS and the light-transmitting display area FDC.

[0164] The preparation method of the above-mentioned display panel provided by the embodiment of the present disclosure is simpler. Compared with the traditional COE technology, it can save multiple mask plates for making color films. For example, for a display panel with red, green and blue sub-pixels, three mask plates can be saved, and at the same time, color film raw materials can be saved, costs can be saved, and a thinner display panel can also be obtained.

[0165] There are a few points to note:

[0166] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to the general design.

[0167] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0168] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0169] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.

Claims

A display panel, comprising: A substrate, a driving circuit layer is arranged on the substrate, a light-emitting device layer is arranged on a side of the driving circuit layer away from the substrate, an encapsulation layer is arranged on a side of the light-emitting device layer away from the substrate, and a gray flat layer is arranged on a side of the encapsulation layer away from the substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is arranged on the main display area, the sensor area and the light-transmitting display area. The display panel according to claim 1, further comprising: The black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, wherein the gray flat layer is arranged on a side of the black matrix layer away from the base substrate. The display panel according to claim 2, wherein: The main display area includes a plurality of first sub-pixels, each of the plurality of first sub-pixels includes a first light-emitting device located in the light-emitting device layer, the sensor area includes a plurality of second sub-pixels, each of the plurality of second sub-pixels includes a second light-emitting device located in the light-emitting device layer, and the black matrix layer includes a plurality of first light-emitting openings exposing the first light-emitting devices in the main display area, and includes a plurality of second light-emitting openings exposing the second light-emitting devices and a first sensor opening located between the plurality of second light-emitting openings in the sensor area. The display panel according to claim 3, wherein: The material of the gray flat layer is filled in the multiple first light exit openings, the multiple second light exit openings and the first sensor opening, wherein the area of ​​the material of the gray flat layer filled in the multiple first light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening, and the area of ​​the material of the gray flat layer filled in the multiple second light exit openings is larger than the area of ​​the material of the gray flat layer filled in the first sensor opening. The display panel according to any one of claims 2 to 4, wherein: The light-transmitting display area includes a plurality of third sub-pixels, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the light-transmitting display area, the ratio of the light-emitting area of ​​the third light-emitting devices to the light-emitting area of ​​the first light-emitting devices is 1:4 to 1:2, and the black matrix layer includes a plurality of annular shading portions in the light-transmitting display area, respectively exposing the third light-emitting devices of the plurality of third sub-pixels, and the plurality of annular shading portions are arranged at intervals. The display panel according to claim 5, wherein: An area of ​​the material of the gray flat layer filled in the plurality of annular light shielding portions is greater than an area of ​​the material of the gray flat layer filled in the first sensor opening. The display panel according to claim 3 or 4, wherein: The first light-emitting device includes a first anode pattern, a first light-emitting pattern and a first cathode layer which are stacked, the first cathode layers of the first light-emitting devices of the plurality of first sub-pixels are continuously arranged in the main display area, the third light-emitting devices of the plurality of third sub-pixels include a third anode pattern, a third light-emitting pattern and a third cathode pattern which are stacked, and the third cathode patterns of the third light-emitting devices of the plurality of third sub-pixels are arranged at intervals in the light-transmitting display area. The display panel according to claim 3, 4 or 7, wherein: The light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area, the sensor area includes a second sensor opening that at least partially overlaps with the first sensor opening in a direction perpendicular to the base substrate, and the light-transmitting display area includes a plurality of sub-pixel walls for defining the plurality of third sub-pixel openings, and the plurality of sub-pixel walls are arranged at intervals. The display panel according to any one of claims 2 to 4, wherein: The light-transmitting display area includes a sub-pixel setting area and a sub-pixel removal area, the sub-pixel setting area includes a plurality of third sub-pixels, the sub-pixel removal area does not include sub-pixels, the area ratio of the sub-pixel setting area to the sub-pixel removal area is 1:3 to 1:1, each of the plurality of third sub-pixels includes a third light-emitting device located in the light-emitting device layer, the arrangement density of the first light-emitting devices in the main display area is equal to the arrangement density of the third light-emitting devices in the sub-pixel setting area, the light-emitting area of ​​the third light-emitting device is equal to the light-emitting area of ​​the first light-emitting device, the sub-pixel setting area also includes a plurality of first wirings arranged at the edges of the plurality of third sub-pixels, the black matrix layer includes in the sub-pixel setting area a plurality of first shielding lines at least partially overlapping with the plurality of first wirings in a direction perpendicular to the base substrate, and is hollowed out in the sub-pixel removal area. The display panel according to claim 9, wherein: The light emitting device layer further includes a pixel defining layer for defining sub-pixels, and the pixel defining layer is hollowed out in the sub-pixel removal area. The display panel according to any one of claims 1 to 10, wherein: In a direction perpendicular to the base substrate, the first thickness of the gray flat layer in the main display area is 2μm-3μm, the second thickness of the gray flat layer in the sensor area is 0.2μm-0.5μm higher than the first thickness, and the third thickness of the gray flat layer in the light-transmitting display area is 0.4μm-0.6μm lower than the first thickness. The display panel according to any one of claims 5-6 and 9-10, further comprising: The anti-reflection layer is located in the sensor area and the light-transmitting display area, and is located on a side of the second light-emitting device or the third light-emitting device away from the base substrate, wherein the encapsulation layer is located on a side of the anti-reflection layer away from the base substrate. The display panel according to claim 12, wherein: The material of the anti-reflection layer includes at least one of ytterbium, bismuth, calcium fluoride and magnesium fluoride. In the direction perpendicular to the substrate, the thickness of the anti-reflection layer is 8nm-10nm. The display panel according to claim 3 or 4, wherein: The light-emitting device layer also includes a pixel defining layer for defining sub-pixels, and the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area, and the light-transmitting display area. In the main display area, a first orthographic projection of the sub-pixel opening on the substrate is located within a second orthographic projection of the first light output opening on the substrate, and in the sensor area, a third orthographic projection of the second light output opening on the substrate is located within a fourth orthographic projection of the sub-pixel opening on the substrate. The display panel according to claim 14, wherein: The third orthographic projection is shrunk by 1 μm-4 μm relative to the fourth orthographic projection. The display panel according to claim 3 or 4, wherein: The light-emitting device layer also includes a pixel defining layer for defining sub-pixels, the pixel defining layer includes a plurality of sub-pixel openings in the main display area, the sensor area and the light-transmitting display area, the sensor area includes a second sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate, the second light-emitting devices of the plurality of second sub-pixels include a second anode pattern, a second light-emitting pattern and a second cathode layer arranged in a stacked manner, the second cathode layer is continuously arranged in the sensor area and includes a third sensor opening overlapping with the first sensor opening in a direction perpendicular to the base substrate. The display panel according to claim 16, wherein: A fifth orthographic projection of the second sensor opening on the substrate is located within a sixth orthographic projection of the third sensor opening on the substrate. The display panel according to claim 17, wherein: The fifth orthographic projection is shrunk by 1 μm-2 μm relative to the sixth orthographic projection. The display panel according to claim 1, further comprising: The touch layer is arranged on the side of the packaging layer away from the base substrate, including a touch wiring layer and a touch insulation layer located on the side of the touch wiring layer away from the base substrate, wherein the gray flat layer is arranged on the side of the touch insulation layer away from the base substrate, and the black matrix layer is arranged on the side of the gray flat layer away from the base substrate. The display panel according to claim 1, further comprising: A touch layer is arranged on a side of the packaging layer away from the base substrate, and includes a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings, wherein the gray flat layer is arranged on a side of the touch wiring layer away from the base substrate and contacts the plurality of touch wirings, and a black matrix layer is arranged on a side of the gray flat layer away from the base substrate. The display panel according to claim 1, further comprising: A touch layer is arranged on a side of the encapsulation layer away from the base substrate, and includes a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings; a black matrix layer is arranged on a side of the touch wiring layer away from the base substrate, and includes a plurality of second shielding lines that contact and cover the plurality of touch wirings; wherein the gray flat layer is arranged on a side of the black matrix layer away from the base substrate. The display panel according to claim 1, further comprising: A black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, and a touch layer is arranged on a side of the black matrix layer away from the base substrate, including a touch wiring layer, wherein the touch wiring layer includes a plurality of touch wirings, wherein the gray flat layer is arranged on a side of the touch wiring layer away from the base substrate. The display panel according to claim 22, further comprising: The molybdenum oxide layer is located on a side of the plurality of touch lines away from the substrate, and includes a plurality of cover lines to cover the plurality of touch lines. The display panel according to claim 1, further comprising: A black matrix layer is arranged on a side of the encapsulation layer away from the base substrate, and includes a plurality of shading patterns; a transparent insulating layer is arranged on a side of the black matrix layer away from the base substrate, and includes a plurality of covering patterns, and the plurality of covering patterns respectively cover the plurality of shading patterns, wherein the gray flat layer is located on a side of the transparent insulating layer away from the base substrate. The display panel according to claim 24, wherein: The refractive index of the transparent insulating layer is n1, and the refractive index of the gray flat layer is n2, then: n1<n2. The display panel according to claim 25, wherein: n2-n1≥0.

05. The display panel according to any one of claims 1 to 26, wherein: The light transmittance of the gray flat layer is 40%-60%. The display panel according to any one of claims 1 to 27, wherein: The gray flat layer includes a transparent matrix and a light absorbing material dispersed in the transparent matrix. The display panel according to claim 28, wherein: The light absorbing material includes at least one of oxazine compounds, cyanine compounds, porphyrazine compounds and squarylium compounds. A display device, comprising the display panel according to any one of claims 1-29. A method for preparing a display panel, comprising: A base substrate is provided, a driving circuit layer is formed on the base substrate, a light-emitting device layer is formed on a side of the driving circuit layer away from the base substrate, an encapsulation layer is formed on a side of the light-emitting device layer away from the base substrate, and a gray flat layer is formed on a side of the encapsulation layer away from the base substrate; wherein the display panel has a main display area, a sensor area and a light-transmitting display area, the main display area at least partially surrounds the sensor area and the light-transmitting display area, and the gray flat layer is formed on the main display area, the sensor area and the light-transmitting display area.

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