Chip Mounting Path Planning Method and System

Abstract

The present invention relates to the technical field of chip processing, specifically a chip placement path planning method and system, including the following steps: obtaining placement path coordinates and calculating path vectors, screening overlapping risk path segments based on path angles and distances, extracting structural response data to calculate amplitude response inertia factors and generating a set of structural factors, adjusting dynamic parameters according to control thresholds to generate an amplitude compression parameter set, and eliminating interference paths to generate an executable path set. In the present invention, by introducing a construction method of path vectors into the placement path, the expression accuracy of path geometric changes is improved, and then path segment screening is carried out under the dual constraints of path direction angle and spatial distance to achieve directional recognition of convergent overlapping paths. Three indicators, namely return time, end angle fall value, and response delay time, are introduced into the action response data of the placement device, enabling the dynamic stability of the placement device to have a quantifiable expression ability.

Description

Technical Field

[0001] The present invention relates to the technical field of chip processing, and particularly to a chip placement path planning method and system. Background Art

[0002] The technical field of chip processing encompasses the overall technical system for processes such as cutting, handling, packaging, and placement of chips during semiconductor manufacturing. The core content of this technical field lies in achieving an efficient and high-precision conversion process of chips from wafers to final packaged products. The key links include wafer cutting technology, chip picking technology, automatic placement path planning, placement accuracy control, and packaging processing, etc.

[0003] Among them, the chip placement path planning method refers to a method for systematically planning the movement path of a chip from the pick-up point to the target placement point in the chip packaging process. This method mainly focuses on the optimization of the movement path of the chip during the placement process, covering technical matters such as chip position acquisition, placement sequence setting, path feasibility judgment, and path generation. Specifically, by obtaining the spatial coordinate data of each chip, combining the placement sequence logic, sorting all the chips to be placed and constructing an initial path, and then adjusting and optimizing the path based on the shortest path rule, obstacle avoidance conditions, and action continuity requirements, finally generating a planned path for placement execution.

[0004] Traditional placement path planning methods only rely on spatial coordinate data and the shortest path rule for path adjustment during the path generation process, lacking a fine judgment of the directional relationship and spatial convergence degree between path segments, making it difficult to effectively identify the placement interference risk caused by path convergence phenomena. Moreover, no computable metrics have been established for dealing with the dynamic response characteristics of placement equipment, only staying at the static position sorting of path points, unable to reflect the dynamic instability characteristics in the actual placement process. In the setting of path segment control parameters, the dynamic risk levels borne by different path segments are not distinguished, resulting in the failure to timely perform speed compression and acceleration limitation in high-inertia structure areas, and the placement system is more likely to generate overshoot or path interference during execution. In addition, the lack of joint judgment on the placement timing and spatial proximity of path segments leads to time interference or spatial blockage phenomena in dense path arrangements, easily causing the interruption of the placement process or path conflicts, affecting the overall placement efficiency and process safety, and unable to meet the collaborative control requirements for path timing and response in high-integration scenarios. Summary of the Invention

[0005] The purpose of the present invention is to solve the drawbacks existing in the prior art and propose a chip placement path planning method and system.

[0006] To achieve the above purpose, the present invention adopts the following technical solutions: A chip placement path planning method, including the following steps:

[0007] S1: Obtain the coordinates of each pick-up point and the corresponding placement point in the placement path, calculate the path displacement vector, and generate a set of regional grouping path vectors;

[0008] S2: Based on the set of regional grouping path vectors, call the start and end coordinates of each path vector in adjacent numbered path groups, calculate the angle between two specified vectors to filter the path segment combinations, and generate a set of path convergence and overlap risk features;

[0009] S3: According to the set of path convergence and overlap risk features, mark the placement equipment numbers corresponding to the path segments, obtain the return time, the end angle drop value, and the response delay time of each equipment after placement, calculate the amplitude response inertia factor of the corresponding structure, and generate a set of path segment structure inertia factors;

[0010] S4: Call the amplitude response inertia factors of all path segments in the set of path segment structure inertia factors, compare them one by one with the amplitude response inertia threshold, record the corresponding path segment numbers, and set the maximum single-step movement distance and the maximum acceleration as the amplitude compression values to generate a set of path segment amplitude compression control parameters;

[0011] S5: Eliminate the interference risk paths in the set of path segment amplitude compression control parameters to generate a set of executable paths for chip placement.

[0012] As a further solution of the present invention, the set of regional grouping path vectors includes path segment number tags, path displacement vectors, and placement area index numbers; the set of path convergence and overlap risk features includes path segment combination numbers, path vector angles, and distances from the center of the placement area; the set of path segment structure inertia factors includes path segment numbers, amplitude response inertia factors, and placement equipment number indexes; the set of path segment amplitude compression control parameters includes path segment numbers, single-step movement distance limits, and acceleration limits; the set of executable paths for chip placement includes a list of path segment numbers, path control parameters, and interference path elimination flags.

[0013] As a further solution of the present invention, the specific steps for obtaining the set of regional grouping path vectors are as follows:

[0014] S111: Obtain the coordinate values of all pick-up points and placement points in the placement path, construct coordinate pairs based on the pick-up points and the corresponding placement points of each placement action, and use the formula:

[0015] ;

[0016] Calculate the modulus length of the displacement vector with path number , combine the horizontal components, vertical components, and modulus lengths of all paths into a vector feature set, and generate a set of path displacement offsets;

[0017] Among them, respectively represent the coordinates of the pick-up point with path number in the x and y directions, respectively represent the coordinates of the placement point with path number in the x and y directions;

[0018] S112: According to the chip placement area number corresponding to each path in the path displacement offset group, call the area number as the aggregation label, divide the paths into the path segment sets with corresponding numbers, record the horizontal component, vertical component and vector modulus length of all paths in each group of path segments, establish a comparison table of number index and path vector, and generate a region grouped path vector set.

[0019] As a further solution of the present invention, the acquisition steps of the path convergence and overlap risk feature set are specifically as follows:

[0020] S211: Based on the region grouped path vector set, call the coordinates of the pick-up point and placement point of each path in adjacent path segments, construct a two-dimensional displacement vector of the path segment, and use the formula:

[0021] ;

[0022] Calculate the included angle between the th placement path and the th placement path, corresponding to the path segment number, and establish a comparison list of path segment direction angles;

[0023] Among them, respectively represent the coordinates of the pick-up point with path number in the x and y directions, respectively represent the coordinates of the placement point with path number in the x and y directions, respectively represent the coordinates of the adjacent pick-up point with path number in the x and y directions, respectively represent the coordinates of the adjacent placement point with path number in the x and y directions, is the displacement vector modulus length of the path with path number is the displacement vector modulus length of the path with path number ;

[0024] ​S212: According to the numbering information of each pair of path segments in the comparison list of the path segment direction angles, obtain the corresponding mounting area numbers, extract the central coordinate values of the two areas to calculate the distance between the area centers, judge it against the set critical distance value for path convergence, and compare the corresponding included angle value with the set mounting included angle threshold. For the path segment combinations that satisfy the included angle value being less than the included angle threshold and the area distance being less than the critical distance, record the corresponding pair of path segment numbers and obtain the set of path convergence mark numbers;

[0025] S213: Extract the pair of path segment numbers recorded in the set of path convergence mark numbers, correspondingly extract the numbers, included angles and distances between the pairs of path segments and the mounting areas, construct the directional feature combination items between the numbered path segments, and integrate them with the original path segment index table to generate the path convergence and overlap risk feature set.

[0026] As a further solution of the present invention, the specific steps for obtaining the set of path segment structure inertia factors are as follows:

[0027] S311: According to the numbers of each path segment in the path convergence and overlap risk feature set, call the return time, end angle fall value and response delay time under the corresponding equipment number through the mounting record data table, establish the index relationship between the path segment numbers and the three structural action parameters, and generate the set of mounting equipment action parameters;

[0028] S312: Based on all the structural action parameters in the set of mounting equipment action parameters, including the return time, end angle fall and response delay time of each structure, use the formula:

[0029] ;

[0030] The amplitude response inertia factor with the equipment number Sort out the equipment number and the corresponding value into the equipment number-response factor mapping table to generate the set of structural amplitude response inertia factor values; wherein,

[0031] represents the return time, in seconds, represents the minimum and maximum values of the return time, represents the angle fall, in degrees, represents the minimum and maximum values of the angle fall, represents the response delay time, in seconds, is the minimum and maximum values of the response delay time;

[0032] ​S313: Invoke the binding information of the device number and path segment number in the structural amplitude response inertia factor value concentration device, write the inertia factor value corresponding to each structure into the data field of the bound path segment, and generate a path segment structure inertia factor set.

[0033] As a further solution of the present invention, the step of obtaining the path segment amplitude compression control parameter set is specifically as follows:

[0034] S411: Invoke the amplitude response inertia factor of each path segment in the path segment structure inertia factor set, obtain the amplitude response inertia threshold as the judgment benchmark, compare and judge whether the inertia factor of each path segment exceeds the amplitude response inertia threshold item by item, record the numbers of the path segments higher than the amplitude response inertia threshold, and perform compression adjustment to obtain a path segment limit control parameter comparison list;

[0035] S412: According to all the path segment numbers and compression control parameter values in the path segment limit control parameter comparison list, write the maximum single-step movement distance and maximum acceleration corresponding to each path segment into the path segment control record field to obtain a path segment amplitude compression control parameter set.

[0036] As a further solution of the present invention, the step of obtaining the chip mounting executable path set is specifically as follows:

[0037] S511: Based on the mounting time node and path segment spacing of each path segment in the path segment amplitude compression control parameter set, call adjacent path segments with consecutive path segment numbers, respectively extract the mounting completion time and current position coordinates, and calculate the mounting time difference and spatial spacing between path segments;

[0038] S512: Perform a joint judgment operation on the mounting time difference and spatial spacing between the path segments. If the conditions that the mounting time difference is less than the timing interference time threshold and the spatial spacing is less than the spatial interference critical distance are satisfied at the same time, mark the corresponding path segment pair as an interference risk path and perform an elimination operation, obtain the uneliminated path segment numbers and corresponding control parameters, and generate a chip mounting executable path set.

[0039] A chip placement path planning system, which is used to execute the above chip placement path planning method, and the system includes:

[0040] The path vector extraction module obtains the coordinates of each pick-up point and the corresponding placement point in the placement path, calculates the path displacement vector, and generates a regional grouping path vector set;

[0041] Based on the set of regional grouped path vectors, the path convergence risk identification module calls the starting and ending coordinates of each path vector in the adjacent numbered path groups, calculates the angle between the specified two vectors to screen the path segment combinations, and generates a path convergence overlap risk feature set;

[0042] According to the path convergence overlap risk feature set, the structural response inertia calculation module marks the corresponding mounting equipment numbers for the path segments, obtains the return time, the end angle fall value, and the response delay time of each equipment after mounting, calculates the amplitude response inertia factor of the corresponding structure, and generates a set of path segment structure inertia factors;

[0043] The dynamic amplitude compression control module calls the amplitude response inertia factors of all path segments in the set of path segment structure inertia factors, compares them item by item with the amplitude response inertia threshold, records the corresponding path segment numbers, and sets the maximum single-step movement distance and the maximum acceleration as the amplitude compression values, generating a set of path segment amplitude compression control parameters;

[0044] The interference path elimination and path set generation module eliminates the interference risk paths in the set of path segment amplitude compression control parameters and generates a set of executable paths for chip mounting.

[0045] Compared with the prior art, the advantages and positive effects of the present invention are as follows:

[0046] In the present invention, by introducing the construction method of path vectors into the mounting path, the path is no longer a simple coordinate connection, but the expression accuracy of the geometric changes of the path is improved through vectorized management. Furthermore, under the dual constraints of the path direction angle and the spatial distance, the path segments are screened to achieve the directional identification of convergent overlapping paths. Three indicators, namely the return time, the end angle fall value, and the response delay time, are introduced into the action response data of the mounting equipment. The amplitude response inertia factor is constructed through normalization processing, enabling the dynamic stability of the mounting equipment to have a quantifiable expression ability. Further combined with the stability control threshold, the identification and parameter compression control of the high-response inertia path segments are completed, dynamically restricting the single-step movement distance and the acceleration, strengthening the constraint control of the physical interference risk between path segments, and the dual-condition elimination strategy of the mounting time difference and the spatial spacing ensures the two-way non-interference of the path in terms of time density and spatial layout, completing the spatial and temporal compliance screening of the final executable path segments, improving the path execution robustness and dynamic stability of the mounting operation. The entire set of path screening and structural response control logic constructs a full-process control path link from geometric path screening, structural response quantification to parameter compression and interference elimination at the continuous execution level, forming a unified dynamic regulation framework under multi-dimensional parameters, and avoiding mounting abnormalities caused by path convergence, high structural response, or spatial and temporal interference during the mounting process. Description of the Drawings

[0047] Figure 1Schematic diagram of the workflow of the present invention;

[0048] Figure 2 Flowchart of step S1 of the present invention;

[0049] Figure 3 Flowchart of step S2 of the present invention;

[0050] Figure 4 Flowchart of step S3 of the present invention;

[0051] Figure 5 Flowchart of step S4 of the present invention;

[0052] Figure 6 Flowchart of step S5 of the present invention. Detailed implementation manners

[0053] In order to make the objectives, technical solutions and advantages of the present invention clearer and more understandable, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0054] In the description of the present invention, it should be understood that the orientation or positional relationships indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. are based on the orientation or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as limiting the present invention. In addition, in the description of the present invention, the meaning of "a plurality of" is two or more unless otherwise specifically defined.

[0055] Please refer to Figure 1 , the present invention provides a technical solution: a chip placement path planning method, including the following steps:

[0056] S1: Obtain the coordinates of each pick-up point and the corresponding placement point in the placement path, calculate the differences in the x and y directions of each pair of coordinates as the path displacement vectors, and use the chip placement area number as the aggregation label. Divide the path into segments according to the area number, store all the displacement vectors within each path segment into the path set with the corresponding number, and generate a regional grouping path vector set;

[0057] S2: Based on the set of region - grouped path vectors, call the start and end coordinates of each path vector in the adjacent - numbered path groups, calculate the angle between the specified two vectors, and obtain the distance between the center coordinates of the corresponding mounting areas. Determine whether there is a combination of path segments where the angle value is lower than the mounting angle threshold and the center distance is less than the critical distance for path convergence. Mark the path segments that meet the dual conditions, and extract the corresponding path - group numbers, their angle values, and regional distances to generate a set of path - convergence and overlap risk features;

[0058] S3: According to the set of path - convergence and overlap risk features, mark the mounting equipment numbers corresponding to the path segments, obtain the return time, the end - angle fall value, and the response delay time of each equipment after mounting. Normalize the three items of data respectively, calculate the amplitude - response inertia factor of the corresponding structure, bind the amplitude - response inertia factor to the path - segment number and store it in the path - segment attributes to generate a set of path - segment structure inertia factors;

[0059] S4: Call the amplitude - response inertia factors of all path segments in the set of path - segment structure inertia factors, and compare them item - by - item with the amplitude - response inertia threshold. If there is a path segment with an inertia factor higher than the stability - control threshold, record the corresponding path - segment number and set the maximum single - step movement distance and the maximum acceleration as the amplitude - compression value. Write the restricted dynamic - control parameters into the path - segment control record to generate a set of path - segment amplitude - compression control parameters;

[0060] S5: Based on the mounting time nodes and path - segment spacings of each path segment in the set of path - segment amplitude - compression control parameters, call the mounting completion time and the current position coordinates of adjacent path segments, calculate the mounting - time difference and the spatial spacing between path segments, and determine whether there is a combined path - segment number where the mounting - time difference is lower than the timing - interference time threshold and the path - segment spacing is lower than the spatial - interference critical distance. Mark the path - segment pair as an interference - risk path and remove it, and obtain the remaining path - segment numbers and control parameters to generate a set of executable paths for chip mounting;

[0061] The set of region - grouped path vectors includes path - segment number tags, path - displacement vectors, and mounting - area index numbers; the set of path - convergence and overlap risk features includes path - segment combination numbers, path - vector angles, and distances between the centers of mounting areas; the set of path - segment structure inertia factors includes path - segment numbers, amplitude - response inertia factors, and mounting - equipment number indexes; the set of path - segment amplitude - compression control parameters includes path - segment numbers, single - step movement - distance limits, and acceleration limits; the set of executable paths for chip mounting includes a list of path - segment numbers, path - control parameters, and interference - path removal flags.

[0062] Please refer to Figure 2 , the specific steps for obtaining the set of region - grouped path vectors are as follows:

[0063] S111: Obtain the coordinate values of all pick-up points and placement points in the placement path. Based on the pick-up points and corresponding placement points of each placement action, construct coordinate pairs, and use the formula:

[0064] ;

[0065] Calculate the modulus of the displacement vector with the path number , combine the horizontal components, vertical components and modulus of all paths into a vector feature set, and generate a path displacement offset group; Among them,

[0066] respectively represent the coordinates of the pick-up point with the path number in the x and y directions, and respectively represent the coordinates of the placement point with the path number in the x and y directions.

[0067] After obtaining the coordinate values of all pick-up points and placement points in the placement path, it is necessary to perform coordinate matching on each pair of pick-up points and placement points respectively and construct a path index relationship. For example, assume that the pick-up point coordinates are (12.4 mm, 15.2 mm), and the corresponding placement point coordinates are (17.8 mm, 23.1 mm). After extracting these coordinate pairs according to the position index table, calculate the horizontal offset value Δx and vertical offset value Δy of the path in turn, which are Δx = 17.8 - 12.4 = 5.4 mm and Δy = 23.1 - 15.2 = 7.9 mm respectively. To accurately obtain the spatial path change amount, it is necessary to further calculate the actual displacement vector length of the path, that is, the straight-line distance from the pick-up point to the placement point, and use the Euclidean distance formula for calculation. Substituting it in, we get:

[0068] ;

[0069] Among them are the actual point coordinate data obtained by sampling the placement trajectory in the acquisition system, and the units are all millimeters. To ensure unit unity, variables with different dimensional physical units such as structural interference factors and inertial correction amounts are not introduced in the formula to avoid result distortion caused by inconsistent units; for the 20 paths in the mounter, each path can obtain a set of in this way, and store these component results in a structured path displacement dataset in the order of path numbers to form a two-dimensional array:

[0070] ;

[0071] ;

[0072] Among them, for the path segments where Δx or Δy in the path exceeds 10 mm, they are marked as abnormal path jump segments for subsequent elimination; the path data all come from the trajectory recognition module of the mounting station, the sampling frequency is set to 20 Hz, 20 groups of coordinate data are collected per second, and the coordinate accuracy is two decimal places; the benefit of the formula is that by using the vector norm as the comprehensive path shape index, it can fuse the direction and length change amount of the path, and can reflect the overall deviation trend of the path better than a single Δx or Δy; if the value of a path exceeds the path jump tolerance threshold of 10 mm, it is regarded as an abnormal mounting path and needs to be recorded emphatically when classifying regions in the next step; this result indicates that the path displacement offset group value has been constructed as the directional basic index of the mounting path.

[0073] S112: According to the chip mounting area number corresponding to each path in the path displacement offset group, call the area number as the aggregation label, divide the path into the path segment set corresponding to the corresponding number, record the horizontal component, vertical component and vector norm of all paths in each group of path segments, establish a number index and path vector comparison table, and generate a region grouped path vector set;

[0074] After calling the path displacement offset group value, it is necessary to establish a path attribution relationship according to the target mounting area number of each path. For example, if path numbers P3, P7, and P12 all point to area number A1, then these three paths are divided into area path segment A1. The system has a total of 12 mounting area numbers, and each path has been bound to the target area in the task configuration and can be directly obtained through the path number - area number mapping table; taking area A1 as an example, its subordinate path segment contains paths P3, P7, and P12, and their respective Δx, Δy and vector information is written into the path set data table corresponding to this area number according to the original path number, and the following sample path segment structure is obtained: area number: A1, path segment numbers: P3, P7, P12, path offset information:

[0075] ;

[0076] ;

[0077] The attribution table of this path segment is extracted and established by the system according to the preset regional layout diagram in the task scheduling list. There is no need to recalculate the coordinates, and only the path segment mapping process is performed on the numbers. If the number of missing paths in the regional number exceeds 5, it is supplemented as an "empty segment". The path number data table is stored in the chip mounting station scheduling module, and the unified scheduling file format is CSV, and the sampling record format is (path number, Δx, Δy, L). After clustering and segmenting, a total of 12 groups of numbered path segments are generated. The data organizational structure is in the form of a dictionary, with the regional number as the key and the path offset vector sequence as the value. This result is the regional grouping path vector set, providing basic data for subsequent path overlap trend judgment.

[0078] Please refer to Figure 3 , and the specific steps for obtaining the risk feature set of path convergence and overlap are as follows:

[0079] S211: Based on the regional grouping path vector set, call the coordinates of the pickup point and the placement point of each path in the adjacent path segments to construct the two-dimensional displacement vector of the path segment, using the formula:

[0080] ;

[0081] Calculate the angle between the th placement path and the th placement path, corresponding to the path segment number, and establish a comparison list of the direction angles of the path segments;

[0082] Among them, respectively represent the coordinates of the pickup point of the path numbered in the x and y directions, respectively represent the coordinates of the placement point of the path numbered in the x and y directions, respectively represent the coordinates of the adjacent pickup point of the path numbered in the x and y directions, respectively represent the coordinates of the adjacent placement point of the path numbered in the x and y directions, is the modulus length of the displacement vector of the path numbered , is the modulus length of the displacement vector of the path numbered .

[0083] For all paths in each group of adjacent path segments, perform pairwise combination, and extract the pickup point coordinates and the placement point coordinates of each path in the path segment and the path segment , calculate their path displacement vectors as and , and call the path segment obtained in the previous step With path segments The vector modulus of and , the angle value is calculated by the ratio of the inner product and the modulus length product , if the path segment and They are P5 and P7, and their starting and ending coordinates are the pick-up points (12.0, 8.0), (15.5, 12.5), (13.2, 9.3), and (16.6, 13.7). Then calculate the path segment The weight is , , path segment The weight is , , the module lengths are

[0084] ;

[0085] ;

[0086] The vector inner product is: ;

[0087] Plug into the formula: .

[0088] According to the actual process specifications, if the angle threshold Set as , then this path pair will be identified as a converging path segment. This operation needs to be repeated for each group of path segment pairs until the angle determination operation of all path segment number pairings is completed. The benefit of the formula is that by measuring the difference in the displacement direction angle at the angular level, the spatial direction convergence between paths can be quantified, providing a basis for the subsequent convergence trend determination. This result shows that the angle value group between paths has been constructed.

[0089] S212: According to the number information of each path segment pair in the comparison list of the path segment direction angle, the corresponding mounting area number is obtained, the coordinate values ​​of the centers of the two areas are extracted to calculate the distance between the area centers, and the distance between the centers of the two areas is compared with the set path convergence critical distance value, and the corresponding angle value is compared with the set mounting angle threshold value. For the path segment combination that satisfies the angle value less than the angle threshold value and the area distance less than the critical distance, the corresponding path segment pair number is recorded to obtain the path convergence mark number set;

[0090] For each pair of numbers, call the center coordinate data of the corresponding mounting area to obtain the path segment With path segments The coordinates of the center of the region , and calculate the difference in the x direction and the y direction respectively , Use it as an input item for calculating the distance between path segments. If the central coordinates of area numbers A3 and A5 are (40.5, 62.0) and (45.0, 66.3), then , , area spacing:

[0091]

[0092] Compare this area distance value with the set approaching critical distance . Because , and at the same time combine the included angle value obtained from the calculation in the previous paragraph , which is less than the included angle threshold . It is judged that this pair of path segments meets the "double low" condition, that is, the included angle value is lower than the included angle threshold and the area distance is less than the distance threshold. Therefore, mark the path segment numbers P5 and P7 as a pair of approaching path segments, and write their numbers into the path approaching mark number set. Among all pairs of path segments, all combinations that meet this dual condition will retain their path numbers and be moved into the list in this set as the basis for subsequent risk extraction.

[0093] S213: Extract the pair numbers of path segments recorded in the path approaching mark number set, correspondingly extract the numbers, included angles and distances between the mounting areas of each pair of path segments, construct a directional feature combination item between the numbered path segments, and integrate it with the original path segment index table to generate a path convergence and overlap risk feature set;

[0094] Call all the number pairs in the path approaching mark number set, extract the number values, the included angle values between the paths and the corresponding mounting area spacing for each group of path segment numbers, and establish a structural item for subsequent identification matching. In the number pair of path segments P5 and P7, the included angle value , distance value . Summarize them as (number pair: P5 - P7, included angle value: 9.26°, area distance: 6.22 mm), then embed the above structural combination into the path segment pair mapping table, and perform index mapping matching with the original area grouping path segment table to form a trinity information structure of number - angle - distance. Build a complete feature item library by traversing the included angle values and spatial distances of each number pair, and finally establish a structured data set as the basis for identifying the path direction convergence risk in the entire path planning process. The final structured information combination obtained is the path convergence and overlap risk feature set.

[0095] Please refer to Figure 4 . The specific steps for obtaining the path segment structure inertia factor set are as follows:

[0096] S311: According to the numbers of each path segment in the path convergence and overlap risk feature set, call the return time, end angle fall value, and response delay time under the corresponding device number through the placement record data table, establish an index relationship between the path segment number and the three structural action parameters, and generate a placement device action parameter group;

[0097] According to the path convergence and overlap risk feature set, mark the placement device number corresponding to the path segment. It is necessary to retrieve the unique placement device number bound to each path segment record in the placement execution database. This number usually corresponds to a placement device with an independent mechanical control arm in the device. After the placement action is completed, an action feedback data record will be automatically generated. This record contains the time item T experienced from the completion of placement to the return starting point, the placement head angle drop value A, and the response delay D from the end of placement to the sensor sensing the feedback signal. The system calls the device numbers S4, S5, and S6 bound to the path segments P12, P18, and P22 respectively. Among them, the system record shows that the return time of structure S4 after a placement operation is 0.34 seconds, the end angle fall value is 0.82 degrees, and the response delay is 0.17 seconds. For structure S5, it is 0.29 seconds, 0.76 degrees, and 0.13 seconds. For structure S6, it is 0.41 seconds, 0.91 degrees, and 0.20 seconds. All parameters are obtained by the built-in encoders and gyro sensors of the placement device, and the units are calibrated. The obtained data is imported into the structural action data table with the device number as the index field, summarized in the order of the path segment number, and each row of data corresponds to the three values of the structure bound to a path segment, recorded in the intermediate data set as the input for the next step, and finally a placement device action parameter group is obtained.

[0098] S312: Based on all the structural action parameters in the placement device action parameter group, including the return time, end angle fall, and response delay time of each structure, use the formula:

[0099] ;

[0100] The amplitude response inertia factor of the device numbered , organize the device number and the corresponding value into a device number-response factor mapping table, and generate a set of structural amplitude response inertia factor values; where,

[0101] represents the return time, in seconds, represents the minimum and maximum values of the return time, represents the angle fall, in degrees, represents the minimum and maximum values of the angle fall, represents the response delay time, in seconds, represents the minimum and maximum values of the response delay time, The minimum and maximum values of the response delay time. The return time refers to the time required for the mounting structure (such as the mounting head, robotic arm, etc.) to return from the mounting end point to the initial standby position after the mounting action is completed, and the unit is seconds. This reflects the reset efficiency and response speed of the mounting device after completing the action. The end angle drop refers to the value of the angle change caused by inertia or structural response within a short period of time after the end of the mounting structure (such as the end effector of the robotic arm) after the mounting is completed, and the unit is degrees (°). The larger this value, the more obvious the aftershock or jitter of the structure after the mounting action ends. The response delay time refers to the delay time between the completion of the physical action and the detection of the completion state by the sensor after the mounting action ends, and the unit is seconds. It measures the timeliness of the system's perception and feedback link.

[0102] Perform normalization calculations on the return time, end angle drop value, and response delay time corresponding to each structure respectively. The normalization range is set to the interval between the minimum and maximum values in the current structure group. Let the three groups of values for structures S4, S5, and S6 be (0.34 s, 0.82°, 0.17 s), (0.29 s, 0.76°, 0.13 s), and (0.41 s, 0.91°, 0.20 s) respectively. Perform the maximum-minimum normalization operation independently for each parameter, using the formula:

[0103] ;

[0104] Perform calculations for structure S4:

[0105] ;

[0106] ;

[0107] ;

[0108] Perform calculations for structure S5:

[0109] ;

[0110] ;

[0111] Perform calculations for structure S6:

[0112] ;

[0113] ;

[0114] This normalization operation ensures the comparability of parameters with different units. A mapping comparison table is formed by all the device numbers and their corresponding response factors, and the result is output as a set of structure amplitude response inertia factor values.

[0115] By simultaneously introducing three different dimensional indicators of structural response and using normalization to unify them to an equal-weight scale, misjudgment caused by different parameter units is avoided, thus forming a response inertia indicator that can be used for the pre-evaluation of dynamic adjustment of path segments.

[0116] The calculation results show that : medium response amplitude, with a certain inertia, : the fastest response, the smallest inertia, : the slowest response, the largest inertia, and the inertia of different structural responses has obvious distinguishability. Based on this, the control priority of path segments can be established and the next stage of regulation can be entered.

[0117] S313: Call the binding information of the device number and path segment number in the structural amplitude response inertia factor value set, write the inertia factor value corresponding to each structure into the data field of the bound path segment, and generate a path segment structure inertia factor set;

[0118] Call each record in the structural amplitude response inertia factor value set. According to the known binding relationship between the device number and the path segment number, write the inertia factor corresponding to each structure into its associated path segment attribute field. The record field format is <path segment number, inertia factor value>. For example, if path segment P12 corresponds to structure S4 and its inertia factor value is 1.39, then the attribute is updated to P12: {inertia: 1.39}, and P18 and P22 also correspond to 0.00 and 3.00 in turn. This operation is synchronously completed in the system path segment structure attribute file, and a structured record set containing all path segment numbers and corresponding inertia values is generated. The record format supports the subsequent interval screening and numerical judgment mechanism calls, and finally a path segment structure inertia factor set is obtained.

[0119] Please refer to Figure 5 , and the specific steps for obtaining the path segment amplitude compression control parameter set are as follows:

[0120] S411: Call the amplitude response inertia factor of each path segment in the path segment structure inertia factor set, obtain the amplitude response inertia threshold as the judgment benchmark, compare and judge whether the inertia factor of each path segment exceeds the amplitude response inertia threshold one by one, record the numbers of the path segments higher than the amplitude response inertia threshold, and perform compression adjustment to obtain a path segment limit control parameter comparison list;

[0121] Call the amplitude response inertia factors of all path segments in the call path segment structure inertia factor set, and compare them one by one with the amplitude response inertia threshold. First, read the structure inertia factor set from the system database. This set is indexed by the path segment number and stores the amplitude response inertia factor values correspondingly. Subsequently, retrieve the amplitude response inertia threshold of the current device from the mounting device operation control parameter set, set it to 1.50. The system traverses all path segment records and judges the inertia factor of each path segment. If its value is greater than the stability control threshold, it is considered that there is an inertia fluctuation trend in this path segment during the mounting process, and action compression control needs to be implemented. For example, the inertia factor of path segment P4 is 1.62, and that of path segment P7 is 1.39. Only P4 exceeds the threshold and needs to enter the compression stage. Based on the device parameter settings, the system sets the maximum single-step movement distance to 80% of the default path maximum value and compresses the maximum acceleration to 75% of the default maximum value. Assuming the default maximum single-step movement distance is 6.0 mm and the default maximum acceleration is 2.0 m / s², the single-step displacement of path segment P4 after compression is 4.8 mm, and the acceleration is 1.5 m / s². After binding this compression parameter group to path segment P4, it is recorded in the path segment limit control parameter comparison table. Continue to judge the remaining path segments. After screening out all path segments that meet the conditions, their numbers and compression parameters are jointly formed into a path segment - parameter mapping relationship, which is used as the path segment limit control parameter comparison table. The parts of the path segments that do not exceed the stability control threshold are not processed and are not written into this table. This table will be used as the basis for updating the path segment dynamic control parameters, and finally, the path segment limit control parameter comparison table is obtained.

[0122] S412: According to all the path segment numbers and compression control parameter values in the path segment limit control parameter comparison list, write the maximum single-step movement distance and maximum acceleration corresponding to each path segment into the path segment control record field to obtain the path segment amplitude compression control parameter set;

[0123] Write the restricted dynamic control parameters into the path segment control record. The system calls all the path segment numbers in the path segment limit control parameter comparison table. For the two fields of the maximum single-step movement distance and maximum acceleration corresponding to each record, write this control parameter pair into the path segment control data record area. The record area uses the path segment number as the primary key field. During the writing process, the system automatically judges whether there are old parameters. If there are, they will be overwritten and updated. If not, an addition operation will be performed. All record items are marked as the "compressed" state. After the writing is completed, the system performs a one-time verification on the path segment control record. The verification content includes field integrity, compression parameter legality, and conflict checking with the upper-level scheduling data. After confirming that there is no error, a control parameter summary output is generated. This output result is used as the input source for subsequent path segment dynamic programming and device action control, and is used for real-time action amplitude limit loading in the control layer system. Finally, the path segment amplitude compression control parameter set is obtained.

[0124] Please refer to Figure 6 , and the steps for obtaining the set of executable paths for chip mounting are specifically as follows:

[0125] S511: Based on the mounting time nodes and path segment spacings of each path segment in the path segment amplitude compression control parameter set, call adjacent path segments with consecutive path segment numbers, extract the mounting completion time and current position coordinates respectively, and calculate the mounting time difference and spatial spacing between the path segments;

[0126] First, extract the mounting time and coordinate information of path segments with path segment numbers P1 to P4 from the control parameter set. Among them, the mounting completion time of P1 is 12 seconds, and the mounting position coordinate is (12, 8). The starting mounting time of P2 is 13 seconds, and the mounting position coordinate is (16, 11). Calculate the mounting time difference between P1 and P2 as .

[0127] The spatial spacing is:

[0128] ;

[0129] The mounting completion time of P2 is 17 seconds, and the starting time of P3 is 18 seconds. The coordinates are (16, 11) and (20, 14) respectively. Calculate the time difference as .

[0130] The spatial spacing is:

[0131] ;

[0132] The mounting times of P3 and P4 are 20 seconds (completed) and 22 seconds (starting) respectively, and the coordinates are (20, 14) and (25, 18). The time difference is .

[0133] The spatial spacing is:

[0134] ;

[0135] Obtain the path segment time difference and path segment spatial spacing.

[0136] S512: Perform a joint judgment operation on the mounting time difference and spatial spacing between the path segments. If the conditions that the mounting time difference is less than the timing interference time threshold and the spatial spacing is less than the spatial interference critical distance are both satisfied, mark the corresponding path segment pair as an interference risk path and perform an elimination operation. Obtain the uneliminated path segment numbers and the corresponding control parameters, and generate the set of executable paths for chip mounting;

[0137] Based on the calculation results of the path segment time difference and the spatial spacing, it is judged whether there is a combination of path segment pairs where the mounting time difference is lower than the timing interference time threshold and the spatial spacing is less than the spatial interference critical distance. The timing interference time threshold is set to 2 seconds, and the spatial interference critical distance is set to 6 millimeters. The calculation results in the previous paragraph are judged in sequence. The time difference between path segment pair P1 and P2 is 1 second, which is less than 2 seconds, and the spatial spacing is 5 millimeters, which is less than 6 millimeters, meeting the interference conditions. The time difference between path segment pair P2 and P3 is 1 second, and the spatial spacing is 5 millimeters, also meeting the interference conditions. The time difference between path segment pair P3 and P4 is 2 seconds, equal to the time threshold, but the spatial spacing is 6.4 millimeters, greater than 6 millimeters, so it does not constitute interference. After removing path segments P1, P2, and P3, path segment P4 is retained, and its number and control parameters are obtained to generate a set of executable paths for chip mounting.

[0138] A chip placement path planning system, which is used to execute the above chip placement path planning method. The system includes:

[0139] The path vector extraction module obtains the coordinates of each pick-up point and the corresponding placement point in the placement path, calculates the path displacement vector, and generates a set of regional grouping path vectors;

[0140] Based on the set of regional grouping path vectors, the path convergence risk identification module calls the start and end coordinates of each path vector in adjacent numbered path groups, calculates the angle between two specified vectors to screen path segment combinations, and generates a set of path convergence overlap risk characteristics;

[0141] According to the set of path convergence overlap risk characteristics, the structural response inertia calculation module marks the placement equipment numbers corresponding to the path segments, obtains the return time, the end angle fall value, and the response delay time of each equipment after placement, calculates the amplitude response inertia factor of the corresponding structure, and generates a set of path segment structure inertia factors;

[0142] The dynamic amplitude compression control module calls the amplitude response inertia factors of all path segments in the set of path segment structure inertia factors, compares them one by one with the amplitude response inertia threshold, records the corresponding path segment numbers, and sets the maximum single-step movement distance and the maximum acceleration as the amplitude compression values to generate a set of path segment amplitude compression control parameters;

[0143] The interference path removal and path set generation module removes the interference risk paths in the set of path segment amplitude compression control parameters and generates a set of executable paths for chip mounting.

[0144] The above are only the preferred embodiments of the present invention, and do not limit the present invention in other forms. Any person skilled in the art may use the technical content disclosed above to make changes or modifications into equivalent embodiments with equivalent changes and apply them to other fields. However, as long as it does not depart from the technical solution content of the present invention, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present invention still fall within the protection scope of the technical solution of the present invention.

Claims

1. A chip placement path planning method, characterized in that: The following steps are involved: S1: Obtain the coordinates of each pick-up point and the corresponding placement point in the placement path, calculate the path displacement vector, and generate a set of regional grouping path vectors; S2: Based on the set of regional grouped path vectors, the start and end coordinates of each path vector in the adjacent numbered path group are called, the angle between two specified vectors is calculated to screen the path segment combination, and a path convergence overlap risk feature set is generated; S3: According to the path convergence overlap risk feature set, mark the placement device number corresponding to the path segment, obtain the return time, terminal angle fall value and response delay time of each device after placement, calculate the amplitude response inertia factor of the corresponding structure, and generate a path segment structure inertia factor set; The steps for obtaining the path segment structure inertia factor set are specifically as follows: S311: according to the number of each path segment in the path convergence overlap risk feature set, the return time, the end angle fall value and the response delay time under the corresponding equipment number are called through the placement record data table, an index relationship between the path segment number and the three structural action parameters is established, and a placement equipment action parameter group is generated; S312: Based on all the structural action parameters in the placement equipment action parameter group, including the return time, end angle return and response delay time of each structure, the formula is used: ； The device number is The amplitude response inertia factor , the equipment numbers and corresponding values ​​are sorted into an equipment number-response factor mapping table to generate a set of structural amplitude response inertia factor values; in, Indicates the return time in seconds. Indicates the minimum and maximum return time. Indicates the angle of fall, in degrees. Indicates the minimum and maximum values ​​of the angle drop. Indicates the response delay time in seconds. is the minimum and maximum value of the response delay time; S313: calling the binding information of the device number and the path segment number in the structure amplitude response inertia factor value set, writing the inertia factor value corresponding to each structure into the data field of the bound path segment, and generating a path segment structure inertia factor set; S4: calling the amplitude response inertia factors of all path segments in the path segment structure inertia factor set, comparing them one by one with the amplitude response inertia threshold, recording the corresponding path segment number, setting the maximum single-step moving distance and the maximum acceleration as the amplitude compression value, and generating a path segment amplitude compression control parameter set; S5: Eliminate the interference risk paths in the path segment amplitude compression control parameter set to generate a chip mounting executable path set.

2. The chip placement path planning method according to claim 1, characterized in that: The area grouping path vector set includes a path segment number label, a path displacement vector, and a mounting area index number; the path convergence overlap risk feature set includes a path segment combination number, a path vector angle, and a mounting area center distance; the path segment structure inertia factor set includes a path segment number, an amplitude response inertia factor, and a mounting equipment number index; the path segment amplitude compression control parameter set includes a path segment number, a single-step moving distance limit, and an acceleration limit; the chip mounting executable path set includes a path segment number list, a path control parameter, and an interference path removal identifier.

3. The chip placement path planning method according to claim 1, characterized in that: The steps of obtaining the set of area grouping path vectors are specifically as follows: S111: Obtain the coordinate values ​​of all the pick-up points and placement points in the placement path, and construct a coordinate pair based on the pick-up point and the corresponding placement point of each placement action, using the formula: ； The calculated path number is The displacement vector modulus , the horizontal components, vertical components and modulus lengths of all paths are combined into a vector feature set to generate a path displacement offset group; in, Respectively represent the path numbers The coordinates of the pick-up point in the x and y directions, Respectively represent the path numbers The coordinates of the mounting point in the x and y directions; S112: According to the chip mounting area number corresponding to each path in the path displacement offset group, the area number is called as an aggregation label, the path is divided into a set of path segments with corresponding numbers, the horizontal component, the vertical component and the vector modulus of all paths in each group of path segments are recorded, a number index and path vector comparison table is established, and a set of area grouped path vectors is generated.

4. The chip placement path planning method according to claim 3, characterized in that: The steps for obtaining the path convergence overlap risk feature set are specifically as follows: S211: Based on the set of area grouping path vectors, the coordinates of the pick-up points and the placement points of each path in the adjacent path segments are called to construct a two-dimensional displacement vector of the path segment using the formula: ； Calculate the The placement path and Angle of the mounting paths , corresponding to the path segment number, establish a comparison list of path segment direction angles; in, Respectively represent the path numbers The coordinates of the pick-up point in the x and y directions, Respectively represent the path numbers The coordinates of the mounting point in the x and y directions, Respectively represent the path numbers The coordinates of the adjacent pick points in the x and y directions, Respectively represent the path numbers The coordinates of the adjacent mounting points in the x and y directions, The path number is The displacement vector modulus is The path number is The displacement vector modulus of S212: According to the number information of each path segment pair in the comparison list of the path segment direction angle, the corresponding mounting area number is obtained, the coordinate values ​​of the centers of the two areas are extracted to calculate the distance between the area centers, and the distance between the centers of the two areas is compared with the set path convergence critical distance value, and the corresponding angle value is compared with the set mounting angle threshold value. For the path segment combination that satisfies the angle value less than the angle threshold value and the area distance less than the critical distance, the corresponding path segment pair number is recorded to obtain the path convergence mark number set; S213: Extract the path segment pair numbers recorded in the path convergence mark number set, correspondingly extract the number, angle and distance between the mounting areas of each pair of path segments, construct directional feature combination items between the numbered path segments, integrate them with the original path segment index table, and generate a path convergence overlap risk feature set.

5. The chip placement path planning method according to claim 4, characterized in that: The steps for obtaining the path segment amplitude compression control parameter set are specifically as follows: S411: calling the amplitude response inertia factor of each path segment in the path segment structure inertia factor set, obtaining the amplitude response inertia threshold as a determination reference, comparing one by one to determine whether the inertia factor of each path segment exceeds the amplitude response inertia threshold, recording and numbering the path segments that are higher than the amplitude response inertia threshold, and performing compression adjustment to obtain a path segment restriction control parameter comparison list; S412: According to all the path segment numbers and compression control parameter values ​​in the path segment restriction control parameter comparison list, the maximum single-step moving distance and maximum acceleration corresponding to each path segment are written into the path segment control record field to obtain a path segment amplitude compression control parameter set.

6. The chip placement path planning method according to claim 5, characterized in that: The steps of obtaining the chip mounting executable path set are specifically as follows: S511: Based on the placement time node and path segment spacing of each path segment in the path segment amplitude compression control parameter set, adjacent path segments with continuous path segment numbers are called to extract the placement completion time and current position coordinates respectively, and the placement time difference and spatial spacing between the path segments are calculated; S512: Perform a joint judgment operation on the mounting time difference and the spatial spacing between the path segments. If the mounting time difference is less than the timing interference time threshold and the spatial spacing is less than the spatial interference critical distance, the corresponding path segment pair is marked as an interference risk path and a removal operation is performed. The path segment numbers that are not removed and the corresponding control parameters are obtained to generate a chip mounting executable path set.

7. Chip patch path planning system, characterized in that: According to the chip patch path planning method according to any one of claims 1 to 6, the system comprises: The path vector extraction module obtains the coordinates of each pick-up point and the corresponding placement point in the placement path, calculates the path displacement vector, and generates a set of regional grouping path vectors; The path convergence risk identification module calls the start and end coordinates of each path vector in the adjacent numbered path group based on the regional grouping path vector set, calculates the angle between two specified vectors to screen the path segment combination, and generates a path convergence overlap risk feature set; The structural response inertia calculation module marks the path segment corresponding to the placement device number according to the path convergence overlap risk feature set, obtains the return time, terminal angle fall value and response delay time of each device after placement is completed, calculates the amplitude response inertia factor of the corresponding structure, and generates a path segment structure inertia factor set; The dynamic amplitude compression control module calls the amplitude response inertia factors of all path segments in the path segment structure inertia factor set, compares them one by one with the amplitude response inertia threshold, records the corresponding path segment number, sets the maximum single-step moving distance and the maximum acceleration as the amplitude compression value, and generates a path segment amplitude compression control parameter set; The interference path elimination and path set generation module eliminates the interference risk paths in the path segment amplitude compression control parameter set and generates a chip mounting executable path set.

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