Data storage method and device of flash memory device, equipment and medium
By converting and processing the user raw data of TLC NAND flash memory devices and determining the data storage order, the stability and reliability problems of TLC NAND flash memory devices are solved when storing data, and the effect of improving data reliability and stability is achieved.
Patent Information
- Application Number
- CN202510437419.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-09
- Publication Date
- 2025-05-06
- Estimated Expiration
- 2045-04-09
AI Technical Summary
TLC NAND flash memory devices have stability and reliability problems when storing data, especially in applications such as industrial and automotive, where data stability and reliability are high.
A data storage method is proposed, by performing data conversion processing on the acquired user original data, generating the first user page data and the second user page data, and determining the target storage page of the temporary page data from three different types of candidate storage pages, determining the data processing order based on the target storage page, and finally performing data processing and data storage according to the data processing order to improve the reliability and stability of the data.
By sacrificing one-third of the storage capacity of TLC NAND, the effective state of the storage unit is reduced from 8 to 4, reducing the number of errors during reading and improving the reliability and stability of the product.
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Figure CN119937938A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of flash memory storage technology, and in particular to a data storage method for a flash memory device and a device, equipment, and medium thereof. Background Art
[0002] Triple-Level Cell (TLC) NAND flash memory devices have achieved a good balance between capacity, performance, reliability and cost, and are the mainstream storage type on the market. Nand Flash is a non-volatile random access storage medium that uses floating gate transistors as storage units to store data. A TLC storage unit can store 3 bits of data, so the number of electrons in its floating gate transistor has 8 states, the interval between each state is reduced, and read-write interference and data retention will cause accidental injection or loss of electrons, the fault tolerance of flash memory is reduced, and the stability and reliability of stored data are deteriorated. In fields such as industry and automobile applications, the requirements for storage capacity are relatively loose, but the requirements for data stability and reliability are very strict. Therefore, a technical solution is needed to solve the stability and reliability problems of data storage in flash memory devices. Summary of the invention
[0003] The present application aims to solve at least one of the technical problems existing in the prior art. To this end, the present application proposes a data storage method of a flash memory device and its device, equipment, and medium, which can improve the reliability and stability of stored data in a TLC NAND type flash memory device.
[0004] In a first aspect, an embodiment of the present application provides a data storage method for a flash memory device, which is applied to a data storage device of the flash memory device, wherein the data storage device of the flash memory device is electrically connected to the flash memory device, the type of the flash memory device is TLC NAND, and the flash memory device includes three different types of candidate storage pages; The method comprises: Performing data conversion processing on the acquired original data of the first user to obtain first user page data, and performing data conversion processing on the acquired original data of the second user to obtain second user page data; After determining the target storage page of the temporary page data from three different types of candidate storage pages, determining the data processing order according to the target storage page; wherein the temporary page data is obtained by performing a logical operation on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing the first user page data, the second user page data, and the temporary page data; Data processing and data storage are performed according to the data processing sequence, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages.
[0005] In a second aspect, an embodiment of the present application provides a data storage device of a flash memory device, wherein the data storage device is electrically connected to the flash memory device, and the type of the flash memory device is TLC NAND; the flash memory device includes three different types of candidate storage pages; the data storage device of the flash memory device is used to execute the data storage method of the flash memory device as described in any one of the embodiments of the first aspect.
[0006] In a third aspect, an embodiment of the present application provides an electronic device, comprising a data storage device of the flash memory device as described in the embodiment of the second aspect.
[0007] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are used to implement the data storage method of the flash memory device as described in the first aspect when executed by a processor.
[0008] The embodiment of the present application includes: in the process of storing data in a flash memory device using a data storage device, first, performing data conversion processing on the acquired first user original data to obtain first user page data, and performing data conversion processing on the acquired second user original data to obtain second user page data; then, after determining the target storage page of the temporary page data from three different types of candidate storage pages, determining the data processing order according to the target storage page; wherein the temporary page data is obtained by performing logical operations on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing the first user page data, the second user page data, and the temporary page data; finally, data processing and data storage are performed according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages. A set of temporary page data is generated based on the first user page data and the second user page data written into the TLC NAND, and a total of three sets of data to be stored (i.e., the first user page data, the second user page data, and the temporary page data) are obtained, sacrificing one-third of the storage capacity of the TLC NAND, reducing the valid states of the storage unit from 8 to 4, and when reading the data stored in the TLC NAND, the read threshold voltages of the three page types are offset, which can make the read threshold voltage more easily in the middle of the two valid states, which can greatly reduce the number of errors and improve the reliability and stability of the product. That is to say, the embodiment of the present application can improve the reliability and stability of the storage data of the TLC NAND type flash memory device. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 This is a schematic diagram of a specific structure of a data storage device of a flash memory device provided by an embodiment of the present application; Figure 2 is a schematic diagram of a TLC NAND threshold voltage distribution provided by an embodiment of the present application; Figure 3 It is a schematic diagram of the distribution of 0 and 1 of three pages in TCL NAND after XNOR operation provided by an embodiment of the present application; Figure 4 is a schematic diagram of TLC NAND state distribution after XOR operation provided by an embodiment of the present application; Figure 5 It is a flowchart of a data storage method of a flash memory device provided by an embodiment of the present application; Figure 6This is a schematic diagram of a data conversion process provided by an embodiment of the present application; Figure 7 It is a schematic diagram of a data storage process when the target storage page of temporary page data is the MSB Page provided by an embodiment of the present application; Figure 8 This is a schematic diagram of a data storage process when the target storage page of temporary page data is a CSB Page, provided by an embodiment of the present application; Fig. 9 This is a schematic diagram of a data storage process when the target storage page of temporary page data is an LSB Page, provided by an embodiment of the present application. DETAILED DESCRIPTION
[0010] In order to make the objectives, technical solutions and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments.
[0011] It should be understood that in the description of the present application, the orientation descriptions, such as up, down, front, back, left, right, etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.
[0012] It should be noted that although a logical order is shown in the flowchart in the description of the present application, in some cases, the steps shown or described may be performed in an order different from that in the flowchart. In the description of the present application, a number of means one or more, and a plurality of means two or more. The description of "first" and "second" is only used for the purpose of distinguishing technical features, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.
[0013] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.
[0014] First, some terms used in this application are explained: Error Checking and Correcting (ECC Encode): is an algorithm used for error detection and correction.
[0015] Random Seed: A random number that takes a random number as an object and a true random number (seed) as an initial condition.
[0016] The present application provides a data storage method of a flash memory device, a data storage device of a flash memory device, an electronic device and a computer-readable storage medium, the method comprising: performing data conversion on the first user's original data to obtain the first user's page data, performing data conversion on the second user's original data to obtain the second user's page data; determining the target storage page of the temporary page data from three different types of candidate storage pages, and determining the data processing order according to the target storage page; the temporary page data is obtained by performing logical operations on the first user's page data and the second user's page data; performing data processing and data storage according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user's page data and the second user's page data are respectively stored in the remaining two candidate storage pages. The reliability and stability of TLC NAND storage data can be improved. The reliability and stability of storage data of TLC NAND type flash memory devices can be improved.
[0017] The embodiments of the present application are further described below in conjunction with the accompanying drawings.
[0018] like Figure 1 As shown, the data storage device 100 is electrically connected to a flash memory device, the type of the flash memory device is TLC NAND, and the flash memory device includes three different types of candidate storage pages; specifically, the data storage device 100 includes: a data processing unit 110, a first cache unit 120, a second cache unit 130, and a logic operation unit 140; the output end of the data processing unit 110 is electrically connected to the output end of the first cache unit 120, the second cache unit 130, and the flash memory device respectively; the output end of the first cache unit 120 and the output end of the second cache unit 130 are both electrically connected to the input end of the logic operation unit 140; the output end of the logic operation unit 140 is electrically connected to the input end of the flash memory device.
[0019] The data processing unit 110 is used to: obtain user original data and convert the user original data into user page data; the first cache unit 120 is used to store the first user page data, and the second cache unit 130 is used to store the second user page data; the logic operation unit 140 is used to perform logic operations on the first user page data and the second user page data to obtain temporary page data.
[0020] The data storage device 100 of the flash memory device is used to: perform data conversion processing on the acquired first user original data to obtain the first user page data, and perform data conversion processing on the acquired second user original data to obtain the second user page data; after determining the target storage page of the temporary page data from three different types of candidate storage pages, determine the data processing order according to the target storage page; wherein the temporary page data is obtained by performing logical operations on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing between the first user page data, the second user page data, and the temporary page data; perform data processing and data storage according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages. The data storage device 100 of the flash memory device of the embodiment of the present application can execute the data storage method of the flash memory device provided in the embodiment of the present application, and can improve the reliability and stability of the storage data of the TLC NAND type flash memory device.
[0021] Further explanation of the embodiment of the present application provides a flash memory device. Each storage unit of a flash memory device of the type TLC NAND can store 3 bits of data, namely LSB (Least Significant Bit), CSB (Central Significant Bit), and MSB (Most Significant Bit). According to the type of bit data stored, the flash memory device has three page types: LSB Page (least significant bit page), CSB Page (central significant bit page), and MSB Page (most significant bit page).
[0022] LSB (Least Significant Bit): Least significant bit, which is the bit with the smallest programming delay in the same storage unit. For 3-bit flash memory devices, because the least significant bit has the lowest programming threshold, the LSB is usually the first bit to be written.
[0023] CSB (Central Significant Bit): Central Significant Bit, located between LSB and MSB, with programming delay between the two. In some programming modes, CSB may be the bit programmed immediately after LSB.
[0024] MSB (Most Significant Bit): The most significant bit has the highest programming threshold and the longest programming delay in the same memory cell. Therefore, the most significant bit is the last bit to be programmed.
[0025] like Figure 2 As shown in the figure, it is a typical TLC NAND Vth (Threshold Voltage) distribution diagram: for LSB Page, the value between the judgment voltage A and the judgment voltage E is 0, and the value outside the judgment voltage A and the judgment voltage E is 1; for CSB Page, with the judgment voltage D as the dividing line, the left side of the judgment voltage B is 1, the right side of the judgment voltage B is 0, the left side of the judgment voltage E is 1, and the right side of the judgment voltage E is 0. For MSB Page, the value between the judgment voltage C and the judgment voltage G is 0, and the value outside the judgment voltage C and the judgment voltage G is 1.
[0026] If the data after CSB and MSB are written into LSB Page, CSB Page and MSB Page still write the data after CSB and MSB normally. The distribution of 0 and 1 of the three Pages is as follows: Figure 3 As shown. It can be found that ER and A are both 111, B and G are both 001, C and F are both 100, and D and E are both 010. The cells originally in state A are forced to be classified into state ER, the cells originally in state G are classified into state B, the cells originally in state C are classified into state F, and the cells originally in state E are classified into state D. Therefore, there are only 4 states of cells in the end, as shown below Figure 4 The four peaks Er, B, D, and F shown are similar to the Vth distribution of MLC NAND, so this TLC NAND is called pMLC (Pseudo-MLC) NAND. Similarly, whether the XOR data is written to the LSB Page, CSB Page, or MSB Page, and whether it is an XOR operation or an XOR operation, the TLC to pMLC method has the same effect. It can be seen that pMLC improves the reliability of data storage at the cost of sacrificing 1 / 3 of the storage capacity, and can be applied to industrial or automotive products that have loose requirements on storage capacity but very strict requirements on reliability.
[0027] Those skilled in the art will appreciate that the system structure shown in the figure does not constitute a limitation on the embodiments of the present application, and may include more or fewer components than shown in the figure, or a combination of certain components, or a different arrangement of components.
[0028] The system embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, that is, they may be located in one place or distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.
[0029] Those skilled in the art will appreciate that the system architecture and application scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Those skilled in the art will appreciate that with the evolution of the system architecture and the emergence of new application scenarios, the technical solutions provided in the embodiments of the present application are equally applicable to similar technical problems.
[0030] Based on the above system structure, various embodiments of the data storage method of the flash memory device of the present application are proposed below.
[0031] like Figure 5 As shown, the data storage method of the flash memory device can be applied to Figure 1 In the data storage device of the flash memory device shown, the data storage device of the flash memory device is electrically connected to the flash memory device, the type of the flash memory device is TLC NAND, and the flash memory device includes three different types of candidate storage pages; the data storage method of the flash memory device may include but is not limited to steps S110 to S130.
[0032] Step S110: performing data conversion processing on the acquired original data of the first user to obtain first user page data, and performing data conversion processing on the acquired original data of the second user to obtain second user page data.
[0033] Step S120: After determining the target storage page of the temporary page data from three different types of candidate storage pages, determine the data processing order according to the target storage page; wherein the temporary page data is obtained by performing a logical operation on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing the first user page data, the second user page data, and the temporary page data.
[0034] Step S130: performing data processing and data storage according to the data processing sequence, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages.
[0035] Through step S110 to step S130, in the process of using the data storage device to store data in the flash memory device, first, the acquired first user original data is subjected to data conversion processing to obtain the first user page data, and the acquired second user original data is subjected to data conversion processing to obtain the second user page data; then, after determining the target storage page of the temporary page data from the three different types of candidate storage pages, the data processing order is determined according to the target storage page; wherein the temporary page data is obtained by performing a logical operation on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing the first user page data, the second user page data, and the temporary page data; finally, data processing and data storage are performed according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages. A set of temporary page data is generated according to the first user page data and the second user page data written into the TLC NAND, and a total of three sets of data to be stored (i.e., the first user page data, the second user page data, and the temporary page data) are obtained, sacrificing one-third of the storage capacity of the TLC NAND, reducing the valid states of the storage unit from 8 to 4, and when reading the data stored in the TLC NAND, the read threshold voltages of the three page types are offset, which can make the read threshold voltage more easily in the middle of the two valid states, which can greatly reduce the number of errors and improve the reliability and stability of the product. Therefore, the embodiment of the present application can improve the reliability and stability of the storage data of the TLC NAND type flash memory device.
[0036] According to some embodiments of the present application, step S110 is further described, wherein the data conversion process includes but is not limited to steps S210 to S230.
[0037] Step S210: Divide the user original data to be processed into N data blocks of fixed length; the user original data to be processed is: the first user original data or the second user original data.
[0038] Step S220: performing codeword conversion processing on the N data blocks respectively to obtain N target codewords; wherein the codeword conversion processing includes: randomization processing, error checking and correction coding processing, and data supplementation processing performed in sequence.
[0039] Step S230: Combine the N target code words to obtain a target user Page data.
[0040] Through step S210, Figure 6 As shown, the user original data D to be processed is divided into N data blocks (BLK_N) of fixed length, laying a data foundation for subsequent codeword conversion processing and codeword combination.
[0041] It can be understood that when the user original data is the first user original data, after the data conversion processing shown in step S210 and step S230, the corresponding target user Page data obtained is the first user Page data; when the user original data is the second user original data, after the data conversion processing shown in step S210 and step S230, the corresponding target user Page data obtained is the second user Page data.
[0042] According to some embodiments of the present application, step S220 is further described, wherein the codeword conversion process includes but is not limited to steps S221 to S224.
[0043] Step S221: Generate a string of first random data of the same length as a data block to be processed, perform XOR processing on the data block to be processed and the first random data, and obtain a randomized data block.
[0044] Step S222: performing error checking and correction coding processing on the randomized data block to obtain an ECC check code.
[0045] Step S223: Add the ECC check code after the randomized data block to obtain an initial code word.
[0046] Step S224: when the length of the initial codeword is smaller than the page size of the flash memory device, the second random data is used to supplement the initial codeword to obtain a target codeword; the length of the target codeword is equal to the page size.
[0047] Specifically, random processing (Random) is implemented through step S221. The random processing is specifically: using a Random Seed to generate a string of data blocks to be processed (such as Figure 6 The data block to be processed is XORed with the first random data to obtain a randomized data block (ie, Figure 6 As shown in: BLK_1 (Random)); In this way, the distribution of 0s and 1s in the data written to the TLC NAND can be more balanced.
[0048] Specifically, the error checking and correction coding process is implemented through step S222, and a set of ECC check codes (i.e., Figure 6As shown in the figure: ECC Parity Data), the ECC check code is attached to the randomized data block. The ECC check code is used to detect and correct data errors caused during the data transmission process and storage, restore the written user data, and improve the reliability of the stored information.
[0049] Specifically, step S223 implements data supplementation processing. The second random data refers to Dummy data. When the length of an initial code word (Code Word, CW) is less than the NAND page size, the second random data is used to fill the page data. After each divided data block BLK_1, BLK_2, ..., BLK_N is processed by steps S221 to S224, the following can be obtained: Figure 6 The target code words CW_1, CW_2, ..., and CW_N are shown. The target code words CW_1, CW_2, ..., and CW_N are combined to obtain a target user Page data P.
[0050] In some embodiments, TLC NAND usually needs to be programmed page by page in the order of LSB Page, CSB Page, and MSB Page, and the order of processing the pages is fixed. Therefore, when the types of pages for the generated temporary page data storage are different, the data processing order between the first user page data, the second user page data, and the temporary page data is also different, and the data storage process is also different.
[0051] According to some embodiments of the present application, step S120 is further described, wherein the data processing order is determined according to the target storage page, including but not limited to: when the target storage page is: the most significant bit page, the data processing order is determined to be: first user page data, second user page data, temporary page data; when the target storage page is: the central significant bit page, the data processing order is determined to be: first user page data, temporary page data, second user page data; when the target storage page is: the least significant bit page, the data processing order is determined to be: temporary page data, first user page data, second user page data.
[0052] Furthermore, based on different types of target storage pages where temporary page data is stored, the data storage process in each storage scenario is further described.
[0053] Through step S221 to step S224, the embodiment of the present application first processes the user original data to generate user page data, and then performs logical operations on the user page data to generate temporary page data, which has the advantages of being simple, efficient, and complete in data processing.
[0054] According to some embodiments of the present application, the data storage device of the flash memory device further includes: a first cache unit and a second cache unit. Further explanation of step S130: step S130: performing data processing and data storage according to the data processing order so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, including but not limited to steps S310 to S330.
[0055] Step S310: when the target storage page is the most significant bit page, the first user page data is written into the least significant bit page, and the first user page data is stored in the first cache unit.
[0056] Step S320: writing the second user page data into the central valid bit page, and storing the second user page data into the second cache unit.
[0057] Step S330: performing logic operation processing on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and writing the temporary page data into the most significant bit page.
[0058] Specifically, the logic operation performed in step S330 is: an XOR operation or an XOR operation.
[0059] Combination Figure 7, further illustrating the scenario in which the generated temporary page data needs to be stored in the most significant bit page. When the target storage page of the generated temporary page data P3 is to be stored in the MSB Page, the data processing unit first performs data conversion processing on the first user original data D1 to generate the first user page data P1, and then writes the first user page data P1 into the LSB Page, and stores the first user page data P1 in the first cache unit. Secondly, the data processing unit performs data conversion processing on the second user original data D2 to generate the second user page data P2, and then writes the second user page data P2 into the CSB Page, and stores the second user page data P2 in the second cache unit. Finally, the first user page data P1 and the second user page data P2 are taken out from the first cache unit and the second cache unit, and the logic operation unit performs logic operations (including but not limited to XOR / XOR) on the first user page data P1 and the second user page data P2 to generate temporary page data P3, and writes the temporary page data P3 into the MSB Page.
[0060] Through step S310 to step S330, the first user page data, the second user page data, and the temporary page data are written into the TLC NAND in order.
[0061] According to some embodiments of the present application, step S130 is further described. Step S130: data processing and data storage are performed according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, and also includes but is not limited to steps S410 to S440.
[0062] Step S410: when the target storage page is a central valid bit page, the first user page data is written into the least significant bit page, and the first user page data is stored in the first cache unit.
[0063] Step S420: Store the second user page data only in the second cache unit.
[0064] Step S430: performing logic operation processing on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and writing the temporary page data into the central valid bit page.
[0065] Step S440: writing the second user page data read from the second cache unit into the most significant bit page.
[0066] Specifically, the logic operation performed in step S430 is: an XOR operation or an XOR operation.
[0067] Combination Figure 8 , further illustrating the scenario where the generated temporary page data needs to be stored in the central valid bit page. When the target storage page of the generated temporary page data P3 is the CSB Page, first, the first user original data D1 is firstly processed by the data processing unit for data conversion to generate the first user page data P1, and then the first user page data P1 is written into the LSB Page, and the first user page data P1 is stored in the first cache unit at the same time; secondly, the second user original data D2 is processed by the data processing unit for data conversion to generate the second user page data P2, and only the second user page data P2 is stored in the second cache unit; the first user page data P1 and the second user page data P2 are taken out from the first cache unit and the second cache unit, and the first user page data P1 and the second user page data P2 are logically operated (including but not limited to XOR / XOR) by the logic operation unit to generate the temporary page data P3, and the temporary page data P3 is written into the CSB Page at the same time. Finally, the second user page data P2 is taken out from the second cache unit and written into the MSBPage.
[0068] Through step S410 to step S440, the first user page data, the temporary page data, and the second user page data are written into the TLC NAND in order.
[0069] According to some embodiments of the present application, step S130 is further described. Step S130: data processing and data storage are performed according to the data processing order, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, including but not limited to steps S510 to S540.
[0070] Step S510: when the target storage page is the least significant bit page, the first user page data is stored only in the first cache unit; the second user page data is stored only in the second cache unit; Step S520: performing a logical operation on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and writing the temporary page data into the least significant bit page; Step S530: writing the first user page data read from the first cache unit into the central valid bit page.
[0071] Step S540: writing the second user page data read from the second cache unit into the most significant bit page.
[0072] Specifically, the logic operation performed in step S520 is: an XOR operation or an XOR operation.
[0073] Combination Fig. 9 , further illustrating the scenario where the generated temporary page data needs to be stored in the least significant bit page. When the target storage page of the generated temporary page data P3 is the LSB page, first, the first user original data D1 is subjected to data conversion processing by the data processing unit to generate the first user page data P1, which is only stored in the first cache unit. Secondly, the second user original data D2 is subjected to data conversion processing by the data processing unit to generate the second user page data P2, and the second user page data P2 is only cached in the second cache unit. Next, the first user page data P1 and the second user page data P2 are taken out from the first cache unit and the second cache unit, and the first user page data P1 and the second user page data P2 are subjected to logical operations (including but not limited to XOR / XOR) by the logic operation unit to generate temporary page data P3, and the temporary page data P3 is written into the LSB Page; the first user page data P1 is taken out from the first cache unit, and the first user page data is written into the CSB Page. Finally, the second user page data P2 is taken out from the second cache unit and written into the MSB Page.
[0074] Through step S510 to step S540, the temporary page data, the first user page data, and the second user page data are written into the TLC NAND in order.
[0075] The embodiment of the present application also provides an electronic device, including a data storage device of the flash memory device as described above. The electronic device provided by the embodiment of the present application can perform data conversion processing on the two sets of user original data obtained, and obtain two sets of user page data accordingly, and then perform logical operations (including but not limited to XOR / XOR) on the two sets of user page data to generate temporary page data, and finally store the two sets of user page data and temporary page data in the corresponding type of page of TLC NAND; the two sets of user page data can be stored in any two types of pages of the three types of pages of TLC NAND, and the generated temporary page data is stored in the remaining type of page. This storage method can greatly improve the stability and reliability of TLC NAND storage data.
[0076] An embodiment of the present application further provides a storage medium, which is a computer-readable storage medium and stores a computer program. When the computer program is executed by a processor, the data storage method of the flash memory device is implemented.
[0077] As a non-transient computer-readable storage medium, the memory can be used to store non-transient software programs and non-transient computer executable programs. In addition, the memory may include a high-speed random access memory, and may also include a non-transient memory, such as at least one disk storage device, a flash memory device, or other non-transient solid-state storage devices. In some embodiments, the memory may optionally include a memory remotely arranged relative to the processor, and these remote memories may be connected to the processor via a network. Examples of the above-mentioned networks include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof. The device embodiments described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and are implemented to be located in one place, or may also be distributed to multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.
[0078] It will be appreciated by those skilled in the art that all or some of the steps and systems in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As known to those skilled in the art, the term computer storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. Furthermore, it is well known to those skilled in the art that communication media typically include computer readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.
[0079] The above is a specific description of the preferred implementation of the present application, but the present application is not limited to the above-mentioned implementation mode. Technical personnel familiar with the field can also make various equivalent deformations or substitutions without violating the spirit of the present application. These equivalent deformations or substitutions are all included in the scope defined by the present application.
Claims
1. A data storage method for a flash memory device, characterized in that: A data storage device applied to a flash memory device, the data storage device of the flash memory device is electrically connected to the flash memory device, the type of the flash memory device is TLC NAND, and the flash memory device includes three different types of candidate storage pages; The method comprises: Performing data conversion processing on the acquired original data of the first user to obtain first user page data, and performing data conversion processing on the acquired original data of the second user to obtain second user page data; After determining the target storage page of the temporary page data from three different types of candidate storage pages, determining the data processing order according to the target storage page; wherein the temporary page data is obtained by performing a logical operation on the first user page data and the second user page data; the three different types of candidate storage pages include: the least significant bit page, the central significant bit page, and the most significant bit page; the data processing order is used to indicate: the order of processing the first user page data, the second user page data, and the temporary page data; Data processing and data storage are performed according to the data processing sequence, so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages.
2. The data storage method of the flash memory device according to claim 1, characterized in that: The data conversion process includes: Dividing the user original data to be processed into N data blocks of fixed length; the user original data to be processed is: the first user original data or the second user original data; Performing codeword conversion processing on the N data blocks respectively to obtain N target codewords; wherein the codeword conversion processing includes: randomization processing, error checking and correction coding processing, and data supplementation processing performed in sequence; The N target code words are combined to obtain a target user Page data.
3. The data storage method of the flash memory device according to claim 2, characterized in that: The codeword conversion process includes: Generate a string of first random data of the same length as a data block to be processed, perform XOR processing on the data block to be processed and the first random data to obtain a randomized data block; Performing error checking and correction coding processing on the randomized data block to obtain an ECC check code; Adding the ECC check code after the randomized data block to obtain an initial codeword; When the length of the initial codeword is smaller than the page size of the flash memory device, the second random data is used to supplement the initial codeword to obtain the target codeword; the length of the target codeword is equal to the page size.
4. The data storage method of the flash memory device according to claim 1, characterized in that: The step of determining the data processing order according to the target storage page comprises: When the target storage page is the most significant bit page, the data processing order is determined to be: first user page data, second user page data, temporary page data; When the target storage page is a central valid bit page, the data processing order is determined to be: first user page data, temporary page data, and second user page data; When the target storage page is the least significant bit page, the data processing sequence is determined to be: temporary page data, first user page data, and second user page data.
5. The data storage method of the flash memory device according to claim 4, characterized in that: The data storage device of the flash memory device further includes: a first cache unit and a second cache unit; The data processing and data storage are performed according to the data processing sequence so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, including: When the target storage page is: the most significant bit page, writing the first user page data into the least significant bit page, and storing the first user page data into the first cache unit; Writing the second user page data into the central valid bit page, and storing the second user page data into the second cache unit; A logical operation is performed on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and the temporary page data is written into the most significant bit page.
6. The data storage method of the flash memory device according to claim 5, characterized in that: The data processing and data storage are performed according to the data processing sequence so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, including: When the target storage page is a central valid bit page, the first user page data is written into a least valid bit page, and the first user page data is stored in the first cache unit; storing the second user page data only in the second cache unit; Performing logic operation processing on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and writing the temporary page data into the central valid bit page; The second user page data read from the second cache unit is written into the most significant bit page.
7. The data storage method of the flash memory device according to claim 5, characterized in that: The data processing and data storage are performed according to the data processing sequence so that the temporary page data is stored in the target storage page, and the first user page data and the second user page data are respectively stored in the remaining two candidate storage pages, including: When the target storage page is the least significant bit page, the first user page data is stored only in the first cache unit; the second user page data is stored only in the second cache unit; Performing logic operation processing on the first user page data read from the first cache unit and the second user page data read from the second cache unit to obtain temporary page data, and writing the temporary page data into the least significant bit page; Writing the first user page data read from the first cache unit into the central valid bit page; The second user page data read from the second cache unit is written into the most significant bit page.
8. A data storage device of a flash memory device, characterized in that: The data storage device is electrically connected to the flash memory device, and the type of the flash memory device is TLC NAND; the flash memory device includes three different types of candidate storage pages; the data storage device of the flash memory device is used to execute the data storage method of the flash memory device as described in any one of claims 1 to 7.
9. An electronic device, characterized in that: A data storage device comprising the flash memory device as claimed in claim 8.
10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute the data storage method of the flash memory device according to any one of claims 1 to 7.
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