Assembly line ECC verification system and assembly line ECC verification method

Abstract

The invention discloses a pipeline ECC (Error Correction Code) checking system and a pipeline ECC checking method. The assembly line ECC verification system comprises a comprehensive feature engine, a BM algorithm engine and a positioning and correcting engine. Wherein the comprehensive feature engine, the BM algorithm engine and the positioning and correcting engine can work at the same time; when the comprehensive feature engine, the BM algorithm engine and the positioning and correcting engine work at the same time, comprehensive features, ECC settings and critical equations obtained by the positioning and correcting engine are comprehensive features, ECC settings and critical equations of ECC frames processed by the BM algorithm engine; the comprehensive features and the ECC settings acquired by the BM algorithm engine are comprehensive features and ECC settings of the ECC frames processed by the comprehensive feature engine. According to the method, the comprehensive feature engine, the BM algorithm engine and the positioning and correcting engine can process different ECC frames at the same time, and the problem that in continuous work in the prior art, two parts are idle, and only one part works is solved.

Description

Technical Field

[0001] The present application relates to the technical field of flash memory controllers, and in particular to a pipeline ECC verification system and a pipeline ECC verification method. Background Art

[0002] From the perspective of semiconductors, flash memory is a non-volatile storage, but it is an unreliable medium. Because flash memory is electronically driven, it has the inherent defects of electronic components, such as aging, electron leakage, attenuation, etc.

[0003] These potentials may be erroneous due to electron leakage or attenuation and process defects. The process of NAND Flash cannot guarantee the reliability of NAND's Memory Array during its life cycle, so bad blocks will be generated during the production and use of NAND. In order to ensure data reliability, the ECC data verification mechanism is generally used in the system using NAND, and the ECC verification algorithm is used for processing, and the ECC information is attached to the data frame.

[0004] For flash memory storage, a corresponding ECC engine circuit needs to be designed in the main control chip to achieve high-speed ECC processing of data frames.

[0005] The defects of the existing ECC engine design method are: Any ECC frame will occupy the processing time of the entire ECC engine until the ECC frame is corrected or detected as uncorrectable. For example, the ECC engine is divided into three parts, the comprehensive feature engine, the BM algorithm engine, and the error location and correction engine. In continuous operation, 2 parts are idle and only 1 part is working. Summary of the invention

[0006] The object of the present invention is to provide a pipeline ECC checking system to solve at least one of the above-mentioned technical problems.

[0007] One aspect of the present invention provides a pipeline ECC verification system, the pipeline ECC verification system comprising: A comprehensive feature engine, the comprehensive feature engine is used to obtain an ECC frame and a corresponding ECC setting and generate a comprehensive feature according to the ECC frame and the corresponding ECC setting; A BM algorithm engine, wherein the BM algorithm engine is used to obtain comprehensive features and ECC settings and generate critical equations according to the comprehensive features; A positioning and correction engine, the positioning and correction engine is used to obtain comprehensive features, ECC settings and critical equations and perform error positioning and correction based on the comprehensive features, ECC settings and critical equations; wherein, The comprehensive feature engine, the BM algorithm engine and the positioning and correction engine can work simultaneously; When the comprehensive feature engine, the BM algorithm engine and the positioning and correction engine work simultaneously, the comprehensive features, ECC settings and critical equations acquired by the positioning and correction engine are the comprehensive features, ECC settings and critical equations of the ECC frame processed by the BM algorithm engine; The comprehensive features and ECC settings acquired by the BM algorithm engine are the comprehensive features and ECC settings of the ECC frame processed by the comprehensive feature engine.

[0008] Optionally, the ECC operation direction is a decoding direction.

[0009] Optionally, the comprehensive feature engine, BM algorithm engine and positioning and correction engine use separate clock sources respectively.

[0010] The present application also provides a pipeline ECC verification method, the pipeline ECC verification method comprising: The comprehensive feature engine obtains the first ECC frame and the ECC setting corresponding to the first ECC frame; The comprehensive feature engine generates a first comprehensive feature based on the first ECC frame and the corresponding first ECC setting; The comprehensive signature engine sends the first ECC setting and the first comprehensive signature to the BM algorithm engine in an idle state.

[0011] Optionally, after the comprehensive feature engine sends the first ECC setting and the first comprehensive feature to the BM algorithm engine, the pipeline ECC verification method further includes: When the comprehensive feature engine acquires a second ECC frame and an ECC setting corresponding to the second ECC frame after processing the first ECC frame, the comprehensive feature engine generates a second comprehensive feature according to the second ECC frame and the corresponding second ECC setting; The BM algorithm engine generates a first critical equation according to the acquired first ECC setting and the first comprehensive feature and sends the first critical equation and the first ECC setting to the positioning and correction engine.

[0012] Optionally, when the BM algorithm engine sends the first critical equation and the first ECC setting to the positioning and correction engine and is idle, the pipeline ECC verification method further includes: The comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in an idle state; The positioning and correction engine is used to obtain a first comprehensive feature, a first ECC setting, and a first critical equation.

[0013] Optionally, the positioning and correction engine, after the comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in an idle state, the pipeline ECC verification method further includes: The BM algorithm engine generates a second critical equation according to the acquired second ECC setting and the second comprehensive feature; The positioning and correction engine performs error positioning and correction based on the first comprehensive feature, the first ECC setting, and the first critical equation; When the comprehensive feature engine obtains the third ECC frame and the ECC setting corresponding to the third ECC frame after processing the second ECC frame, the comprehensive feature engine generates a third comprehensive feature according to the third ECC frame and the corresponding third ECC setting.

[0014] Optionally, after the positioning and correction engine completes error positioning and correction according to the first comprehensive feature, the first ECC setting and the first critical equation and is in an idle state, the pipeline ECC verification method further includes: The BM algorithm engine sends the second critical equation and the second ECC setting to the positioning and correction engine; The comprehensive feature engine sends the third ECC setting and the third comprehensive feature to the BM algorithm engine in an idle state.

[0015] Beneficial effects: The pipeline ECC verification system of the present application achieves loose coupling of the three components of the ECC engine (comprehensive feature engine, BM algorithm engine, and error location and correction engine) by dividing the three components into three independent clock domains, allowing the three to process different ECC frames simultaneously, thereby solving the problem in the prior art that two of the three components are idle while only one is working during continuous operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 4 is a system schematic diagram of a pipeline ECC checking system according to an embodiment of the present application.

[0017] Figure 2 It is a processing flow diagram of a pipeline ECC checking method according to an embodiment of the present application. DETAILED DESCRIPTION

[0018] In order to make the purpose, technical scheme and advantages of the implementation of this application clearer, the technical scheme in the embodiment of this application will be described in more detail below in conjunction with the drawings in the embodiment of this application. In the drawings, the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The described embodiments are part of the embodiments of this application, not all of them. The embodiments described below with reference to the drawings are exemplary and are intended to be used to explain this application, and should not be construed as limitations on this application. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application. The embodiments of this application are described in detail below in conjunction with the drawings.

[0019] like Figure 1 The pipeline ECC checking system shown includes a comprehensive feature engine, a BM algorithm engine, and a positioning and correction engine, wherein: The comprehensive feature engine is used to obtain the ECC frame and the corresponding ECC setting and generate a comprehensive feature according to the ECC frame and the corresponding ECC setting; The BM algorithm engine is used to obtain comprehensive features and ECC settings and generate critical equations based on the comprehensive features; The positioning and correction engine is used to obtain comprehensive features, ECC settings, and critical equations and perform error positioning and correction based on the comprehensive features, ECC settings, and critical equations; wherein, The comprehensive feature engine, the BM algorithm engine and the positioning and correction engine can work simultaneously; When the comprehensive feature engine, the BM algorithm engine and the positioning and correction engine work simultaneously, the comprehensive features, ECC settings and critical equations acquired by the positioning and correction engine are the comprehensive features, ECC settings and critical equations of the ECC frame processed by the BM algorithm engine; The comprehensive features and ECC settings acquired by the BM algorithm engine are the comprehensive features and ECC settings of the ECC frame processed by the comprehensive feature engine.

[0020] In this embodiment, the ECC operation direction is a decoding direction.

[0021] In this embodiment, the comprehensive feature engine, BM algorithm engine, and positioning and correction engine use separate clock sources respectively.

[0022] The method of the present application divides the ECC engine into three loosely coupled parts (integrated feature engine / BM algorithm engine / error location and correction engine), making full use of all three processing parts - an ECC frame (frame A) leaves the integrated feature engine and will be processed by the BM algorithm engine; the integrated feature engine is empty, and the ECC processing engine allows the next frame (frame B) to enter the integrated feature engine immediately instead of waiting for the ECC engine to complete the entire processing of frame A. This can maximize the working efficiency of the ECC engine and improve the performance of ECC processing.

[0023] For example, the integrated feature engine uses 200Mhz, the BM algorithm engine and the error location and correction engine use 400Mhz, and the time it takes for the integrated feature engine to process one ECC frame is the time it takes for the BM algorithm engine and the error location and correction engine to decode and process two ECC frames of data. The time it takes for the error location and correction engine to process data is shorter than that of the BM algorithm engine. Therefore, the data will be processed from the integrated feature engine -> BM algorithm engine -> error location and correction engine in sequence, and the front-end engine data will not be processed while the back-end engine is still occupied. In actual applications, different clock cycles can also be used, but the clock frequency of the back-end BM algorithm engine and error location and correction engine processing engine must be 1.5 to 2 times the clock frequency of the integrated feature engine. See also Figure 2 The present application also provides a pipeline ECC verification method, the pipeline ECC verification method comprising: The comprehensive feature engine obtains the first ECC frame and the ECC setting corresponding to the first ECC frame; The comprehensive feature engine generates a first comprehensive feature based on the first ECC frame and the corresponding first ECC setting; The comprehensive signature engine sends the first ECC setting and the first comprehensive signature to the BM algorithm engine in an idle state.

[0024] In this embodiment, after the comprehensive feature engine sends the first ECC setting and the first comprehensive feature to the BM algorithm engine, the pipeline ECC verification method further includes: When the comprehensive feature engine acquires a second ECC frame and an ECC setting corresponding to the second ECC frame after processing the first ECC frame, the comprehensive feature engine generates a second comprehensive feature according to the second ECC frame and the corresponding second ECC setting; The BM algorithm engine generates a first critical equation according to the acquired first ECC setting and the first comprehensive feature and sends the first critical equation and the first ECC setting to the positioning and correction engine.

[0025] In this embodiment, when the BM algorithm engine sends the first critical equation and the first ECC setting to the positioning and correction engine and is idle, the pipeline ECC verification method further includes: The comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in an idle state; The positioning and correction engine is used to obtain a first comprehensive feature, a first ECC setting, and a first critical equation.

[0026] In this embodiment, the positioning and correction engine, after the comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in the idle state, the pipeline ECC verification method further includes: The BM algorithm engine generates a second critical equation according to the acquired second ECC setting and the second comprehensive feature; The positioning and correction engine performs error positioning and correction based on the first comprehensive feature, the first ECC setting, and the first critical equation; When the comprehensive feature engine obtains the third ECC frame and the ECC setting corresponding to the third ECC frame after processing the second ECC frame, the comprehensive feature engine generates a third comprehensive feature according to the third ECC frame and the corresponding third ECC setting.

[0027] In this embodiment, after the positioning and correction engine completes error positioning and correction according to the first comprehensive feature, the first ECC setting, and the first critical equation and is in an idle state, the pipeline ECC verification method further includes: The BM algorithm engine sends the second critical equation and the second ECC setting to the positioning and correction engine; The comprehensive feature engine sends the third ECC setting and the third comprehensive feature to the BM algorithm engine in the idle state When the ECC operation direction is READ (decoding), each ECC frame will flow through the ECC engine (integrated feature engine, BM algorithm engine, error location and correction engine). The settings of each ECC frame (such as ECC selection, mode selection, data size, etc.) will pass through the pipeline together. Each stage of the ECC engine pipeline should adjust its working mode according to the input ECC frame accompanying settings.

[0028] The present application is further described in detail below by way of examples. It should be understood that the examples do not constitute any limitation to the present application.

[0029] The ECC engine receives the initial frame signal and enters the receiving mode; The ECC engine receives ECC frame A and the corresponding ECC setting A, and sends them to the comprehensive feature engine for processing. After the comprehensive feature engine completes the processing, it sends the processed comprehensive feature A and the corresponding ECC setting A to the BM algorithm engine. At this time, if a new initial frame is received, the received ECC frame B and the corresponding ECC setting B are sent to the comprehensive feature engine for processing; The comprehensive feature A and the corresponding ECC setting A and the critical equation A are sent from the BM algorithm engine to the error location and correction engine for error location and correction. At the same time, the processed comprehensive feature B and the corresponding ECC setting B are sent to the BM algorithm engine. At this time, if a new initial frame is received, the received ECC frame C and the corresponding ECC setting C are sent to the comprehensive feature engine for processing; After the error location and correction engine completes error location and correction for ECC frame A, it sends out the correct data frame A to complete the ECC process.

[0030] In this embodiment, ECC frame A, ECC frame B, ECC frame C and the first ECC frame, second ECC frame, and third ECC frame described above all represent multiple consecutive adjacent ECC frames. For example, ECC frame A is the first frame, then ECC frame B is the second frame after ECC frame A, and ECC frame C is the second frame after ECC frame B, that is, the third frame after ECC frame A.

[0031] Although the present invention has been described in detail above with general descriptions and specific embodiments, it is obvious to those skilled in the art that some modifications or improvements may be made thereto based on the present invention. Therefore, these modifications or improvements made without departing from the spirit of the present invention all fall within the scope of protection claimed by the present invention.

Claims

1. A pipeline ECC checking system, characterized in that: The pipeline ECC checking system comprises: A comprehensive feature engine, the comprehensive feature engine is used to obtain an ECC frame and a corresponding ECC setting and generate a comprehensive feature according to the ECC frame and the corresponding ECC setting; A BM algorithm engine, wherein the BM algorithm engine is used to obtain comprehensive features and ECC settings and generate critical equations according to the comprehensive features; A positioning and correction engine, the positioning and correction engine is used to obtain comprehensive features, ECC settings and critical equations and perform error positioning and correction based on the comprehensive features, ECC settings and critical equations; wherein, The comprehensive feature engine, the BM algorithm engine and the positioning and correction engine can work simultaneously; When the comprehensive feature engine, the BM algorithm engine and the positioning and correction engine work simultaneously, the comprehensive features, ECC settings and critical equations acquired by the positioning and correction engine are the comprehensive features, ECC settings and critical equations of the ECC frame processed by the BM algorithm engine; The comprehensive features and ECC settings acquired by the BM algorithm engine are the comprehensive features and ECC settings of the ECC frame processed by the comprehensive feature engine.

2. The pipeline ECC checking system according to claim 1, characterized in that: The ECC operation direction is a decoding direction.

3. The pipeline ECC checking system as claimed in claim 2, characterized in that: The comprehensive feature engine, BM algorithm engine and positioning and correction engine use separate clock sources respectively.

4. A pipeline ECC verification method, characterized in that: The pipeline ECC checking method comprises: The comprehensive feature engine obtains the first ECC frame and the ECC setting corresponding to the first ECC frame; The comprehensive feature engine generates a first comprehensive feature based on the first ECC frame and the corresponding first ECC setting; The comprehensive signature engine sends the first ECC setting and the first comprehensive signature to the BM algorithm engine in an idle state.

5. The pipeline ECC checking method according to claim 4, characterized in that: After the comprehensive feature engine sends the first ECC setting and the first comprehensive feature to the BM algorithm engine, the pipeline ECC verification method further includes: When the comprehensive feature engine acquires a second ECC frame and an ECC setting corresponding to the second ECC frame after processing the first ECC frame, the comprehensive feature engine generates a second comprehensive feature according to the second ECC frame and the corresponding second ECC setting; The BM algorithm engine generates a first critical equation according to the acquired first ECC setting and the first comprehensive feature and sends the first critical equation and the first ECC setting to the positioning and correction engine.

6. The pipeline ECC checking method according to claim 5, characterized in that: When the BM algorithm engine sends the first critical equation and the first ECC setting to the positioning and correction engine and is idle, the pipeline ECC verification method further includes: The comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in an idle state; The positioning and correction engine is used to obtain a first comprehensive feature, a first ECC setting, and a first critical equation.

7. The pipeline ECC checking method according to claim 6, characterized in that: Positioning and correction engine, after the comprehensive feature engine sends the second ECC setting and the second comprehensive feature to the BM algorithm engine in the idle state, the pipeline ECC verification method further includes: The BM algorithm engine generates a second critical equation according to the acquired second ECC setting and the second comprehensive feature; The positioning and correction engine performs error positioning and correction based on the first comprehensive feature, the first ECC setting, and the first critical equation; When the comprehensive feature engine obtains the third ECC frame and the ECC setting corresponding to the third ECC frame after processing the second ECC frame, the comprehensive feature engine generates a third comprehensive feature according to the third ECC frame and the corresponding third ECC setting.

8. The pipeline ECC checking method according to claim 7, wherein: After the positioning and correction engine completes error positioning and correction according to the first comprehensive feature, the first ECC setting and the first critical equation and is in an idle state, the pipeline ECC verification method further includes: The BM algorithm engine sends the second critical equation and the second ECC setting to the positioning and correction engine; The comprehensive feature engine sends the third ECC setting and the third comprehensive feature to the BM algorithm engine in an idle state.

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