Storage access control method and device, equipment and storage medium

Abstract

The invention provides a storage access control method and device, equipment and a storage medium, and the storage access control method comprises the steps: obtaining the write-in state information of a target memory in response to a write-in request for the target memory; when the write-in state information shows that the write-in state of the target memory meets the preset condition, obtaining write-in type information corresponding to the write-in request; when the write-in type information shows that the write-in request is an exchange write-in request, according to a target write-in page corresponding to the write-in request, determining a least recently used linked list corresponding to the target write-in page in a source memory, and obtaining a preset threshold value corresponding to the least recently used linked list, and controlling the single exchange write-in amount not to exceed a preset threshold value corresponding to the least recently used linked list. According to the method, the problems that the response capability of the processor is reduced and the process response is slow due to processing of a large number of unnecessary exchange writes can be avoided.

Description

Technical Field

[0001] The present application relates to the field of computer technology, and in particular to a storage access control method, apparatus, device and storage medium. Background Art

[0002] With the development of Internet technology, more and more demands can be met through applications and software. However, in the process of using various applications and software, as the number of applications and software opened increases, more and more processes are running in them, and more and more memory is occupied. In order to ensure that the smart devices equipped with applications and software can run smoothly, the smart devices will swap out some pages to the disk to achieve data writeback, thereby achieving memory balance. Usually, the disk will use a writeback throttle mechanism to reduce data processing pressure and prevent the disk from causing performance degradation or system crashes due to excessive write operations. However, writeback throttle will limit the write speed of the disk when the write pressure is high, which will cause the write response of other smart devices to slow down, causing the system response speed to slow down. Summary of the invention

[0003] The present application provides a storage access control method, apparatus, device, storage medium and program product, which are used to solve the problem in the prior art that the system response speed slows down after the disk write speed is limited.

[0004] In a first aspect, the present application provides a storage access control method, comprising:

[0005] In response to a write request to a target memory, acquiring write status information of the target memory;

[0006] When the write status information indicates that the write status of the target storage meets a preset condition, acquiring write type information corresponding to the write request;

[0007] When the write type information indicates that the write request is a swap write request, determining a least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request;

[0008] A preset threshold corresponding to the least recently used linked list is obtained to control the single swap write amount not to exceed the preset threshold corresponding to the least recently used linked list.

[0009] As an implementation manner, obtaining a preset threshold value corresponding to the least recently used linked list to control the single swap write amount not to exceed the preset threshold value corresponding to the least recently used linked list includes:

[0010] Obtaining a preset threshold corresponding to the least recently used linked list;

[0011] The least recently used linked list is balanced in proportion, and based on the preset threshold, a single swap write amount of the least recently used linked list during the linked list balancing process is controlled not to exceed the preset threshold corresponding to the least recently used linked list.

[0012] As an implementation manner, the least recently used linked list includes a first type of least recently used linked list and a second type of least recently used linked list, and the page data volume of the first type of least recently used linked list is less than the page data volume of the second type of least recently used linked list;

[0013] The obtaining of a preset threshold value corresponding to the least recently used linked list; balancing the least recently used linked list in proportion, and based on the preset threshold value, controlling a single swap write amount of the least recently used linked list during the linked list balancing process to not exceed the preset threshold value corresponding to the least recently used linked list, includes:

[0014] Determine whether the first least recently used linked list is an idle process;

[0015] If the judgment result is no, then obtain the preset threshold corresponding to the first category least recently used linked list, perform linked list balancing on the first category least recently used linked list according to the recovery ratio of the second category least recently used linked list, and based on the preset threshold, control the single exchange write amount of the first category least recently used linked list during the linked list balancing process not to exceed the preset threshold corresponding to the first category least recently used linked list.

[0016] As an implementation manner, the determining whether the first least recently used linked list is an idle process further includes:

[0017] If the judgment result is yes, then the first type of least recently used linked list is balanced according to the recycling ratio of the first type of least recently used linked list to the second type of least recently used linked list.

[0018] As an implementation manner, the preset threshold corresponding to the least recently used linked list is determined based on the number of pages requested to be recycled when the memory subsystem detects that there are not enough pages when requesting pages during the running of the application.

[0019] As an implementation manner, the step of generating the exchange write request includes:

[0020] Acquire storage space information of the source storage;

[0021] When the storage space information indicates that the available storage space of the source memory is less than a preset threshold, adjusting the structure of the least recently used linked list;

[0022] The swap write request is generated according to a page at the tail end of the least recently used linked list in the source memory after the structure adjustment.

[0023] As an implementation mode, the structural adjustment of the least recently used linked list includes:

[0024] Obtaining access information of each page in the least recently used linked list; the access information includes access frequency information and / or most recent access time information;

[0025] The arrangement order of the pages in the least recently used linked list is adjusted according to the access frequency information and / or the most recent access time information.

[0026] In a second aspect, the present application further provides a storage access control device, comprising:

[0027] A response module, configured to obtain write status information of the target memory in response to a write request to the target memory;

[0028] an acquisition module, configured to acquire write type information corresponding to the write request when the write status information indicates that the write status of the target storage device satisfies a preset condition;

[0029] a determination module, configured to determine, when the write type information indicates that the write request is an exchange write request, a least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request;

[0030] The control module is used to obtain a preset threshold value corresponding to the least recently used linked list, so as to control the single exchange write amount not to exceed the preset threshold value corresponding to the least recently used linked list.

[0031] In a third aspect, the present application further provides a computer device, wherein the computer device comprises a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the storage access control method described in any of the above embodiments is implemented.

[0032] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the storage access control method described in any of the above embodiments when executed by a processor.

[0033] The above-mentioned storage access control method, device, equipment and storage medium can further determine whether the write type corresponding to the write request is a swap write request when the write status of the target memory indicates that the target memory needs to be written at a speed limit. If so, obtain the preset threshold corresponding to the LRU linked list in the source memory corresponding to the write request to control the single swap write amount not to exceed the preset threshold, so that the swap write bypasses the speed limit, and by limiting the size of the balanced page, accelerates the memory recovery path under high pressure, thereby reducing the time for program page fault exception processing under high memory pressure and improving the response speed of the program. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0035] Figure 1 A diagram of an application environment of a storage access control method in an embodiment;

[0036] Figure 2 A schematic diagram of a flow chart of a storage access control method in an embodiment;

[0037] Figure 3 A schematic diagram of a flow chart of a storage access control method in an embodiment;

[0038] Figure 4 A schematic diagram of a flow chart of a storage access control method in an embodiment;

[0039] Figure 5 A schematic diagram of a flow chart of a storage access control method in an embodiment;

[0040] Figure 6 A schematic diagram of the structure of a storage access control device in one embodiment;

[0041] Figure 7 FIG. 4 is a diagram showing the internal structure of a computer device in one embodiment.

[0042] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0043] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0044] The storage access control method provided in the embodiment of the present application can be applied to Figure 1 In the application environment shown in FIG. 1 , the source memory 104 and the processor 106 are located in the host, and the target memory 102 is connected to the host as an external device through an input / output (I / O) device.

[0045] The target memory 102 may be, for example, a non-volatile storage device such as a disk, and the source memory 104 may be, for example, a volatile storage device such as a memory. Both the target memory 102 and the source memory 104 may be divided into blocks of a fixed size, each block being called a page. A page is the smallest unit for storing data in the target memory 102 and the source memory 104. The target memory 102 and the source memory 104 store data in pages, which can achieve efficient management and orderly storage of data. Among them, the source memory 104 and the processor 106 may be arranged inside the host, and the target memory 102 may be connected to the source memory 104 through an I / O device, and the input and output functions of the data stored in the target memory 102 are achieved through the input device and the output device in the I / O device.

[0046] Among them, the processor 106 can only obtain page data from the source memory 104 for calculation, but cannot directly obtain page data from the non-volatile target memory 102 for operation. The source memory 104 can read the initial page data from the target memory 102 in advance, and the processor 106 reads the initial page data from the source memory 104 and runs.

[0047] Specifically, the processor 106 may be located in a terminal or a server. The terminal may be, but is not limited to, various personal computers, laptops, smart phones, tablet computers, IoT devices, and portable wearable devices. IoT devices may be smart speakers, smart TVs, smart air conditioners, smart car-mounted devices, etc. Portable wearable devices may be smart watches, smart bracelets, head-mounted devices, etc. The server may be implemented as an independent server or a server cluster consisting of multiple servers. The terminal and the server may be directly or indirectly connected via wired or wireless communication, such as via a network connection.

[0048] When storage access control is applied to the processor 106, the processor 106 obtains the write status information of the target memory 102 when detecting a write request to the target memory 102; when the write status information of the target memory 102 indicates that the write status of the target memory 102 satisfies a preset condition, the processor 106 obtains the write type information corresponding to the write request; when the write type information indicates that the write request is an exchange write request, the processor 106 determines the least recently used linked list corresponding to the write request in the source memory, and obtains the preset threshold value corresponding to the least recently used linked list, so as to control the single exchange write amount not to exceed the preset threshold value.

[0049] In one embodiment, a storage access control method is provided. This embodiment uses the storage access control method applied to the processor 106 as an example. Figure 2 As shown, the storage access control method includes:

[0050] Step 202: In response to a write request to a target memory, obtain write status information of the target memory.

[0051] The target storage may refer to a medium used for long-term storage of data and programs, such as a disk.

[0052] A write request may refer to an instruction to write page data into a target memory, and the page data may be dirty page data stored in a source memory, or may be new page data formed by the source memory rewriting the original page data obtained from the target memory. The write status information is used to display the current write pressure of the target memory through multi-dimensional information, and the write status information may include the following: the number of write requests received by the target memory within a preset time period, and the amount of page data corresponding to the write requests received within the preset time period, the difference between the time values ​​of each write request received within the preset time period, the number value of the difference below the preset duration threshold, the ratio of the number value to the number of write requests received within the preset time period, etc. The preset time period refers to a time period formed by starting from the time value of receiving the latest write request in step 202 and counting back the preset duration.

[0053] Each write request received within a preset time period may, for example, include the following contents: write timestamp: records the time when the write request is issued to the target memory, which can be used to track the write order and time of the page data corresponding to the write request; write location: records the storage location of the page data on the target memory, including information such as the track number and the sector number, which is used to locate the specific location of the write data corresponding to the write request on the target memory; write operation type: identifies the operation type of the page data write corresponding to the write request, such as write, append, overwrite, etc., which is used to distinguish different write operations; write data size: records the page data size corresponding to the write request, in bytes or blocks, which is used to determine the amount of data written; write result status: records the result status of the write operation of the page data corresponding to the write request, such as success, failure, partial success, etc., which is used to determine whether the write operation is completed; write process information: records the process or application information corresponding to the write operation corresponding to the write request, including process ID, application name, etc., which is used to track the source of the write operation; write cache information: records whether the write operation uses the cache of the target memory, cache hit information, etc., which is used to understand write performance and cache utilization, etc.

[0054] Step 204: When the write status information indicates that the write status of the target memory satisfies a preset condition, obtain write type information corresponding to the write request.

[0055] The write status of the target memory is used to intuitively display the current write pressure of the target memory. The preset conditions correspond to the write status information of the target memory, and may include, for example: the number of write requests received by the target memory within a preset time period reaches a preset reception threshold, the amount of page data corresponding to the write requests received within the preset time period reaches a preset data amount threshold, etc.

[0056] Generally, a writeback throttle mechanism may be used to limit the intensity of write operations to the target memory 102. When the write pressure of the target memory 102 is high, the write back throttle may limit the write rate of the target memory 102 to reduce the write pressure of the target memory 102 and prevent the processor 106 from performing too many write operations to the target memory 102, thereby causing the performance of the processor 106 to degrade or crash.

[0057] In this embodiment, when the write status information indicates that the write status of the target memory satisfies the preset conditions, it can be considered that the write pressure of the target memory is large, that is, the target memory is in a state where the write rate needs to be limited by the writeback throttle. At this time, the processor further obtains the write type information corresponding to the current write request.

[0058] The write type information refers to the type of operation that the target memory needs to perform for the page data corresponding to the write request, such as writing new page data, appending page data, overwriting the original page data with dirty page data, or swapping the page data to the swap space pre-set in the target memory, etc., to distinguish different write operations. Among them, the swap space pre-set in the target memory can be understood as a swap partition. When the page data running space of the source memory is insufficient, the processor can use part of the storage space on the target memory as a virtual source memory running space, that is, virtualize part of the space on the target memory as a swap partition.

[0059] Specifically, the process of determining the write type information corresponding to the write request can be implemented in the following manner:

[0060] The processor can pre-distinguish between pages that do not directly correspond to the target memory and pages that are directly related to the target memory. When a write request is for pages that do not directly correspond to the target memory, it usually means that they are written to the swap partition. At this time, the write type information corresponding to the write request can be considered as a swap write request; and when pages directly related to the target memory are written to the target memory, it may be just a normal file update operation. Alternatively, the processor can pre-set status marks for different pages. For example, for dirty page data, writing to the target memory may be a swap write. Alternatively, when the source memory is insufficient in memory, if it is necessary to swap out infrequently used pages to the swap partition to free up memory, the write type information corresponding to the write request is likely to be a swap write request.

[0061] It can be understood that the processor determines whether the write type information corresponding to the write request is a swap write request based on the page corresponding to the write request and / or the memory usage of the source memory.

[0062] Step 206: When the write type information indicates that the write request is a swap write request, determine the least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request.

[0063] The swap write request refers to an instruction to swap page data to a swap partition preset in the target memory.

[0064] The target write page refers to the page data corresponding to the exchange write request and needs to be written into the interactive space in the target memory.

[0065] The Least Recently Used (LRU) list is a method of arranging page data in the source memory using a cache elimination algorithm, which can determine which page data should be replaced when the available space in the source memory is insufficient.

[0066] The basic principle of the LRU linked list is to store page data in a linked list, where each node contains a key-value pair and a pointer to the next node. At the same time, a hash table is used to map the key to the node position in the linked list so that the page data can be quickly found and located. When a page of data needs to be accessed, the processor can first find the corresponding node position in the hash table, and then traverse the linked list from that position to find the corresponding node and return the page data. If the page data being searched does not exist, the processor can obtain the page data from the target memory, insert the page data into the head node of the LRU linked list, and update the mapping relationship in the hash table. When the available space in the source memory is insufficient, the processor can traverse the linked list and delete the node that has not been used for the longest time, and update the mapping relationship in the hash table at the same time.

[0067] Step 208: Obtain a preset threshold corresponding to the least recently used linked list to control the single swap write amount not to exceed the preset threshold corresponding to the least recently used linked list.

[0068] The single swap write amount is used to indicate the number of page data that the LRU chain writes to the swap partition at one time.

[0069] The preset threshold refers to the maximum number of page data in the source memory that can be swapped to the target memory at one time.

[0070] As an embodiment, when the write type information indicates that the write request is not a swap write request, the processor will also determine the least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request, obtain the preset threshold corresponding to the least recently used linked list, and control the single swap write amount not to exceed the preset threshold corresponding to the least recently used linked list. The preset threshold corresponding to the least recently used linked list corresponding to other types of requests that do not belong to swap write requests is smaller than the preset threshold corresponding to the least recently used linked list corresponding to the swap write request, so as to ensure the normal writing of the disk. The preset threshold corresponding to the least recently used linked list corresponding to the swap write request is larger than the preset threshold corresponding to the least recently used linked list corresponding to other types of requests, so as to bypass the write speed limit on the swap write request and ensure the real-time performance of the process.

[0071] When the write type information indicates that the write request is not a swap write request, that is, the write type of the write request for the target memory is the writing of new page data, the appending of page data, or the overwriting of original page data by dirty page data, etc., accordingly, the processor needs to write new page data in the target memory, supplement additional page data on the basis of previous page data in the target memory, or overwrite the page data in the target memory. At this time, the processor can limit the number of one-time writes to the target memory to reduce the write pressure of the target memory and prevent the processor from performing too many write operations on the target memory, resulting in performance degradation or crash of the processor.

[0072] In the above storage access control method, when the write status of the target memory indicates that the target memory needs to be written at a speed limit, the processor further determines whether the written page data needs to be written into the swap space. If so, the preset threshold corresponding to the LRU linked list in the source memory corresponding to the page data is obtained to control the single swap write amount not to exceed the preset threshold, thereby bypassing the write speed limit on the swap write action, and at the same time avoiding the processor's response capability being reduced and the process response being slow due to processing a large number of unnecessary swap writes.

[0073] The preset threshold corresponding to the least recently used (LRU) linked list can be determined according to the number of pages requested to be recycled when the memory subsystem detects that there are not enough pages when requesting pages during the application program is running. For example, the preset threshold corresponding to the LRU linked list can be the number of pages requested to be recycled × 2.

[0074] In one embodiment, further, for step 208, the processor can also balance the linked lists of the least recently used linked lists in the source memory. The LRU linked lists are mainly divided into two categories: file linked lists and anonymous linked lists. When the memory is tight, the kernel starts to recycle pages from the end of the LRU. Then there is a very important choice: how to determine the recycling ratio of the file LRU linked list and the anon LRU linked list? The swappiness ratio can be set. The larger the swappiness value, the more the anon LRU linked list is recycled. On the contrary, the file LRU linked list is more inclined to be recycled. In order to avoid a large number of pages of a certain type being recycled, try to achieve balance. If too many pages of a certain type are recycled, it also needs to be suppressed to a certain extent.

[0075] It should be noted that multiple types of LRU linked lists can be set in the source memory, such as file LRU linked lists and anon LRU linked lists, which are used to store different types of page data. When a certain type of page data is called on a large scale, the amount of data stored in the LRU linked list corresponding to the type of page data will be relatively large. At this time, the LRU linked list needs to be swapped multiple times to free up space on the linked list. At this time, the source memory only needs to receive a small amount of page data from the running program, but needs to exchange a large amount of page data, which will reduce the processor's responsiveness and cause slow process response. If other types of page data are called very few times, the amount of data stored in the LRU linked lists corresponding to other types of page data will be relatively small. At this time, the page data stored in different LRU linked lists will be extremely unbalanced, and the cache resources of the source memory cannot be reasonably allocated between different processes or threads.

[0076] When the memory pressure is high, the LRU lists will be balanced during the memory recycling process so that the number of pages recycled on each LRU list meets the preset ratio. When the two LRU lists are extremely unbalanced, a small number of pages will be requested but a large number of pages will be recycled, resulting in slow process response.

[0077] As an implementation mode, step 208 obtains the preset threshold value corresponding to the least recently used linked list to control the single exchange write amount not to exceed the preset threshold value corresponding to the least recently used linked list, which may include: obtaining the preset threshold value corresponding to the least recently used linked list; proportionally balancing the least recently used linked list, and based on the preset threshold value, controlling the single exchange write amount of the least recently used linked list during the linked list balancing process not to exceed the preset threshold value corresponding to the least recently used linked list.

[0078] As an implementation, the least recently used linked list may include a first type of least recently used linked list and a second type of least recently used linked list, and the page data volume of the first type of least recently used linked list is smaller than the page data volume of the second type of least recently used linked list.

[0079] The obtaining of the preset threshold value corresponding to the least recently used linked list; balancing the least recently used linked list in proportion, and based on the preset threshold value, controlling the single exchange write amount of the least recently used linked list during the linked list balancing process not to exceed the preset threshold value corresponding to the least recently used linked list, includes: judging whether the first type of least recently used linked list is an idle process; if the judgment result is yes, balancing the first type of least recently used linked list according to the recovery ratio of the second type of least recently used linked list; if the judgment result is no, obtaining the preset threshold value corresponding to the first type of least recently used linked list, balancing the first type of least recently used linked list according to the recovery ratio of the second type of least recently used linked list, and based on the preset threshold value, controlling the single exchange write amount of the first type of least recently used linked list during the linked list balancing process not to exceed the preset threshold value corresponding to the first type of least recently used linked list.

[0080] As an example, if there are two LRU linked lists in the source memory, one of which has more page data and the other has less page data, then it can be determined whether the LRU linked list with less page data is an idle process. If so, the processor can directly perform proportional balancing on this LRU linked list. If the LRU linked list with less page data is not an idle process, it is necessary to limit the size of the balanced linked list, and limit the maximum value of the exchange write amount of each balanced linked list to a preset threshold. By limiting the size of the balanced page, the memory recovery path under high pressure will be accelerated. This reduces the time for program page fault exception processing under high memory pressure and improves the program's response speed.

[0081] like Figure 3 As shown, in some optional embodiments, the step of generating a swap write request includes:

[0082] Step 302: Obtain storage space information of the source storage;

[0083] Step 304: When the storage space information indicates that the available storage space of the target source storage is less than a preset threshold, the structure of the least recently used linked list is adjusted;

[0084] Step 306: Generate a swap write request according to the page at the end of the least recently used linked list after the structure adjustment in the source memory.

[0085] The storage space information of the source memory may include: the total capacity of the source memory: the total capacity of the source memory refers to the total amount of data that the storage device can store, usually expressed in units such as bytes (Byte), kilobytes (KB), megabytes (MB), gigabytes (GB) or terabytes (TB); the used space of the source memory: the used space indicates the amount of space currently occupied by data in the source memory, usually expressed in bytes or other storage units; the available space of the source memory: the available space refers to the remaining space in the source memory that has not been occupied by data, usually expressed in bytes or other storage units; the health status of the source memory: the health status information of the source memory includes the number of bad sectors, service life, etc., which are used to indicate the reliability and stability of the source memory; read and write speed: the read and write speed information of the memory is crucial to evaluating the performance and efficiency of the memory.

[0086] When the storage space information indicates that the available storage space of the source memory is less than a preset threshold, the processor may consider that the available storage space in the source memory is insufficient to support the use of the currently running program, and the processor needs to release part of the used storage space in the source memory. At this time, the processor can automatically generate a swap write request for at least one page at the end of the least recently used linked list. It should be noted that the swap write request can be used to instruct the processor itself to store at least one page at the end of the least recently used linked list into the target memory.

[0087] As an example, the processor may adjust the structure of each LRU linked list in the source memory according to a preset adjustment frequency to achieve balance.

[0088] like Figure 4 As shown, in some optional embodiments, the step of adjusting the structure of the least recently used linked list includes:

[0089] Step 402: Obtain access information of each page in the least recently used linked list; the access information includes access frequency information and / or most recent access time information;

[0090] Step 404: Adjust the order of the pages in the least recently used linked list according to the access frequency information and / or the most recent access time information.

[0091] The access information is used to identify the processor's access to the page data in the source memory. The access information may include: page address: records the address or index of the page in the source memory, which is used to uniquely identify each page; access timestamp: records the time when the page was last accessed, which is used to determine which pages should be replaced from the source memory in the page replacement algorithm; access frequency: records the frequency of page access, which is used to determine which pages should be replaced from the source memory in the LRU and other page replacement algorithms; access rights: records the access rights of the page, such as read-write rights, read-only rights, etc., which are used to control access operations to the page; process information: records the process or application information that accesses the page, including process ID, application name, etc., which is used to track the source of the page access; page status: records the status of the page, such as whether it has been modified, whether it is in the source memory, etc., which is used to determine whether the page needs to be written back to the target memory; page cache information: records whether the page is cached in the source memory, cache hit information, etc., which is used to understand the performance of page access and cache utilization; page size: records the size of the page, usually in bytes or blocks, which is used to determine the storage space of the page.

[0092] The access information may include, for example, access frequency information and / or recent access time information. The processor may, for example, adjust the order of the pages in the least recently used linked list in descending order of access frequency according to the access frequency information, or adjust the order of the pages in the least recently used linked list in descending order of recent access time according to the recent access time information.

[0093] In some optional embodiments, the write control scheme further includes:

[0094] When the swap write value does not reach the preset threshold, the target write page corresponding to the swap write request is written to the swap space corresponding to the target memory, and the swap write value of the least recently used linked list corresponding to the swap write request is increased by one.

[0095] The swap write value does not reach the preset threshold, that is, the processor increases the swap write value of the least recently used linked list corresponding to the swap write request by one to update the actual number of times the page data in the LRU linked list is swapped to the swap partition.

[0096] Further, after step 208, the processor may exchange the page data of the source memory to the swap space of the target memory. After the exchange is successful, when the page data corresponding to the swap write request is dirty page data, the processor may delete the page data corresponding to the swap write request from the corresponding LRU linked list, and determine the original storage address of the target write page in the target memory according to the storage address tag of the target write page, and clear the original page stored at the original storage address to realize the replacement update of the dirty page data; if the page data corresponding to the swap write request is not dirty page data, the processor may only delete the page data corresponding to the swap write request from the corresponding LRU linked list.

[0097] In some optional embodiments, such as Figure 5 As shown, the write control scheme also includes:

[0098] Step 502: receiving an access request;

[0099] Step 504: compare the page tag carried in the access request with the pages in the source memory and the pages in the swap space in sequence to determine the target access page;

[0100] Step 506: Update the determined target access page to the head of the corresponding least recently used linked list.

[0101] In some optional embodiments, the access request refers to a request for running page data corresponding to a specific running program.

[0102] Optionally, the page tag may be composed of at least one of letters, characters or numbers. The page tag is used to uniquely refer to the page data of a specific running program. The server of this embodiment pre-stores a mapping relationship between the page tag and the page data.

[0103] In this embodiment, when the processor receives an access request sent by a user when running a specific running program, it can first compare the page tag carried by the access request with the page data in the source memory. If the comparison is successful, the compared target access page is directly extracted to the head of the LRU linked list corresponding to the target access page. If the comparison is unsuccessful, the processor can further compare the page tag carried by the access request with the virtual space of the target memory, that is, the page data in the swap space. If the page data in the swap space successfully matches the page tag, the source memory can read the target access page from the target memory through the above-mentioned I / O device, and extract the target access page to the LRU linked list corresponding to the page type of the target access page. ; if the page data in the swap space does not match the page tag successfully, the processor can, for example, also match the page tag carried by the access request with the page data in the target memory, except the swap space. If the page data in the target memory, except the swap space, matches the page tag successfully, the source memory also reads the target access page from the target memory through the above-mentioned I / O device, and extracts the target access page to the head of the LRU linked list corresponding to the page type of the target access page. If the page data in the target memory, except the swap space, matches the page tag unsuccessfully, the processor can generate a prompt message to prompt the user that there is no corresponding accessible page.

[0104] The prior art limits the write speed of the process that has fallen into an exception, which will cause other threads to wait in the case of multi-threading. The storage access control method of the above embodiment can exclude the write type of swap write from the situation where the write speed of the target memory needs to be limited, preventing the target memory from causing other types of write requests to wait due to the page data of the swap write, and by setting the corresponding page recovery threshold for each LRU linked list in the source memory, it avoids the processor's response capability being reduced and the process responding slowly due to processing a large number of unnecessary swap writes.

[0105] It should be understood that, although the steps in the flowcharts involved in the above embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps is not strictly limited in order, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above embodiments may include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0106] Based on the same inventive concept, the embodiment of the present application also provides a device for implementing the storage access control method involved above. The implementation solution provided by the storage access control device to solve the problem is similar to the implementation solution recorded in the above storage access control method, so the specific limitations in one or more device embodiments provided below can refer to the limitations of the storage access control method above, and will not be repeated here.

[0107] In one embodiment, Figure 6 As shown, a storage access control device 600 is provided, comprising:

[0108] A response module 602 is used to obtain write status information of the target memory in response to a write request to the target memory;

[0109] An acquisition module 604 is used to acquire write type information corresponding to the write request when the write status information indicates that the write status of the target storage meets a preset condition;

[0110] A determination module 606, configured to determine a least recently used linked list corresponding to a target write page in a source memory according to a target write page corresponding to the write request when the write type information indicates that the write request is a swap write request;

[0111] The control module 608 is used to obtain a preset threshold corresponding to the least recently used linked list, so as to control the single swap write amount not to exceed the preset threshold corresponding to the least recently used linked list.

[0112] In some optional embodiments, the control module 608 may include:

[0113] A first acquisition submodule is used to acquire a preset threshold value corresponding to the least recently used linked list;

[0114] The balancing control submodule is used to proportionally balance the least recently used linked list, and based on the preset threshold, control the single exchange write amount of the least recently used linked list during the linked list balancing process not to exceed the preset threshold corresponding to the least recently used linked list.

[0115] In some optional embodiments, the least recently used linked list includes a first type of least recently used linked list and a second type of least recently used linked list, and the page data volume of the first type of least recently used linked list is less than the page data volume of the second type of least recently used linked list; the control module 608 may be further used to:

[0116] Determine whether the first least recently used linked list is an idle process;

[0117] If the judgment result is no, then obtain the preset threshold corresponding to the first category least recently used linked list, perform linked list balancing on the first category least recently used linked list according to the recovery ratio of the second category least recently used linked list, and based on the preset threshold, control the single exchange write amount of the first category least recently used linked list during the linked list balancing process not to exceed the preset threshold corresponding to the first category least recently used linked list.

[0118] In some optional embodiments, the generating module 601 may be further configured to:

[0119] When the result of determining whether the first-type least recently used linked list is an idle process is yes, link balancing is performed on the first-type least recently used linked list according to the recovery ratio of the first-type least recently used linked list to the second-type least recently used linked list.

[0120] In some optional embodiments, the preset threshold corresponding to the least recently used linked list can be determined based on the number of pages requested to be recycled when the memory subsystem detects that there are not enough pages when requesting pages during the running of the application.

[0121] In some optional embodiments, the storage access control device 600 may further include a swap write request generation module, and the swap write request generation module may include:

[0122] A second acquisition submodule, used to acquire storage space information of the source storage;

[0123] A linked list structure adjustment submodule, configured to adjust the structure of the least recently used linked list when the storage space information indicates that the available storage space of the source memory is less than a preset threshold;

[0124] The request generation submodule generates the swap write request according to the page at the tail end of the least recently used linked list after the structure adjustment in the source memory.

[0125] The linked list structure adjustment submodule may include:

[0126] An acquisition unit, used to acquire access information of each page in the least recently used linked list; the access information includes access frequency information and / or most recent access time information;

[0127] The linked list adjustment unit is used to adjust the arrangement order of each page in the least recently used linked list according to the access frequency information and / or the most recent access time information.

[0128] Each module in the above device can be implemented in whole or in part by software, hardware or a combination thereof. Each module can be embedded in or independent of a processor in a computer device in the form of hardware, or can be stored in a memory in a computer device in the form of software, so that the processor can call and execute operations corresponding to each module above.

[0129] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 7 As shown. The computer device includes a processor, a memory, an input / output interface, a communication interface, a display unit and an input device. The processor, the memory and the input / output interface are connected via a system bus, and the communication interface, the display unit and the input device are connected to the system bus via the input / output interface. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The input / output interface of the computer device is used to exchange information between the processor and an external device. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a storage access control method is implemented. The display unit of the computer device is used to form a visually visible picture, which can be a display screen, a projection device or a virtual reality imaging device. The display screen can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covering the display screen, or a button, trackball or touchpad set on the computer device shell, or an external keyboard, touchpad or mouse.

[0130] Those skilled in the art will understand that Figure 7 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0131] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, each step of the above storage access control method is implemented.

[0132] In one embodiment, a computer program product is provided, including a computer program, and when the computer program product is executed by a processor, each step of the above storage access control method is implemented.

[0133] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to the memory, database or other medium used in the embodiments provided in the present application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetoresistive random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. As an illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in each embodiment provided in this application may include at least one of a relational database and a non-relational database. Non-relational databases may include distributed databases based on blockchains, etc., but are not limited to this. The processor involved in each embodiment provided in this application may be a general-purpose processor, a central processing unit, a graphics processor, a digital signal processor, a programmable logic device, a data processing logic device based on quantum computing, etc., but are not limited to this.

[0134] The technical features of the above embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0135] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A storage access control method, characterized in that: The method comprises: In response to a write request to a target memory, acquiring write status information of the target memory; When the write status information indicates that the write status of the target storage meets a preset condition, acquiring write type information corresponding to the write request; When the write type information indicates that the write request is a swap write request, determining a least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request; A preset threshold corresponding to the least recently used linked list is obtained to control the single swap write amount not to exceed the preset threshold corresponding to the least recently used linked list.

2. The method according to claim 1, characterized in that The obtaining of the preset threshold value corresponding to the least recently used linked list to control the single swap write amount not to exceed the preset threshold value corresponding to the least recently used linked list includes: Obtaining a preset threshold corresponding to the least recently used linked list; The least recently used linked list is balanced in proportion, and based on the preset threshold, a single swap write amount of the least recently used linked list during the linked list balancing process is controlled not to exceed the preset threshold corresponding to the least recently used linked list.

3. The method according to claim 2, characterized in that The least recently used linked list includes a first type of least recently used linked list and a second type of least recently used linked list, and the page data volume of the first type of least recently used linked list is less than the page data volume of the second type of least recently used linked list; The obtaining of a preset threshold value corresponding to the least recently used linked list; The least recently used linked list is balanced in proportion, and based on the preset threshold, a single swap write amount of the least recently used linked list in the linked list balancing process is controlled not to exceed the preset threshold corresponding to the least recently used linked list, including: Determine whether the first least recently used linked list is an idle process; If the judgment result is no, then obtain the preset threshold corresponding to the first category least recently used linked list, perform linked list balancing on the first category least recently used linked list according to the recovery ratio of the second category least recently used linked list, and based on the preset threshold, control the single exchange write amount of the first category least recently used linked list during the linked list balancing process not to exceed the preset threshold corresponding to the first category least recently used linked list.

4. The method according to claim 3, characterized in that The determining whether the first least recently used linked list is an idle process also includes: If the judgment result is yes, then the first type of least recently used linked list is balanced according to the recycling ratio of the first type of least recently used linked list to the second type of least recently used linked list.

5. The method according to claim 1, characterized in that The preset threshold corresponding to the least recently used linked list is determined according to the number of pages requested to be recycled when the memory subsystem detects that there are not enough pages when requesting pages during the running of the application.

6. The method according to claim 1, characterized in that The step of generating the exchange write request comprises: Acquire storage space information of the source storage; When the storage space information indicates that the available storage space of the source memory is less than a preset threshold, adjusting the structure of the least recently used linked list; The swap write request is generated according to a page at the tail end of the least recently used linked list in the source memory after the structure adjustment.

7. The method according to claim 6, characterized in that The structural adjustment of the least recently used linked list includes: Obtaining access information of each page in the least recently used linked list; the access information includes access frequency information and / or most recent access time information; The arrangement order of the pages in the least recently used linked list is adjusted according to the access frequency information and / or the most recent access time information.

8. A storage access control device, characterized in that: include: A response module, configured to obtain write status information of the target memory in response to a write request to the target memory; an acquisition module, configured to acquire write type information corresponding to the write request when the write status information indicates that the write status of the target storage device satisfies a preset condition; a determination module, configured to determine, when the write type information indicates that the write request is an exchange write request, a least recently used linked list corresponding to the target write page in the source memory according to the target write page corresponding to the write request; The control module is used to obtain a preset threshold value corresponding to the least recently used linked list, so as to control the single swap write amount not to exceed the preset threshold value corresponding to the least recently used linked list.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the storage access control method according to any one of claims 1 to 7 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the storage access control method according to any one of claims 1 to 7 are implemented.

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