Method and system for quickly verifying silicon carbide high-voltage MOS (Metal Oxide Semiconductor) structure

Abstract

The invention discloses a rapid verification method and system for a silicon carbide high-voltage MOS structure, and relates to the related technical field of semiconductor devices, and the method comprises the steps: carrying out the dynamic period monitoring of the silicon carbide high-voltage MOS structure, obtaining a full-period output characteristic, and extracting a first output characteristic; reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first matching degree; introducing a predetermined feedback calibration function to calibrate and adjust the first matching degree to obtain a first target matching degree; and taking the first target matching degree as a first structure effectiveness index of the silicon carbide high-voltage MOS structure. The technical problems that in the prior art, the silicon carbide high-voltage MOS structure is low in verification efficiency and large in error are solved, and the technical effect of improving the verification efficiency and the verification result accuracy is achieved.

Description

Technical Field

[0001] The present application relates to the technical field related to semiconductor devices, and in particular to a method and system for rapid verification of a silicon carbide high-voltage MOS structure. Background Art

[0002] Silicon carbide (SiC), as a third-generation semiconductor material, has excellent properties such as high breakdown electric field, high thermal conductivity and wide bandgap, and is widely used in high-voltage power devices. In the development process of silicon carbide high-voltage metal oxide semiconductor (MOS) structure, its dynamic performance and reliability verification are key links. However, traditional structure verification usually relies on long-term testing and complex modeling analysis, which may have problems of low efficiency and large errors. How to obtain the dynamic performance characteristics of silicon carbide high-voltage MOS structure through fast and accurate verification methods has become a technical problem that needs to be solved urgently.

[0003] Therefore, in the current related technologies, there are technical problems such as low efficiency and large error in verification of silicon carbide high-voltage MOS structures. Summary of the invention

[0004] The present application solves the technical problems of low efficiency and large error in the verification of silicon carbide high-voltage MOS structures in the prior art by providing a method and system for rapid verification of silicon carbide high-voltage MOS structures, thereby achieving the technical effect of improving verification efficiency and accuracy of verification results.

[0005] The present application provides a method for rapid verification of a silicon carbide high-voltage MOS structure, the method comprising: dynamically monitoring the silicon carbide high-voltage MOS structure to obtain a full-cycle output characteristic, and extracting a first output characteristic of a first cycle in the full-cycle output characteristic; reading a predetermined trend comparison strategy, and based on the predetermined trend comparison strategy, comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve to obtain a first phase match; introducing a predetermined feedback calibration function to calibrate and adjust the first phase match to obtain a first target phase match; and using the first target phase match as a first structural effectiveness index of the silicon carbide high-voltage MOS structure.

[0006] In a possible implementation, a predetermined trend comparison strategy is read, and based on the predetermined trend comparison strategy, a first IV characteristic curve obtained by analyzing the first output characteristic is compared with an ideal IV characteristic curve to obtain a first phase match, and the following processing is performed: extracting a second output characteristic of a second cycle in the full-cycle output characteristic; based on the predetermined trend comparison strategy, a second IV characteristic curve obtained by analyzing the second output characteristic is compared with the ideal IV characteristic curve to obtain a second phase match; and the first phase match is verified with the second phase match.

[0007] In a possible implementation, based on the predetermined trend comparison strategy, the second IV characteristic curve obtained by analyzing the second output characteristic is compared with the ideal IV characteristic curve to obtain a second phase match, and the following processing is also performed: the second output characteristic is divided into stages according to the stage division plan to obtain a second stage division result; any output characteristic corresponding to any stage in the second stage division result is extracted; the arbitrary output characteristic is analyzed and an arbitrary current-voltage scatter plot is drawn; based on the principle of random sampling consistency, a curve fitting analysis is performed on the arbitrary current-voltage scatter plot to obtain an arbitrary spline curve; an overlapping comparison analysis is performed between the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlap degree; the arbitrary overlap degree after weighted normalization processing obtains the second phase match.

[0008] In a possible implementation, the stage division plan refers to a division scheme of a predetermined type of stage, and the following processing is also performed: extracting the first stage of the predetermined type of stage and obtaining the first stage characteristics of the first stage; setting the first division scheme of the first stage based on the first stage characteristics, and forming the stage division plan; wherein the predetermined type of stage includes a cutoff region stage, a saturation region stage, and a linear region stage.

[0009] In a possible implementation, a curve fitting analysis is performed on the arbitrary current-voltage scatter plot based on the principle of random sampling consistency to obtain an arbitrary spline curve, and the following processing is also performed: Step A: Acquire a first spline scatter point set of the arbitrary current-voltage scatter plot based on the principle of random sampling consistency; Step B: Obtain a first spline curve based on fitting the first spline scatter point set; Step C: Compare the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter plot to obtain a first non-spline scatter point set; Step D: Perform a support rate analysis on the first spline curve using the first non-spline scatter point set to obtain a first support rate; Step E: When the first support rate reaches a predetermined support threshold, use the first spline curve as the arbitrary spline curve.

[0010] In a possible implementation, step D further performs the following processing: randomly extracting any non-spline scattered point in the first non-spline scattered point set, and recording the any non-spline scattered point as a verification sample point; judging whether the verification sample point meets the first support sample point constraint of the first spline curve; if so, adding the verification sample point to a support sample point list, and counting the number of support sample points in the support sample point list; taking the ratio of the number of support sample points to the first number of verification sample points in the first non-spline scattered point set to obtain the first support rate.

[0011] In a possible implementation, after step D, the following processing is also performed: when the first support rate does not reach the predetermined support threshold, repeat steps A to D until the predetermined support threshold is reached, output the first support rate at that time, and use the first spline curve at that time as the arbitrary spline curve.

[0012] In a possible implementation, a predetermined feedback calibration function is introduced to calibrate and adjust the first phase match to obtain a first target phase match, and the following processing is also performed: material characteristic information of the silicon carbide high-voltage MOS structure is acquired; first application simulation information of the first cycle is extracted from the full-cycle output characteristics; the material characteristic information and the first application simulation information constitute a calibration information set; the phase match factor in the predetermined feedback calibration function is read, and the phase match factor is traversed in the calibration information set to obtain a calibration factor parameter set; according to the predetermined feedback calibration function, the first phase match is calibrated and adjusted in combination with the calibration factor parameter set to obtain the first target phase match.

[0013] The present application also provides a silicon carbide high-voltage MOS structure rapid verification system, including: a full-cycle output characteristic acquisition module, used to dynamically monitor the silicon carbide high-voltage MOS structure to obtain the full-cycle output characteristic, and extract the first output characteristic of the first cycle in the full-cycle output characteristic; a first phase matching acquisition module, used to read a predetermined trend comparison strategy, and based on the predetermined trend comparison strategy, compare the first IV characteristic curve obtained by analyzing the first output characteristic with the ideal IV characteristic curve to obtain a first phase matching; a calibration adjustment module, used to introduce a predetermined feedback calibration function to calibrate and adjust the first phase matching to obtain a first target phase matching; a first structure validity index acquisition module, used to use the first target phase matching as the first structure validity index of the silicon carbide high-voltage MOS structure.

[0014] The invention proposes a method and system for rapid verification of silicon carbide high-voltage MOS structure, dynamically monitors the silicon carbide high-voltage MOS structure to obtain full-cycle output characteristics, and extracts the first output characteristics; reads the predetermined trend comparison strategy, and compares the first IV characteristic curve obtained by analyzing the first output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain the first phase matching; introduces a predetermined feedback calibration function to calibrate and adjust the first phase matching to obtain the first target phase matching; and uses the first target phase matching as the first structure validity index of the silicon carbide high-voltage MOS structure. The invention solves the technical problems of low verification efficiency and large error of silicon carbide high-voltage MOS structure existing in the prior art, and achieves the technical effect of improving verification efficiency and accuracy of verification results. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solution of the embodiment of the present disclosure, the accompanying drawings of the embodiment of the present disclosure will be briefly introduced below. A flow chart is used in the present application to illustrate the operations performed by the system according to the embodiment of the present application. It should be understood that the preceding or following operations are not necessarily performed accurately in order. On the contrary, various steps can be processed in reverse order or simultaneously as needed. At the same time, other operations can also be added to these processes, or one or more operations can be removed from these processes.

[0016] Figure 1 A schematic diagram of a process flow of a rapid verification method for a silicon carbide high-voltage MOS structure provided in an embodiment of the present application; Figure 2 A schematic diagram of the structure of a silicon carbide high-voltage MOS structure rapid verification system provided in an embodiment of the present application.

[0017] Description of reference numerals: full-cycle output characteristic obtaining module 10 , first phase matching obtaining module 20 , calibration adjustment module 30 , first structural validity index obtaining module 40 . DETAILED DESCRIPTION

[0018] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below.

[0019] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0020] In the following description, reference is made to "some embodiments", which describe a subset of all possible embodiments, but it is understood that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict, and the terms "first\second" involved are merely to distinguish similar objects and do not represent a specific ordering of objects. The terms "including" and "having" and any variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product, or server that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or modules that are not clearly listed or inherent to these processes, methods, products, or devices. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of this application. The terms used herein are for the purpose of describing the embodiments of the present application only.

[0021] The present application embodiment provides a method for rapid verification of a silicon carbide high voltage MOS structure, such as Figure 1 As shown, the method includes: Step S100 , dynamically periodically monitoring the silicon carbide high-voltage MOS structure to obtain full-period output characteristics, and extracting a first output characteristic of a first period in the full-period output characteristics.

[0022] Preferably, silicon carbide high-voltage MOS refers to a high-voltage power MOS (metal oxide semiconductor) device made of silicon carbide (SiC) material, that is, it is a metal oxide semiconductor field effect transistor (MOSFET) using silicon carbide as a semiconductor material, which is usually used in high-voltage power electronic applications. High voltage refers to the rated operating voltage range of MOS devices, which is usually between hundreds of volts and thousands of volts, and is suitable for switch control or energy conversion of high-voltage circuits. The MOS structure consists of three layers: metal (M), oxide (O), and semiconductor (S), in which the oxide layer plays an insulating role and the semiconductor layer controls the flow of current. Dynamic periodic monitoring of the silicon carbide high-voltage MOS structure, that is, continuous and real-time monitoring of the dynamic response behavior of the silicon carbide high-voltage MOS structure during operation, is performed by applying a periodically changing input signal (such as voltage or current) and measuring the change of the output signal, so as to obtain the dynamic electrical characteristic data of the structure in a complete working cycle. As the full-cycle output characteristic, the full-cycle output characteristic refers to the collection of all output data of the silicon carbide high-voltage MOS structure in a working cycle, usually including the change curve of current and voltage over time, or the transient response characteristics under certain specific conditions, which fully reflects the dynamic performance and operating status of the device. Finally, the data of the first cycle (first output characteristic) is selected and extracted from the full-cycle output characteristic, wherein the first cycle is any one of the full cycles, and the output characteristic may be the current-voltage (IV) characteristic curve of a certain period of time, the dynamic response parameter of a certain point, or the key indicator related to the ideal characteristic after analysis, so as to ensure the representativeness of the data and the efficiency of the analysis.

[0023] Step S200 , reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first degree of match.

[0024] Preferably, the predetermined trend comparison strategy refers to a rule set in advance based on theoretical analysis and experience accumulation of device performance to determine whether the device performance meets the requirements, which may include a trend evaluation method, such as evaluating the trend change of test data through fitting curves, segmented calculations, etc.; comparison parameters include curve slope, inflection point position, response time, etc.; the tolerance range defines the range of deviation from the ideal curve, which is used to quantify the eligibility of device performance; the first output characteristic is analyzed, that is, the output characteristic of the first cycle when the silicon carbide high-voltage MOS structure is monitored, extracted and converted into a corresponding current-voltage relationship curve, and a first IV characteristic curve is obtained, that is, the current of the MOS structure The relationship curve between current (I) and voltage (V) reflects the dynamic electrical behavior (on, off and dynamic performance) of the device in actual operation. The ideal IV characteristic curve is a performance target curve obtained based on the theoretical design of the device, representing the current-voltage relationship of the device under the optimal working state. The first IV characteristic curve is compared with the ideal IV characteristic curve, that is, based on a predetermined trend comparison strategy, the first IV characteristic curve is compared with the ideal IV characteristic curve by using difference analysis, curve fitting calculation or characteristic parameter comparison to obtain a quantitative index of consistency, namely the first phase matching. A high phase matching means that the device performance is close to the ideal state, and a low phase matching indicates a large deviation.

[0025] Furthermore, step S200 also includes step S210, extracting the second output characteristic of the second cycle in the full-cycle output characteristic; step S220, comparing the second IV characteristic curve obtained by analyzing the second output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a second phase match; step S230, verifying the first phase match with the second phase match.

[0026] Preferably, one cycle is selected from the full-cycle output characteristics and the corresponding dynamic output characteristics of the device are extracted as the second output characteristics, including the performance of voltage, current or other parameters changing with time, so as to provide more sample data for further analyzing the performance of the device and observe the consistency and stability in multi-cycle operation. Then, the second output characteristics are analyzed to obtain the current-voltage relationship curve (IV characteristic curve) of the second cycle. Specifically, by comparing the second IV characteristic curve with the ideal IV characteristic curve, the performance consistency is evaluated based on a predetermined trend comparison strategy (such as calculating the curve difference, the fitting degree of key points, etc.), and the phase matching corresponding to the second cycle (second phase matching) is obtained. Finally, the first phase matching is verified by the second phase matching, that is, by comparing the phase matching of the first cycle and the second cycle, the consistency of the two is checked, so as to verify the reliability and representativeness of the output characteristics of the first cycle. For example, if the first phase matching is close to the second phase matching, it means that the test result of the first cycle can reflect the overall performance of the device. If the difference between the two is large, it may indicate that the device is abnormal (such as fluctuation, unstable operation), and the cause needs to be further analyzed. By comparing and verifying data from multiple working cycles, we ensure that the extracted output characteristics and calculated matching are representative and reliable, improve the accuracy and credibility of the analysis results, and avoid misjudgment caused by relying solely on single-cycle data.

[0027] Furthermore, step S220 also includes step S221, dividing the second output characteristic into stages according to the stage division plan to obtain a second stage division result; step S222, extracting any output characteristic corresponding to any stage in the second stage division result; step S223, analyzing the arbitrary output characteristic and drawing an arbitrary current-voltage scatter plot; step S224, performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the principle of random sampling consistency to obtain an arbitrary spline curve; step S225, performing overlapping comparison analysis on the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlap degree; step S226, obtaining the second phase matching degree by weighted normalization of the arbitrary overlap degree.

[0028] Preferably, the stage division plan refers to a rule for dividing the output characteristics into different time periods or state stages based on the operating characteristics of the silicon carbide high-voltage MOS structure. The division basis may include time periods (such as turn-on, maintenance, and turn-off stages), power characteristics (such as load current or voltage change trends), and dynamic behaviors (such as the change amplitude or frequency of the current waveform). Applying this plan, the output characteristics of the second cycle are decomposed into several stages, and the characteristic data of each stage are determined to obtain the second stage division result; then, any output characteristics corresponding to any stage in the second stage division result are extracted, that is, the output data corresponding to a certain moment or a certain state of a certain stage is randomly extracted, which may include specific voltage and current values, or the curve of these data changing over time, and the relationship between the output voltage and current in this stage is plotted as a current-voltage scatter plot to intuitively reflect the distribution law of current changing with voltage.

[0029] Preferably, a curve fitting analysis is performed on an arbitrary current-voltage scatter plot based on the principle of random sampling consistency, that is, a reliable subset is selected from the scattered data, and a fitting algorithm (such as a spline interpolation method) is used to generate a smooth curve according to the current-voltage scatter plot to obtain an arbitrary spline curve, which is used to approximately describe the current-voltage relationship of this stage, wherein the random sampling consistency principle (RANSAC) is a data analysis algorithm, which is mainly used to process sample data containing noise. The goal is to select a reliable subset from the scattered data to fit the best curve and reduce the impact of noise on the results; then the arbitrary spline curve is overlapped and compared with the ideal IV characteristic curve, the fitted spline curve is superimposed with the theoretical ideal IV curve, and their similarity is evaluated by difference calculation (such as area difference, mean square error, etc.), and an arbitrary overlap degree is obtained, which represents the degree of matching between the arbitrary spline curve and the ideal IV characteristic curve. Finally, by assigning different weights to the arbitrary overlap degrees, the contribution value of the characteristics of each stage is comprehensively considered, and the weighted and standardized overlap degrees are summarized to obtain the overall matching degree of the output characteristics of the second period, and finally the second phase matching degree is obtained.

[0030] Further, step S221 includes step S221a, extracting the first stage of the predetermined type of stage and obtaining the first stage characteristics of the first stage; step S221b, setting the first division scheme of the first stage based on the first stage characteristics and forming the stage division plan; step S221c, wherein the predetermined type of stage includes a cutoff region stage, a saturation region stage and a linear region stage.

[0031] Preferably, the predetermined type of stage includes a cut-off region stage, a saturation region stage and a linear region stage, which reflects the operating characteristics of the device under different working conditions. In the cut-off region stage, the gate voltage (Vgs) is lower than the threshold voltage (Vth), and the conduction channel cannot be formed, the drain-source current (Id) is almost zero (only a small leakage current), the drain-source voltage (Vds) is close to the external power supply voltage, the impedance of the device is extremely high, the device does not conduct current, and it is manifested as the "off" state of the switch; the saturation region stage is also called the "constant current region", the gate voltage is higher than the threshold voltage (Vgs>Vth), and the drain-source voltage (Vds) exceeds a certain saturation value, the conduction channel is completely formed, the drain-source current (Id) is mainly controlled by the gate voltage (Vgs), and hardly changes with the drain-source voltage (Vds), the drain-source voltage (Vds) maintains a low level, the device is fully turned on, the drain-source current is controlled by the gate, and it is manifested as a stable switch "on" state; in the linear region stage (variable resistance region), the gate voltage is higher than the threshold voltage (Vgs > Vth), but the drain-source voltage (Vds) is lower than the saturation value, the conduction channel is not fully formed, the drain-source current (Id) changes linearly with the drain-source voltage (Vds), the drain-source voltage (Vds) is relatively high, but still lower than the saturation value, the device is in a partially on state, and exhibits resistive behavior.

[0032] Preferably, the first stage of the predetermined type of stage is extracted, and the first stage characteristics of the first stage are obtained (data characteristics reflecting the device behavior in the corresponding stage), such as the relationship between voltage and current (such as whether the current in the cut-off region is close to zero), dynamic response characteristics (such as the rate of state change), etc., and then the state or time period of the stage is further subdivided according to the extracted first stage characteristics, so as to more accurately analyze its behavior. For example, the cut-off region stage can be subdivided into "gate rise stage" and "complete cut-off stage", and the division schemes of multiple stages are integrated to form a complete stage division plan to guide the extraction and analysis of characteristics in the entire cycle. By dividing the working cycle of the silicon carbide high-voltage MOS structure into clear stages (such as the cut-off region, saturation region and linear region), and extracting and analyzing the characteristics of each stage in detail, the performance of the device in different states can be systematically grasped, thereby improving the analysis accuracy.

[0033] Furthermore, step S224 also includes step A: obtaining a first spline scatter point set of the arbitrary current-voltage scatter diagram based on the principle of random sampling consistency; step B: obtaining a first spline curve based on fitting the first spline scatter point set; step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter diagram to obtain a first non-spline scatter point set; step D: performing support rate analysis on the first spline curve through the first non-spline scatter point set to obtain a first support rate; step E: when the first support rate reaches a predetermined support threshold, using the first spline curve as the arbitrary spline curve.

[0034] Preferably, the random sampling consistency principle (RANSAC) is used to extract reliable subsets ("inliers") from samples containing a large amount of noise, and by randomly extracting scattered points, the subset that best fits the model is found. Specifically, based on the random sampling consistency principle, the first spline scatter point set of any current-voltage scatter plot is obtained, and these points have high consistency and representativeness in curve fitting; the scattered points are fitted by mathematical interpolation methods (such as B-spline interpolation or Cubic spline interpolation) to generate a smooth curve that can reflect the trend of data changes, that is, the first spline curve, the first spline curve; the first spline scatter point set is compared with the total scatter point set of any current-voltage scatter plot, and the points belonging to the first spline scatter point set are eliminated from the total scatter point set, and the remaining is the first non-spline scatter point set (outliers or noise), wherein the total scatter point set is all data points of any current-voltage scatter plot, including Spline scatter points that meet the spline fitting conditions and non-spline scatter points that deviate from the spline; perform support rate analysis on the first spline curve through the first non-spline scatter point set, that is, check whether the first spline curve can be supported by enough scatter points to verify its representativeness and accuracy; if the points of the first non-spline scatter point set are close to the first spline curve, they can also be reclassified as points of the support curve, thereby improving the support rate; finally, compare the first support rate with the predetermined support threshold, wherein the predetermined support threshold is a pre-set support rate threshold, indicating that the spline curve must be supported by enough scatter points to be accepted, for example, the spline curve is considered valid when the support rate reaches more than 80%. If the first spline curve is greater than the predetermined support threshold, it means that it has passed the support rate verification, and it is confirmed as an arbitrary spline curve as the final description of the current-voltage characteristics of this stage to ensure the accuracy and reliability of the results.

[0035] Furthermore, step D also includes D10, randomly extracting any non-spline scattered point in the first non-spline scattered point set, and recording the arbitrary non-spline scattered point as a verification sample point; step D20, judging whether the verification sample point meets the first support sample point constraint of the first spline curve; step D30, if it meets, adding the verification sample point to the support sample point list, and counting the number of support sample points in the support sample point list; step D40, taking the ratio of the number of support sample points to the first number of verification sample points in the first non-spline scattered point set to obtain the first support rate.

[0036] Preferably, any non-spline scattered point in the first non-spline scattered point set is randomly extracted, and any non-spline scattered point is recorded as a check sample point to verify whether it can support the first spline curve, and then determine whether the check sample point meets the first support sample point constraint of the first spline curve, wherein the first support sample point constraint refers to a condition for determining whether the scattered point "supports" the spline curve, for example, whether the vertical distance between the check sample point and the spline curve is less than a predetermined threshold value. If the check sample point meets the support sample point constraint (the vertical distance between the check sample point and the spline curve is less than or equal to the predetermined threshold value), , it is considered that it can support the first spline curve, and the verification sample points are added to the support sample point list, and the number of support sample points in the support sample point list is counted; finally, the ratio of the number of support sample points to the number of first verification sample points in the first non-spline scatter point set is taken as the first support rate, the number of support sample points, represents the number of non-spline scatter points consistent with the first spline curve, and the total number of the first non-spline scatter point set is used to normalize the support degree. The support rate reflects the representativeness of the first spline curve in the non-spline scatter point set. If the support rate is high, it means that the spline curve fits the entire scatter point data well.

[0037] Furthermore, step D also includes, when the first support rate does not reach the predetermined support threshold, repeating steps A to D until the predetermined support threshold is reached, outputting the first support rate at that time, and using the first spline curve at that time as the arbitrary spline curve.

[0038] Preferably, if the currently calculated support rate (first support rate) is lower than the threshold value, it means that the fitting quality or representativeness of the spline curve is insufficient and needs to be readjusted and optimized, and steps A to D are repeated, that is, the non-spline scatter point set is randomly sampled again, a new spline curve is fitted, the non-spline scatter point set is updated, and the new spline curve is verified by the new non-spline scatter point set, and the support rate is recalculated. If the support rate still does not reach the threshold value, it is repeated again until the predetermined support threshold is reached, and the first support rate at that time is output, and the first spline curve at this time is regarded as an arbitrary spline curve, which is used to represent the characteristic description of the current current-voltage scatter diagram.

[0039] Step S300: introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching degree to obtain a first target phase matching degree.

[0040] Step S300 further includes step S310, obtaining material characteristic information of the silicon carbide high-voltage MOS structure; step S320, extracting the first application simulation information of the first cycle from the full-cycle output characteristics; step S330, the material characteristic information and the first application simulation information constitute a calibration information set; step S340, reading the phase matching factor in the predetermined feedback calibration function, and traversing the phase matching factor in the calibration information set to obtain a calibration factor parameter set; step S350, calibrating and adjusting the first phase matching according to the predetermined feedback calibration function and in combination with the calibration factor parameter set to obtain the first target phase matching.

[0041] Preferably, material characteristic information of the silicon carbide high-voltage MOS structure is obtained, that is, physical and electrical characteristic data of the silicon carbide high-voltage MOS structure, such as material type, electrical properties of silicon carbide (SiC) (for example: wide band gap, high breakdown electric field, high thermal conductivity), conductive properties, electron mobility, conductive bandwidth, etc., thermal characteristics, thermal conductivity, thermal diffusion, etc., breakdown voltage: reflecting the ability of the material to withstand high voltage, etc.; first application simulation information of the first cycle is extracted from the full-cycle output characteristics, and the full-cycle output characteristics refer to the electrical response of the silicon carbide high-voltage MOS structure in a complete working cycle, such as current-voltage (IV) curve, current waveform, etc. The first application simulation information is simulation data related to the first cycle, usually including the initial values ​​of voltage and current, and the dynamic behavior of the first cycle (such as switching time, rise / fall time, peak current, etc.); the material characteristic information is combined with the application simulation information to form a complete calibration information set, which fully reflects the actual operating characteristics and expected behavior of the device.

[0042] Preferably, a matching factor in a predetermined feedback calibration function is read, wherein the feedback calibration function is used to calibrate the matching according to the input material characteristic information and simulation data, and the matching factor is a plurality of factors in the calibration function that affect the performance of silicon carbide high-voltage MOS, and is used to weigh the influence of various input characteristics, including material characteristics, such as high frequency, high efficiency and high voltage resistance, on-resistance and breakdown voltage (the breakdown voltage characterizes the high voltage resistance capability of the device), high temperature reliability (reliability in high temperature environment); dynamic and static characteristics (such as switching speed, switching loss, etc., the operating voltage, current value and static conduction characteristics of the device, etc.), short circuit and overcurrent protection (to ensure that the device can protect itself from damage in harsh environments), the electric field strength of the gate oxide layer (determines the threshold voltage and conduction characteristics of the device), interface defects (causing performance degradation, such as increased leakage current, reduced breakdown voltage, etc.), etc.

[0043] Preferably, the phase matching factors are traversed in the calibration information set, that is, each phase matching factor is compared and analyzed in the calibration information set, so as to calculate the specific influence of each factor, for example, how to adjust the gate design according to the high-frequency and high-efficiency characteristics of the material, or adjust the current and voltage characteristics according to the relationship between the on-resistance and the breakdown voltage, and obtain a specific calibration factor parameter set, which reflects the actual contribution of each material characteristic or performance indicator to the overall device performance. The calibration factor parameter set may include the weight of each factor, the specific impact value of each factor on the performance (such as the proportion of the on-current, the degree of the breakdown voltage, etc.), and finally, the first phase matching is calibrated and adjusted according to the feedback calibration function and the calibration factor parameter set. Specifically, the feedback calibration function is used, and the calibration factor parameter set is used as an input parameter. In combination with a predetermined feedback calibration function, calculations and adjustments are performed to obtain a first target phase matching, so that it more accurately reflects the actual performance, thereby effectively improving the design accuracy and performance stability of the device, and improving its efficiency and reliability in practical applications.

[0044] Step S400: using the first target matching degree as a first structure effectiveness index of the silicon carbide high voltage MOS structure.

[0045] Preferably, the first target matching degree is used as the first structure effectiveness index of the silicon carbide high-voltage MOS structure, and the overall performance and effectiveness of the silicon carbide high-voltage MOS structure are quantified by the calibrated matching degree value, wherein the first structure effectiveness index is used to measure the effectiveness of the performance of the silicon carbide high-voltage MOS structure, and the effectiveness index is a measure of the "effectiveness" or "adaptability" of the device, indicating whether the device can meet the design requirements, especially the stability and reliability under complex conditions such as high voltage and temperature. For example, when the first target matching degree is high, it means that the structure works well under the design expectations, has the characteristics of efficient current transmission, high voltage resistance, low loss, etc., and can effectively perform its functions in applications such as power conversion or high-voltage switching; when the index is low, it indicates that the device may have performance deviations in actual work, may not be able to fully meet the design requirements, and may need further optimization.

[0046] In the above, refer to Figure 1 A method for quickly verifying a silicon carbide high voltage MOS structure according to an embodiment of the present invention is described in detail. Figure 2 A silicon carbide high-voltage MOS structure rapid verification system according to an embodiment of the present invention is described.

[0047] A silicon carbide high-voltage MOS structure rapid verification system according to an embodiment of the present invention is used to solve the technical problems of low efficiency and large error in silicon carbide high-voltage MOS structure verification in the prior art, and achieves the technical effect of improving verification efficiency and accuracy of verification results. A silicon carbide high-voltage MOS structure rapid verification system includes: a full-cycle output characteristic acquisition module 10, a first phase matching acquisition module 20, a calibration adjustment module 30, and a first structure validity index acquisition module 40.

[0048] A full-cycle output characteristic acquisition module 10 is used to dynamically monitor the silicon carbide high-voltage MOS structure to obtain the full-cycle output characteristic, and extract the first output characteristic of the first cycle in the full-cycle output characteristic; a first phase matching acquisition module 20 is used to read a predetermined trend comparison strategy, and compare the first IV characteristic curve obtained by analyzing the first output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first phase matching; a calibration adjustment module 30 is used to introduce a predetermined feedback calibration function to calibrate and adjust the first phase matching to obtain a first target phase matching; a first structure validity index acquisition module 40 is used to use the first target phase matching as the first structure validity index of the silicon carbide high-voltage MOS structure.

[0049] The specific configuration of the first phase matching acquisition module 20 will be described in detail below. The first phase matching acquisition module 20 further includes: extracting the second output characteristic of the second cycle in the full cycle output characteristic; comparing the second IV characteristic curve obtained by analyzing the second output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain the second phase matching; and verifying the first phase matching with the second phase matching.

[0050] The specific configuration of the first phase matching acquisition module 20 will be described in detail below. The first phase matching acquisition module 20 further includes: dividing the second output characteristic into stages according to the stage division plan to obtain the second stage division result; extracting any output characteristic corresponding to any stage in the second stage division result; analyzing the arbitrary output characteristic and drawing any current-voltage scatter plot; performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the principle of random sampling consistency to obtain any spline curve; performing overlapping comparison analysis on the arbitrary spline curve and the ideal IV characteristic curve to obtain any overlap degree; obtaining the second phase matching by weighted normalization of the arbitrary overlap degree.

[0051] The specific configuration of the first phase matching degree obtaining module 20 will be described in detail below. The first phase matching degree obtaining module 20 further includes: extracting the first stage in the predetermined type of stage and obtaining the first stage characteristics of the first stage; setting the first division scheme of the first stage based on the first stage characteristics and forming the stage division plan; wherein the predetermined type of stage includes a cutoff region stage, a saturation region stage and a linear region stage.

[0052] The specific configuration of the first phase matching acquisition module 20 will be described in detail below. The first phase matching acquisition module 20 further includes: step A: obtaining the first spline scatter point set of the arbitrary current-voltage scatter diagram based on the principle of random sampling consistency; step B: fitting the first spline curve based on the first spline scatter point set; step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter diagram to obtain a first non-spline scatter point set; step D: performing support rate analysis on the first spline curve through the first non-spline scatter point set to obtain a first support rate; step E: when the first support rate reaches a predetermined support threshold, taking the first spline curve as the arbitrary spline curve.

[0053] The specific configuration of the first matching degree obtaining module 20 will be described in detail below. The first matching degree obtaining module 20 further includes: randomly extracting any non-spline scattered point in the first non-spline scattered point set, and recording the any non-spline scattered point as a check sample point; judging whether the check sample point meets the first support sample point constraint of the first spline curve; if so, adding the check sample point to the support sample point list, and counting the number of support sample points in the support sample point list; taking the ratio of the number of support sample points to the number of first check sample points in the first non-spline scattered point set to obtain the first support rate.

[0054] The specific configuration of the first matching degree obtaining module 20 will be described in detail below. The first matching degree obtaining module 20 further includes: when the first support rate does not reach the predetermined support threshold, repeating steps A to D until the predetermined support threshold is reached, outputting the first support rate at that time, and using the first spline curve at that time as the arbitrary spline curve.

[0055] The specific configuration of the calibration adjustment module 30 will be described in detail below. The calibration adjustment module 30 further includes: obtaining material characteristic information of the silicon carbide high-voltage MOS structure; extracting the first application simulation information of the first cycle from the full-cycle output characteristics; the material characteristic information and the first application simulation information constitute a calibration information set; reading the phase matching factor in the predetermined feedback calibration function, and traversing the phase matching factor in the calibration information set to obtain a calibration factor parameter set; calibrating and adjusting the first phase matching according to the predetermined feedback calibration function and in combination with the calibration factor parameter set to obtain the first target phase matching.

[0056] A silicon carbide high-voltage MOS structure rapid verification system provided by an embodiment of the present invention can execute a silicon carbide high-voltage MOS structure rapid verification method provided by any embodiment of the present invention, and has functional modules and beneficial effects corresponding to the execution method.

[0057] Although the present application makes various references to certain modules in the system according to the embodiments of the present application, any number of different modules may be used and run on the user terminal and / or server, and the various units and modules included are only divided according to functional logic, but are not limited to the above division, as long as the corresponding functions can be achieved; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0058] The above specific implementations do not constitute a limitation on the protection scope of this application. It should be understood by those skilled in the art that various modifications, combinations and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of this application should be included in the protection scope of this application.

Claims

1. A method for rapid verification of a silicon carbide high voltage MOS structure, characterized in that: include: Performing dynamic periodic monitoring on the silicon carbide high-voltage MOS structure to obtain full-period output characteristics, and extracting a first output characteristic of a first period in the full-period output characteristics; Reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first phase match; Introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching degree to obtain a first target phase matching degree; The first target matching degree is used as a first structure effectiveness index of the silicon carbide high voltage MOS structure.

2. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: Reading a predetermined trend comparison strategy, and comparing a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first degree of match, further comprising: Extracting a second output characteristic of a second period in the full-period output characteristic; Comparing a second IV characteristic curve obtained by analyzing the second output characteristic with the ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a second phase match; The first phase compatibility is verified with the second phase compatibility.

3. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 2, characterized in that: include: Divide the second output characteristic into stages according to the stage division plan to obtain a second stage division result; Extracting any output feature corresponding to any stage in the second stage division result; Analyze the arbitrary output characteristics and draw an arbitrary current-voltage scatter plot; Performing curve fitting analysis on the arbitrary current-voltage scatter plot based on the principle of random sampling consistency to obtain an arbitrary spline curve; Performing overlapping comparison analysis on the arbitrary spline curve and the ideal IV characteristic curve to obtain an arbitrary overlapping degree; The arbitrary overlap degree after weighted normalization processing is used to obtain the second matching degree.

4. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 3, characterized in that: The stage division plan refers to the division plan of the predetermined type of stages, including: extracting a first stage of the predetermined type of stages and obtaining a first stage characteristic of the first stage; Setting a first division scheme for the first stage based on the characteristics of the first stage, and forming the stage division plan; The predetermined type of stage includes a cutoff region stage, a saturation region stage and a linear region stage.

5. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 3, characterized in that: Based on the principle of random sampling consistency, a curve fitting analysis is performed on the arbitrary current-voltage scatter plot to obtain an arbitrary spline curve, including: Step A: obtaining a first spline scatter point set of the arbitrary current-voltage scatter plot based on the principle of random sampling consistency; Step B: fitting a first spline curve based on the first spline scattered point set; Step C: comparing the first spline scatter point set with the total scatter point set of the arbitrary current-voltage scatter diagram to obtain a first non-spline scatter point set; Step D: performing support rate analysis on the first spline curve using the first non-spline scattered point set to obtain a first support rate; Step E: When the first support rate reaches a predetermined support threshold, the first spline curve is used as the arbitrary spline curve.

6. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 5, characterized in that: Step D comprises: Randomly extract any non-spline scattered point in the first non-spline scattered point set, and record the any non-spline scattered point as a verification sample point; Determining whether the verification sample point meets the first supporting sample point constraint of the first spline curve; If it is in compliance, the verification sample point is added to the support sample point list, and the number of support sample points in the support sample point list is counted; The first support rate is obtained by taking the ratio of the number of the supporting sample points to the number of the first verification sample points in the first non-spline scattered point set.

7. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 5, characterized in that: After step D, the method further comprises: When the first support rate does not reach the predetermined support threshold, repeat steps A to D until the predetermined support threshold is reached, output the first support rate at that time, and use the first spline curve at that time as the arbitrary spline curve.

8. A method for rapid verification of a silicon carbide high voltage MOS structure as claimed in claim 1, characterized in that: Introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching to obtain a first target phase matching, including: Obtain material characteristic information of silicon carbide high voltage MOS structure; extracting first application simulation information of the first period from the full-period output characteristics; The material characteristic information and the first application simulation information constitute a calibration information set; Reading the matching factor in the predetermined feedback calibration function, and traversing the matching factor in the calibration information set to obtain a calibration factor parameter set; The first degree of matching is calibrated and adjusted according to the predetermined feedback calibration function and in combination with the calibration factor parameter set to obtain the first target degree of matching.

9. A silicon carbide high voltage MOS structure rapid verification system, characterized in that: The system is used to implement a method for rapid verification of a silicon carbide high-voltage MOS structure according to any one of claims 1 to 8, and the system comprises: A full-cycle output characteristic acquisition module is used to dynamically monitor the silicon carbide high-voltage MOS structure to obtain a full-cycle output characteristic, and extract a first output characteristic of a first cycle in the full-cycle output characteristic; a first phase matching degree obtaining module, configured to read a predetermined trend comparison strategy, and compare a first IV characteristic curve obtained by analyzing the first output characteristic with an ideal IV characteristic curve based on the predetermined trend comparison strategy to obtain a first phase matching degree; A calibration adjustment module, used for introducing a predetermined feedback calibration function to calibrate and adjust the first phase matching degree to obtain a first target phase matching degree; The first structure validity index acquisition module is used to use the first target matching degree as the first structure validity index of the silicon carbide high-voltage MOS structure.

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