A DTCO process PEX method, device, equipment and product of a graph convolutional neural network

Abstract

The application discloses a DTCO process PEX method, device, equipment and product of a graph convolutional neural network. The method introduces a graph convolutional neural network to model the geometric structure and topological connection of a device. Through an adjacency matrix and node feature aggregation, the method learns the parasitic parameter distribution law under a complex structure, and realizes high-precision, high-speed and multi-target parameterized parasitic parameter extraction. Meanwhile, the method supports adaptive collaborative optimization of design process parameters, and further improves the applicability and reliability of PEX in the DTCO process.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of parasitic parameter extraction technology in integrated circuit design, and particularly relates to a DTCO process PEX method, device, equipment and product of a graph convolutional neural network. BACKGROUND

[0002] With the continuous evolution of integrated circuit manufacturing process, the device structure under advanced process nodes is increasingly complex, and the mutual influence between design and process is increasingly significant. In order to fully consider the process limitations and design performance requirements in the early stage of design, design technology co-optimization (DTCO) emerges as the times require. DTCO aims to balance chip performance, power consumption, area and manufacturing cost at a higher level by simultaneously optimizing design parameters and process parameters, avoiding multiple large-scale modifications in the later stage of design, thereby improving design efficiency and reducing design cost.

[0003] Parasitic extraction (PEX) is a key link in the integrated circuit manufacturing process. Accurate and efficient extraction of parasitic resistance and parasitic capacitance parameters of interconnection lines and devices is the basis for subsequent steps such as timing analysis and signal integrity analysis, and directly affects the performance and reliability of chip design. The traditional PEX method is mainly based on analytical modeling or numerical simulation, and for complex device structures under advanced process nodes, the extraction efficiency is low and the accuracy is difficult to meet the requirements. SUMMARY

[0004] In view of the deficiencies of the prior art, the present application provides a DTCO process PEX method, device, equipment and product of a graph convolutional neural network, which introduces a graph convolutional neural network to model the geometric structure and topological connection of a device, learns the parasitic parameter distribution law under a complex structure through an adjacency matrix and node feature aggregation, and realizes high-precision, high-speed and multi-target parameterized parasitic parameter extraction. At the same time, the present method supports adaptive co-optimization of design and process parameters, further improving the applicability and reliability of PEX in the DTCO process.

[0005] In a first aspect, a DTCO process PEX method of a graph convolutional neural network is provided, comprising:

[0006] The three-dimensional structure information of the device is preprocessed, and the topological connection relationship inside the device and the attribute parameters of each planar element are obtained through feature extraction; the topological connection relationship inside the device is converted into an adjacency matrix of a graph, and the attribute parameters of the planar element are converted into a node feature matrix of the graph; the graph convolutional neural network extracts high-level feature representation of the device structure according to input, and predicts multiple target parameters of each planar element, wherein the input includes the adjacency matrix and the node feature matrix; the graph convolutional neural network outputs a prediction result, and the prediction result includes the multiple target parameters of each planar element; and an automatic PEX parameter extraction optimization closed loop is constructed according to the multiple target parameters of each planar element.

[0007] With reference to the first aspect, in some implementations of the first aspect, the preprocessing of the three-dimensional structure information of the device and the obtaining of the topological connection relationship inside the device and the attribute parameters of each planar element through feature extraction comprises: converting the three-dimensional structure information of the device into a graph data format, and discretizing into multiple planar elements for feature extraction and parameterization by using a voxelization method or a mesh division method.

[0008] With reference to the first aspect, in some implementations of the first aspect, the graph convolutional neural network extracts high-level feature representation of the device structure according to input, comprising: the graph convolutional neural network extracts high-level feature representation of the device structure according to input through multi-layer graph convolution operation and / or pooling operation, etc.

[0009] With reference to the first aspect, in some implementations of the first aspect, the predicting multiple target parameters of each planar element comprises: predicting multiple target parameters of each planar element through a multi-task learning framework.

[0010] With reference to the first aspect, in some implementations of the first aspect, the graph convolutional neural network adopts a structure of multiple layers of graph convolutional layers and fully connected layers, wherein the structure features of the device are extracted through neighborhood feature aggregation and weight transformation.

[0011] With reference to the first aspect, in some implementations of the first aspect, the constructing an automatic PEX parameter extraction optimization closed loop according to the multiple target parameters of each planar element comprises: taking the values of the multiple target parameters of each planar element extracted as optimization objectives, taking the design parameters and process parameters of the device as optimization variables, and constructing an automatic PEX parameter extraction optimization closed loop.

[0012] The second aspect provides a DTCO process PEX device of a graph convolutional neural network, the device comprising:

[0013] An acquisition module is configured to acquire device three-dimensional structure information; a processing module is configured to preprocess the device three-dimensional structure information, and obtain a topological connection relationship inside the device and attribute parameters of each planar surface unit through feature extraction; the processing module is further configured to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planar surface unit into a node feature matrix of the graph; the processing module is further configured to construct a graph convolutional neural network, the graph convolutional neural network extracts high-level feature representation of the device structure according to an input, and predicts a plurality of target parameters of each planar surface unit, wherein the input includes the adjacency matrix and the node feature matrix; the processing module is further configured to output a prediction result through the graph convolutional neural network, the prediction result including the plurality of target parameters of each planar surface unit; and the processing module is further configured to construct an automatic PEX parameter extraction and optimization closed loop according to the plurality of target parameters of each planar surface unit.

[0014] In a third aspect, a computing device is provided, the computing device comprising a processor and a memory, the processor configured to execute instructions stored in the memory to cause the computing device to perform the method of any of the first aspect.

[0015] In a fourth aspect, a computer program product comprising instructions which, when executed by a computing device, cause the computing device to perform the method of any of the first aspect is provided.

[0016] The present application has the following advantages:

[0017] (1) The graph convolutional neural network is adopted to model the topological connection characteristics of the complex structure of the device, which overcomes the limitation that the traditional machine learning method is difficult to process irregular geometric shapes, and significantly improves the accuracy and speed of PEX.

[0018] (2) The multi-task learning framework is introduced to realize multi-target parameterized parasitic parameter extraction, meet the requirements of DTCO process on PEX flexibility and scalability, support automatic collaborative optimization of design process parameters, expand the application range of PEX in the DTCO process, and improve the efficiency and effect of design and process collaborative optimization.

[0019] (3) The error back propagation and closed loop iteration strategy are adopted to continuously improve the prediction accuracy and robustness of PEX, and reduce the quality and quantity requirements of the training data. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 The figure is a schematic diagram of the DTCO process PEX method of the graph convolutional neural network of an embodiment of the present application.

[0021] Figure 2An adjacency matrix and node features of an input data set of an embodiment of the present application.

[0022] Figure 3 A structure diagram of a graph convolutional neural network model of an embodiment of the present application.

[0023] Figure 4 A PEX efficient extraction result graph based on a graph convolutional neural network of an embodiment of the present application.

[0024] Figure 5 A flowchart of a DTCO process PEX of a graph convolutional neural network of an embodiment of the present application. DETAILED DESCRIPTION

[0025] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative labor fall within the scope of protection of the present application.

[0026] In recent years, machine learning methods have begun to be applied to the PEX field, but most existing methods regard devices as regular geometric figures, ignoring the topological connection relationship between complex structures, and are difficult to replace existing field solvers, and accurately model the field effect in three-dimensional space.

[0027] In addition, in the DTCO process, PEX not only needs to extract parasitic parameters quickly and accurately, but also needs to support multi-objective parameterized modeling to adapt to different design process requirements. However, the existing PEX method is difficult to balance between extraction speed, accuracy and multi-objective optimization capability, and cannot meet the requirements of flexibility and scalability of PEX in the DTCO process.

[0028] Therefore, there is an urgent need for an innovative PEX method that can fully consider the topological connection characteristics of complex device structures, support multi-objective parameterized modeling while ensuring high-precision and high-speed extraction of parasitic parameters, and flexibly adapt to different design process requirements.

[0029] The present application provides a DTCO process PEX method of a graph convolutional neural network, which introduces a graph convolutional neural network to model the geometric structure and topological connection of a device, learns the parasitic parameter distribution law under complex structures through the aggregation of adjacency matrices and node features, and realizes high-precision, high-speed and multi-objective parameterized parasitic parameter extraction. At the same time, the method supports adaptive collaborative optimization of design process parameters, further improving the applicability and reliability of PEX in the DTCO process.

[0030] An embodiment of the present application provides a DTCO process PEX method of a graph convolutional neural network, as shown in the following figure, comprising: Figure 1

[0031] S100, pre-processing three-dimensional structure information of a device, and obtaining a topological connection relationship inside the device and attribute parameters of each planar surface unit through feature extraction;

[0032] S200, converting the topological connection relationship inside the device into an adjacency matrix of a graph, and converting the attribute parameters of the planar surface unit into a node feature matrix of the graph;

[0033] S300, a graph convolutional neural network extracts a high-level feature representation of a device structure according to an input, and predicts a plurality of target parameters of each planar surface unit, wherein the input comprises the adjacency matrix and the node feature matrix;

[0034] S400, the graph convolutional neural network outputs a prediction result, and the prediction result comprises the plurality of target parameters of each planar surface unit;

[0035] S500, constructing an automatic PEX parameter extraction and optimization closed loop according to the plurality of target parameters of each planar surface unit.

[0036] The above method breaks through the limitation of the traditional PEX method by applying the graph convolutional neural network to PEX modeling and parameter extraction, opens up an intelligent and automatic innovation path for advanced process parasitic parameter extraction, and constructs a self-learning and self-adaptive parasitic parameter extraction mechanism. The closed loop optimization enables the model to adapt to process changes, reduces the dependence on the amount and quality of training data, and has significant technical advancement and practical value. In promoting the development of DTCO technology, accelerating the upgrading of integrated circuit design and manufacturing, and other aspects, it will play an important role.

[0037] It can be understood that the graph convolutional neural network can be pre-trained, for example, a multi-task learning framework can be used to predict a plurality of target parameters of each planar surface unit, and simulation or test data can be used to train the network. In the application process, actual measurement parameter data can also be continuously collected and used for online updating of the graph convolutional neural network model, so that the prediction accuracy and robustness of the model are continuously improved.

[0038] In step S100, the three-dimensional structure information of the device can be converted into a graph data format, and a voxelization method or a grid division method can be used to discretize it into a plurality of planar surface units for feature extraction and parameterization. For example, a voxelization method can be used to discretize a plurality of planar surface units, and then the material, size, position and other attribute features of each unit can be extracted.

[0039] ​Specifically, a three-dimensional physical model of the device can be provided as Ω, a material type distribution function of the device as M(x, y, z), a geometric size function as G(x, y, z), and a spatial position function as P(x, y, z), where (x, y, z) is a three-dimensional coordinate. The three-dimensional structure information of the device can be represented as:

[0040] Ω = {M(x, y, z), G(x, y, z), P(x, y, z) | (x, y, z) ∈ R 3}

[0041] For the voxelization method, the three-dimensional space can be divided into cubic voxel units of equal size, and the edge length of each voxel is δ. The device model Ω can be discretized into N x × N y × N z voxel units, where are the number of voxels in the x, V, and z directions, respectively, and L x , L y , L z are the dimensions of the device in the three directions. Each voxel can be represented by its center coordinates (x i , y j , z k ), and the corresponding material type, geometric size, and spatial position attributes are:

[0042] m ijk = M(x i , y j , z k ), g ijk = G(x i , y j , z k ), p ijk = P(x i , y j , z k )

[0043] where i = 1, 2,..., N x , j = 1, 2,..., N y , and k = 1, 2,..., N z are the index numbers of the voxels.

[0044] For the meshing method, in the meshing method, the element size is not equal, and the device model Ω is divided into tetrahedral or hexahedral elements of different sizes. Let K be the total number of elements, and each element be represented by its node coordinates , where N k is the number of nodes of the kth element. The material type, geometric size, and spatial position attributes of the kth element can be calculated by interpolation functions:

[0045]

[0046]

[0047]

[0048] wherein, is the interpolation basis function of the i-th node in the k-th unit.

[0049] Through the above voxelization or meshing, the continuous three-dimensional model of the device can be discretized into a plurality of units, each unit extracting material, size, position, and other attribute features.

[0050] The topological connection relationship in the device obtained in step S100 and the attribute parameters of each planar unit can be specifically as shown in the device structure diagram part of Figure 2 .

[0051] The adjacency matrix and node features in step S200 can be specifically as shown in Figure 2 . It can be understood that the adjacency matrix can represent the topological connection relationship between the planar units, and in some embodiments, for example, in the embodiment shown in Figure 2 , the matrix elements are 0-1 binary, 1 representing that two units are connected, and 0 representing that they are not connected; the node feature matrix can record the attribute information of each unit, and in some embodiments, for example, in the embodiment shown in Figure 2 , each column corresponds to a unit, and each row corresponds to various attributes of the unit.

[0052] Specifically, the connection relationship between the planar units inside the device can be represented by the adjacency matrix A of the graph, and the matrix element A ij has the following values:

[0053]

[0054] Specifically, assuming that the device model is discretized into N planar units, the dimension of the adjacency matrix A is N×N. A ij =1 represents that the i-th unit and the j-th unit are physically connected, and the conductive or insulating material is connected; A ij =0 represents that the two units are not directly connected. A is a symmetric matrix, that is, A ij =A ji .

[0055] In voxelization discretization, each voxel is connected with the voxels having a shared face. Assuming that the index number of the (i, j, k)th voxel is n=i+(j-1)N x +(k-1)N x N y , the adjacency matrix element A nn′ has the following relationship with the voxel coordinates:

[0056]

[0057] where n' is the index of the (j', j', k')th voxel. |i-i'|+|j-j'|+|k-k'|=1 means that two voxels have a common face.

[0058] In tetrahedral mesh partitioning, each cell is connected with its neighboring cells through common faces. Let the index of the 4 nodes of cell k be The index of the 4 nodes of cell k' be Then the adjacency matrix element A kk′ The relationship with the node index is:

[0059]

[0060] That is, when two tetrahedral cells have 3 common nodes, there is a connection relationship between them.

[0061] In hexahedral mesh partitioning, each cell is connected with its neighboring cells through common faces. Similar to the tetrahedral case, the value of the adjacency matrix element is determined by judging whether two cells have a common face.

[0062] In some embodiments, the adjacency matrix only reflects the topological connection relationship inside the device, and does not contain the physical properties of the connection. Material type, size, and other attribute information can be embodied in the node features. The adjacency matrix and the node features can jointly constitute the input of the graph convolutional neural network, which is used to learn the mapping relationship between the device structure and the parameters.

[0063] In the above step S300, the high-level feature representation of the device structure can be extracted through multi-layer graph convolution operation, pooling operation, etc.; and the multiple target parameters of each planar unit can be predicted through a multi-task learning framework.

[0064] where the mathematical expression of the graph convolution operation is:

[0065]

[0066] where Z (l) is the output feature matrix of the first layer of graph convolution, Z (l-1) is the output feature matrix of the previous layer, is the adjacency matrix with self-connection, I is the unit matrix, is the degree matrix of , and the definition of the degree matrix is That is, the degree of the i-th node is equal to the number of edges connected with it, and W (l)W is the weight matrix of the first layer, and σ is the activation function, commonly ReLU function σ(x) = max(0, x).

[0067] The graph convolution operation can be understood as a kind of local feature aggregation and transformation on graph structure data. Specifically:

[0068] The aggregation of neighborhood information is realized, and the features of each node are weighted and summed with the features of its neighbor nodes, and the weight is determined by , called graph convolution kernel. The convolution kernel normalizes the adjacency matrix A, so that the amount of information received by each node is inversely proportional to its degree, and the larger the degree, the less information each node obtains from each edge.

[0069] The aggregated feature matrix is multiplied by the weight matrix W (l) , realizing feature transformation and dimension adjustment. The shape of W (l) is C (l-1) × C (l) , where C (l-1) and C (l) are the feature dimensions of the (l-1)th and 1st layers, respectively.

[0070] The transformed feature matrix is nonlinearly mapped by the activation function σ to improve the expression ability of the model. The activation function can introduce nonlinear factors to enhance the network's ability to learn complex features.

[0071] Through multiple layers of graph convolution operations, the receptive field of the convolution kernel gradually expands, and the structural information of nodes in a larger range can be extracted. The number of layers L of graph convolution depends on the complexity of the device structure and the required feature expression ability.

[0072] The output feature matrix Z (L) of the graph convolution is input to the fully connected layer for feature interpretation and parameter prediction. Let the weight matrix of the fully connected layer be W (fc) , and the bias vector be b (fc) , then the kth parameter prediction value of the ith plowing surface unit is:

[0073]

[0074] where, is the feature vector of the ith node.

[0075] Through end-to-end training of the graph convolutional neural network, the internal relationship between the device structure features and the electrical parameters is learned, so that the parameters can be quickly and accurately extracted. Graph convolution makes full use of the topological structure information of the device, and has stronger feature extraction and generalization ability compared with traditional parameterized modeling methods.

[0076] As Figure 3As shown, the graph convolutional neural network can adopt a structure of multiple graph convolutional layers and fully connected layers to extract the structural features of the device through neighborhood feature aggregation and weight transformation. The graph convolutional layer uses a normalized graph convolution kernel to perform weighted summation on the node features, captures the local connection mode, and introduces nonlinearity through an activation function. The fully connected layer maps the extracted features to the parasitic capacitance parameter values. The training of the network is completed through end-to-end supervised learning, with the error between the extracted parameters and the true parameters as the optimization objective.

[0077] In the step S500, the PEX parameter extraction optimization closed loop is constructed according to the plurality of target parameters of each planarization unit. Specifically, the values of the plurality of target parameters of each planarization unit, which can also be referred to as multi-objective parameter values, are taken as optimization objectives, and the design parameters and process parameters of the device are taken as optimization variables to construct the PEX parameter extraction optimization closed loop.

[0078] In some embodiments, the mathematical form of the PEX parameter extraction optimization problem can be:

[0079]

[0080] wherein, T target parameter values extracted by the graph convolutional neural network, is the true value of the parameter, and are the N α dimensional design parameter vector and the N β dimensional process parameter vector, respectively, g i (α, β) = 0 is the i-th equality constraint, and h j (α, β) ≤ 0 is the j-th inequality constraint, and there are p equality constraints and q inequality constraints in total.

[0081] is the objective function of the PEX parameter extraction optimization, which is used to measure the error between the extracted parameters and the true parameters. Common forms of objective functions include mean squared error, mean absolute error, etc. For example, the MSE (Mean Squared Error) loss is:

[0082]

[0083] The equality constraint g i (α, β) = 0 is usually given by a device physics model, reflecting the physical laws and device equations that the design parameters and process parameters need to satisfy, such as the carrier continuity equation, Poisson equation, etc. in semiconductor devices.

[0084] The inequality constraint h jThe (a, b) ≤ 0 gives the range and boundary conditions of the parameter values, such as the upper and lower limits of the geometric size, the reasonable interval of the doping concentration, etc. These constraints ensure that the parameters obtained by optimization have physical feasibility.

[0085] As Figure 4 shown in the embodiments, the trained graph convolutional neural network is used to extract the parasitic capacitance parameters of the new device node features, and the extraction results are used as the initial solution of the optimization algorithm, which is further optimized and calibrated under the premise of meeting the physical constraint conditions, to obtain the final high-precision parasitic capacitance parameter extraction results, with an average relative error (MRE) of 1.9%.

[0086] Through the above embodiments, the efficiency and accuracy of the parasitic parameter extraction are improved, and the present application can be effectively integrated into the existing integrated circuit design process, thereby accelerating the design cycle, reducing the design cost, and improving the performance and reliability of the integrated circuit product.

[0087] In a second aspect, a DTCO process PEX device of a graph convolutional neural network is provided, and the device comprises:

[0088] The acquisition module is configured to acquire device three-dimensional structure information; the processing module is configured to preprocess the device three-dimensional structure information, and obtain the topological connection relationship inside the device and the attribute parameters of each planar surface unit through feature extraction; the processing module is further configured to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planar surface unit into a node feature matrix of the graph; the processing module is further configured to construct a graph convolutional neural network, which extracts high-level feature representation of the device structure according to an input, and predicts a plurality of target parameters of each planar surface unit, wherein the input includes the adjacency matrix and the node feature matrix; the processing module is further configured to output a prediction result through the graph convolutional neural network, wherein the prediction result includes the plurality of target parameters of each planar surface unit; and the processing module is further configured to construct an automated PEX parameter extraction and optimization closed loop according to the plurality of target parameters of each planar surface unit.

[0089] The present application also provides a flowchart of a DTCO process PEX of a graph convolutional neural network, as Figure 5 shown.

[0090] The present application also provides a computing device, which comprises a processor and a memory, wherein the processor is configured to execute instructions stored in the memory, so that the computing device performs the method according to any one of the above embodiments.

[0091] The present aspect also provides a computer program product containing instructions which, when executed by a computing device, cause the computing device to perform the method of any of the above embodiments.

[0092] It is to be understood that the terminology "including", "comprising", or any other variation thereof, is intended to cover a non-exclusive inclusion such that processes, methods, articles, or apparatuses that comprise a list of elements are not necessarily limited to those elements but can include other elements not expressly listed or inherent to such processes, methods, articles, or apparatuses.

[0093] While embodiments of the present application have been shown and described, it is to be understood that the application is not limited to the details of the embodiments shown, and that the application can be changed in various details without departing from the spirit and the scope of the application, which is defined by the appended claims and their equivalents.

Claims

1. A DTCO flow PEX method for graph convolutional neural networks, characterized in that, The method comprises the following steps: The three-dimensional structure information of the device is preprocessed, and the topological connection relationship inside the device and the attribute parameters of each planar element are obtained through feature extraction; The topological connection relationship inside the device is converted into an adjacency matrix of a graph, and the attribute parameters of the planar element are converted into a node feature matrix of the graph; The graph convolutional neural network extracts high-level feature representation of the device structure according to input, and predicts multiple target parameters of each planar element, wherein the input comprises the adjacency matrix and the node feature matrix; The graph convolutional neural network outputs a prediction result, and the prediction result comprises the multiple target parameters of each planar element; According to the multiple target parameters of each planar element, an automatic PEX parameter extraction optimization closed loop is constructed.

2. The method of claim 1, wherein, The preprocessing of the three-dimensional structure information of the device and the obtaining of the topological connection relationship inside the device and the attribute parameters of each planar element comprise: The three-dimensional structure information of the device is converted into a graph data format, and a voxelization method or a mesh division method is used to discretize multiple planar elements for feature extraction and parameterization.

3. The method according to claim 1 or 2, characterized in that, The graph convolutional neural network extracts high-level feature representation of the device structure according to input, which comprises: The graph convolutional neural network extracts high-level feature representation of the device structure according to input through multi-layer graph convolution operation and / or pooling operation, etc.

4. The method of claim 3, wherein, The prediction of the multiple target parameters of each planar element comprises: The multiple target parameters of each planar element are predicted through a multi-task learning framework.

5. The method of claim 3, wherein, The graph convolutional neural network adopts a structure of multiple graph convolution layers and fully connected layers, wherein the structural features of the device are extracted through neighborhood feature aggregation and weight transformation.

6. The method of claim 1 or 2, wherein, According to the multiple target parameters of each planar element, an automatic PEX parameter extraction optimization closed loop is constructed, which comprises: The values of the multiple target parameters of each planar element extracted are taken as optimization objectives, the design parameters and process parameters of the device are taken as optimization variables, and an automatic PEX parameter extraction optimization closed loop is constructed.

7. A DTCO flow PEX device for graph convolutional neural networks, characterized in that, The device comprises: An acquisition module, configured to acquire three-dimensional structure information of a device; A processing module, configured to preprocess the three-dimensional structure information of the device, and obtain a topological connection relationship inside the device and attribute parameters of each planar element through feature extraction; The processing module is further configured to convert the topological connection relationship inside the device into an adjacency matrix of a graph, and convert the attribute parameters of the planar element into a node feature matrix of the graph; The processing module is further configured to construct a graph convolutional neural network, wherein the graph convolutional neural network extracts high-level feature representation of the device structure according to input, and predicts multiple target parameters of each planar element, wherein the input comprises the adjacency matrix and the node feature matrix; The processing module is further configured to output a prediction result through the graph convolutional neural network, and the prediction result comprises the multiple target parameters of each planar element; The processing module is further configured to construct an automatic PEX parameter extraction optimization closed loop according to the multiple target parameters of each planar element.

8. A computing device, comprising: The computer device includes a processor and a memory, the processor to execute instructions stored in the memory to cause the computing device to perform the method of any of claims 1-6.

9. A computer program product comprising instructions, characterized in that, The instructions, when executed by a computing device, cause the computing device to perform the method of any of claims 1-6.

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