Power supply circuit and storage device

Abstract

The invention discloses a power supply circuit and a storage device, and the power supply circuit comprises a main circuit, the input end of which receives a first voltage; the control circuit is connected with the control end of the main circuit and used for controlling the main circuit to output the first voltage or the second voltage, the first voltage is used for supplying power to the first storage circuit, and the second voltage is used for supplying power to the second storage circuit. The main circuit outputs the first voltage to supply power to the first storage circuit or outputs the second voltage to supply power to the second storage circuit, so that power supply to the first storage circuit and the second storage circuit is realized, and the performance requirements of the first storage circuit and the second storage circuit are met. In addition, the input first voltage is used for supplying power to the first storage circuit, the voltage margin is prevented from being reduced, and the reliability of the first storage circuit is improved.

Description

Technical Field

[0001] The present application relates to the field of storage technology, and in particular to a power supply circuit and a storage device. Background Art

[0002] As memory products develop towards high speed and low power consumption, memory manufacturing processes are also constantly improving. The device process feature size is getting smaller and smaller, which brings about the dual optimization of speed and power consumption. However, it also weakens the voltage resistance of the device and cannot be directly applied to the external power supply voltage of SDR type memory.

[0003] For SDR (Synchironous Dynamic Random) memory and DDR (Double Data Rate) memory, the operating voltage of SDR memory and DDR memory are both relatively high and have a large difference. The prior art ensures that the SDR memory works at a lower voltage by designing a step-down circuit to meet the requirements of the SDR memory; however, the voltage margin of the step-down circuit is reduced, and the performance requirements of the DDR memory cannot be met. Summary of the invention

[0004] The present application provides a power supply circuit and a storage device, which can ensure that there is no problem with the voltage resistance of the device under the voltage of the SDR storage unit, and at the same time ensure that the voltage margin of the DDR storage unit is sufficient.

[0005] The present application provides a power supply circuit for supplying power to a storage device, wherein the storage device comprises a first storage circuit and a second storage circuit; the power supply circuit comprises:

[0006] A main circuit, wherein an input terminal of the main circuit receives a first voltage;

[0007] A control circuit is connected to the control end of the main circuit and is used to control the main circuit to output the first voltage or the second voltage, the first voltage is used to power the first storage circuit, the second voltage is used to power the second storage circuit, and the first voltage is greater than the second voltage.

[0008] Among them, the main circuit includes a first switch tube and a second switch tube, the source of the first switch tube and the source of the second switch tube receive the first voltage, the gate of the first switch tube is connected to the control circuit, the gate and drain of the second switch tube are connected, and the drain of the first switch tube is connected to the drain of the second switch tube, for outputting the first voltage or the second voltage.

[0009] When the control circuit controls the first switch tube to be turned on and the second switch tube to be turned off, the drain of the first switch tube outputs the first voltage to the first storage circuit.

[0010] When the control circuit controls the gate and drain of the first switch tube to be connected, the drain of the first switch tube outputs the second voltage to the second storage circuit, and the second voltage is equal to the first voltage minus the voltage threshold between the gate and source of the first switch tube.

[0011] Among them, the control circuit includes a third switch tube and a fourth switch tube, the drain of the third switch tube receives a third voltage, the gate of the third switch tube and the fourth switch tube receive a first control signal, the source of the third switch tube and the source of the fourth switch tube are connected to the second end of the first switch tube, and the drain of the fourth switch tube is connected to the drain of the first switch tube.

[0012] Wherein, when the first control signal is at a first level, the third switch tube is turned off and the fourth switch tube is turned on to control the connection between the gate and the drain of the first switch tube.

[0013] When the first control signal is at the second level, the third switch tube is turned on and the fourth switch tube is turned off, so as to control the first switch tube to be turned on and the second switch tube to be turned off.

[0014] The power supply circuit further includes a control signal circuit, which is connected to the gate of the third switch tube and the gate of the fourth switch tube and is used to output the first control signal based on the received second control signal.

[0015] Among them, the control signal circuit includes a fifth switch tube and a sixth switch tube, the voltage received by the drain of the fifth switch tube is the same as the voltage output by the drain of the first switch tube, the gate of the fifth switch tube and the gate of the sixth switch tube receive the second control signal, the source of the fifth switch tube and the source of the sixth switch tube are used to output the first control signal, and the drain of the sixth switch tube receives the third voltage.

[0016] The present application also provides a storage device, comprising the above-mentioned power supply circuit, a first storage circuit and a second storage circuit, wherein the power supply circuit is used to output a first voltage or a second voltage, the first voltage is used to power the first storage circuit, and the second voltage is used to power the second storage circuit.

[0017] The beneficial effect of the present application is that the power supply circuit of the present application includes: a main circuit, the input end of the main circuit receives a first voltage; a control circuit connected to the control end of the main circuit, and used to control the main circuit to output the first voltage or the second voltage, the first voltage is used to power the first storage circuit, and the second voltage is used to power the second storage circuit. The main circuit outputs the first voltage to power the first storage circuit, or outputs the second voltage to power the second storage circuit, so as to realize powering the first storage circuit and the second storage circuit, and meet the performance requirements of the first storage circuit and the second storage circuit. In addition, the first storage circuit is powered by the input first voltage, so as to avoid the reduction of the voltage margin and improve the reliability of the first storage circuit. The first storage circuit can be a DDR storage circuit, and the second storage circuit can be an SDR storage circuit. The first voltage can be the voltage of the DDR storage circuit, and the second voltage can be the voltage of the SDR storage circuit. While ensuring that there is no problem with the device withstand voltage under the voltage of the SDR storage circuit, the voltage margin of the DDR storage circuit is sufficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. Among them:

[0019] Figure 1 It is a schematic diagram of a framework of an embodiment of a power supply circuit provided by the present application;

[0020] Figure 2 yes Figure 1 A circuit diagram of an embodiment of a power supply circuit;

[0021] Figure 3 yes Figure 1 A circuit diagram of another embodiment of the power supply circuit;

[0022] Figure 4 It is a schematic diagram of a framework of an embodiment of a storage device provided in the present application. DETAILED DESCRIPTION

[0023] The following embodiments of the technical solution of the present application are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0024] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by technicians in the technical field to which this application belongs; the terms used herein are only for the purpose of describing specific embodiments and are not intended to limit this application; the terms "including" and "having" in the specification and claims of this application and the above-mentioned figure descriptions and any variations thereof are intended to cover non-exclusive inclusions.

[0025] In the description of the embodiments of the present application, the technical terms "first", "second", etc. are only used to distinguish different objects, and cannot be understood as indicating or implying relative importance or implicitly indicating the number, specific order or primary and secondary relationship of the indicated technical features. In the description of the embodiments of the present application, the meaning of "multiple" is more than two, unless otherwise clearly and specifically defined.

[0026] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present application. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0027] In the description of the embodiments of the present application, the term "and / or" is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article generally indicates that the associated objects before and after are in an "or" relationship.

[0028] In the description of the embodiments of the present application, the term "multiple" refers to more than two (including two). Similarly, "multiple groups" refers to more than two groups (including two groups), and "multiple pieces" refers to more than two pieces (including two pieces).

[0029] In the description of the embodiments of the present application, unless otherwise clearly specified and limited, technical terms such as "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be connected between, or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0030] See also Figure 1 As shown, Figure 11 is a schematic diagram of a framework of an embodiment of a power supply circuit provided by the present application. The power supply circuit 100 of the present embodiment is applied to a storage device 200, and the storage device 200 includes a first storage circuit 21 and a second storage circuit 22. The first storage circuit 21 includes but is not limited to a DDR storage unit, and the second storage circuit 22 includes but is not limited to an SDR storage unit. In other embodiments, the first storage circuit 21 may be other storage units, and the second storage circuit 22 may be other storage units, which are not limited by the present application.

[0031] The power supply circuit 100 includes a main circuit 11 and a control circuit 12 . The input end of the main circuit 11 receives a first voltage V1 . The first voltage V1 may be an external voltage of the storage device 200 . For example, an external power supply device provides the first terminal voltage V1 to the input end of the main circuit 11 .

[0032] Among them, the control circuit 12 is connected to the control end of the main circuit 11, and the control circuit 12 is used to control the main circuit 11 to output a first voltage V1 or a second voltage V2, wherein the first voltage V1 is used to power the first storage circuit 21, and the second voltage V2 is used to power the second storage circuit 22, and the first voltage V1 is greater than the second voltage V2.

[0033] For example, the first storage circuit 21 is a DDR storage unit, and the second storage circuit 22 is an SDR storage unit. The operating voltage of the DDR storage unit may be 3.3V, and the operating voltage of the SDR storage unit may be 2.85V, that is, the first voltage V1 is 3.3V, and the second voltage V2 is 2.85V.

[0034] The power supply circuit 100 of this embodiment includes a main circuit 11 and a control circuit 12, wherein the input end of the main circuit 11 receives a first voltage V1, the control circuit 12 is connected to the control end of the main circuit 11, and the control circuit 12 is used to control the main circuit 11 to output the first voltage V1 or the second voltage V2, wherein the first voltage V1 is used to power the first storage circuit 21, and the second voltage V2 is used to power the second storage circuit 22. The main circuit 11 outputs the first voltage V1 to power the first storage circuit 21, or outputs the second voltage V2 to power the second storage circuit 22, thereby powering the first storage circuit 21 and the second storage circuit 22, and meeting the performance requirements of the first storage circuit 21 and the second storage circuit 22. In addition, the first storage circuit 21 is powered by the input first voltage V1, and there is no need to step down the first voltage V1, thereby avoiding a reduction in the voltage margin and improving the reliability of the first storage circuit 21. Among them, the voltage margin refers to the range of allowable voltage fluctuations, which can improve the stability and reliability of the first storage circuit 21. The first storage circuit 21 may be a DDR memory circuit, the second storage circuit 22 may be an SDR memory circuit, the first voltage V1 may be the voltage of the DDR memory circuit, and the second voltage V2 may be the voltage of the SDR memory circuit. While ensuring that the device withstands voltage well under the voltage of the SDR storage circuit, the voltage margin of the DDR storage circuit is ensured to be sufficient.

[0035] According to some embodiments of this application, see Figure 2 As shown, Figure 2 yes Figure 1 A schematic diagram of a circuit of an embodiment of a power supply circuit in the embodiment. The main circuit 11 of this embodiment includes a first switch tube M1 and a second switch tube M2.

[0036] The source of the first switch tube M1 and the source of the second switch tube M2 receive the first voltage V1, the gate of the first switch tube M1 is connected to the control circuit 12, the gate and drain of the second switch tube M2 are connected, and the drain of the first switch tube M1 is connected to the drain of the second switch tube M2, for outputting the first voltage V1 or the second voltage V2.

[0037] Optionally, the first switch tube M1 and the second switch tube M2 may both be P-type MOS tubes. In other embodiments, the first switch tube M1 and the second switch tube M2 may both be N-type MOS tubes.

[0038] According to some embodiments of the present application, when the control circuit 12 controls the first switch tube M1 to be turned on and the second switch tube M2 to be turned off, the first switch tube M1 is fully turned on, and the drain of the first switch tube M1 outputs the first voltage V1. At this time, the drain of the first switch tube M1 outputs the first voltage V1 to the first storage circuit 21.

[0039] In this embodiment, when the control circuit 12 controls the first switch tube M1 to be turned on and the second switch tube M2 to be turned off, the drain of the first switch tube M1 outputs the first voltage V1 to the first storage circuit 21. There is no need to step down the first voltage V1, thereby avoiding a reduction in voltage margin and improving the reliability of the first storage circuit 21.

[0040] According to some embodiments of the present application, when the control circuit 12 controls the gate and drain of the first switch tube M1 to be connected, the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22 .

[0041] Optionally, when the control circuit 12 controls the gate and drain of the first switch tube M1 to be connected, the gate and drain of the second switch tube M2 are connected, and the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22. At this time, the first switch tube M1 and the second switch tube M2 are equivalent to diodes, and the second voltage V2 is equal to the first voltage V1 minus the voltage threshold Vgs between the gate and the source of the first switch tube M1, that is, V2=V1-Vgs.

[0042] In this embodiment, when the control circuit 12 controls the gate and drain of the first switch tube M1 to be connected, the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22, thereby powering the first storage circuit 21 and the second storage circuit 22, and meeting the performance requirements of the first storage circuit 21 and the second storage circuit 22.

[0043] According to some embodiments of the present application, Figure 2 As shown, the control circuit 12 of this embodiment includes a third switch tube M3 and a fourth switch tube M4.

[0044] The drain of the third switch tube M3 receives the third voltage V3, which may be a reference voltage. The gate of the third switch tube M3 and the fourth switch tube M4 receive the first control signal EN1, the source of the third switch tube M3 and the source of the fourth switch tube M4 are connected to the second end of the first switch tube M1, and the drain of the fourth switch tube M4 is connected to the drain of the first switch tube M1.

[0045] For example, the third switch transistor M3 may be an N-type MOS transistor, and the fourth switch transistor M4 may be a P-type MOS transistor. In other embodiments, the third switch transistor M3 may be a P-type MOS transistor, and the fourth switch transistor M4 may be an N-type MOS transistor.

[0046] According to some embodiments of the present application, when the first control signal EN1 is at the first level, the third switch tube M3 is turned off and the fourth switch tube M4 is turned on to control the connection between the gate and the drain of the first switch tube M1.

[0047] Optionally, the first level is a low level, that is, the first control signal EN1 is a low level, at which time the third switch tube M3 is turned off and the fourth switch tube M4 is turned on, so that the gate and drain of the first switch tube M1 are connected. At this time, the gate and source of the second switch tube M2 are connected, and the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22. The first switch tube M1 and the second switch tube M2 are equivalent to diodes, and the second voltage V2 is equal to the first voltage V1 minus the voltage threshold Vgs between the gate and source of the first switch tube M1.

[0048] In this embodiment, when the first control signal EN1 is at the first level, the third switch tube M3 is turned off and the fourth switch tube M4 is turned on to control the connection between the gate and the drain of the first switch tube M1, so that the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22, thereby meeting the performance requirements of the second storage circuit 22.

[0049] According to some embodiments of the present application, when the first control signal EN1 is at the second level, the third switch tube M3 is turned on and the fourth switch tube M4 is turned off, so as to control the first switch tube M1 to be turned on and the second switch tube M2 to be turned off.

[0050] Optionally, the second level is a high level, that is, the first control signal EN1 is a high level, at which time the third switch tube M3 is turned on, the fourth switch tube M4 is turned off, and the second terminal voltage of the first switch tube M1 is pulled to the third voltage, so that the first switch tube M1 is turned on and the second switch tube M2 is turned off. At this time, the drain of the first switch tube M1 outputs the first voltage V1 to the first storage circuit 21.

[0051] In this embodiment, when the first control signal EN1 is at the second level, the third switch tube M3 is turned on and the fourth switch tube M4 is turned off, so as to control the first switch tube M1 to be turned on and the second switch tube M2 to be turned off, and then the drain of the first switch tube M1 outputs the first voltage V1 to the first storage circuit 21. The first storage circuit 21 is powered by the input first voltage V1, and there is no need to step down the first voltage V1, so as to avoid reducing the voltage margin and improve the reliability of the first storage circuit 21.

[0052] According to some embodiments of this application, see Figure 3 As shown, Figure 3 yes Figure 1 The power circuit 100 of this embodiment further includes a control signal circuit 13, which is used to receive a second control signal EN2 and output a first control signal EN1 based on the second control signal EN2.

[0053] The control signal circuit 13 is connected to the drain of the third switch tube M3 and the gate of the fourth switch tube M4, and is used to output the first control signal EN1 to the drain of the third switch tube M3 and the gate of the fourth switch tube M4, so as to control the third switch tube M3 and the fourth switch tube M4 through the first control signal EN1.

[0054] According to some embodiments of the present application, the control signal circuit 13 of this embodiment includes a fifth switch tube M5 and a sixth switch tube M6.

[0055] The voltage received by the drain of the fifth switch tube M5 is the same as the voltage output by the drain of the first switch tube M1. For example, the drain of the first switch tube M1 outputs the first voltage V1, and the voltage received by the drain of the fifth switch tube M5 is the first voltage V1; the drain of the first switch tube M1 outputs the second voltage V2, and the voltage received by the drain of the fifth switch tube M5 is the second voltage V2.

[0056] The gate of the fifth switch tube M5 and the gate of the sixth switch tube M6 receive the second control signal EN2, the source of the fifth switch tube M5 and the source of the sixth switch tube M6 are used to output the first control signal EN1, and the drain of the sixth switch tube M6 receives the third voltage V3.

[0057] Specifically, when the second control signal EN2 received by the control signal circuit 13 is at the first level, the first control signal EN1 output by the source of the fifth switch tube M5 and the source of the sixth switch tube M6 is at the second level, at which time the third switch tube M3 is turned on, the fourth switch tube M4 is turned off, and the voltage at the second end of the first switch tube M1 is pulled to the third voltage, so that the first switch tube M1 is turned on, the second switch tube M2 is turned off, and then the drain of the first switch tube M1 outputs the first voltage V1 to the first storage circuit 21. The first storage circuit 21 is powered by the input first voltage V1, and there is no need to step down the first voltage V1, thereby avoiding a reduction in voltage margin and improving the reliability of the first storage circuit 21.

[0058] When the second control signal EN2 received by the control signal circuit 13 is at the second level, the first control signal EN1 outputted by the source of the fifth switch tube M5 and the source of the sixth switch tube M6 is at the first level, at which time the third switch tube M3 is turned off and the fourth switch tube M4 is turned on, so that the gate and drain of the first switch tube M1 are connected. Then the gate and source of the second switch tube M2 are connected, and the drain of the first switch tube M1 outputs the second voltage V2 to the second storage circuit 22. The first switch tube M1 and the second switch tube M2 are equivalent to diodes, and the second voltage V2 is equal to the first voltage V1 minus the voltage threshold Vgs between the gate and source of the first switch tube M1.

[0059] For example, the fifth switch transistor M5 may be an N-type MOS transistor, and the sixth switch transistor M6 may be a P-type MOS transistor. In other embodiments, the fifth switch transistor M5 may be a P-type MOS transistor, and the sixth switch transistor M6 may be an N-type MOS transistor.

[0060] Optionally, the control signal circuit 13 of this embodiment includes a seventh switch tube M7 and an eighth switch tube M8.

[0061] The voltage received by the drain of the seventh switch tube M7 is the same as the voltage output by the drain of the first switch tube M1. For example, the drain of the first switch tube M1 outputs the first voltage V1, and the voltage received by the drain of the seventh switch tube M7 is the first voltage V1; the drain of the first switch tube M1 outputs the second voltage V2, and the voltage received by the drain of the seventh switch tube M7 is the second voltage V2.

[0062] The gate of the seventh switch tube M7 and the gate of the eighth switch tube M8 receive the first control signal EN1, the source of the seventh switch tube M7 and the source of the eighth switch tube M8 are used to output the third control signal EN3, and the drain of the eighth switch tube M8 receives the third voltage V3.

[0063] When the second control signal EN2 received by the control signal circuit 13 is at the second level, the first control signal EN1 output by the source of the fifth switch tube M5 and the source of the sixth switch tube M6 is at the first level, and the third control signal EN3 output by the source of the seventh switch tube M7 and the source of the eighth switch tube M8 is at the second level. When the second control signal EN2 received by the control signal circuit 13 is at the first level, the first control signal EN1 output by the source of the fifth switch tube M5 and the source of the sixth switch tube M6 is at the second level, and the third control signal EN3 output by the source of the seventh switch tube M7 and the source of the eighth switch tube M8 is at the first level.

[0064] For example, the seventh switch transistor M7 may be an N-type MOS transistor, and the eighth switch transistor M8 may be a P-type MOS transistor. In other embodiments, the seventh switch transistor M7 may be a P-type MOS transistor, and the eighth switch transistor M8 may be an N-type MOS transistor.

[0065] This application also provides a storage device, see Figure 4 As shown, Figure 4 1 is a schematic diagram of a memory device according to an embodiment of the present application. The memory device 300 according to the present embodiment includes the power supply circuit 100, the first memory circuit 21 and the second memory circuit 22 according to the above embodiment. The power supply circuit 100 is used to output a first voltage V1 or a second voltage V2. The first voltage V1 is used to supply power to the first memory circuit 21, and the second voltage V2 is used to supply power to the second memory circuit 22.

[0066] In summary, the power supply circuit 100 of the present application includes a main circuit 11 and a control circuit 12, wherein the input end of the main circuit 11 receives the first voltage V1, the control circuit 12 is connected to the control end of the main circuit 11, and the control circuit 12 is used to control the main circuit 11 to output the first voltage V1 or the second voltage V2, wherein the first voltage V1 is used to power the first storage circuit 21, and the second voltage V2 is used to power the second storage circuit 22. The main circuit 11 outputs the first voltage V1 to power the first storage circuit 21, or outputs the second voltage V2 to power the second storage circuit 22, so as to power the first storage circuit 21 and the second storage circuit 22, thereby meeting the performance requirements of the first storage circuit 21 and the second storage circuit 22. In addition, by powering the first storage circuit 21 with the input first voltage V1, there is no need to step down the first voltage V1, thereby avoiding a reduction in the voltage margin and improving the reliability of the first storage circuit 21. Among them, the voltage margin refers to the range of allowable voltage fluctuations, which can improve the stability and reliability of the first storage circuit 21. The first storage circuit 21 may be a DDR storage circuit, the second storage circuit 22 may be an SDR storage circuit, the first voltage V1 may be the voltage of the DDR storage circuit, and the second voltage V2 may be the voltage of the SDR storage circuit. While ensuring that the device withstands voltage well under the voltage of the SDR storage circuit, the voltage margin of the DDR storage circuit is ensured to be sufficient.

[0067] The above description is only an implementation method of the present application, and does not limit the patent scope of the present application. Any equivalent structure or equivalent process transformation made using the contents of the present application specification and drawings, or directly or indirectly used in other related technical fields, are also included in the patent protection scope of the present application.

Claims

1. A power supply circuit, characterized in that: Used to supply power to a storage device, the storage device comprising a first storage circuit and a second storage circuit; the power supply circuit comprising: A main circuit, wherein an input terminal of the main circuit receives a first voltage; A control circuit is connected to the control end of the main circuit and is used to control the main circuit to output the first voltage or the second voltage, the first voltage is used to power the first storage circuit, the second voltage is used to power the second storage circuit, and the first voltage is greater than the second voltage.

2. The power supply circuit according to claim 1, characterized in that: The main circuit includes a first switch tube and a second switch tube, the source of the first switch tube and the source of the second switch tube receive the first voltage, the gate of the first switch tube is connected to the control circuit, the gate and drain of the second switch tube are connected, and the drain of the first switch tube is connected to the drain of the second switch tube, for outputting the first voltage or the second voltage.

3. The power supply circuit according to claim 2, characterized in that: When the control circuit controls the first switch tube to be turned on and the second switch tube to be turned off, the drain of the first switch tube outputs the first voltage to the first storage circuit.

4. The power supply circuit according to claim 2, characterized in that: When the control circuit controls the gate and drain of the first switch tube to be connected, the drain of the first switch tube outputs the second voltage to the second storage circuit, and the second voltage is equal to the first voltage minus the voltage threshold between the gate and source of the first switch tube.

5. The power supply circuit according to any one of claims 2 to 4, characterized in that: The control circuit includes a third switch tube and a fourth switch tube, the drain of the third switch tube receives a third voltage, the gate of the third switch tube and the fourth switch tube receive a first control signal, the source of the third switch tube and the source of the fourth switch tube are connected to the second end of the first switch tube, and the drain of the fourth switch tube is connected to the drain of the first switch tube.

6. The power supply circuit according to claim 5, characterized in that: When the first control signal is at a first level, the third switch tube is turned off and the fourth switch tube is turned on to control the connection between the gate and the drain of the first switch tube.

7. The power supply circuit according to claim 5, characterized in that: When the first control signal is at the second level, the third switch tube is turned on and the fourth switch tube is turned off, so as to control the first switch tube to be turned on and the second switch tube to be turned off.

8. The power supply circuit according to claim 5, characterized in that: The power supply circuit also includes a control signal circuit, which is connected to the gate of the third switch tube and the gate of the fourth switch tube and is used to output the first control signal based on the received second control signal.

9. The power supply circuit according to claim 8, characterized in that: The control signal circuit includes a fifth switch tube and a sixth switch tube, the voltage received by the drain of the fifth switch tube is the same as the voltage output by the drain of the first switch tube, the gate of the fifth switch tube and the gate of the sixth switch tube receive a second control signal, the source of the fifth switch tube and the source of the sixth switch tube are used to output the first control signal, and the drain of the sixth switch tube receives the third voltage.

10. A storage device, characterized in that: It comprises a power supply circuit, a first storage circuit and a second storage circuit as described in any one of claims 1 to 9, wherein the power supply circuit is used to output a first voltage or a second voltage, the first voltage is used to power the first storage circuit, and the second voltage is used to power the second storage circuit.

Images