Converter parallel control system and method for suppressing high-frequency zero-sequence circulating current

Abstract

The invention provides a converter parallel control system and method for suppressing high-frequency zero-sequence circulating current. The system comprises a first converter, a second converter and a control device. And the second converter is connected in parallel with the first converter. And the control device is used for acquiring the zero-sequence circulating current of the first converter to obtain a first zero-sequence circulating current and acquiring the zero-sequence circulating current of the second converter to obtain a second zero-sequence circulating current. And the control device is also used for determining a carrier frequency adjusting signal according to the first zero-sequence circulating current or the second zero-sequence circulating current. And the carrier frequency adjusting signal acts on a carrier deviating from the reference frequency in the parallel system, so that the continuous dynamic adjustment of the carrier frequency is realized, the carrier frequency of the first converter and the carrier frequency of the second converter are promoted to gradually reach a synchronous state, and the high-frequency circulating current in the parallel system is effectively inhibited.

Description

Technical Field

[0001] The present application relates to the field of power electronics technology, and in particular to a converter parallel control system and method for suppressing high-frequency zero-sequence circulating current, a computer device, and a readable storage medium. Background Art

[0002] Energy storage, as an important technology supporting the new power system, plays a key role in it. Providing a variety of services for power grid operation, such as peak load regulation, frequency regulation, standby, and demand response support, is an important means to improve the flexibility and safety of the power system. As the core equipment in the energy storage system, the converter can realize AC / DC energy conversion.

[0003] As the installed capacity of energy storage systems continues to increase, the demand for large-capacity converters is also increasing. Due to the limited capacity of a single converter, multiple converters are usually connected in parallel to meet the needs of high-power applications, thereby increasing the overall capacity of the system. This parallel structure makes the capacity configuration of the energy storage system more flexible and greatly promotes the modular design of the system. Although the multi-converter parallel topology has many advantages, when parallel converters share the AC and DC bus, a circulation path will be formed between the converters, which will inevitably cause circulation problems.

[0004] Therefore, in the parallel converter system, the zero-sequence circulating current problem becomes a key factor restricting the system performance. Especially when each converter is equipped with an independent control unit, a slight deviation of the system clock between the control units will cause a significant increase in the carrier phase difference. In addition, factors such as the drive signal transmission delay will also induce high-frequency circulating current in the parallel system. Therefore, in order to reduce system losses and improve equipment operation efficiency, effective measures must be taken to suppress the high-frequency circulating current between parallel converters to ensure efficient and stable operation of the entire parallel system. Summary of the invention

[0005] Based on this, it is necessary to provide a converter parallel control system and method, a computer device and a readable storage medium for suppressing high-frequency zero-sequence circulating current in response to the above technical problems.

[0006] A converter parallel control system for suppressing high-frequency zero-sequence circulating current, comprising:

[0007] A first converter, wherein an AC side of the first converter is used to connect to a three-phase AC bus, and a DC side of the first converter is used to connect to a DC bus;

[0008] a second converter connected in parallel with the first converter;

[0009] a control device, connected to the first converter and the second converter respectively;

[0010] The control device is used to collect the zero-sequence circulating current of the first converter to obtain a first zero-sequence circulating current, and collect the zero-sequence circulating current of the second converter to obtain a second zero-sequence circulating current;

[0011] The control device is also used to determine a carrier frequency adjustment signal based on the first zero-sequence circulating current or the second zero-sequence circulating current, and the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter or the second converter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

[0012] In one embodiment, the control device includes a first controller, and the first controller is used to determine whether the first zero-sequence circulating current or the second zero-sequence circulating current is zero. If it is determined that the first zero-sequence circulating current or the second zero-sequence circulating current is not zero, the first zero-sequence circulating current or the second zero-sequence circulating current is operated and processed to determine a carrier frequency adjustment signal.

[0013] In one of the embodiments, the first controller is further used to perform absolute value operation on the first zero-sequence circulating current or the second zero-sequence circulating current and determine a circulating current feedback signal, and determine the carrier frequency adjustment signal based on the circulating current feedback signal and a preset reference value.

[0014] In one of the embodiments, the first controller is further configured to perform a difference operation on the circulating current feedback signal and a preset reference value, and determine the carrier frequency adjustment signal based on the difference operation result.

[0015] In one of the embodiments, the control device further includes a second controller, and the second controller is connected to the first controller;

[0016] The second controller is used to add or subtract the carrier frequency adjustment signal from the period value of the counter in the second controller to adjust the counting frequency of the counter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

[0017] In one embodiment, the first controller is a proportional-integral controller, and the second controller is a pulse width modulation controller.

[0018] In one embodiment, there are multiple first converters and / or second converters, and each of the first converters or second converters is connected in parallel to each other.

[0019] A converter parallel control method for suppressing high-frequency zero-sequence circulating current, comprising:

[0020] collecting the zero-sequence circulating current of the first converter to obtain a first zero-sequence circulating current;

[0021] collecting a zero-sequence circulating current of a second converter to obtain a second zero-sequence circulating current, wherein the first converter is connected in parallel with the second converter;

[0022] A carrier frequency adjustment signal is determined according to the first zero-sequence circulating current or the second zero-sequence circulating current, and the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter or the second converter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

[0023] A computer device includes a memory and a processor, wherein the memory stores a computer program, and the processor implements the steps of the method described in the above embodiment when executing the computer program.

[0024] A computer-readable storage medium stores a computer program, which, when executed by a processor, implements the steps of the method described in the above embodiment.

[0025] Compared with the prior art, the above-mentioned converter parallel control system for suppressing high-frequency zero-sequence circulating current includes: a first converter, a second converter, and a control device. The second converter is connected in parallel with the first converter. The control device is used to collect the zero-sequence circulating current of the first converter to obtain the first zero-sequence circulating current, and collect the zero-sequence circulating current of the second converter to obtain the second zero-sequence circulating current. The control device is also used to determine the carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current. And this carrier frequency adjustment signal is applied to the carrier that deviates from the reference frequency in the parallel system, so as to achieve continuous dynamic adjustment of the carrier frequency, prompting the carrier frequency of the first converter and the carrier frequency of the second converter to gradually reach a synchronous state, thereby effectively suppressing the high-frequency circulating current in the parallel system. The control structure of the present application is simple, easy to implement in engineering, and can effectively suppress the high-frequency circulating current between parallel converters, thereby improving the overall efficiency of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the conventional technology, the drawings required for use in the embodiments or the conventional technology descriptions are briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0027] Figure 1 A circuit block diagram of a converter parallel control system for suppressing high-frequency zero-sequence circulating current provided by an embodiment of the present application;

[0028] Figure 2 A schematic diagram of a high-frequency circulation current formed by inconsistent carrier waves provided in an embodiment of the present application;

[0029] Figure 3 A circuit topology diagram of a parallel converter provided in an embodiment of the present application;

[0030] Figure 4 A control flow chart of a converter parallel control system for suppressing high-frequency zero-sequence circulating current provided by an embodiment of the present application;

[0031] Figure 5 A schematic diagram of carrier frequency adjustment provided in an embodiment of the present application;

[0032] Figure 6 The first converter output current and circulating current simulation waveform provided in one embodiment of the present application;

[0033] Figure 7 The output current and circulating current simulation waveform of the second converter provided in one embodiment of the present application;

[0034] Figure 8 A first converter output current and circulating current simulation waveform provided by another embodiment of the present application;

[0035] Fig. 9 A second converter output current and circulating current simulation waveform provided by another embodiment of the present application;

[0036] Fig.10 A flow chart of a method for controlling a converter in parallel for suppressing high-frequency zero-sequence circulating current provided by an embodiment of the present application;

[0037] Fig.11 This is a diagram of the internal structure of a computer device provided in one embodiment of the present application. DETAILED DESCRIPTION

[0038] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific implementation disclosed below.

[0039] The serial numbers assigned to the components herein, such as "first", "second", etc., are only used to distinguish the objects described and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connections (couplings). In the description of this application, it should be understood that the orientation or position relationship indicated by the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", etc. are based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing this application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to this application.

[0040] In the present application, unless otherwise clearly specified and limited, a first feature being “above” or “below” a second feature may mean that the first and second features are in direct contact, or the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being “above”, “above”, and “above” a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being “below”, “below”, and “below” a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0041] It should be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may be an intermediate element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be an intermediate element at the same time.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0043] See also Figure 1 , an embodiment of the present application provides a converter parallel control system 10 for suppressing high-frequency zero-sequence circulating current, which can be used to suppress the high-frequency circulating current problem caused by inconsistent carrier frequencies. The circulating current is mainly caused by inconsistent PWM sequences between converters. The PWM sequence of each converter is determined by its carrier and modulation wave, and the modulation signal is compared with the carrier signal value. Subsequently, an output high-level pulse or a low-level pulse is generated based on the comparison result to drive the switching device of the converter. Therefore, the analysis and suppression method of the circulating current should be based on the two factors of carrier and modulation wave.

[0044] In a parallel system, if the parallel converters have different modulation waves, low-frequency circulating current will appear. However, if the parallel converters have different carriers, high-frequency circulating current will be generated. Figure 2 As shown in the figure, it can be seen that the two parallel converters use carriers with different frequencies. This difference leads to inconsistent PWM sequences generated by the two converters, which in turn triggers asynchronous operation of the switch tube, causing high-frequency circulating currents in the system. As time goes by, the relative deviation of the carriers between the two parallel converters gradually increases, and even a completely reversed severe situation occurs. The high-frequency circulating current also gradually increases with the increase of the carrier deviation. Therefore, the present application provides a converter parallel control system 10 for suppressing high-frequency zero-sequence circulating currents, which is used to solve the above problems.

[0045] The inverter parallel control system 10 for suppressing high-frequency zero-sequence circulating current includes: a first inverter 100, a second inverter 200, and a control device 300. The AC side of the first inverter 100 is used to connect to a three-phase AC bus. The DC side of the first inverter 100 is used to connect to a DC bus. The second inverter 200 is connected in parallel with the first inverter 100. The control device 300 is connected to the first inverter 100 and the second inverter 200 respectively. The control device 300 is used to collect the zero-sequence circulating current of the first inverter 100 to obtain a first zero-sequence circulating current, and to collect the zero-sequence circulating current of the second inverter 200 to obtain a second zero-sequence circulating current. The control device 300 is also used to determine a carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current. The carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter 100 or the second converter 200 so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200 .

[0046] In some embodiments, the circuit topology connection between the second converter 200 and the first converter 100 is as follows: Figure 3 As shown. This circuit can realize the AC / DC power conversion function, and energy can flow in both directions. The circuit includes a three-phase inductor L a,i =L b,i =L c,i =L i ; Parasitic resistance R a,i =R b,i =R c,i =R i ; Three-phase full-bridge power switch S a,i , S b,i , S c,i , i=1, 2. The upper and lower switches of the same bridge arm work in complementary mode. The second converter 200 is connected in parallel with the first converter 100, with the AC side connected to the three-phase AC bus and the DC side connected to the DC bus. The direction of current flowing from the grid into the converter is defined as the positive direction, denoted by i. a,i ,i b,i ,i c,i The grid voltage is e a ,e b ,e c , the DC side voltage is V dc Each converter can be independently controlled by its own control unit, that is, each converter corresponds to a control unit, and different converters correspond to different control units. In some embodiments, the control unit can be a controller, a control chip, or a single-chip microcomputer.

[0047] In some embodiments, the number of the second converter 200 and the first converter 100 can also be multiple, and each of the first converter 100 or the second converter 200 is connected in parallel. That is, the first converter 100 and the second converter 200 can be set to multiple, but no matter how many, the basic principle is the same, so this embodiment and subsequent embodiments are only based on Figure 3 The circuit topology shown is for illustration only and should not be construed as a limitation.

[0048] In some embodiments, the specific structure of the control device 300 is not limited. For example, the control device 300 may be a control device composed of multiple integrated chips or multiple controllers, or a control device composed of multiple integrated chips and multiple controllers. In some embodiments, the control device 300 may be integrated in the first converter 100 or the second converter 200, or may be an independent control device. In some embodiments, the control device 300 may also be partially integrated in the first converter 100 or the second converter 200. The specific connection relationship between the control device 300 and the first converter 100 and the second converter 200 is not limited, as long as it is ensured that the control device 300 can determine the carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current, and adjust the carrier frequency of the first converter 100 or the second converter 200 through the carrier frequency adjustment signal, so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200.

[0049] In some embodiments, the control device 300 may collect the zero-sequence circulating current of the first converter 100 by current mutual induction to obtain a first zero-sequence circulating current, and collect the zero-sequence circulating current of the second converter 200 to obtain a second zero-sequence circulating current. Then the first zero-sequence circulating current and the second zero-sequence circulating current are respectively compared with the reference value of the high-frequency zero-sequence circulating current. If the first zero-sequence circulating current and the second zero-sequence circulating current are the same as the reference value, it means that there is no high-frequency circulating current in the system. On the contrary, if the first zero-sequence circulating current is different from the reference value, or the second zero-sequence circulating current is different from the reference value, it means that there is a high-frequency circulating current in the system. Among them, the reference value can be set to zero.

[0050] When any one of the collected first zero-sequence circulating current and the second zero-sequence circulating current is not zero, a carrier frequency adjustment signal can be determined according to the non-zero first zero-sequence circulating current or the second zero-sequence circulating current. This carrier frequency adjustment signal is applied to the carrier that deviates from the reference frequency in the parallel system, thereby achieving continuous dynamic adjustment of the carrier frequency, prompting the carrier frequency of the first converter 100 and the carrier frequency of the second converter 200 to gradually reach a synchronous state, thereby effectively suppressing the high-frequency circulating current in the parallel system.

[0051] In some embodiments, the carrier frequency of any one of the first converter 100 and the second converter 200 may be selected as the reference frequency. For example, the carrier frequency of the first converter 100 may be selected as the reference frequency, or the carrier frequency of the second converter 200 may be selected as the reference frequency.

[0052] In some embodiments, the control device 300 includes a first controller 310. The first controller 310 is used to determine whether the first zero-sequence circulating current or the second zero-sequence circulating current is zero. If it is determined that the first zero-sequence circulating current or the second zero-sequence circulating current is not zero, the first zero-sequence circulating current or the second zero-sequence circulating current is processed and a carrier frequency adjustment signal is determined. Specifically, the first zero-sequence circulating current or the second zero-sequence circulating current that is not zero may be processed. Z Perform absolute value calculation and determine the circulating current feedback signal. Then compare the circulating current feedback signal with the set reference value. Perform subtraction to obtain an error signal (such as Figure 4 The reference value is set as The first controller 310 can determine the carrier frequency adjustment signal according to the obtained error signal. In some embodiments, the first controller 310 can be a PI (Proportional Integral) controller.

[0053] In some embodiments, the control device 300 further includes a second controller 320. The second controller 320 is connected to the first controller 310. The second controller 320 is used to add or subtract the carrier frequency adjustment signal from the period value of the counter in the second controller 320, and adjust the counting frequency of the counter so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200. In some embodiments, the second controller 320 may be a pulse width modulation controller.

[0054] In some embodiments, the generated carrier frequency adjustment signal can be applied to the period value of the counter in the second controller 320. When the carrier frequency adjustment signal is added to or subtracted from the period value, the counting frequency of the counter will change accordingly, thereby ultimately achieving adjustment of the carrier frequency. In this way, by organically combining high-frequency circulating current collection, the application of the PI controller, and the adjustment of the period value of the counter in the second controller 320, a closed-loop frequency adjustment mechanism is formed to achieve precise control of the carrier frequency.

[0055] In some embodiments, taking phase A as an example, Figure 5 As shown, S a1 ,S a2 I represents the switching action of the A-phase bridge arm of the first converter 100 and the second converter 200, respectively. a0 Represents the circulating current component in the A-phase circulating current path. It can be observed from the figure that when the carrier signal frequencies are inconsistent, the deviation of the two carriers will gradually increase, which will significantly affect the synchronous action of the switch tube, resulting in inconsistent output voltages between the parallel converters, thereby causing high-frequency circulating current problems in the parallel converter system. To solve this problem, the converter parallel control system 10 proposed in this embodiment for suppressing high-frequency zero-sequence circulating current is adopted, and the carrier frequency is precisely regulated based on the control loop. Specifically, among the two carriers of the parallel converter, one is selected as the reference carrier, and its frequency remains fixed. For the other carrier, the constructed control loop is used to dynamically adjust its frequency according to the information fed back from the real-time operating status of the system, so as to gradually reduce the frequency deviation between the two carrier signals, ensure the synchronization of the switch tube action, and effectively suppress the high-frequency circulating current in the system.

[0056] In some embodiments, the effectiveness of the proposed converter parallel control system 10 for suppressing high-frequency zero-sequence circulating current can be verified by simulation. In the simulation phase, different carrier frequency values ​​are set for the two parallel converters to simulate the high-frequency circulating current phenomenon in the parallel converter system. Figure 6 and 7It can be seen that when no zero-sequence circulating current suppression method is used, it can be clearly seen that the output current waveform of the converter is distorted, and the average value of the zero-sequence circulating current deviates from 0, with an obvious bias. Figure 8 and 9 The current waveform obtained by the inverter parallel control system 10 for suppressing high-frequency zero-sequence circulating current proposed in this embodiment and the zero-sequence circulating current waveform generated by the system are given. It can be clearly seen that through the zero-sequence circulating current control logic proposed in this embodiment, the low-frequency circulating current and high-frequency circulating current in the system are effectively controlled to be near 0, and the three-phase current output by the inverter is symmetrical and presents a sinusoidal envelope. The simulation results further prove the effectiveness and correctness of the scheme proposed in this embodiment.

[0057] See also Fig.10 An embodiment of the present application provides a method for controlling a converter in parallel for suppressing high-frequency zero-sequence circulating current. The method comprises:

[0058] S102: collecting the zero-sequence circulating current of the first converter 100 to obtain a first zero-sequence circulating current;

[0059] S104: collecting the zero-sequence circulating current of the second converter 200 to obtain a second zero-sequence circulating current, wherein the first converter 100 and the second converter 200 are connected in parallel;

[0060] S106: Determine a carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current, wherein the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter 100 or the second converter 200 so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200.

[0061] In some embodiments, the converter parallel control method for suppressing high-frequency zero-sequence circulating current described in this embodiment can be applied to the above-mentioned converter parallel control system 10 for suppressing high-frequency zero-sequence circulating current. The specific implementation logic can refer to the above-mentioned embodiment and will not be repeated here.

[0062] The inverter parallel control method for suppressing high-frequency zero-sequence circulating current described in this embodiment acquires the first zero-sequence circulating current by collecting the zero-sequence circulating current of the first inverter, and acquires the second zero-sequence circulating current by collecting the zero-sequence circulating current of the second inverter, and determines the carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current. The carrier frequency adjustment signal is applied to the carrier that deviates from the reference frequency in the parallel system, so as to realize continuous dynamic adjustment of the carrier frequency, and promote the carrier frequency of the first inverter and the carrier frequency of the second inverter to gradually reach a synchronous state, thereby effectively suppressing the high-frequency circulating current in the parallel system.

[0063] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Fig.11 As shown. The computer device includes a processor, a memory, a network interface, a display screen and an input device connected through a system bus. Among them, the processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, a method for controlling a converter in parallel for suppressing high-frequency zero-sequence circulating current is implemented. The display screen of the computer device can be a liquid crystal display screen or an electronic ink display screen, and the input device of the computer device can be a touch layer covered on the display screen, or a key, trackball or touchpad set on the computer device housing, or an external keyboard, touchpad or mouse, etc.

[0064] Those skilled in the art will understand that Fig.11 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than those shown in the figure, or combine certain components, or have a different arrangement of components.

[0065] See also Fig.11 Another embodiment of the present application provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the steps of the converter parallel control method for suppressing high-frequency zero-sequence circulating current described in any of the above embodiments are implemented.

[0066] In one embodiment, the processor implements the following steps when executing the computer program:

[0067] S102: collecting the zero-sequence circulating current of the first converter 100 to obtain a first zero-sequence circulating current;

[0068] S104: collecting the zero-sequence circulating current of the second converter 200 to obtain a second zero-sequence circulating current, wherein the first converter 100 and the second converter 200 are connected in parallel;

[0069] S106: Determine a carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current, wherein the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter 100 or the second converter 200 so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200.

[0070] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the method for controlling a converter in parallel for suppressing high-frequency zero-sequence circulating current described in any one of the above embodiments are implemented.

[0071] In one embodiment, the computer program, when executed by a processor, implements the following steps:

[0072] S102: collecting the zero-sequence circulating current of the first converter 100 to obtain a first zero-sequence circulating current;

[0073] S104: collecting the zero-sequence circulating current of the second converter 200 to obtain a second zero-sequence circulating current, wherein the first converter 100 and the second converter 200 are connected in parallel;

[0074] S106: Determine a carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current, wherein the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter 100 or the second converter 200 so that the carrier frequency of the first converter 100 is synchronized with the carrier frequency of the second converter 200.

[0075] The above-mentioned computer device and computer-readable storage medium obtain the first zero-sequence circulating current by collecting the zero-sequence circulating current of the first converter, and obtain the second zero-sequence circulating current by collecting the zero-sequence circulating current of the second converter, and determine the carrier frequency adjustment signal according to the first zero-sequence circulating current or the second zero-sequence circulating current. And this carrier frequency adjustment signal is applied to the carrier that deviates from the reference frequency in the parallel system, so as to achieve continuous dynamic adjustment of the carrier frequency, prompting the carrier frequency of the first converter and the carrier frequency of the second converter to gradually reach a synchronous state, thereby effectively suppressing the high-frequency circulating current in the parallel system. The control structure of the present application is simple and easy to implement in engineering, and can effectively suppress the high-frequency circulating current between parallel converters, thereby improving the overall efficiency of the system.

[0076] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in many forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0077] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0078] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A converter parallel control system for suppressing high-frequency zero-sequence circulating current, characterized in that: include: A first converter, wherein an AC side of the first converter is used to connect to a three-phase AC bus, and a DC side of the first converter is used to connect to a DC bus; a second converter connected in parallel with the first converter; a control device, connected to the first converter and the second converter respectively; The control device is used to collect the zero-sequence circulating current of the first converter to obtain a first zero-sequence circulating current, and collect the zero-sequence circulating current of the second converter to obtain a second zero-sequence circulating current; The control device is also used to determine a carrier frequency adjustment signal based on the first zero-sequence circulating current or the second zero-sequence circulating current, and the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter or the second converter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

2. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 1, characterized in that: The control device includes a first controller, which is used to determine whether the first zero-sequence circulating current or the second zero-sequence circulating current is zero. If it is determined that the first zero-sequence circulating current or the second zero-sequence circulating current is not zero, the first zero-sequence circulating current or the second zero-sequence circulating current is processed and a carrier frequency adjustment signal is determined.

3. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 2, characterized in that: The first controller is further used to perform absolute value operation on the first zero-sequence circulating current or the second zero-sequence circulating current and determine a circulating current feedback signal, and determine the carrier frequency adjustment signal based on the circulating current feedback signal and a preset reference value.

4. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 3, characterized in that: The first controller is further configured to perform a difference operation on the circulating current feedback signal and a preset reference value, and determine the carrier frequency adjustment signal based on the difference operation result.

5. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 2, characterized in that: The control device further includes a second controller, wherein the second controller is connected to the first controller; The second controller is used to add or subtract the carrier frequency adjustment signal from the period value of the counter in the second controller to adjust the counting frequency of the counter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

6. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 5, characterized in that: The first controller is a proportional-integral controller, and the second controller is a pulse width modulation controller.

7. The converter parallel control system for suppressing high-frequency zero-sequence circulating current according to claim 1, characterized in that: There are multiple first converters and / or second converters, and the first converters or second converters are connected in parallel to each other.

8. A method for controlling converters in parallel for suppressing high-frequency zero-sequence circulating current, characterized in that: include: collecting the zero-sequence circulating current of the first converter to obtain a first zero-sequence circulating current; collecting a zero-sequence circulating current of a second converter to obtain a second zero-sequence circulating current, wherein the first converter is connected in parallel with the second converter; A carrier frequency adjustment signal is determined according to the first zero-sequence circulating current or the second zero-sequence circulating current, and the carrier frequency adjustment signal is used to adjust the carrier frequency of the first converter or the second converter so that the carrier frequency of the first converter is synchronized with the carrier frequency of the second converter.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to claim 8 are implemented.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to claim 8 are implemented.

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