Transceiver delay calibration system and method

Abstract

The invention provides a transceiver delay calibration system and method, and the method comprises the steps: a transmitting end of a transceiver receives a first feature data signal, and transmits the first feature data signal to a receiving end of the transceiver; the receiving end generates a second feature data signal; the data extraction module generates a third feature data signal and shift information according to the second feature data signal; the high-frequency sampling module obtains phase information by using the third characteristic data signal; and the delay calibration module obtains a delay calibration value according to the characteristic data signal, the phase information and the shift information. The first characteristic data signal is transmitted to the delay calibration module through two different paths, and the phase information and the shift information are obtained, so that the delay calibration module can obtain an accurate delay calibration value according to the obtained data information. Thus, the layout and wiring pressure can be effectively reduced, resources are saved, the accuracy of the delay calibration of the transceiver can be improved, and the problem of how to accurately calibrate the delay of the transceiver under the condition of not consuming large resources is solved.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to a transceiver delay calibration system and method. Background Art

[0002] A transceiver is a device used for data communication. It has dual functions of receiving and sending, and can transmit and receive signals in one device at the same time. Transceivers play a vital role in modern communication systems and are key components for data transmission and exchange between different devices.

[0003] With the development of network technology, passive positioning, and power transmission, the requirements for time synchronization performance between devices are getting higher and higher. For example, in the field of Ethernet (such as 1G Ethernet), the accuracy requirements for IEEE 1588 are getting higher and higher. However, due to the uncertainty of the delay of each power-on of the transceiver, the accuracy of time synchronization between devices is greatly affected. Therefore, the delay of the transceiver must be calibrated.

[0004] At present, delay calibration is usually implemented based on TDC (Time to Digital Convert), which mainly includes two solutions: using carry chain to implement delay calibration and using IDELAY module inside FPGA to implement delay calibration. The solution of using carry chain to implement delay calibration has high requirements on FPGA layout and routing, and also requires more carry chain resources, because the delays of carry chains are not equal and the carry chain is sensitive to temperature. However, the delay calibration accuracy achieved is not satisfactory. The solution of using IDELAY module inside FPGA to implement delay calibration has high calibration accuracy, but requires more IDELAY resources, which is difficult to meet the resource requirements in actual complex projects, so its use is limited. Summary of the invention

[0005] The object of the present invention is to provide a transceiver delay calibration system and method to solve the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0006] In order to solve the above technical problems, the present invention provides a transceiver delay calibration system, comprising: A data generating module, used for generating a first characteristic data signal; A transceiver, comprising a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and loop back the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; A data extraction module, configured to receive the second characteristic data signal, and generate a third characteristic data signal and shift information according to the second characteristic data signal; A high-frequency sampling module, used for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module is used to receive the first characteristic data signal and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0007] Optionally, in the transceiver delay calibration system, characteristic data with a direction identifier is inserted into the first characteristic data signal.

[0008] Optionally, in the transceiver delay calibration system, the first characteristic data signal is inserted with the characteristic data at a preset period; the first characteristic data signal is inserted with one or more groups of the characteristic data.

[0009] Optionally, in the transceiver delay calibration system, the characteristic data includes a plurality of consecutive identical data and a group of different data randomly located in the identical data; or, the characteristic data is data with a header for each period.

[0010] Optionally, in the transceiver delay calibration system, the data extraction module is used to perform shift processing on the second characteristic data signal to extract characteristic data and shift information, and generate a third characteristic data signal based on the second characteristic data signal and the characteristic data.

[0011] Optionally, in the transceiver delay calibration system, the delay calibration module is used to receive the first characteristic data signal, and record the time from the data generating module generating the first characteristic data signal to the delay calibration module receiving the first characteristic data signal, so as to obtain a first time; the delay calibration module is also used to receive the third characteristic data signal and phase information, and record the time from the data generating module generating the first characteristic data signal to the delay calibration module receiving the phase information, so as to obtain a second time; the delay calibration module is also used to calculate a delay calibration value based on the first time, the second time, the phase information and the shift information.

[0012] Optionally, in the transceiver delay calibration system, the transceiver delay calibration system is implemented based on FPGA, hardware programmable SoC or ASIC chip.

[0013] In order to solve the above technical problems, the present invention further provides a transceiver delay calibration method, which is applied to the transceiver delay calibration system as described in any one of the above items, and the transceiver delay calibration method includes: Confirm that the transceiver is working properly; The data generating module generates a first characteristic data signal; The transmitting end and the delay calibration module of the transceiver respectively receive the first characteristic data signal; The receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal; The data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal; The high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0014] Optionally, in the transceiver delay calibration method, the data generation module generates characteristic data with a direction identifier, and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal is inserted with the characteristic data with a direction identifier.

[0015] Optionally, in the transceiver delay calibration method, the method in which the data extraction module generates the third characteristic data signal and the shift information according to the second characteristic data signal includes: The data extraction module performs shift processing on the second characteristic data signal to extract characteristic data and shift information; The data extraction module generates a third characteristic data signal according to the second characteristic data signal and the characteristic data.

[0016] Optionally, in the transceiver delay calibration method, the method in which the delay calibration module obtains the delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information includes: When the data generation module generates the first characteristic data signal, the delay calibration module starts timing; When the delay calibration module receives the first characteristic data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a first time; When the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a second time; The delay calibration module calculates a delay calibration value according to the first time, the second time, the phase information and the shift information.

[0017] Optionally, in the transceiver delay calibration method, the transceiver delay calibration method further includes: The delay calibration module reports the delay calibration value to an upper layer protocol so as to perform delay calibration on the transceiver using the delay calibration value.

[0018] The transceiver delay calibration system and method provided by the present invention include: a data generation module, used to generate a first characteristic data signal; a transceiver, including a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and loop back the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; a data extraction module, used to receive the second characteristic data signal, and generate a third characteristic data signal and shift information according to the second characteristic data signal; a high-frequency sampling module, used to perform asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; a delay calibration module, used to receive the first characteristic data signal, and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. By utilizing the loopback transmission characteristics of the transceiver, the first characteristic data signal is transmitted to the delay calibration module through the transmitting end and receiving end of the transceiver, the data extraction module and the high-frequency sampling module, and the phase information is obtained through asynchronous clock high-frequency sampling, and the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of the transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A structural block diagram of a transceiver delay calibration system provided in this embodiment; Figure 2 This is a flow chart of the transceiver delay calibration method provided in this embodiment. DETAILED DESCRIPTION

[0020] The transceiver delay calibration system and method proposed in the present invention are further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention. In addition, the structure shown in the accompanying drawings is often a part of the actual structure. In particular, the emphasis of each accompanying drawing is different, and sometimes different proportions are used.

[0021] It should be noted that the terms "first", "second", etc. in the specification, claims and drawings of the present invention are used to distinguish similar objects in order to describe the embodiments of the present invention, rather than to describe a specific order or sequence. It should be understood that the structures used in this way can be interchanged under appropriate circumstances. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0022] In order to clearly illustrate the implementation scheme of the transceiver delay calibration system and method provided in this embodiment, the technical terms involved in this embodiment are explained as follows: FPGA: Field Programmable Gate Array, field programmable gate array; CPRI: Common Public Radio Interface, common public radio interface; IEEE 1588: IEEE1588 protocol, a precision clock synchronization protocol standard for network measurement and control systems, also known as PTP (precise time protocol); TDC: Time to Digital Convert, time digital converter; SoC: System on Chip, also known as system on chip; ASIC: Application Specific Integrated Circuit, an integrated circuit for specific applications.

[0023] In view of the fact that the existing transceiver delay calibration system and method cannot meet the requirements of the scenarios that are very sensitive to link delay, such as IEEE 1588 and CPRI, this embodiment provides a transceiver delay calibration system, such as Figure 1 As shown, including: A data generating module, used for generating a first characteristic data signal; A transceiver, comprising a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and loop back the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; A data extraction module, configured to receive the second characteristic data signal, and generate a third characteristic data signal and shift information according to the second characteristic data signal; A high-frequency sampling module, used for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module is used to receive the first characteristic data signal and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0024] The transceiver delay calibration system provided in this embodiment utilizes the loopback transmission characteristics of the transceiver to transmit the first characteristic data signal to the delay calibration module through the transmitting end and receiving end of the transceiver, the data extraction module and the high-frequency sampling module, and obtains the phase information through the asynchronous clock high-frequency sampling, and at the same time directly sends the first characteristic data signal to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of the transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0025] Specifically, in this embodiment, the first characteristic data signal generated by the data generation module includes characteristic data with a direction identifier, so that the subsequent delay calibration unit can distinguish the direction of the received signal. In a specific embodiment, the characteristic data in the first characteristic data signal identifies the "sending" direction.

[0026] In practical applications, the characteristic data is generated periodically so as to confirm the direction of the signal in each period, and the characteristic data generated in each period includes one or more sets of characteristic data so as to improve the accuracy of determining the direction of the signal.

[0027] Correspondingly, the first characteristic data signal is inserted with the characteristic data according to a preset period, for example, the characteristic data is inserted according to a single period.

[0028] In order to effectively identify the characteristic data in the first characteristic data signal, the characteristic data should have a certain regularity. For example, in this embodiment, the characteristic data includes a number of consecutive identical data and a group of different data randomly located in the identical data; or, the characteristic data is data with a header for each period.

[0029] In practical applications, the generation rules of the characteristic data can be reasonably set according to actual needs, and the position and length of the characteristic data in the first characteristic data signal can be reasonably adjusted, and this application does not impose any restrictions on this.

[0030] Furthermore, in this embodiment, the transmitting end of the transceiver needs to loop back the first characteristic data signal to the receiving end before the delay calibration is completed; and, after the delay calibration is completed, switch to external data, that is, after the delay calibration is completed, the data stream can be normally sent to the outside. The receiving end of the transceiver needs to receive the first characteristic data signal looped back by the transmitting end before the delay calibration is completed, and generate the second characteristic data signal accordingly; and, after the delay calibration is completed, switch to external data, that is, after the delay calibration is completed, the data stream sent externally can be normally received.

[0031] Furthermore, in this embodiment, the data extraction module is used to perform shift processing on the second characteristic data signal to extract characteristic data and shift information, and generate a third characteristic data signal according to the second characteristic data signal and the characteristic data.

[0032] In practical applications, since the characteristic data in the second characteristic data signal identifies the "sending" direction, the data extraction module can modify the characteristic data extracted from the second characteristic data signal into characteristic data identifying the "receiving" direction, thereby obtaining a third characteristic data signal.

[0033] In this embodiment, the shift information is extracted from the second characteristic data signal by the data extraction module, and the shift information is transmitted to the delay calibration module, so that the delay calibration module can obtain more accurate delay information, thereby improving the transceiver delay calibration accuracy.

[0034] It should be noted that the implementation method of the shift processing used in this embodiment to extract the feature data is well known to those skilled in the art. Also, the method of generating the feature data identifying the "receiving" direction can refer to the method of generating the feature data identifying the "sending" direction, and it is only necessary to ensure that the content of the two feature data identifying different directions is different and can be distinguished.

[0035] Further, in this embodiment, the high-frequency sampling module is used to perform asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information, and the phase information reflects the phase difference between the first characteristic data signal and the third characteristic data signal, that is, the delay between the two signals. The method of obtaining phase information by asynchronous clock high-frequency sampling is well known to those skilled in the art and will not be described in detail in this application.

[0036] Furthermore, in this embodiment, the delay calibration module is used to receive the first characteristic data signal, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the first characteristic data signal, so as to obtain the first time T1.

[0037] The delay calibration module is also used to receive the third characteristic data signal and phase information, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the phase information to obtain a second time T2.

[0038] The delay calibration module is also used to calculate the delay calibration value according to the first time T1, the second time T2, the phase information and the shift information. Specifically, the first time T1 reflects the signal transmission time in the "sending" direction of the system, and the second time T2 reflects the signal transmission time in the "receiving" direction of the system; the phase information includes the phase difference , reflects the signal delay in the "receiving" direction; the shift information includes the shift amount , then the delay calibration value Tr of the transceiver can be expressed as: .

[0039] The transceiver delay calibration system provided in this embodiment can be implemented based on FPGA, hardware programmable SoC or ASIC chip. The specific implementation method can be known to those skilled in the art based on the above content, and will not be repeated in this application.

[0040] The transceiver delay calibration system provided in this embodiment has no strict requirements on the generation method of feature data, such as data type, extraction method, etc., so the generation method of feature data can be reasonably set according to actual needs, thereby effectively reducing the complexity of data generation and extraction, and improving the delay calibration efficiency. The transceiver delay calibration system provided in this embodiment uses asynchronous clock high-frequency sampling to obtain the phase relationship, which can effectively reduce the layout and wiring pressure and save hardware resources. The transceiver delay calibration system provided in this embodiment can not only effectively improve the delay calibration accuracy in scenarios such as IEEE 1588 that are very sensitive to link delays, but also can be applied to Ethernet with different line rates, so it has a wider application scenario. The transceiver delay calibration system provided in this embodiment does not require external instrument testing. After the system is powered on, it will automatically obtain the delay calibration value of the transceiver, thereby not only eliminating external instruments and reducing the difficulty of operation, but also automatically calibrating the delay for the delay uncertainty of the transceiver, improving the efficiency and accuracy of the transceiver delay calibration.

[0041] This embodiment also provides a transceiver delay calibration method, which is applied to the transceiver delay calibration system as described above. Figure 2 As shown, the transceiver delay calibration method includes: S1, confirm that the transceiver is working properly; S2, a data generation module generates a first characteristic data signal; S3, the transmitting end and the delay calibration module of the transceiver respectively receive the first characteristic data signal; S4, the receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal; S5, a data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal; S6, the high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; S7, a delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0042] The transceiver delay calibration method provided in this embodiment utilizes the loopback transmission characteristics of the transceiver to transmit the first characteristic data signal to the delay calibration module through the transmitting end and receiving end of the transceiver, the data extraction module and the high-frequency sampling module, and obtains the phase information through the asynchronous clock high-frequency sampling, and at the same time directly sends the first characteristic data signal to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of the transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0043] Specifically, in this embodiment, step S1 is to confirm that the transceiver is working normally.

[0044] In actual applications, when the system is powered on or reset, the entire system will be reset to complete the system initialization. Since the initialization delay of the transceiver is different each time, it is necessary to confirm the delay after the transceiver works normally and the status is stable.

[0045] Furthermore, in this embodiment, in step S2, the data generating module generates a first characteristic data signal.

[0046] In practical applications, the data generation module generates characteristic data with a direction identifier, and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal is inserted with the characteristic data with a direction identifier.

[0047] In this embodiment, the inserted characteristic data should identify the "send" direction. And, in a specific embodiment, the characteristic data is generated periodically so as to confirm the direction of the signal in each cycle.

[0048] Furthermore, in this embodiment, in step S3, the transmitting end and the delay calibration module of the transceiver receive the first characteristic data signal respectively.

[0049] That is, the data generation module sends the generated same first characteristic data signal to the transmitting end of the transceiver and the delay calibration module at the same time.

[0050] In order to facilitate the delay calibration module to perform delay calibration, when the data generation module generates the first characteristic data signal, that is, when the data generation module sends out the generated first characteristic data signal, the delay calibration module starts timing.

[0051] Furthermore, in this embodiment, in step S4, the receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal.

[0052] Specifically, the transmitting end loops back the first characteristic data signal to the receiving end before the delay calibration is completed. When the receiving end sends the first characteristic data signal, the first characteristic data signal is recorded as the second characteristic data signal.

[0053] Furthermore, in this embodiment, in step S5, the data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal.

[0054] Specifically, in this embodiment, step S5 includes: the data extraction module performs shift processing on the second characteristic data signal to extract characteristic data and shift information; the data extraction module generates a third characteristic data signal according to the second characteristic data signal and the characteristic data.

[0055] In a specific embodiment, since the characteristic data in the second characteristic data signal identifies the "sending" direction, the data extraction module can modify the characteristic data extracted from the second characteristic data signal into characteristic data identifying the "receiving" direction, thereby obtaining a third characteristic data signal.

[0056] In this embodiment, the shift information is extracted from the second characteristic data signal by the data extraction module, and the shift information is transmitted to the delay calibration module, so that the delay calibration module can obtain more accurate delay information, thereby improving the transceiver delay calibration accuracy.

[0057] Furthermore, in this embodiment, in step S6, the high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information, which reflects the phase difference between the first characteristic data signal and the third characteristic data signal, that is, the delay between the two signals.

[0058] And, in this embodiment, in step S7, the delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

[0059] Specifically, in this embodiment, step S7 includes: when the data generation module generates a first characteristic data signal, the delay calibration module starts timing; when the delay calibration module receives the first characteristic data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a first time T1; when the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a second time T2; the delay calibration module calculates the delay calibration value based on the first time T1, the second time T2, the phase information and the shift information.

[0060] In practical applications, the phase information includes the phase difference φ, and the shift information includes the shift amount , a calculation method of obtaining a delay calibration value according to the first time T1, the second time T2, the phase information and the shift information can be expressed as: .

[0061] Furthermore, in this embodiment, the transceiver delay calibration method further includes: S8, the delay calibration module reports the delay calibration value to an upper layer protocol, so as to perform delay calibration on the transceiver using the delay calibration value.

[0062] In this way, the upper layer protocol can improve the delay accuracy of Ethernet through the delay calibration value, thereby realizing the sending and receiving of data packets.

[0063] It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other. In addition, the different parts between the various embodiments can also be used in combination with each other, and the present invention is not limited to this.

[0064] The transceiver delay calibration system and method provided in this embodiment include: a data generation module, which is used to generate a first characteristic data signal; a transceiver, including a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and loop back the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal based on the first characteristic data signal; a data extraction module, which is used to receive the second characteristic data signal, and generate a third characteristic data signal and shift information based on the second characteristic data signal; a high-frequency sampling module, which is used to perform asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; a delay calibration module, which is used to receive the first characteristic data signal, and obtain a delay calibration value based on the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. By utilizing the loopback transmission characteristics of the transceiver, the first characteristic data signal is transmitted to the delay calibration module through the transmitting end and receiving end of the transceiver, the data extraction module and the high-frequency sampling module, and the phase information is obtained through asynchronous clock high-frequency sampling, and the first characteristic data signal is directly sent to the delay calibration module, so that the delay calibration module can obtain an accurate delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information. In this way, the layout and wiring pressure can be effectively reduced, resources can be saved, and the accuracy of the transceiver delay calibration can be improved, solving the problem of how to accurately calibrate the delay of the transceiver without consuming a large amount of resources.

[0065] The above description is only a description of the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention. Any changes or modifications made by a person skilled in the art in the field of the present invention based on the above disclosure shall fall within the scope of protection of the claims.

Claims

1. A transceiver delay calibration system, characterized in that: include: A data generating module, used for generating a first characteristic data signal; A transceiver, comprising a transmitting end and a receiving end; the transmitting end is used to receive the first characteristic data signal, and loop back the first characteristic data signal to the receiving end before the delay calibration is completed; the receiving end is used to generate a second characteristic data signal according to the first characteristic data signal; A data extraction module, configured to receive the second characteristic data signal, and generate a third characteristic data signal and shift information according to the second characteristic data signal; A high-frequency sampling module, used for performing asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module is used to receive the first characteristic data signal and obtain a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

2. The transceiver delay calibration system according to claim 1, characterized in that: The first characteristic data signal is inserted with characteristic data having a direction identifier.

3. The transceiver delay calibration system according to claim 2, characterized in that: The first characteristic data signal is inserted with the characteristic data at a preset period.

4. The transceiver delay calibration system according to claim 2, characterized in that: The characteristic data includes a number of consecutive identical data and a group of different data randomly located in the identical data; or, the characteristic data is data with a header in each cycle.

5. The transceiver delay calibration system according to claim 1, characterized in that: The data extraction module is used to perform shift processing on the second characteristic data signal to extract characteristic data and shift information, and generate a third characteristic data signal according to the second characteristic data signal and the characteristic data.

6. The transceiver delay calibration system according to claim 1, characterized in that: The delay calibration module is used to receive the first characteristic data signal, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the first characteristic data signal, so as to obtain a first time; the delay calibration module is also used to receive the third characteristic data signal and phase information, and record the time from the data generation module generating the first characteristic data signal to the delay calibration module receiving the phase information, so as to obtain a second time; The delay calibration module is further used to calculate a delay calibration value according to the first time, the second time, the phase information and the shift information.

7. The transceiver delay calibration system according to claim 1, characterized in that: The transceiver delay calibration system is implemented based on FPGA, hardware programmable SoC or ASIC chip.

8. A transceiver delay calibration method, applied to the transceiver delay calibration system according to any one of claims 1 to 7, characterized in that: The transceiver delay calibration method comprises: Confirm that the transceiver is working properly; The data generating module generates a first characteristic data signal; The transmitting end and the delay calibration module of the transceiver respectively receive the first characteristic data signal; The receiving end of the transceiver receives the first characteristic data signal from the transmitting end and generates a second characteristic data signal; The data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal; The high-frequency sampling module performs asynchronous clock high-frequency sampling on the third characteristic data signal to obtain phase information; The delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information.

9. The transceiver delay calibration method according to claim 8, characterized in that: The data generation module generates characteristic data with a direction identifier, and inserts the characteristic data into the first characteristic data signal at a preset period, so that the output first characteristic data signal is inserted with the characteristic data with a direction identifier.

10. The transceiver delay calibration method according to claim 8, characterized in that: The method in which the data extraction module generates a third characteristic data signal and shift information according to the second characteristic data signal includes: The data extraction module performs shift processing on the second characteristic data signal to extract characteristic data and shift information; The data extraction module generates a third characteristic data signal according to the second characteristic data signal and the characteristic data.

11. The transceiver delay calibration method according to claim 8, characterized in that: The method in which the delay calibration module obtains a delay calibration value according to the first characteristic data signal, the third characteristic data signal, the phase information and the shift information includes: When the data generation module generates the first characteristic data signal, the delay calibration module starts timing; When the delay calibration module receives the first characteristic data signal, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a first time; When the delay calibration module receives the phase information, the delay calibration module counts the timing duration from the start of timing to the current moment to obtain a second time; The delay calibration module calculates a delay calibration value according to the first time, the second time, the phase information and the shift information.

12. The transceiver delay calibration method according to claim 8, characterized in that: The transceiver delay calibration method further includes: The delay calibration module reports the delay calibration value to an upper layer protocol so as to perform delay calibration on the transceiver using the delay calibration value.

Images