Network data plane simulation method and device, electronic equipment and storage medium

Abstract

The invention relates to the technical field of digital information transmission, in particular to a network data plane simulation method and device, electronic equipment and a storage medium, and the method comprises the steps: modeling a process experienced by a message in a network data plane, and abstracting entities, components and behaviors in a simulation scene to obtain a network simulation model; a runtime thread model of a network simulation model is generated by determining a plurality of network data plane behaviors, a simulation task is executed, the plurality of network data plane behaviors are executed in sequence according to a preset execution sequence, and the same behaviors of all network devices are executed concurrently. Data synchronization among multiple threads is carried out after the multiple network data plane behaviors are executed, and a network data plane simulation result is generated. Therefore, the problems that a network simulator cannot process a large number of concurrent events, the simulation efficiency is reduced and the like due to the fact that the network simulator does not have expandability and is limited in performance in the related technology are solved.

Description

Technical Field

[0001] The present application relates to the technical field of digital information transmission, and in particular to a network data plane simulation method, device, electronic device and storage medium. Background Art

[0002] Network simulation is a key task in network planning, operation and algorithm design. DES (Discrete Event Simulation) is the main paradigm of network simulation. In DES simulation, each event, such as sending or receiving a message, is considered as a discrete event. A complete and accurate simulation process requires executing each discrete event in timestamp order.

[0003] In related technologies, specialized simulation tools and frameworks, such as NS-3, OPNET, and OMNeT++, are mainly used to simulate the occurrence and processing of each event in the network, thereby evaluating the system performance. A rich set of APIs (Application Programming Interfaces) and modules are provided to simplify the development and execution of simulation models. At the same time, visualization and data analysis functions are provided to facilitate users to observe and analyze simulation results.

[0004] However, in the related technologies, network simulators lack scalability when facing modern large-scale networks, and their performance is limited by the underlying software architecture. The object-oriented design reduces the program's CPU cache friendliness and parallel efficiency, and may not be able to handle a large number of concurrent events. It takes a long time to simulate large-scale networks, and needs to be improved urgently. Summary of the invention

[0005] The present application provides a network data plane simulation method, device, electronic device and storage medium to solve the problems in the related art that the network emulator is not scalable and has limited performance, and may not be able to handle a large number of concurrent events, resulting in slow simulation speed, reduced simulation efficiency, and affected simulation precision and accuracy.

[0006] The first aspect of the present application provides a network data plane simulation method, comprising the following steps: modeling the process experienced by a message in a network data plane, abstracting the entities, components and behaviors in the simulation scenario to obtain a network simulation model; determining multiple network data plane behaviors based on the transmission process of the data message in the network to generate a runtime thread model of the network simulation model; using the runtime thread model to execute simulation tasks, and executing the multiple network data plane behaviors in sequence in a preset execution order, wherein, when executing the preset behavior, the same behavior of all network devices is executed concurrently, so as to synchronize data between multiple threads after the multiple network data plane behaviors are executed, and generate a network data plane simulation result.

[0007] Optionally, in one embodiment of the present application, the multiple network data plane behaviors include a sending process, a forwarding process, a transmission process and a confirmation process.

[0008] Optionally, in one embodiment of the present application, before executing the multiple network data plane behaviors in sequence, it also includes: configuring the number of threads in the thread pool to be the number of central processing unit CPU cores.

[0009] Optionally, in one embodiment of the present application, the preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

[0010] The second aspect of the present application provides a network data plane simulation device, including: a construction module, which is used to model the process experienced by a message in the network data plane, abstract the entities, components and behaviors in the simulation scenario, and obtain a network simulation model; a generation module, which is used to determine multiple network data plane behaviors based on the transmission process of the data message in the network, so as to generate a runtime thread model of the network simulation model; a simulation module, which is used to perform simulation tasks using the runtime thread model, and execute the multiple network data plane behaviors in sequence in a preset execution order, wherein, when executing the preset behavior, the same behavior of all network devices is executed concurrently, so as to perform data synchronization between multiple threads after the multiple network data plane behaviors are executed, and generate a network data plane simulation result.

[0011] Optionally, in one embodiment of the present application, the multiple network data plane behaviors include a sending process, a forwarding process, a transmission process and a confirmation process.

[0012] Optionally, in one embodiment of the present application, it also includes: a configuration module, which is used to configure the number of threads in the thread pool to the number of central processing unit CPU cores before executing the multiple network data plane behaviors in sequence.

[0013] Optionally, in one embodiment of the present application, the preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

[0014] The third aspect of the present application provides an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the network data plane simulation method as described in the above embodiment.

[0015] The fourth aspect of the present application provides a computer-readable storage medium, which stores a computer program that implements the above network data plane simulation method when executed by a processor.

[0016] The fifth aspect of the present application provides a computer program product, which, when executed, is used to implement the above network data plane simulation method.

[0017] The embodiment of the present application can model the process experienced by the message in the network data plane, abstract the entities, components and behaviors in the simulation scene to obtain a network simulation model, and generate a runtime thread model of the network simulation model by determining multiple network data plane behaviors, and use the runtime thread model to perform simulation tasks, and execute multiple network data plane behaviors in sequence according to a preset order, and use concurrent execution of the same behavior of all network devices to ensure the synchronous execution of network data plane behaviors, and finally achieve data synchronization between multiple threads, thereby generating network data plane simulation results, reducing the synchronization overhead of parallel execution of network simulation, improving the execution speed of network simulation, and effectively improving network performance and stability. Therefore, the problem in the related art that the network simulator is not scalable and has limited performance, and may not be able to handle a large number of concurrent events, resulting in a slow simulation speed, reduced simulation efficiency, and affected simulation precision and accuracy is solved.

[0018] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0020] Figure 1 A flowchart of a network data plane simulation method provided according to an embodiment of the present application;

[0021] Figure 2 A schematic diagram of modeling network data plane behavior according to an embodiment of the present application;

[0022] Figure 3 is a functional schematic diagram of a network data plane emulator according to an embodiment of the present application;

[0023] Figure 4 A schematic diagram of a processing flow of a batch-based thread model according to an embodiment of the present application;

[0024] Figure 5 A schematic diagram of the structure of a network data plane simulation device provided according to an embodiment of the present application;

[0025] Figure 6 It is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present application. DETAILED DESCRIPTION

[0026] Embodiments of the present application are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present application, and should not be construed as limiting the present application.

[0027] The following describes the network data plane simulation method, device, electronic device and storage medium of the embodiments of the present application with reference to the accompanying drawings.

[0028] Before introducing the network data plane simulation method of the embodiment of the present application, the following is a specific introduction to the related art. Since the 1970s, parallel simulation technology that attempts to improve scalability has been widely studied, and many synchronization algorithms applied to parallel simulation have been proposed. However, in the related art, the DES simulator still performs poorly in terms of scalability. For example, it takes more than 9 days to simulate a large-scale DCNs (Data Center Networks) on 8 machines using the most advanced DES simulator OMNet++. Although a data center containing tens of thousands of servers is being built, its simulation performance is far from meeting the needs for today's "super-large-scale" networks.

[0029] In addition, in the related art, the reasons for the poor performance of DES simulators are as follows: the default execution mode is single-threaded. When running the most advanced open source DES network simulators ns-3 and OMNeT++ on a single machine, the CPU (Central Processing Unit) utilization is capped at 100%, which means that although the server has multiple CPU cores, the network simulators ns-3 and OMNeT++ only use one core. It can be seen that these network simulators do not support multi-threaded execution. In order to use multiple cores, both simulators need to divide the simulated network topology into multiple subgraphs and execute different subgraphs on different CPU cores; the memory and cache efficiency is low, and the process-based parallelization scheme cannot share data without causing context switching overhead. Therefore, the multi-process network simulator saves the same data in each process, such as network topology and routing information, which seriously aggravates the memory consumption of the simulator. In addition, in the related art, DES simulators have a high CPU cache miss rate.

[0030] It is worth noting that the root cause of the above problems is that in related technologies, DES simulators are based on the OOD (Object-Oriented Design) software architecture. Studies have shown that under the current computer architecture, the OOD software architecture is not friendly to the CPU cache mechanism and automatic parallelism, because the OOD architecture ignores the importance of data layout. Inefficient data layout will lead to extremely high cache miss rates, thereby reducing the efficiency of network simulation.

[0031] In view of the above-mentioned related technologies, since the network simulator is not scalable and has limited performance, it may not be able to handle a large number of concurrent events, resulting in a slow simulation speed, reducing simulation efficiency, and affecting simulation precision and accuracy. The present application provides a network data plane simulation method, in which the process experienced by the message in the network data plane can be modeled, and the entities, components and behaviors in the simulation scene can be abstracted to obtain a network simulation model, and a runtime thread model of the network simulation model is generated by determining multiple network data plane behaviors, and the runtime thread model is used to perform simulation tasks, and multiple network data plane behaviors are executed in sequence in a preset order, and the same behavior of all network devices is executed concurrently to ensure the synchronous execution of network data plane behaviors, and finally realize data synchronization between multiple threads, thereby generating network data plane simulation results, reducing the synchronization overhead of parallel execution of network simulation, improving the execution speed of network simulation, and effectively improving network performance and stability. Thus, the problem that the network simulator is not scalable and has limited performance, it may not be able to handle a large number of concurrent events, resulting in a slow simulation speed, reducing simulation efficiency, affecting simulation precision and accuracy, etc. in the related technology is solved.

[0032] Specifically, Figure 1 A flowchart of a network data plane simulation method provided in an embodiment of the present application.

[0033] like Figure 1 As shown, the network data plane simulation method includes the following steps:

[0034] In step S101, the process that a message goes through in the network data plane is modeled, and entities, components and behaviors in the simulation scenario are abstracted to obtain a network simulation model.

[0035] It can be understood that an entity refers to a common object in a simulation scenario. Unlike an object in OOD, an entity in DOD (Data-Oriented Design) is only used to identify data belonging to the same object, so it is usually implemented as a UID (Unique Identifier); a component refers to a specific attribute or data of an entity. For example, in a physics engine, each entity has a "quality" component, and all data of the same component is stored together in physical memory and indexed by the entity's UID, so that the processing logic that operates multiple entities can access memory efficiently; a behavior refers to the processing logic for a component, which acts on all entities with certain components and converts component data from the current state to the next state. A behavior can describe a certain aspect of the network simulation process.

[0036] In the actual implementation process, combined with Figure 2 As shown, the embodiment of the present application can first analyze the life cycle of network messages in the data plane, and abstract the entities, components and behaviors in the network simulation to obtain a network model based on data-oriented design DOD, wherein a message is sent from a sender entity, then passes through a forwarding path composed of continuous input port entities and output port entities, and finally the message reaches the receiver entity. In addition, if necessary, the receiver entity will trigger the local sender entity to send an acknowledgment message ACK (Acknowledge Character).

[0037] It is worth noting that the network data plane simulator NSim defines four entities, including senders, receivers, ingress ports and egress ports, where senders refer to all traffic generators, including components such as ID (Identifier), source address and destination address, traffic demand and congestion window; receivers refer to the destination of the traffic, including components such as ID, source address and destination address and receiving window; ingress ports refer to the input ports of all network devices, such as terminal hosts or switches. Switches have multiple ingress ports, and each host has an ingress port. The ingress ports include components such as forwarding tables and buffers; egress ports refer to the output ports of all network devices, such as switches can have multiple egress ports, including components such as scheduling strategies and buffers; NSim defines four behaviors for processing component data, each of which represents a process in the network data plane, including the sending process, forwarding process, transmission process and confirmation process.

[0038] By constructing a network model based on data-oriented design (DOD), the embodiments of the present application can better understand the message transmission process in the network data plane, help optimize network design, improve network performance, and provide a basis for network simulation.

[0039] In step S102, a plurality of network data plane behaviors are determined based on a transmission process of a data message in a network to generate a runtime thread model of a network simulation model.

[0040] It can be understood that multiple network data plane behaviors include sending process, forwarding process, transmission process and confirmation process, and these processes completely cover the transmission process of data packets in the network and can accurately simulate nanosecond-level events on the network data plane.

[0041] Specifically, combined Figure 2 and Figure 3 As shown, the embodiment of the present application is based on entities, components and behaviors. NSim realizes the simulation of the network data plane on the ECS (Entity-Component-System) framework, wherein the specific steps are as follows:

[0042] Step S1: sender #1 in host #1 sends a message to ingress port #1 of the switch, which can be abstracted as a sending process;

[0043] Step S2: Inbound port #1 searches the forwarding table according to the destination IP (Internet Protocol) in the message, and then forwards the message to port #2, which can be abstracted as a forwarding process;

[0044] Step S3: egress port #2 transmits the message along the link to receiver #2 in host #2, which can be abstracted as a transmission process;

[0045] Step S4: Receiver #2 needs to return an acknowledgment message (ACK) for the message, and submits the sending request to sender #2, which can be abstracted as a confirmation process;

[0046] Step S5: Sender #2 in host #2 sends the ACK message to ingress port #2 of the switch, which can be abstracted as a sending process;

[0047] Step S6: after searching the forwarding table according to the destination IP in the message, the inbound port #2 forwards the message to the port #1, which can be abstracted as a forwarding process;

[0048] Step S7: egress port #1 transmits the message along the link to receiver #1 in host #1, which can be abstracted as a transmission process;

[0049] Step S8: After receiving the message, receiver #1 decides whether to continue sending the message. It submits the sending request to sender #1, which can be abstracted as a confirmation process.

[0050] In summary, the DOD-based network model proposed by NSim covers all behaviors of the IP network data plane, and by building a runtime thread model of the network simulator, it can realize automatic parallel execution of simulation on multiple CPU cores.

[0051] The embodiment of the present application determines multiple network data plane behaviors based on the transmission process of data packets in the network to generate a runtime thread model of the network simulation model, which can effectively simulate the actual operation of the network, provide guidance for network operation and management, help solve the problem of high consistency overhead of synchronization algorithms, and optimize network design and configuration.

[0052] Optionally, in one embodiment of the present application, the multiple network data plane behaviors include a sending process, a forwarding process, a transmission process and a confirmation process.

[0053] It is understandable that, combined with Figure 2 and Figure 3As shown, the sending process includes generating messages in all senders, adding them to the buffer component of the directly connected input port entity, and maintaining the state machine of the transport layer congestion control protocol for all senders; the forwarding process includes the forwarding behavior in all input ports, that is, forwarding the message to the corresponding output port according to the forwarding information base (FIB), and can realize the ECMP (Equal Cost Multi-Path) function; the transmission process includes the scheduling and transmission message behavior in all output ports, firstly sorting the messages in the buffer component of the output port in chronological order, and then transmitting a message to the directly connected input port according to the predefined scheduling strategy; the confirmation process includes processing the messages received by all receivers, for example, if a flow uses TCP (Transmission Control Protocol), the confirmation system first checks the sequence number of the message, and then lets the local sender entity send an ACK message.

[0054] The embodiments of the present application can analyze and evaluate network protocols by modeling the sending process, forwarding process, transmission process and confirmation process, which helps to identify potential security vulnerabilities and strengthen network protection measures.

[0055] In step S103, the simulation task is executed using the runtime thread model, and multiple network data plane behaviors are executed in sequence in a preset execution order. When executing the preset behaviors, the same behaviors of all network devices are executed concurrently, so that data synchronization is performed between multiple threads after multiple network data plane behaviors are executed, and a network data plane simulation result is generated.

[0056] In some embodiments, in combination Figure 4 As shown, the embodiment of the present application utilizes a runtime thread model to perform simulation tasks, wherein the vertical direction of the thread model is the time sequence, and the horizontal direction is the process execution sequence. In network simulation, the time length of a batch is the minimum value of the link delay. Thus, NSim can execute these four processes sequentially in one batch.

[0057] Specifically, the embodiment of the present application utilizes a runtime thread model to perform simulation tasks. When executing multiple network data plane behaviors in sequence in a preset execution order, the same behaviors of all network devices are executed concurrently. For example, in the forwarding process, within a batch, the forwarding process moves all data packets on the input port to the corresponding output port according to the forwarding table. The forwarding process only involves a buffer component and a forwarding table component. Therefore, the forwarding process has no dependency on other network devices during operation. NSim can safely execute all similar behaviors in parallel on multiple cores without violating LCC. Furthermore, since there are dependencies between processes, such as the result of the forwarding process will affect the execution process of the transmission process, the present application uses "confirmation process, sending process, forwarding process, transmission process" as the execution order.

[0058] It is worth noting that the embodiment of the present application uses "confirmation process, sending process, forwarding process, transmission process" as the execution order, which can ensure correctness and reduce synchronization overhead, and avoid the problem that when a batch ends and the next batch starts, the simulation clock will increase due to the intuitive execution order of "sending process, forwarding process, transmission process, confirmation process". The confirmation process may trigger the sending process to execute events in the current batch, causing the sending process to violate LCC (Logic Correctness Condition), that is, the timing of execution events is disordered.

[0059] The embodiments of the present application can improve the parallelism and efficiency of the simulation by concurrently executing the same process of all network devices, speed up the data transmission speed during the simulation process, and synchronize data after multiple network data plane behaviors are executed. It can reduce synchronization overhead and improve the comprehensiveness and accuracy of the network data plane simulation results, which helps to deeply analyze the network data plane behavior and optimize network performance.

[0060] Optionally, in one embodiment of the present application, before executing multiple network data plane behaviors in sequence, it also includes: configuring the number of threads in the thread pool to be the number of central processing unit CPU cores.

[0061] The embodiment of the present application configures the number of threads in the thread pool to be the number of CPU cores of the central processing unit, which is conducive to better utilizing the hardware resources of the computer system, improving the efficiency of concurrently executing multiple network data plane behaviors, and avoiding excessive consumption and waste of resources.

[0062] Optionally, in one embodiment of the present application, the preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

[0063] The embodiment of the present application executes multiple network data plane behaviors in chronological order, which helps to analyze and evaluate the real-time performance of the network and avoid waste and conflict of resources. It also executes multiple network data plane behaviors in the order of system execution, which helps to optimize the system's workflow and improve the overall efficiency and performance of the system.

[0064] According to the network data plane simulation method proposed in the embodiment of the present application, the process experienced by the message in the network data plane can be modeled, and the entities, components and behaviors in the simulation scene can be abstracted to obtain a network simulation model. By determining multiple network data plane behaviors, a runtime thread model of the network simulation model is generated, and the runtime thread model is used to perform simulation tasks, and multiple network data plane behaviors are executed in sequence according to a preset order, and the same behavior of all network devices is executed concurrently to ensure the synchronous execution of network data plane behaviors, and finally achieve data synchronization between multiple threads, thereby generating network data plane simulation results, reducing the synchronization overhead of parallel execution of network simulation, improving the execution speed of network simulation, and being able to effectively improve network performance and stability. Therefore, the problem in the related art that the network simulator is not scalable and has limited performance, and may not be able to handle a large number of concurrent events, resulting in a slow simulation speed, reduced simulation efficiency, and affected simulation precision and accuracy is solved.

[0065] Next, the network data plane simulation device proposed according to the embodiment of the present application is described with reference to the accompanying drawings.

[0066] Figure 5 It is a schematic diagram of the structure of the network data plane simulation device of an embodiment of the present application.

[0067] like Figure 5 As shown, the network data plane simulation device 10 includes: a construction module 100 , a generation module 200 and a simulation module 300 .

[0068] Specifically, the construction module 100 is used to model the process that a message goes through in the network data plane, abstract the entities, components and behaviors in the simulation scenario, and obtain a network simulation model.

[0069] The generating module 200 is used to determine a plurality of network data plane behaviors based on the transmission process of the data message in the network, so as to generate a runtime thread model of the network simulation model.

[0070] The simulation module 300 is used to perform simulation tasks using a runtime thread model, and execute multiple network data plane behaviors in sequence in a preset execution order. When executing the preset behaviors, the same behaviors of all network devices are executed concurrently, so that data synchronization between multiple threads is performed after multiple network data plane behaviors are executed, and a network data plane simulation result is generated.

[0071] Optionally, in one embodiment of the present application, the multiple network data plane behaviors include a sending process, a forwarding process, a transmission process and a confirmation process.

[0072] Optionally, in one embodiment of the present application, it also includes: a configuration module.

[0073] Among them, the configuration module is used to configure the number of threads in the thread pool to the number of central processing unit CPU cores before executing multiple network data plane behaviors in sequence.

[0074] Optionally, in one embodiment of the present application, the preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

[0075] It should be noted that the above explanation of the network data plane simulation method embodiment is also applicable to the network data plane simulation device of this embodiment, and will not be repeated here.

[0076] According to the network data plane simulation device proposed in the embodiment of the present application, the process experienced by the message in the network data plane can be modeled, and the entities, components and behaviors in the simulation scene can be abstracted to obtain a network simulation model. By determining multiple network data plane behaviors, a runtime thread model of the network simulation model is generated, and the runtime thread model is used to perform simulation tasks, and multiple network data plane behaviors are executed in sequence according to a preset order, and the same behavior of all network devices is executed concurrently to ensure the synchronous execution of network data plane behaviors, and finally achieve data synchronization between multiple threads, thereby generating network data plane simulation results, reducing the synchronization overhead of parallel execution of network simulation, improving the execution speed of network simulation, and effectively improving network performance and stability. Therefore, the problem in the related art that the network simulator is not scalable and has limited performance, and may not be able to handle a large number of concurrent events, resulting in a slow simulation speed, reduced simulation efficiency, and affected simulation precision and accuracy is solved.

[0077] Figure 6 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. The electronic device may include:

[0078] A memory 601 , a processor 602 , and a computer program stored in the memory 601 and executable on the processor 602 .

[0079] When the processor 602 executes the program, the network data plane simulation method provided in the above embodiment is implemented.

[0080] Furthermore, the electronic device further comprises:

[0081] The communication interface 603 is used for communication between the memory 601 and the processor 602 .

[0082] The memory 601 is used to store computer programs that can be executed on the processor 602 .

[0083] The memory 601 may include a high-speed RAM memory, and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory.

[0084] If the memory 601, the processor 602 and the communication interface 603 are implemented independently, the communication interface 603, the memory 601 and the processor 602 can be connected to each other through a bus and communicate with each other. The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 6 Only one thick line is used in the diagram, but this does not mean that there is only one bus or only one type of bus.

[0085] Optionally, in a specific implementation, if the memory 601, the processor 602 and the communication interface 603 are integrated on a chip, the memory 601, the processor 602 and the communication interface 603 can communicate with each other through an internal interface.

[0086] The processor 602 may be a central processing unit (CPU), or an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application.

[0087] An embodiment of the present application also provides a computer-readable storage medium on which a computer program is stored. When the program is executed by a processor, the network data plane simulation method as described above is implemented.

[0088] An embodiment of the present application also provides a computer program product, which can run computer instructions, and when the computer instructions are executed by a processor, the above network data plane simulation method is implemented.

[0089] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0090] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0091] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or N executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0092] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in combination with these instruction execution systems, devices or apparatuses. For the purpose of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in combination with these instruction execution systems, devices or apparatuses. More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or N wirings (electronic devices), a portable computer disk box (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically by optically scanning the paper or other medium and then editing, interpreting or processing in other suitable ways as necessary and then storing it in a computer memory.

[0093] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented by hardware, as in another embodiment, it can be implemented by any one or a combination of multiple of the following technologies known in the art: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0094] A person skilled in the art may understand that all or part of the steps in the method for implementing the above-mentioned embodiment may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0095] In addition, each functional unit in each embodiment of the present application may be integrated into a processing module, or each unit may exist physically separately, or two or more units may be integrated into one module. The above-mentioned integrated module may be implemented in the form of hardware or in the form of a software functional module. If the integrated module is implemented in the form of a software functional module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.

[0096] The storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk, etc. Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application. A person of ordinary skill in the art may change, modify, replace and modify the above embodiments within the scope of the present application.

Claims

1. A network data plane simulation method, characterized in that: The following steps are involved: Model the process that messages go through in the network data plane, abstract the entities, components, and behaviors in the simulation scenario, and obtain a network simulation model; Determine multiple network data plane behaviors based on the transmission process of the data message in the network to generate a runtime thread model of the network simulation model; The simulation task is executed using the runtime thread model, and the multiple network data plane behaviors are executed in sequence in a preset execution order. When executing the preset behaviors, the same behaviors of all network devices are executed concurrently, so that data synchronization between multiple threads is performed after the multiple network data plane behaviors are executed, and a network data plane simulation result is generated.

2. The network data plane simulation method according to claim 1, characterized in that: The multiple network data plane behaviors include a sending process, a forwarding process, a transmission process and a confirmation process.

3. The network data plane simulation method according to claim 1, characterized in that: Before sequentially executing the multiple network data plane behaviors, the method further includes: Configure the number of threads in the thread pool to the number of CPU cores.

4. The network data plane simulation method according to claim 1, characterized in that: The preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

5. A network data plane simulation device, characterized in that: include: The building module is used to model the process that the message goes through in the network data plane, abstract the entities, components and behaviors in the simulation scenario to obtain the network simulation model; A generation module, used for determining a plurality of network data plane behaviors based on a transmission process of a data message in a network, so as to generate a runtime thread model of the network simulation model; A simulation module is used to perform simulation tasks using the runtime thread model, and execute the multiple network data plane behaviors in sequence in a preset execution order. When executing the preset behaviors, the same behaviors of all network devices are executed concurrently, so as to synchronize data between multiple threads after the multiple network data plane behaviors are executed, and generate network data plane simulation results.

6. The network data plane simulation device according to claim 5, characterized in that: Also includes: The configuration module is used to configure the number of threads in the thread pool to the number of CPU cores before executing the multiple network data plane behaviors in sequence.

7. The network data plane simulation device according to claim 5, characterized in that: The preset execution order is: confirmation process, sending process, forwarding process, and transmission process.

8. An electronic device, characterized in that: include: A memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the network data plane simulation method according to any one of claims 1 to 4.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: The program is executed by a processor to implement the network data plane simulation method as described in any one of claims 1 to 4.

10. A computer program product, characterized in that When the computer program is executed, it is used to implement the network data plane simulation method as described in any one of claims 1-4.

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