Substrate processing method and substrate processing apparatus

Abstract

The present disclosure provides a substrate processing method and a substrate processing apparatus capable of improving productivity. The substrate processing method includes: a step (A) of preparing a substrate having an electrode array in which a plurality of electrodes are arranged on a surface of the substrate; a step (B) for forming a light-emitting layer, an electrode layer, and a first sealing layer over the entire electrode array; a step (C) for forming a mask on one type of electrode among the plurality of electrodes and on the first sealing layer; a step (D) of forming a laminate in which the one type of electrode, the light-emitting layer, the electrode layer, and the first sealing layer are laminated by performing an etching process on the substrate using the mask; a step (E) in which a second sealing layer is formed over the entire electrode array; and a step (F) for forming the second sealing layer covering the side wall of the laminate by performing anisotropic etching treatment on the substrate.

Description

Technical Field

[0001] The present disclosure relates to a substrate processing method and a substrate processing device. Background Art

[0002] Patent document 1 discloses a sub-pixel circuit and a method for forming the sub-pixel circuit that can be used for a display such as an organic light emitting diode display. The sub-pixel is formed by applying an organic EL (Electro Luminescence) layer using an overhang structure formed on an adjacent PDL (Pixel Defining Layer) structure.

[0003] Prior art literature

[0004] Patent Literature

[0005] Patent Document 1: U.S. Patent Application Publication No. 2022 / 0077257 Summary of the invention

[0006] Problem that the invention aims to solve

[0007] In one aspect, the present disclosure provides a substrate processing method and a substrate processing apparatus that improve productivity.

[0008] Solutions for solving problems

[0009] In order to solve the above-mentioned problems, according to one embodiment, a substrate processing method can be provided, which includes the following steps: step (A), preparing a substrate, wherein the substrate has an electrode array in which a plurality of electrodes are arranged on a surface of the substrate; step (B), forming a light-emitting layer, an electrode layer and a first sealing layer on the entire electrode array; step (C), forming a mask on one type of electrode among the plurality of electrodes and on the first sealing layer; step (D), using the mask to perform an etching process on the substrate to form a stacked body having the one type of electrode, the light-emitting layer, the electrode layer and the first sealing layer stacked thereon; step (E), forming a second sealing layer on the entire electrode array; and step (F), performing an anisotropic etching process on the substrate to form the second sealing layer covering the side walls of the stacked body.

[0010] Effects of the Invention

[0011] According to one aspect, a substrate processing method and a substrate processing apparatus that improve productivity can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a flowchart showing an example of a substrate processing method according to the present embodiment.

[0013] Figure 2 This is an example of a schematic cross-sectional view of a substrate in each step.

[0014] Figure 3 This is an example of a schematic cross-sectional view of a substrate in each step.

[0015] Figure 4 This is an example of a schematic cross-sectional view of a substrate in each step.

[0016] Figure 5 This is an example of a schematic cross-sectional view of a substrate in each step.

[0017] Figure 6 This is an example of a schematic cross-sectional view of a substrate in each step.

[0018] Figure 7 This is an example of a schematic cross-sectional view of a substrate in each step.

[0019] Figure 8 This is an example of a schematic cross-sectional view of a substrate in each step.

[0020] Fig. 9 This is an example of a schematic cross-sectional view of a substrate in each step.

[0021] Fig.10 This is an example of a schematic cross-sectional view of a substrate in each step.

[0022] Fig.11 This is an example of a schematic cross-sectional view of a substrate in each step.

[0023] Fig.12 This is an example of a schematic cross-sectional view of a substrate in each step.

[0024] Fig.13 This is an example of a schematic cross-sectional view of a substrate in each step.

[0025] Fig.14 This is an example of a schematic cross-sectional view of a substrate in each step.

[0026] Fig.15 This is an example of a schematic cross-sectional view of a substrate in each step.

[0027] Fig.16 This is an example of a schematic cross-sectional view of a substrate in each step.

[0028] Fig.17 This is an example of a schematic cross-sectional view of a substrate in each step.

[0029] Fig.18 This is an example of a schematic cross-sectional view of a substrate in each step.

[0030] Fig.19This is an example of a schematic cross-sectional view of a substrate in each step.

[0031] Fig. 20 An example of a schematic cross-sectional view of a substrate in each process

[0032] Fig.21 This is an example of the change in the sealing film etching rate with respect to the bias input power.

[0033] Fig. 22 This is an example of a plan view showing the structure of the first substrate processing system.

[0034] Fig.23 FIG. 1 is an example of a plan view showing the structure of the second substrate processing system. DETAILED DESCRIPTION

[0035] In the technology of Patent Document 1, the number of steps may increase due to the increase in the number of photolithography processes during the formation of the overhang structure, and the anode electrode may deteriorate due to the influence of moisture and oxygen in the atmosphere during the wet etching process. In addition, it is difficult to seal the side of the organic EL layer and the cathode electrode blocked by the overhang structure.

[0036] Hereinafter, various exemplary embodiments will be described in detail with reference to the accompanying drawings. In addition, in each of the drawings, the same or corresponding parts are denoted by the same reference numerals.

[0037] <Substrate processing method>

[0038] use Figures 1 to 20 An example of a substrate processing method for forming a plurality of types of organic EL elements on a substrate will be described. Figure 1 This is a flowchart showing an example of a substrate processing method according to the present embodiment. Figures 2 to 20 This is an example of a schematic cross-sectional view of a substrate in each step.

[0039] Here, a substrate processing method for forming three types of organic EL elements on a substrate is described as an example. Specifically, an organic EL element emitting red light (R), an organic EL element emitting green light (G), and an organic EL element emitting blue light (B) are formed on a substrate as an example. In addition, an organic EL element is composed of an anode electrode, a light-emitting layer, and a cathode electrode stacked together.

[0040] Furthermore, the types of organic EL elements formed on the substrate are not limited to three types, and may be one type or two or more types.

[0041] In step S101 , a substrate is prepared.

[0042] Figure 2This is an example of a cross-sectional schematic diagram of the substrate prepared in step S101. The substrate has a substrate 300 and an electrode array 310. The substrate 300 is composed of, for example, a glass plate. In addition, the substrate 300 is not limited thereto, and may also be a ceramic plate, a plastic plate, a metal plate, a silicon plate, etc., and there is no limitation on the material. In addition, the substrate 300 may also be composed of a material having insulating properties. In addition, the substrate 300 may also be composed of a material having light transmittance. In addition, the shape of the substrate (substrate 300) may be rectangular, circular, etc., and there is no limitation on the shape.

[0043] The electrode array 310 has a plurality of anode electrodes 311, 312, 313. Here, the electrode array 310 includes a first anode electrode 311, a second anode electrode 312, and a third anode electrode 313. The plurality of anode electrodes 311, 312, 313 are made of, for example, indium tin oxide (ITO). In addition, the plurality of anode electrodes 311, 312, 313 are not limited thereto, and a layer made of silver or aluminum may be added between the substrate 300 and the anode electrodes 311, 312, 313 as a base. In addition, the plurality of anode electrodes 311, 312, 313 may also be made of a conductive material. In addition, the plurality of anode electrodes 311, 312, 313 may also be made of a light-transmitting material. In addition, the plurality of anode electrodes 311, 312, 313 are arranged at different positions on the surface of the substrate (substrate 300).

[0044] In addition, although the description is given assuming that a substrate having the electrode array 310 is prepared in step S101, the present invention is not limited thereto. Step S101 may include a step of forming the electrode array 310 on the substrate (base material 300).

[0045] In step S102, a first light-emitting layer 321 is formed on the substrate. Here, a continuous film of the first light-emitting layer 321 is formed in a manner covering the entire electrode array 310. In addition, the first light-emitting layer 321 includes an organic EL, which is a light-emitting layer (organic EL layer) that emits light of a specific color (for example, red (R)) by applying a voltage between electrodes (a first anode electrode 311, a first cathode electrode 331 described later). In addition, the formation process of the first light-emitting layer 321 is performed, for example, by vacuum evaporation or the like.

[0046] In step S103, a first cathode electrode 331 is formed on the substrate. Here, a continuous film of the first cathode electrode 331 is formed on the first light-emitting layer 321. The first cathode electrode 331 is composed of, for example, ITO, IZO, etc., and a layer composed of MgAg can be added between the first light-emitting layer 321 and the first cathode electrode 331 as a substrate. In addition, in the case of a cavity structure, MgAg can also be used as a cathode electrode material. In addition, the formation process of the first cathode electrode 331 is performed by any film forming process such as vacuum evaporation, PVD (Physical Vapor Deposition) film forming, CVD (Chemical Vapor Deposition) film forming, ALD (Atomic Layer Deposition) film forming, or a combination thereof.

[0047] In step S104, a first sealing layer 341 is formed on the substrate. Here, a continuous film of the first sealing layer 341 is formed on the first cathode electrode 331. The first sealing layer 341 includes a first inorganic insulating film. The first inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), and aluminum oxide (AlO), or a combination thereof. In addition, the formation process of the first sealing layer 341 is performed, for example, by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, or a combination thereof. In addition, the formation process of the first light emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 is performed in a vacuum atmosphere.

[0048] Figure 3 1 is an example of a schematic cross-sectional view of a substrate after the process of step S104. A first light-emitting layer 321 is formed on the electrode array 310 (first anode electrode 311, second anode electrode 312, third anode electrode 313). In addition, a first cathode electrode 331 is formed on the first light-emitting layer 321. In addition, a first sealing layer 341 is formed on the first cathode electrode 331.

[0049] Furthermore, the plurality of anode electrodes 311, 312, 313, the first light emitting layer 321, and the first cathode electrode 331 are sealed by the first sealing layer 341. Thus, the plurality of anode electrodes 311, 312, 313, the first light emitting layer 321, and the first cathode electrode 331 are prevented from contacting oxygen, moisture, and the like when the substrate is exposed to the atmosphere.

[0050] In step S105, a first mask 351 is formed on the substrate. Here, the first mask 351 is formed on the substrate by photolithography. The photolithography includes a resist forming process, an exposure process, and a development process. In the resist forming process, a photoresist is formed on the substrate. In the exposure process, the substrate on which the photoresist is formed is irradiated with light such as ultraviolet (UV: Ultraviolet) and deep ultraviolet (DUV: Deep Ultraviolet) through a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. In the development process, the first mask 351 is formed using the photoresist. In addition, in the case of a positive photoresist, the first mask 351 is formed by removing the photoresist of the exposed portion and leaving the photoresist of the unexposed portion. On the other hand, in the case of a negative photoresist, the first mask 351 is formed by removing the photoresist of the unexposed portion and leaving the photoresist of the exposed portion. In addition, the formation process of the first mask 351 is performed in an air atmosphere.

[0051] Figure 4 1 is an example of a schematic cross-sectional view of the substrate after the process of step S105 . The first mask 351 is selectively formed on the first anode electrode 311 . On the other hand, the first mask 351 is not formed on the second anode electrode 312 and the third anode electrode 313 .

[0052] In step S106, the substrate is subjected to etching. Here, the first sealing layer 341, the first cathode electrode 331, and the first light emitting layer 321 are etched through the first mask 351 by plasma etching. The etching is dry etching and is performed in a vacuum atmosphere.

[0053] Figure 5 (a) and Figure 5 (b) is an example of a schematic cross-sectional view of the substrate after the process of step S106. The first sealing layer 341, the first cathode electrode 331, and the first light-emitting layer 321 on the second anode electrode 312 and the third anode electrode 313 are removed. On the other hand, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 covered by the first mask 351 on the first anode electrode 311 are left. In this way, a first stacked body (organic EL element) having the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341 stacked thereon is formed on the substrate through the processing of steps S102 to S106. In addition, as Figure 5 As shown in (a), the first mask 351 may be left on the first stack. Figure 5As shown in (b), the first mask 351 on the first stack can be completely ashed and removed during the etching process.

[0054] In step S107, a second sealing layer 342 is formed on the substrate. Here, a continuous film of the second sealing layer 342 is formed in a manner covering the entire electrode array 310. The second sealing layer 342 includes a second inorganic insulating film. The second inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the second sealing layer 342 is performed, for example, by any film forming process such as vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the second sealing layer 342 is performed under a vacuum atmosphere.

[0055] Figure 6 (a) and Figure 6 (b) is an example of a schematic cross-sectional view of the substrate after the process of step S107.

[0056] In step S106, when the first mask 351 is left on the first stack (see Figure 5 (a)), such as Figure 6 As shown in (a), the second sealing layer 342 is formed in a manner covering the upper surface and side walls of the stacked structure of the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341) and the first mask 351. In addition, the second sealing layer 342 is formed in a manner covering the second anode electrode 312 and the third anode electrode 313. Here, the film thickness of the second sealing layer 342 formed on the side wall of the stacked structure of the first stack and the first mask 351 in the height direction is thicker than the film thickness of the second sealing layer 342 formed on the plane (the upper surface of the stacked structure of the first stack and the first mask 351, the upper surface of the second anode electrode 312, the upper surface of the third anode electrode 313, etc.).

[0057] When the first mask 351 is completely removed in step S106 (see Figure 5 (b)), such as Figure 6As shown in (b), the second sealing layer 342 is formed in a manner covering the upper surface and side wall of the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341). In addition, the second sealing layer 342 is formed in a manner covering the second anode electrode 312 and the third anode electrode 313. Here, the film thickness of the second sealing layer 342 formed on the side wall of the first stack in the height direction is thicker than the film thickness of the second sealing layer 342 formed on the plane (the upper surface of the first stack, the upper surface of the second anode electrode 312, the upper surface of the third anode electrode 313, etc.).

[0058] In step S108, the substrate is subjected to etching. Here, the second sealing layer 342 is etched in a direction perpendicular to the substrate by plasma etching (anisotropic etching). The etching is dry etching and is performed in a vacuum atmosphere.

[0059] Figure 7 3 is an example of a schematic cross-sectional view of the substrate after the process of step S108. The second sealing layer 342 on the second anode electrode 312 and the third anode electrode 313 is removed. In addition, the second sealing layer 342 formed on the upper surface of the first stack is removed. In addition, in the case where the first mask 351 is stacked on the first stack (see Figure 6 In (a)), the first mask 351 is also removed together with the second sealing layer 342 formed on the upper surface of the first stacked body by etching.

[0060] On the other hand, Figure 6 (a) and Figure 6 As shown in (b), when viewed in a direction perpendicular to the substrate, the second sealing layer 342 formed on the side wall of the first stack becomes thicker. Therefore, by etching the second sealing layer 342 in a direction perpendicular to the substrate, as shown in FIG. Figure 7 As shown, the second sealing layer 342 formed on the side wall of the first stack is left. Therefore, the upper surface of the first stack is sealed by the first sealing layer 341, and the side wall of the first stack is sealed by the second sealing layer 342. Thus, the first anode electrode 311, the first light-emitting layer 321, and the first cathode electrode 331 are prevented from contacting with oxygen, moisture, etc. when the substrate is exposed to the atmosphere.

[0061] In addition, if Figure 6As shown in (a), the second sealing layer 342 is formed on the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341) with the first mask 351, thereby making it possible to increase the thickness of the second sealing layer 342 formed on the side wall of the first stack when viewed in a direction perpendicular to the substrate. As a result, in the etching process in step S108, the second sealing layer 342 can be appropriately left on the side wall of the first stack.

[0062] In step S109, the second light-emitting layer 322 is formed on the substrate. Here, a continuous film of the second light-emitting layer 322 is formed in a manner covering the entire electrode array 310. In addition, the second light-emitting layer 322 includes an organic EL, which is a light-emitting layer (organic EL layer) that emits light of a specific color (for example, green (G)) by applying a voltage between electrodes (the second anode electrode 312, the second cathode electrode 332 described later). In addition, the formation process of the second light-emitting layer 322 is performed, for example, by vacuum evaporation or the like.

[0063] In step S110, the second cathode electrode 332 is formed on the substrate. Here, a continuous film of the second cathode electrode 332 is formed on the second light-emitting layer 322. The second cathode electrode 332 is composed of, for example, ITO, IZO, etc., and a layer composed of MgAg may be added between the second light-emitting layer 322 and the second cathode electrode 332 as a substrate. In addition, in the case of having a cavity structure, MgAg may also be used as a cathode electrode material. In addition, the second cathode electrode 332 is formed by, for example, vacuum evaporation, PVD film formation, CVD film formation, ALD film formation, or any film formation process or a combination thereof.

[0064] In step S111, a third sealing layer 343 is formed on the substrate. Here, a continuous film of the third sealing layer 343 is formed on the second cathode electrode 332. The third sealing layer 343 includes a third inorganic insulating film. The third inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the third sealing layer 343 is performed, for example, by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 is performed in a vacuum atmosphere.

[0065] Figure 81 is an example of a schematic cross-sectional view of a substrate after the process of step S111. A second light-emitting layer 322 is formed on the electrode array 310 (first anode electrode 311, second anode electrode 312, third anode electrode 313). In addition, a second cathode electrode 332 is formed on the second light-emitting layer 322. In addition, a third sealing layer 343 is formed on the second cathode electrode 332. In addition, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 are also formed on the first stack (first anode electrode 311, first light-emitting layer 321, first cathode electrode 331, and first sealing layer 341).

[0066] Furthermore, the plurality of anode electrodes 311, 312, 313, the first light-emitting layer 321 to the second light-emitting layer 322, and the first cathode electrodes 331 to the second cathode electrodes 332 are sealed by the third sealing layer 343. Thus, when the substrate is exposed to the atmosphere, the plurality of anode electrodes 311, 312, 313, the first light-emitting layer 321 to the second light-emitting layer 322, and the first cathode electrodes 331 to the second cathode electrodes 332 are prevented from contacting with oxygen, moisture, and the like.

[0067] In step S112, a second mask 352 is formed on the substrate. Here, the second mask 352 is formed on the substrate by photolithography. The photolithography includes a resist forming process, an exposure process, and a development process. In the resist forming process, a photoresist is formed on the substrate. In the exposure process, light is irradiated to the substrate formed with the photoresist via a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. In the development process, the second mask 352 is formed using the photoresist. In addition, in the case of a positive photoresist, the second mask 352 is formed by removing the photoresist of the exposed portion and leaving the photoresist of the unexposed portion. On the other hand, in the case of a negative photoresist, the second mask 352 is formed by removing the photoresist of the unexposed portion and leaving the photoresist of the exposed portion. In addition, the formation process of the second mask 352 is performed under an atmospheric atmosphere.

[0068] Fig. 9 FIG. 3 is an example of a schematic cross-sectional view of the substrate after the process of step S112 . The second mask 352 is selectively formed on the second anode electrode 312 . On the other hand, the second mask 352 is not formed on the first anode electrode 311 and the third anode electrode 313 .

[0069] In step S113, the substrate is subjected to etching. Here, the third sealing layer 343, the second cathode electrode 332, and the second light emitting layer 322 are etched through the second mask 352 by plasma etching. The etching is dry etching and is performed in a vacuum atmosphere.

[0070] Fig.10 This is an example of a schematic cross-sectional view of the substrate after the process of step S113. The first stack (first anode electrode 311) and the third sealing layer 343, the second cathode electrode 332, and the second light-emitting layer 322 on the third anode electrode 313 are removed. On the other hand, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 on the second anode electrode 312 covered by the second mask 352 are left. In this way, by processing from step S109 to step S113, a second stack (organic EL element) stacked with the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343 is formed on the substrate. In addition, as Fig.10 As shown in FIG. 1 , the second mask 352 may be left on the second stack. Alternatively, the second mask 352 on the second stack may be completely ashed and removed during the etching process (see FIG. 1 ). Figure 5 (b)).

[0071] In step S114, a fourth sealing layer 344 is formed on the substrate. Here, a continuous film of the fourth sealing layer 344 is formed in a manner covering the entire electrode array 310. The fourth sealing layer 344 includes a fourth inorganic insulating film. The fourth inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the fourth sealing layer 344 is performed, for example, by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the fourth sealing layer 344 is performed under a vacuum atmosphere.

[0072] Fig.11 This is an example of a schematic cross-sectional view of the substrate after the process of step S114.

[0073] In step S113, when the second mask 352 is left on the second stack (see Fig.10 ),like Fig.11As shown in FIG. 1 , the fourth sealing layer 344 is formed so as to cover the upper surface and side wall of the stacked structure of the second stack (the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343) and the second mask 352. In addition, the fourth sealing layer 344 is formed so as to cover the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, the first sealing layer 341 to the second sealing layer 342) and the third anode electrode 313. Here, the film thickness of the fourth sealing layer 344 formed on the side wall of the stacked structure of the second stack and the second mask 352 in the height direction is thicker than the film thickness of the fourth sealing layer 344 formed on the plane (the upper surface of the stacked structure of the second stack and the second mask 352, the upper surface of the third anode electrode 313, etc.).

[0074] In step S115, the substrate is subjected to etching. Here, the fourth sealing layer 344 is etched in a direction perpendicular to the substrate by plasma etching (anisotropic etching). The etching is dry etching and is performed in a vacuum atmosphere.

[0075] Fig.12 3 is an example of a schematic cross-sectional view of the substrate after the process of step S115. The fourth sealing layer 344 on the first stack and the third anode electrode 313 is removed. In addition, the fourth sealing layer 344 formed on the upper surface of the second stack is removed. In addition, in the case where the second mask 352 is stacked on the second stack (see Fig.11 ), the second mask 352 is also removed together with the fourth sealing layer 344 formed on the upper surface of the second stack by etching.

[0076] On the other hand, Fig.11 As shown in FIG. 1 , when viewed in a direction perpendicular to the substrate, the fourth sealing layer 344 formed on the side wall of the second stack becomes thicker. Therefore, by etching the fourth sealing layer 344 in a direction perpendicular to the substrate, as shown in FIG. Fig.12 As shown in FIG. 1 , the fourth sealing layer 344 formed on the side wall of the second stack is left. Thus, the upper surface of the second stack is sealed by the third sealing layer 343, and the side wall of the second stack is sealed by the fourth sealing layer 344. Thus, the second anode electrode 312, the second light emitting layer 322, and the second cathode electrode 332 are prevented from contacting with oxygen, moisture, etc. when the substrate is exposed to the atmosphere.

[0077] In addition, the fourth sealing layer 344 formed on the side wall of the second sealing layer 342 covering the first stacked body is also left. Fig.12 In FIG. 1 , this is illustrated by making the side wall portion of the second sealing layer 342 thicker.

[0078] In step S116, the third light-emitting layer 323 is formed on the substrate. Here, a continuous film of the third light-emitting layer 323 is formed in a manner covering the entire electrode array 310. In addition, the third light-emitting layer 323 includes an organic EL, which is a light-emitting layer (organic EL layer) that emits light of a specific color (for example, blue (B)) by applying a voltage between electrodes (third anode electrode 313, third cathode electrode 333 described later). In addition, the formation process of the third light-emitting layer 323 is performed, for example, by vacuum evaporation or the like.

[0079] In step S117, a third cathode electrode 333 is formed on the substrate. Here, a continuous film of the third cathode electrode 333 is formed on the third light-emitting layer 323. The third cathode electrode 333 is composed of, for example, ITO, IZO, etc., and a layer composed of MgAg may be added between the third light-emitting layer 323 and the third cathode electrode 333 as a substrate. In addition, in the case of having a cavity structure, MgAg may also be used as a cathode electrode material. In addition, the formation process of the third cathode electrode 333 is performed by, for example, vacuum evaporation, PVD film formation, CVD film formation, ALD film formation, or any film formation process or a combination thereof.

[0080] In step S118, a fifth sealing layer 345 is formed on the substrate. Here, a continuous film of the fifth sealing layer 345 is formed on the third cathode electrode 333. The fifth sealing layer 345 includes a fifth inorganic insulating film. The fifth inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the fifth sealing layer 345 is performed by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 is performed in a vacuum atmosphere.

[0081] Fig.13 It is an example of a schematic cross-sectional view of the substrate after the process of step S118. The third light-emitting layer 323 is formed on the electrode array 310 (the first anode electrode 311, the second anode electrode 312, and the third anode electrode 313). In addition, the third cathode electrode 333 is formed on the third light-emitting layer 323. In addition, the fifth sealing layer 345 is formed on the third cathode electrode 333. In addition, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 are also formed on the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, and the first sealing layer 341) and the second stack (the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, and the third sealing layer 343).

[0082] Furthermore, the plurality of anode electrodes 311, 312, 313, the first to third light-emitting layers 321 to 323, and the first to third cathode electrodes 331 to 333 are sealed by a fifth sealing layer 345. Thus, when the substrate is exposed to an atmospheric atmosphere, the plurality of anode electrodes 311, 312, 313, the first to third light-emitting layers 321 to 323, and the first to third cathode electrodes 331 to 333 are prevented from coming into contact with oxygen, moisture, and the like.

[0083] In step S119, a third mask 353 is formed on the substrate. Here, the third mask 353 is formed on the substrate by photolithography. The photolithography includes a resist forming process, an exposure process, and a development process. In the resist forming process, a photoresist is formed on the substrate. In the exposure process, light is irradiated to the substrate formed with the photoresist via a photomask. As a result, an exposed portion irradiated with light and an unexposed portion not irradiated with light are formed in the photoresist. In the development process, the third mask 353 is formed using the photoresist. In addition, in the case of a positive photoresist, the third mask 353 is formed by removing the photoresist of the exposed portion and leaving the photoresist of the unexposed portion. On the other hand, in the case of a negative photoresist, the third mask 353 is formed by removing the photoresist of the unexposed portion and leaving the photoresist of the exposed portion. In addition, the formation process of the third mask 353 is performed under an atmospheric atmosphere.

[0084] Fig.14 1 is an example of a schematic cross-sectional view of the substrate after the process of step S119 . The third mask 353 is selectively formed on the third anode electrode 313 . On the other hand, the third mask 353 is not formed on the first anode electrode 311 and the second anode electrode 312 .

[0085] In step S120, the substrate is subjected to etching. Here, the fifth sealing layer 345, the third cathode electrode 333, and the third light emitting layer 323 are etched through the third mask 353 by plasma etching. The etching is dry etching and is performed in a vacuum atmosphere.

[0086] Fig.15This is an example of a schematic cross-sectional view of the substrate after the process of step S120. The fifth sealing layer 345, the third cathode electrode 333, and the third light-emitting layer 323 on the first stack (first anode electrode 311) and the second stack (second anode electrode 312) are removed. On the other hand, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 on the third anode electrode 313 covered by the third mask 353 are left. In this way, by processing from step S116 to step S120, a third stack (organic EL element) stacked with the third anode electrode 313, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345 is formed on the substrate. In addition, as Fig.15 As shown in FIG. 1 , the third mask 353 may be left on the third stack. In addition, the third mask 353 on the third stack may be completely ashed and removed during the etching process (see FIG. 1 ). Figure 5 (b)).

[0087] In step S121, a sixth sealing layer 346 is formed on the substrate. Here, a continuous film of the sixth sealing layer 346 is formed in a manner covering the entire electrode array 310. The sixth sealing layer 346 includes a sixth inorganic insulating film. The sixth inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the sixth sealing layer 346 is performed, for example, by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the sixth sealing layer 346 is performed in a vacuum atmosphere.

[0088] Fig.16 This is an example of a schematic cross-sectional view of the substrate after the process of step S121.

[0089] In the case where the third mask 353 is left on the third stack in step S120 (see Fig.15 ),like Fig.16As shown in FIG. 1 , the sixth sealing layer 346 is formed so as to cover the upper surface and sidewall of the stacked structure of the third stack (the third anode electrode 313, the third light-emitting layer 323, the third cathode electrode 333, and the fifth sealing layer 345) and the third mask 353. In addition, the sixth sealing layer 346 is formed so as to cover the first stack (the first anode electrode 311, the first light-emitting layer 321, the first cathode electrode 331, the first sealing layer 341 to the second sealing layer 342) and the second stack (the second anode electrode 312, the second light-emitting layer 322, the second cathode electrode 332, the third sealing layer 343 to the fourth sealing layer 344). Here, the film thickness of the sixth sealing layer 346 formed on the sidewall of the stacked structure of the third stack and the third mask 353 in the height direction is thicker than the film thickness of the sixth sealing layer 346 formed on the plane (the upper surface of the stacked structure of the third stack and the third mask 353, etc.).

[0090] In step S122, the substrate is subjected to etching. Here, the sixth sealing layer 346 is etched in a direction perpendicular to the substrate by plasma etching (anisotropic etching). The etching is dry etching and is performed in a vacuum atmosphere.

[0091] Fig.17 3 is an example of a schematic cross-sectional view of the substrate after the process of step S122. The sixth sealing layer 346 on the first stack and the second stack is removed. In addition, the sixth sealing layer 346 formed on the upper surface of the third stack is removed. In addition, in the case where the third mask 353 is stacked on the third stack (see Fig.16 ), the third mask 353 is also removed together with the sixth sealing layer 346 formed on the upper surface of the third stacked body by etching.

[0092] On the other hand, Fig.16 As shown in FIG. 1 , when viewed in a direction perpendicular to the substrate, the sixth sealing layer 346 formed on the side wall of the third stacked body becomes thicker. Therefore, by etching the sixth sealing layer 346 in a direction perpendicular to the substrate, as shown in FIG. Fig.17 As shown in FIG. 1 , the sixth sealing layer 346 formed on the side wall of the third stack is left. Thus, the upper surface of the third stack is sealed by the fifth sealing layer 345, and the side wall of the third stack is sealed by the sixth sealing layer 346. Thus, the third anode electrode 313, the third light emitting layer 323, and the third cathode electrode 333 are prevented from contacting with oxygen, moisture, etc. when the substrate is exposed to the atmosphere.

[0093] In addition, the sixth sealing layer 346 formed on the side wall of the second sealing layer 342 covering the first stacked body is also left. Fig.16In FIG. 1 , this is shown by making the side wall portion of the second sealing layer 342 thicker. In addition, the sixth sealing layer 346 formed on the side wall of the fourth sealing layer 344 covering the second stacked body is also left. Fig.16 In FIG. 1 , this is illustrated by making the side wall portion of the fourth sealing layer 344 thicker.

[0094] In step S123, the substrate is subjected to etching. Here, the first sealing layer 341 to the sixth sealing layer 346 are etched in a direction perpendicular to the substrate by plasma etching (anisotropic etching). The etching is dry etching and is performed in a vacuum atmosphere.

[0095] Fig.18 This is an example of a schematic cross-sectional view of a substrate after the process of step S123. Here, the first cathode electrode 331 to the third cathode electrode 333 are exposed by etching the first sealing layer 341 to the sixth sealing layer 346 in a direction perpendicular to the substrate. On the other hand, the second sealing layer 342, the fourth sealing layer 344, and the sixth sealing layer 346 provided on the side walls of the first stack to the third stack can be left. Thus, the first light-emitting layer 321 to the third light-emitting layer 323, the interface between the first anode electrode 311 to the third anode electrode 313 and the first light-emitting layer 321 to the third light-emitting layer 323, and the interface between the first cathode electrode 331 to the third cathode electrode 333 and the first light-emitting layer 321 to the third light-emitting layer 323 are prevented from being exposed to the etching plasma.

[0096] In step S124, a wiring layer 360 is formed on the substrate. Here, a continuous film of the wiring layer 360 is formed on the substrate. The wiring layer 360 is composed of, for example, ITO, IZO, etc. In addition, the formation process of the wiring layer 360 is performed by, for example, vacuum evaporation, PVD film formation, CVD film formation, ALD film formation, or any film formation process or a combination thereof.

[0097] Fig.19 This is an example of a schematic cross-sectional view of the substrate after the process of step S124 . The wiring layer 360 is electrically connected to the first cathode electrode 331 to the third cathode electrode 333 .

[0098] In step S125, the seventh sealing layer 347 is formed on the substrate. Here, a continuous film of the seventh sealing layer 347 is formed on the substrate on which the wiring layer 360 is formed. The seventh sealing layer 347 includes a seventh inorganic insulating film. The seventh inorganic insulating film is, for example, composed of any one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon oxynitride film (SiON), an aluminum oxide (AlO), etc., or a combination thereof. In addition, the formation process of the seventh sealing layer 347 is performed by any film forming process of vacuum evaporation, PVD film forming, CVD film forming, ALD film forming, etc., or a combination thereof. In addition, the formation process of the seventh sealing layer 347 is performed in a vacuum atmosphere.

[0099] Fig. 20 34 is an example of a schematic cross-sectional view of the substrate after the process of step S125. The seventh sealing layer 347 seals the first to third stacks and the wiring layer 360. Thus, the first anode electrodes 31 to the third anode electrodes 313, the first light-emitting layers 321 to the third light-emitting layers 323, the first cathode electrodes 331 to the third cathode electrodes 333, and the wiring layer 360 are prevented from contacting with oxygen, moisture, etc. when the substrate is exposed to the atmosphere.

[0100] As described above, according to the substrate processing method according to the present embodiment, three types of organic EL elements that respectively emit red (R), green (G), and blue (B) light can be formed on a substrate.

[0101] In addition, according to the substrate processing method of this embodiment, the electrodes (anode electrodes 311 to 313, cathode electrodes 331 to 333) and light-emitting layers 321 to 323 are prevented from being degraded by moisture, oxygen, etc. during the photolithography process, thereby suppressing the degradation of the organic EL element.

[0102] Here, the substrate processing method involved in the reference example is described. In the substrate processing method involved in the reference example, one type of organic EL element is formed on the substrate by performing the following steps on the substrate having the electrode array 310: a step of forming a light-emitting layer on the entire substrate: forming a cathode electrode on the entire substrate; forming a first sealing layer on the entire substrate; a step of forming a first mask on a selected type of anode electrode; etching the light-emitting layer, cathode electrode and first sealing layer on the anode electrode where the first mask is not formed; forming a second sealing layer on the entire substrate; forming a second mask on the selected type of anode electrode; and etching the second sealing layer on the anode electrode where the second mask is not formed. By repeating this process twice more, three types of organic EL elements are formed on the substrate.

[0103] The substrate processing method involved in the reference example also implements the following steps: forming a mask for forming a contact hole; forming a contact hole by etching; forming a wiring layer; forming a mask for etching the wiring layer; removing a portion of the wiring layer by etching; and forming a sealing layer.

[0104] Here, according to the substrate processing method involved in the reference example, the number of times of photolithography processing is eight times, the number of times of etching processing is eight times, and the number of times of forming the sealing layer is seven times. In addition, according to the substrate processing method involved in the reference example, the number of times the anode electrode is exposed to plasma is zero for the first type of anode electrode, two times for the second type of anode electrode, and four times for the third type of anode electrode.

[0105] In contrast, according to the substrate processing method involved in this embodiment, the number of times of photolithography processing is three times, the number of times of etching processing is seven times (six times when step S122 and step S123 are set as the same process), and the number of times of forming the sealing layer is seven times. As such, according to the substrate processing method involved in this embodiment, the number of photolithography processing and etching processing processes can be reduced compared to the substrate processing method involved in the reference example. As a result, the productivity of substrate processing for forming multiple types of organic EL elements is improved.

[0106] In addition, according to the substrate processing method involved in the present embodiment, the number of times the anode electrodes 311 to 313 are exposed to the plasma is zero for the first anode electrode 311, two for the second anode electrode 312, and four for the third anode electrode 313. In this way, according to the substrate processing method involved in the present embodiment, the number of times (in other words, plasma exposure time) of the anode electrodes 311 to 313 can be set to the same level as that of the substrate processing method involved in the reference example. Thus, by suppressing the degradation of the anode electrodes 311 to 313, the degradation of the organic EL element can be suppressed.

[0107] In addition, in this embodiment, the cathode electrode material and the anode electrode material of the top emission type are described, but it is not limited thereto, and the bottom emission type may also be used. As the cathode electrode material of the bottom emission type, aluminum or the like is preferred, and as the anode electrode material, ITO, IZO or the like is preferred. In the case of a cavity structure, a layer formed of silver or the like may also be sandwiched in the ITO film of the cathode electrode material.

[0108] In addition, in this embodiment, the inventors of the present invention have confirmed the dependence of the anisotropic etching process in steps S108, S115, and S122 on the high-frequency power for biasing. Here, a G4.5 size (730mm×920mm) substrate is used, and a silicon nitride film (SiN) is used as a sealing layer (second sealing layer 342, fourth sealing layer 344, sixth sealing layer 346) for sealing the stack (first stack, second stack, third stack). In addition, tetrafluoromethane (CF4) and oxygen (O2) as process gases are supplied to the processing module 40a described later at a flow ratio of one to one, respectively, and adjusted at a processing pressure of 10mT (1.33Pa), and the high-frequency power for biasing is set to multiple conditions to evaluate the upper surface etching rate average (V: Vertical) [ / min] and the average sidewall etch rate (H: Horizontal) [ / minute].

[0109] Fig.21 This is an example of the change in the sealing film etching rate relative to the bias input power. Fig.21 In the graph shown, the horizontal axis represents the high frequency power for biasing per unit area of ​​the substrate to be anisotropically etched [W / m 2 ], the vertical axis is a scatter diagram of the V / H ratio, and a straight line represents the average V / H ratio of each high-frequency power value used for bias.

[0110] like Fig.21 As shown in the graph, it can be confirmed that the high frequency power used for biasing the anisotropic etching process is 1750 [W / m 2 ], the V / H ratio is 1, which means isotropic etching. In addition, it can be confirmed that by setting the high-frequency power used for bias to more than 1750 [W / m 2 ], which is the preferred anisotropic etching with V / H greater than 1. In addition, in the case of a G8 size (2160mm×2460mm) substrate, a high-frequency bias power of about 40 [kW] is used, which is about 7528 [W / m 2 ] of electricity.

[0111] <First Substrate Processing System>

[0112] Next, use Fig. 22 An example of a first substrate processing system 1 for implementing the substrate processing method according to the present embodiment will be described. Fig. 22 1 is an example of a plan view showing the structure of the first substrate processing system 1 .

[0113] The first substrate processing system 1 includes a first processing station (substrate processing apparatus) 11 , a load lock module 12 , a carrier station 14 , a second processing station 15 , and a control unit 20 .

[0114] The first processing station 11 has a vacuum transfer module 30 and a plurality of Fig. 22 In the example, there are three processing modules 40a, 40b respectively.

[0115] The vacuum transfer module 30 includes a vacuum transfer chamber 31 in which the interior is maintained in a reduced pressure state (vacuum state). A transfer mechanism 32 for transferring the substrate G is provided in the vacuum transfer chamber 31. The transfer mechanism 32 transfers the substrate G into and out of the processing modules 40a, 40b (specifically, the vacuum processing chambers 41a, 41b) and the load lock module 12 (specifically, the load lock chamber 13). The transfer mechanism 32 includes a transfer arm 32a for supporting the substrate G when transferring the substrate G.

[0116] The processing modules 40a and 40b have vacuum processing chambers 41a and 41b for performing a predetermined process on the substrate G under reduced pressure. In addition, the vacuum processing chambers 41a and 41b are connected to the vacuum transfer chamber 31 via the gate valve G1. The processing module 40a performs the processes of forming a sealing layer and etching. The processing module 40b performs the processes of forming a light-emitting layer, forming a cathode electrode, and forming a wiring layer. When the process is performed face-down, the processing module 40b may also include a flipping machine for flipping the substrate G.

[0117] The load lock module 12 connecting the first processing station 11 and the carrier station 14 has a load lock chamber 13 configured to be able to switch the interior of the chamber to an atmospheric pressure state or a vacuum state. The load lock chamber 13 is connected to the vacuum transfer chamber 31 via a gate valve G2. The load lock chamber 13 is connected to the atmospheric transfer chamber 51 via a gate valve G3.

[0118] The load lock module 12 connecting one vacuum transfer module 30 to another vacuum transfer module 30 has a load lock chamber 13 configured to switch the vacuum state in the chamber. The load lock chamber 13 is connected to the vacuum transfer chamber 31 of one vacuum transfer module 30 via a gate valve G2. The load lock chamber 13 is connected to the vacuum transfer chamber 31 of another vacuum transfer module 30 via another gate valve G2.

[0119] The carrier station 14 carries in and carries out a carrier C capable of accommodating a plurality of substrates G. In addition, the carrier station 14 includes an atmospheric transfer chamber 51 in which the interior is maintained at an atmospheric pressure state. A transfer mechanism 52 for transferring the substrate G is provided in the atmospheric transfer chamber 51. The transfer mechanism 52 carries in and carries out the substrate G between the carrier C mounted on the carrier mounting table 53 and the load lock module 12 (specifically, the load lock chamber 13). The transfer mechanism 52 includes a transfer arm 52a for supporting the substrate G when transferring the substrate G.

[0120] The second processing station 15 has an atmospheric transfer module 60 and a plurality of ( Fig. 22 In the example, there are three) processing modules 70.

[0121] The atmospheric transfer module 60 includes an atmospheric transfer chamber 61 in which the atmosphere is maintained. A transfer mechanism 62 for transferring the substrate G is provided in the atmospheric transfer chamber 61. The transfer mechanism 62 transfers the substrate G into and out of the processing module 70 (specifically, the atmospheric processing chamber 71). The transfer mechanism 62 includes a transfer arm 62a for supporting the substrate G when transferring the substrate G.

[0122] The processing module 70 includes an atmospheric processing chamber 71 for performing a predetermined process under atmospheric pressure on the substrate G. The atmospheric processing chamber 71 is connected to the atmospheric transfer chamber 61 via a gate valve G4. The processing module 70 performs each process of the photolithography process (resist formation process, exposure process, and development process).

[0123] In addition, the atmospheric transfer chamber 51 of the carrier station 14 and the atmospheric transfer chamber 61 of the second processing station 15 may be connected through a passage module (not shown) so that the substrate G can be transferred between the atmospheric transfer chamber 51 and the atmospheric transfer chamber 61. In addition, the atmospheric transfer chamber 61 of the second processing station 15 may be configured to have a carrier placement table (not shown) so that the substrate G can be transferred between the atmospheric transfer chamber 51 and the atmospheric transfer chamber 61 by transferring the carrier C containing the substrate G.

[0124] The control unit 20 includes a computer having a processor such as a CPU, a memory, etc., and has a storage unit (not shown) for storing various information. A program including instructions for a processing sequence to be executed by the first substrate processing system 1 is stored in the storage unit. In addition, the program may be recorded in a storage medium readable by a computer and installed in the control unit 20 from the storage medium. In addition, the storage medium may be temporary or non-temporary.

[0125] With such a structure, the substrate processing method according to the present embodiment (see Figure 1), in the processes of steps S102 to S104, steps S106 to S111, steps S113 to S118, and steps S120 to S125, the substrate G is transported via the vacuum transport chamber 31 and the load lock chamber 13 between the vacuum transport chambers 31. Thus, the substrate G can be processed without exposing the substrate G to the atmosphere.

[0126] That is, the first processing station 11 includes a vacuum processing chamber 41b for forming a light-emitting layer, a vacuum processing chamber 41b for forming a cathode electrode and a wiring layer, a vacuum processing chamber 41a for forming a sealing layer, a vacuum processing chamber 41a for etching, and a vacuum transfer chamber 31 connecting these vacuum processing chambers.

[0127] The substrate G has an electrode array 310 (first anode electrode 311 to third anode electrode 313), and is stacked with a first light-emitting layer 321, a first cathode electrode 331, and a first sealing layer 341. In addition, a first mask 351 is formed on the first sealing layer 341 corresponding to the first anode electrode 311. The substrate G formed with the mask is transported from the load lock vacuum chamber 13 to the first processing station 11. First, the substrate G is transported to the vacuum processing chamber 41a for etching to perform etching (for example, step S106). Then, the substrate G is transported to the vacuum processing chamber 41a for forming the sealing layer via the vacuum transfer chamber 31 to perform the forming process of the sealing layer (the second sealing layer 342) (for example, step S107). Then, the substrate G is transported to the vacuum processing chamber 41a (second etching processing module) for anisotropic etching via the vacuum transfer chamber 31 to perform anisotropic etching (for example, step S108). Next, the substrate G is transported to the vacuum processing chamber 41b (light-emitting layer forming processing module) for performing the formation process of the light-emitting layer (the second light-emitting layer 322) to perform the formation process of the light-emitting layer (for example, step S109). Next, the substrate G is transported to the vacuum processing chamber 41b (electrode layer forming processing module) for performing the formation process of the cathode electrode to perform the formation process of the cathode electrode (the second cathode electrode 332) (for example, step S110). Then, the substrate G is transported to the vacuum processing chamber 41a (sealing layer forming processing module) for performing the formation process of the sealing layer via the vacuum transport chamber 31 to perform the formation process of the sealing layer (the third sealing layer 343) (for example, step S111). In addition, the substrate G can be moved in and out relative to either of the two load interlock vacuum chambers 13 connected to the carrier station 14.

[0128] <Second Substrate Processing System>

[0129] Next, use Fig.23An example of the second substrate processing system 101 for implementing the substrate processing method according to the present embodiment will be described. Fig.23 1 is an example of a plan view showing the structure of the second substrate processing system 101 .

[0130] The second substrate processing system 101 includes first processing stations (substrate processing apparatuses) 111 a - 111 d , load lock modules 112 a - 112 e , carrier stations 114 a and 114 b , a second processing station 115 , and a control unit 120 .

[0131] The first processing station 111a has a vacuum transfer module 130a and a plurality of ( Fig.23 In the example, there are two) processing modules 140a.

[0132] The vacuum transfer module 130a includes a vacuum transfer chamber 131a in which the interior is maintained in a reduced pressure state (vacuum state). A transfer mechanism 132a for transferring the substrate G is provided in the vacuum transfer chamber 131a. The transfer mechanism 132a transfers the substrate G in and out of the processing module 140a (specifically, the vacuum processing chamber 141a) and the load lock vacuum modules 112a and 112b (specifically, the load lock vacuum chambers 113a and 113b). The transfer mechanism 132a includes a transfer arm 132a1 for supporting the substrate G when transferring the substrate G.

[0133] The processing module 140a includes a vacuum processing chamber 141a for performing a predetermined process under reduced pressure on the substrate G. The vacuum processing chamber 141a is connected to the vacuum transfer chamber 131a via a gate valve G101a. The processing modules 140a each perform an etching process.

[0134] The first processing station 111b has a vacuum transfer module 130b and a plurality of ( Fig.23 In the example, there are two) processing modules 140b.

[0135] The vacuum transfer module 130b has a vacuum transfer chamber 131b in which the interior is maintained in a reduced pressure state (vacuum state). A transfer mechanism 132b for transferring the substrate G is provided in the vacuum transfer chamber 131b. The transfer mechanism 132b transfers the substrate G into and out of the processing module 140b (specifically, the vacuum processing chamber 141b) and the load lock vacuum modules 112b and 112c (specifically, the load lock vacuum chambers 113b and 113c). The transfer mechanism 132b has a transfer arm 132b1 for supporting the substrate G when transferring the substrate G.

[0136] The processing module 140b has a vacuum processing chamber 141b for performing a predetermined process on the substrate G under reduced pressure. In addition, the vacuum processing chamber 141b is connected to the vacuum transfer chamber 131b via a gate valve G101b. The processing module 140b performs the formation process of the light-emitting layer. When the process is performed face-down, the processing module 140b may also include a flipping machine for flipping the substrate G.

[0137] The first processing station 111c has a vacuum transfer module 130c and a plurality of ( Fig.23 In the example, there are two) processing modules 140c.

[0138] The vacuum transfer module 130c includes a vacuum transfer chamber 131c in which the interior is maintained in a reduced pressure state (vacuum state). A transfer mechanism 132c for transferring the substrate G is provided in the vacuum transfer chamber 131c. The transfer mechanism 132c transfers the substrate G in and out of the processing module 140c (specifically, the vacuum processing chamber 141c) and the load lock vacuum modules 112c and 112d (specifically, the load lock vacuum chambers 113c and 113d). The transfer mechanism 132c includes a transfer arm 132c1 for supporting the substrate G when transferring the substrate G.

[0139] The processing module 140c has a vacuum processing chamber 141c for performing a predetermined process on the substrate G under reduced pressure. In addition, the vacuum processing chamber 141c is connected to the vacuum transfer chamber 131c via a gate valve G101c. The processing module 140c performs a cathode electrode formation process and a wiring layer formation process respectively. In the case of performing the process in a face-down manner, the processing module 140c may also include a flipping machine for flipping the substrate G.

[0140] The first processing station 111d has a vacuum transfer module 130d and a plurality of ( Fig.23 In the example, there are two) processing components 140d.

[0141] The vacuum transfer module 130d includes a vacuum transfer chamber 131d in which the interior is maintained in a reduced pressure state (vacuum state). A transfer mechanism 132d for transferring the substrate G is provided in the vacuum transfer chamber 131d. The transfer mechanism 132d transfers the substrate G in and out of the processing module 140d (specifically, the vacuum processing chamber 141d) and the load lock vacuum modules 112d and 112e (specifically, the load lock vacuum chambers 113d and 113e). The transfer mechanism 132d includes a transfer arm 132d1 for supporting the substrate G when transferring the substrate G.

[0142] The processing module 140d includes a vacuum processing chamber 141d for performing a predetermined process under reduced pressure on the substrate G. The vacuum processing chamber 141d is connected to the vacuum transfer chamber 131d via a gate valve G101d. The processing module 140d performs a sealing layer forming process.

[0143] The load lock module 112a has a load lock chamber 113a configured to switch the interior of the chamber to an atmospheric pressure state or a vacuum state. In addition, the load lock module 112a connects the first processing station 111a and the carrier station 114a. The load lock chamber 113a is connected to the vacuum transfer chamber 131a via a gate valve G102a. The load lock chamber 113a is connected to the atmospheric transfer chamber 151a via a gate valve G103a.

[0144] The load lock module 112b has a load lock chamber 113b configured to switch the vacuum state in the chamber. In addition, the load lock module 112b connects the first processing station 111a with the first processing station 111b. The load lock chamber 113b is connected to the vacuum transfer chamber 131b via a gate valve G102b. The load lock chamber 113b is connected to the vacuum transfer chamber 131a via a gate valve G103b.

[0145] The load lock module 112c has a load lock chamber 113c configured to switch the vacuum state in the chamber. In addition, the load lock module 112c connects the first processing station 111b with the first processing station 111c. The load lock chamber 113c is connected to the vacuum transfer chamber 131c via a gate valve G102c. The load lock chamber 113c is connected to the vacuum transfer chamber 131b via a gate valve G103c.

[0146] The load lock module 112d has a load lock chamber 113d configured to switch the vacuum state in the chamber. In addition, the load lock module 112d connects the first processing station 111c with the first processing station 111d. The load lock chamber 113d is connected to the vacuum transfer chamber 131d via a gate valve G102d. The load lock chamber 113d is connected to the vacuum transfer chamber 131c via a gate valve G103d.

[0147] The load lock module 112e has a load lock chamber 113e configured to switch between an atmospheric pressure state and a vacuum state. In addition, the load lock module 112e connects the first processing station 111d and the carrier station 114b. The load lock chamber 113e is connected to the atmospheric transfer chamber 151b via a gate valve G102e. The load lock chamber 113e is connected to the vacuum transfer chamber 131d via a gate valve G103e.

[0148] The carrier station 114a carries and carries out a carrier C capable of accommodating a plurality of substrates G. In addition, the carrier station 114a has an atmospheric transfer chamber 151a in which the interior is maintained at an atmospheric pressure state. A transfer mechanism 152a for transferring the substrate G is provided in the atmospheric transfer chamber 151a. The transfer mechanism 152a transfers and carries out the substrate G between the carrier C placed on the carrier mounting table (not shown) and the load lock vacuum module 112a (specifically, the load lock vacuum chamber 113a). The transfer mechanism 152a has a transfer arm 152a1 for supporting the substrate G when transferring the substrate G.

[0149] The carrier station 114b carries in and carries out a carrier C capable of accommodating a plurality of substrates G. In addition, the carrier station 114b has an atmospheric transfer chamber 151b in which the interior is maintained at an atmospheric pressure state. A transfer mechanism 152b for transferring the substrate G is provided in the atmospheric transfer chamber 151b. The transfer mechanism 152b carries in and carries out the substrate G between the carrier C placed on the carrier mounting table (not shown) and the load lock vacuum module 112e (specifically, the load lock vacuum chamber 113e). The transfer mechanism 152b has a transfer arm 152b1 for supporting the substrate G when transferring the substrate G.

[0150] The second processing station 115 has an atmospheric transport module 160 and a plurality of ( Fig.23 In the example, there are three) processing modules 170.

[0151] The atmospheric transfer module 160 includes an atmospheric transfer chamber 161 in which the atmosphere is maintained. A transfer mechanism 162 for transferring the substrate G is provided in the atmospheric transfer chamber 161. The transfer mechanism 162 transfers the substrate G into and out of the processing module 170 (specifically, the atmospheric processing chamber 171). The transfer mechanism 162 includes a transfer arm 162a for supporting the substrate G when transferring the substrate G.

[0152] The processing module 170 includes an atmospheric processing chamber 171 for performing a predetermined process under atmospheric pressure on the substrate G. The atmospheric processing chamber 171 is connected to the atmospheric transfer chamber 161 via a gate valve G104. The processing module 170 performs each process of the photolithography process (resist formation process, exposure process, and development process).

[0153] Furthermore, the atmospheric transfer chambers 151a and 151b of the carrier stations 114a and 114b and the atmospheric transfer chamber 161 of the second processing station 115 may also be configured to be connected via a passage module (not shown) so that the substrate G can be transferred between the atmospheric transfer chambers 151a and 151b and the atmospheric transfer chamber 161. Furthermore, the atmospheric transfer chamber 161 of the second processing station 115 may also be configured to have a carrier placement table (not shown) so that the substrate G can be transferred between the atmospheric transfer chambers 151a and 151b and the atmospheric transfer chamber 161 by transferring the carrier C containing the substrate G.

[0154] The control unit 120 includes a computer having a processor such as a CPU, a memory, etc., and has a storage unit (not shown) for storing various information. A program including instructions for a processing sequence to be executed by the second substrate processing system 101 is stored in the storage unit. In addition, the program may be recorded in a storage medium readable by a computer and installed in the control unit 120 from the storage medium. In addition, the storage medium may be temporary or non-temporary.

[0155] That is, the first processing stations 111a~111d include a vacuum processing chamber 141b for forming a light-emitting layer, a vacuum processing chamber 141c for forming a cathode electrode and a wiring layer, a vacuum processing chamber 141d for forming a sealing layer, a vacuum processing chamber 141a for etching, and vacuum transfer chambers 131a~131d connecting these vacuum processing chambers.

[0156] The substrate G has an electrode array 310 (first anode electrode 311 to third anode electrode 313), and is stacked with a first light-emitting layer 321, a first cathode electrode 331, and a first sealing layer 341. In addition, a first mask 351 is formed on the first sealing layer 341 corresponding to the first anode electrode 311. The substrate G formed with the mask is transported from the load lock vacuum chamber 113a to the first processing station 111a. First, the substrate G is transported to the vacuum processing chamber 141a for etching to perform etching (for example, step S106). Then, the substrate G is transported to the vacuum processing chamber 141d for forming the sealing layer via the vacuum transfer chamber 131d to perform the forming process of the sealing layer (the second sealing layer 342) (for example, step S107). Then, the substrate G is transported to the vacuum processing chamber 141a (second etching processing module) for anisotropic etching via the vacuum transfer chamber 131a to perform anisotropic etching (for example, step S108). Next, the substrate G is transported to the vacuum processing chamber 141b (light-emitting layer forming processing module) for performing the formation process of the light-emitting layer (the second light-emitting layer 322) to perform the formation process of the light-emitting layer (for example, step S109). Next, the substrate G is transported to the vacuum processing chamber 141c (electrode layer forming processing module) for performing the formation process of the cathode electrode to perform the formation process of the cathode electrode (the second cathode electrode 332) (for example, step S110). Then, the substrate G is transported to the vacuum processing chamber 141d (sealing layer forming processing module) for performing the formation process of the sealing layer via the vacuum transport chamber 131d to perform the formation process of the sealing layer (the third sealing layer 343) (for example, step S111). In addition, in the present embodiment, the substrate G is transported in from the load interlock vacuum chamber 113a, but the substrate G may be transported in and out relative to either the load interlock vacuum chamber 113a or 113e.

[0157] Although the embodiments and the like of the plasma processing system have been described above, the present disclosure is not limited to the above embodiments and the like, and various modifications and improvements can be made within the scope of the gist of the present disclosure described in the claims.

[0158] Description of Reference Numerals

[0159] 1: first substrate processing system; 101: second substrate processing system; 11, 111a~111d: first processing station; 12, 112a~112e: load lock vacuum module; 13, 113a~113e: load lock vacuum chamber; 14, 114a~114b: carrier station; 15, 115: second processing station; 20, 120: control unit; 30, 130a~130d: vacuum transfer module; 31, 131a~131d: Vacuum transfer chamber; 32, 132a~132d: transfer mechanism; 32a, 132a1~132d1: transfer arm; 40a, 40b, 140a~140d: processing module; 41a, 41b, 141a~141d: vacuum processing chamber; 51, 151a~151b: atmospheric transfer chamber; 52, 152a~152b: transfer mechanism; 52a, 152a1~152b1: transfer arm; 53: carrier loading platform; 60, 160: atmospheric transfer module; 61, 161: atmospheric transfer chamber; 62, 162: transfer mechanism; 62a, 162a: transfer arm; 70, 170: processing module; 71, 171: atmospheric processing chamber; G1-G4, G101a-G104: gate valve; G: substrate; C: carrier; 300: substrate; 310: electrode array; 311: first anode electrode; 312: second anode electrode; 313: third anode electrode; 321: first emitter light layer; 322: second light-emitting layer; 323: third light-emitting layer; 331: first cathode electrode; 332: second cathode electrode; 333: third cathode electrode; 341: first sealing layer; 342: second sealing layer; 343: third sealing layer; 344: fourth sealing layer; 345: fifth sealing layer; 346: sixth sealing layer; 347: seventh sealing layer; 351: first mask; 352: second mask; 353: third mask; 360: wiring layer.

Claims

1. A substrate processing method, comprising the following steps: Step (A), preparing a substrate having an electrode array formed by configuring a plurality of electrodes on a surface of the substrate; Step (B), forming a light-emitting layer, an electrode layer and a first sealing layer on the entire electrode array; Step (C), forming a mask on one type of electrode among the plurality of electrodes and on the first sealing layer; Step (D), etching the substrate using the mask to form a stacked body including the one type of electrode, the light emitting layer, the electrode layer, and the first sealing layer; Step (E), forming a second sealing layer on the entire electrode array; as well as In step (F), the substrate is subjected to anisotropic etching to form the second sealing layer covering the side wall of the stacked body.

2. The substrate processing method according to claim 1, further comprising the following steps: Repeating the steps (B) to (F) for other types of electrodes among the plurality of electrodes; a step of removing the first sealing layer; and A step of forming a wiring layer for connecting the electrode layers.

3. The substrate processing method according to claim 1 or 2, wherein: The electrode array includes three kinds of electrodes.

4. The substrate processing method according to claim 3, wherein: The three kinds of electrodes include the electrode of the stacked body that emits red light, the electrode of the stacked body that emits blue light, and the electrode of the stacked body that emits green light.

5. The substrate processing method according to claim 1 or 2, wherein: The mask is a photoresist mask.

6. The substrate processing method according to claim 1 or 2, wherein: In the step (D), the mask is left on the first sealing layer. In the step (E), the second sealing layer is formed on the stacked structure of the stacked body and the first sealing layer.

7. The substrate processing method according to claim 1 or 2, wherein: In the step (D), the mask on the first sealing layer is removed. In the step (E), the second sealing layer is formed on the laminated body.

8. The substrate processing method according to claim 1 or 2, wherein: In the step (F), the high frequency power for biasing the anisotropic etching process is greater than 1750 W / m2 with respect to the area of ​​the anisotropic etching process surface of the substrate. 2 The value of .

9. A substrate processing device for processing a substrate, wherein the substrate has an electrode array formed by configuring a plurality of electrodes on a substrate surface, a first light-emitting layer, a first electrode layer, and a first sealing layer are stacked on the substrate surface, and a mask is provided on one type of electrode among the plurality of electrodes and on the first sealing layer, the substrate processing device comprising: a first etching processing module, which performs an etching process on the substrate using the mask to form a stacked body having the one type of electrode, the first light-emitting layer, the first electrode layer, and the first sealing layer stacked thereon; a first sealing layer forming processing module for performing a second sealing layer forming processing on the substrate on which the laminate is formed; a second etching processing module for performing an anisotropic etching process on the substrate on which the second sealing layer is formed, so as to form the second sealing layer covering the side wall of the stacked body; a light emitting layer forming processing module for performing a second light emitting layer forming processing on the substrate subjected to the anisotropic etching processing; an electrode layer forming processing module, which performs a second electrode layer forming process on the substrate on which the second light-emitting layer is formed; a second sealing layer forming processing module for performing a third sealing layer forming processing on the substrate on which the second electrode layer is formed; as well as A vacuum transport module connects the first etching processing module, the first sealing layer forming processing module, the second etching processing module, the light emitting layer forming processing module, the electrode layer forming processing module and the second sealing layer forming processing module.

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