Programmable memory device based on GeSe / 2DEG van der Waals heterogeneity

Abstract

The invention belongs to the technical field of memories, and provides a programmable memory device based on GeSe / 2DEG Van der Waals heterogeneity, which comprises a GeSe / 2DEG Van der Waals heterostructure, a GeSe / 2DEG Van der Waals heterostructure, a GeSe / 2DEG Van der Waals heterostructure, a GeSe / 2DEG Van der Waals heterostructure and a GeSe / 2DEG Van der Waals heterostructure, the at least one Au electrode is arranged on one side of the GeSe / 2DEG van der Waals heterostructure; the control unit is used for controlling the polarity, magnitude and duration of voltage applied to the Au electrode; wherein the data is written by adjusting the duration of the forward 7-volt bias voltage; according to the invention, the resistive memory effect of the GeSe / 2DEG van der Waals heterogeneous is utilized, so that the memory device with writable, readable and erasable functions is realized; by accurately controlling the voltage polarity and the duration time, accurate regulation and control on the resistance state of the memory unit can be realized, so that data storage and erasing operation can be efficiently carried out; compared with a traditional memory, the memory provided by the invention has obvious advantages in the aspects of storage density, writing / reading speed and energy consumption.

Description

Technical Field

[0001] The invention belongs to the technical field of memory, in particular to a programmable memory device based on GeSe / 2DEG van der Waals heterogeneity. Background Art

[0002] At present, existing memory technologies have limitations in storage density, write / read speed, and energy consumption, and cannot meet the growing needs of data storage and processing. At the same time, in artificial neural network models, simulating the synaptic function of biological neurons requires high-precision control and low-power implementation, and traditional technologies also have shortcomings in this regard. Therefore, the development of a new type of memory device that can efficiently perform data storage and erasure operations and simulate the synaptic function of biological neurons has important practical significance and application value. Summary of the invention

[0003] In order to solve the above technical problems, the present invention provides a programmable memory device based on GeSe / 2DEG van der Waals heterogeneity to solve the limitations of memory technology in the prior art in terms of storage density, write / read speed and energy consumption, and cannot meet the growing data storage and processing needs; at the same time, in the artificial neural network model, simulating the synaptic function of biological neurons requires high-precision control and low-power implementation methods, and traditional technologies also have deficiencies in this regard.

[0004] A programmable memory device based on GeSe / 2DEG van der Waals heterostructure, comprising:

[0005] A GeSe / 2DEG van der Waals heterostructure that exhibits a resistance memory effect when pre-polarized with a 7 volt forward bias.

[0006] at least one Au electrode disposed on one side of the GeSe / 2DEG van der Waals heterostructure for applying voltage and measuring the current-voltage (IV) characteristics, thereby indirectly measuring resistance;

[0007] A control unit, used to control the polarity, magnitude and duration of the voltage applied to the Au electrode to achieve data writing, reading and erasing operations;

[0008] Data is written by adjusting the duration of the forward 7 volt bias, the stored resistance state is read by measuring the IV characteristic, and data is erased by applying a reverse -10 volt bias.

[0009] Preferably, a temperature control module is also included to maintain the temperature stability of the GeSe / 2DEG van der Waals heterostructure during operation to ensure the consistency and reliability of the resistance memory effect.

[0010] An artificial synaptic device based on GeSe / 2DEG van der Waals heterostructure is used to simulate the synaptic function of biological neurons. The GeSe / 2DEG van der Waals heterostructure in the above-mentioned programmable memory device based on GeSe / 2DEG van der Waals heterostructure is used as the core sensing element. The voltage polarity and duration are controlled to simulate the synaptic weight adjustment process to achieve signal transmission and processing.

[0011] Compared with the prior art, the present invention has the following beneficial effects:

[0012] 1. The present invention utilizes the resistance memory effect of GeSe / 2DEG van der Waals heterostructures to realize a memory device with writable, readable and erasable functions; by precisely controlling the voltage polarity and duration, the resistance state of the memory cell can be precisely regulated, thereby efficiently performing data storage and erasing operations; compared with traditional memories, the present invention exhibits significant advantages in storage density, write / read speed and energy consumption.

[0013] 2. The present invention applies GeSe / 2DEG van der Waals heterostructures to artificial synaptic devices, which can simulate the synaptic weight adjustment process of biological neurons; through voltage regulation, precise control of synaptic transmission efficiency can be achieved, which is of great significance for building a more intelligent and flexible artificial neural network model; in addition, the artificial synaptic device also has the advantages of low power consumption, high stability and easy integration, providing strong support for the development of the field of artificial intelligence. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the overall structure of the GeSe / 2DEG van der Waals heterogeneous programmable memory device of the present invention;

[0015] Figure 2 A schematic diagram of the internal structure and characteristics of the GeSe / 2DEG van der Waals heterostructure of the present invention;

[0016] Figure 3 A schematic diagram of the layout and connection of the Au electrode on the GeSe / 2DEG van der Waals heterostructure of the present invention;

[0017] Figure 4 The figure is a schematic diagram showing the position and function of the temperature control module of the present invention in the memory device, and the connection relationship between the temperature control module, the GeSe / 2DEG van der Waals heterostructure and the control unit. DETAILED DESCRIPTION

[0018] The following embodiments of the present invention are described in further detail in conjunction with the accompanying drawings and examples. The following examples are used to illustrate the present invention, but are not intended to limit the scope of the present invention.

[0019] Embodiment: The present invention provides a programmable memory device based on GeSe / 2DEG van der Waals heterostructure, the core of which is a carefully designed GeSe / 2DEG van der Waals heterostructure, which can exhibit a unique resistance memory effect under specific operating conditions, i.e., when a forward bias of 7 volts is pre-applied for polarization; specifically, the resistance value of the structure changes according to the length of the polarization time, and this property provides a physical basis for data storage.

[0020] In order to achieve voltage application and resistance measurement of this heterostructure, at least one Au electrode is set in the device; this electrode is cleverly set on one side of the GeSe / 2DEG van der Waals heterostructure, which can not only be used to apply the required voltage, but also to indirectly obtain the resistance value by measuring the current-voltage (IV) characteristics, thereby realizing the reading of stored data.

[0021] In order to precisely control the data writing, reading and erasing operations, the device is also equipped with an advanced control unit, which is like an intelligent commander that can precisely regulate the voltage polarity, magnitude and duration applied to the Au electrode. When writing data, the control unit changes the resistance state of the GeSe / 2DEG van der Waals heterostructure by adjusting the duration of the forward 7 volt bias, thereby "writing" the data into the memory. When reading data, the control unit "reads" the stored resistance state by measuring the IV characteristics, thereby obtaining the stored data. When data needs to be erased, the control unit applies a reverse bias of -10 volts to restore the resistance state of the GeSe / 2DEG van der Waals heterostructure to its initial state, thereby erasing data.

[0022] In summary, the GeSe / 2DEG van der Waals heterogeneous programmable memory device achieves efficient and reliable storage and erasure operations of data through its unique structure and working principle. This technology is not only expected to break through the limitations of traditional memory technology, but also provides strong support for the development of cutting-edge fields such as artificial intelligence and neural networks.

[0023] Working principle: Based on the resistance memory effect of GeSe / 2DEG van der Waals heterogeneity, the control unit accurately regulates the voltage polarity, magnitude and duration applied to the Au electrode to achieve data writing, reading and erasing operations; when writing, the duration of the forward 7 volt bias is adjusted to change the resistance state; when reading, the IV characteristics are measured to obtain the stored resistance state; when erasing, a reverse bias of -10 volts is applied to restore the resistance state; at the same time, the temperature control module ensures temperature stability during operation to ensure high-performance operation of the memory device.

[0024] The embodiments of the present invention are described in further detail below in conjunction with the accompanying drawings.

[0025] like Figure 1 As shown, a schematic diagram of the overall structure of a programmable memory device based on GeSe / 2DEG van der Waals heterostructure is shown, including the layout and connection methods of key components such as GeSe / 2DEG van der Waals heterostructure, Au electrode, and control unit. Through intuitive graphical display, the basic structure and working principle of the memory device of the present invention can be clearly understood, providing guidance for subsequent embodiments and operations.

[0026] like Figure 2 As shown, the internal structure and characteristics of the GeSe / 2DEG van der Waals heterostructure are depicted in detail, including detailed information such as material distribution and lattice structure. This figure helps to deeply understand the resistive memory effect of GeSe / 2DEG van der Waals heterostructure and its application principle in memory devices, providing a theoretical basis for technical implementation and performance optimization.

[0027] like Figure 3 The figure shows the layout and connection method of the Au electrode on the GeSe / 2DEG van der Waals heterostructure, as well as the interface design between the electrode and the measuring equipment. Through this figure, we can understand the role and importance of the Au electrode in the memory device, as well as how to perform precise voltage application and current-voltage characteristic measurement to provide technical support for data writing, reading and erasing operations.

[0028] like Figure 4 As shown, the position and function of the temperature control module in the memory device, as well as the connection relationship between the temperature control module and the GeSe / 2DEG van der Waals heterostructure and the control unit are depicted. This figure shows how the temperature control module maintains the temperature stability of the GeSe / 2DEG van der Waals heterostructure during operation, ensures the consistency and reliability of the resistance memory effect, and provides guarantee for the high-performance operation of the memory device.

[0029] The embodiments of the present invention are provided for the purpose of illustration and description. Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present invention. Ordinary technicians in this field can change, modify, replace and modify the above embodiments within the scope of the present invention.

Claims

1. A programmable memory device based on GeSe / 2DEG van der Waals heterostructure, characterized in that: include: GeSe / 2DEG van der Waals heterostructure, which can show different resistance values ​​according to the length of polarization time under the pre-application of 7 volt forward bias polarization, showing resistance memory effect; at least one Au electrode disposed on one side of the GeSe / 2DEG van der Waals heterostructure for applying voltage and measuring the current-voltage (IV) characteristics, thereby indirectly measuring resistance; A control unit, used to control the polarity, magnitude and duration of the voltage applied to the Au electrode to achieve data writing, reading and erasing operations; Data is written by adjusting the duration of the forward 7 volt bias, the stored resistance state is read by measuring the IV characteristic, and data is erased by applying a reverse -10 volt bias.

2. A GeSe / 2DEG van der Waals heterogeneous programmable memory device as claimed in claim 1, characterized in that: It also includes a temperature control module for maintaining the temperature stability of the GeSe / 2DEG van der Waals heterostructure during operation, ensuring the consistency and reliability of the resistor memory effect.

3. An artificial synaptic device based on GeSe / 2DEG van der Waals heterostructure for simulating the synaptic function of biological neurons, characterized in that: The GeSe / 2DEG van der Waals heterostructure in the programmable memory device based on GeSe / 2DEG van der Waals heterostructure as claimed in claim 1 is used as the core sensing element, and the synaptic weight adjustment process is simulated by controlling the voltage polarity and duration to realize signal transmission and processing.

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