Selectively encoding or decoding pixels of image via run length encoding or decoding or gradient encoding or decoding

Abstract

One or more examples relate to selective row-based encoding of pixels of an image via run length encoding or gradient encoding. A method includes: for at least a portion of an image, determining a highest number of the number of pixels in a run length compressible via run length encoding and the number of pixels in a run length compressible via gradient encoding; and selectively encoding at least some of the pixels of the image via one of run length encoding or gradient encoding corresponding to the determined maximum number.

Description

[0001] Cross-references to related patent applications

[0002] This application claims the benefit of the priority date of U.S. Provisional Patent Application Serial No. 63 / 376,407, filed on September 20, 2022, entitled “LOSSLESS COMPRESSION ENCODING AND DECODING FOR IMAGES WITH RELATED APPARATUS AND METHODS,” under 35 U.S.C. §119(e), the contents and disclosure of which are incorporated herein by reference in their entirety. Technical Field

[0003] Examples relate to image encoding and decoding, and more particularly, to selectively encoding or decoding portions of an image via gradient encoding or decoding or run-length encoding or decoding. Background Art

[0004] Image encoding is the process of converting image data into a specific format or representation, usually for ease of storage, transmission, or compression, and usually for use in applications that make use of that specific format or representation. BRIEF DESCRIPTION OF THE DRAWINGS

[0005] Figure 1 is a flow chart depicting a process of encoding an image via run-length encoding or gradient encoding.

[0006] Figure 2 An example process for determining a highest number of a number of pixels in a run that is compressible via run-length encoding and a number of pixels in a run that is compressible via gradient encoding is illustrated according to one or more examples.

[0007] Figure 3 An example process for determining a number of pixels in a run that is compressible via run-length encoding is illustrated according to one or more examples.

[0008] Figure 4 An example process for determining a number of pixels in a run that is compressible via gradient encoding is illustrated according to one or more examples.

[0009] Figure 5 An example process for sending encoded lines of image data according to one or more examples is illustrated.

[0010] Figure 6 is a block diagram illustrating an example of a portion of a transmission including encoded image data according to one or more examples.

[0011] Figure 7An example process for decoding an image according to one or more examples is illustrated.

[0012] Figure 8 An example process for decoding encoded lines of image data according to one or more examples is illustrated.

[0013] Fig. 9 is a flow chart illustrating a process of compressing image data according to one or more examples.

[0014] Fig.10 is a flow chart depicting an example process of a subroutine for determining, for each pixel value in image data, a number of pixels in a run that are compressible via run-length encoding according to one or more examples.

[0015] Fig.11 is a flow chart depicting an example process of a subroutine for determining, for each difference value presented by image data, a number of pixels in a run that are compressible via gradient encoding according to one or more examples.

[0016] Fig.12 is a block diagram depicting a system according to one or more examples.

[0017] Fig.13 is a block diagram depicting an apparatus 1300 for encoding lines of image data via run-length encoding or gradient encoding according to one or more examples.

[0018] Fig.14 Non-limiting examples of specific implementations of the functional elements disclosed herein are illustrated. DETAILED DESCRIPTION

[0019] In the following detailed description, reference is made to the accompanying drawings which form a part of the present disclosure and in which are shown by way of example specific examples of embodiments in which the present disclosure may be implemented. These embodiments are described in sufficient detail to enable one of ordinary skill in the art to practice the present disclosure. However, other embodiments enabled herein may be utilized and structural, material and process changes may be made without departing from the scope of the present disclosure.

[0020] The illustrations presented herein are not intended to be actual views of any particular method, system, device, or structure, but are merely idealized representations for describing embodiments of the present disclosure. In some cases, similar structures or components in the various drawings may retain the same or similar numbering for the convenience of the reader; however, the similarity of numbering does not necessarily mean that the structures or components are identical in size, composition, configuration, or any other attribute.

[0021] The following description may include examples to help those skilled in the art practice the disclosed embodiments of the present invention. The use of the terms "exemplary", "by way of example" and "for example" means that the relevant description is illustrative, and although the scope of the present disclosure is intended to cover examples and legal equivalents, the use of such terms is not intended to limit the scope of the embodiments or the present disclosure to the specified components, steps, features or functions, etc.

[0022] It should be readily understood that the components of the embodiments as generally described herein and illustrated in the accompanying drawings may be arranged and designed in many different configurations. Therefore, the following description of various embodiments is not intended to limit the scope of the present disclosure, but is merely representative of various embodiments. Although various aspects of these embodiments may be presented in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise indicated.

[0023] In addition, the specific implementations shown and described are only examples and should not be understood as the only way to implement the present disclosure, unless otherwise specified herein. Elements, circuits, and functions can be shown in block diagram form so as not to obscure the present disclosure with unnecessary details. On the contrary, the specific implementations shown and described are only exemplary and should not be understood as the only way to implement the present disclosure, unless otherwise specified herein. Additionally, the partitioning of logic between block definitions and individual blocks is an example of a specific implementation. It will be apparent to those of ordinary skill in the art that the present disclosure can be practiced through many other partitioning solutions. In most cases, details about timing considerations, etc. have been omitted, where such details are not required to obtain a complete understanding of the present disclosure and are within the capabilities of those of ordinary skill in the relevant art.

[0024] Those of ordinary skill in the art will appreciate that information and signals may be represented using any of a variety of different technologies and techniques. For clarity of presentation and description, some of the figures may illustrate a signal as a single signal. Those of ordinary skill in the art will appreciate that a signal may represent a signal bus, where the bus may have a variety of bit widths, and that the present disclosure may be implemented on any number of data signals, including a single data signal.

[0025] The various exemplary logic blocks, modules, and circuits described in conjunction with the embodiments disclosed herein may be implemented or executed with a general purpose processor, a special purpose processor, a digital signal processor (DSP), an integrated circuit (IC), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic, a discrete hardware component, or any combination thereof, designed to perform the functions described herein. A general purpose processor (also referred to herein as a host processor or simply a host) may be a microprocessor, but in an alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration. When a general purpose computer is configured to execute computing instructions (e.g., software code) associated with the embodiments disclosed herein, a general purpose computer including a processor is considered a special purpose computer.

[0026] Embodiment can be described according to the process that is depicted as flow chart, flow diagram, structure diagram or block diagram.Although flow chart can describe operable action as continuous process, many of these actions can be performed in accordance with another sequence, in parallel or substantially simultaneously.In addition, the order of action can be rearranged.The process herein can correspond to method, thread, function, process, subroutine, subprogram, other structure or their combination.In addition, the method disclosed herein can be realized by hardware, software or both.If realized in software, function can be stored or sent to computer readable medium as one or more instructions or codes.Computer readable medium includes both computer storage medium and communication medium, and this communication medium includes any medium that is conducive to transferring computer program from one position to another position.

[0027] Any reference to elements herein using designations such as "first," "second," etc. does not limit the quantity or order of those elements unless such limitations are explicitly stated. Rather, these designations may be used herein as a convenient method of distinguishing between two or more elements or instances of an element. Thus, reference to a first element and a second element does not mean that only two elements can be employed there or that the first element must precede the second element in some manner. Additionally, a set of elements may include one or more elements unless otherwise specified.

[0028] As used herein, the term "substantially" in reference to a given parameter, attribute, or condition refers to and includes the degree to which a person of ordinary skill in the art would understand that the given parameter, attribute, or condition is satisfied with a small degree of variance, such as, for example, within acceptable manufacturing tolerances. By way of example, depending on the particular parameter, attribute, or condition that is substantially satisfied, the parameter, attribute, or condition may be satisfied by at least 90%, by at least 95%, or even by at least 99%.

[0029] For many applications, an image may be sent from a source (e.g., a camera, a storage device) to a sink (e.g., a display or an algorithm). For many applications, lossless transmission of data (image data or other data) is mandatory, such as, but not limited to, safety-related applications. Transmitting images pixel by pixel (e.g., transmitting image data pixel by pixel value, but not limited to) is typically bandwidth intensive. Lossless compression reduces bandwidth and substantially ensures that no image data is lost or altered in a manner that requires correction.

[0030] Typical algorithms for encoding or decoding image data are computationally intensive and power-hungry, and are not suitable for low-power devices (such as embedded microcontrollers). In order to reduce the computational workload and power consumption, some algorithms for embedded applications limit the highest compression ratio utilized by the algorithm. As non-limiting examples, limiting the highest possible compression ratio can: reduce processing time, reduce memory usage, reduce arithmetic complexity, or reduce the need for hardware accelerators, but are not limited to these. Algorithms that limit the highest compression ratio may not achieve a suitable compression rate.

[0031] In networking applications (such as Ethernet, but not limited thereto), some transmission protocols require that image data be sent line by line ("progressive" encoding is also called "scanline encoding"). However, some algorithms do not take into account line boundaries in images or image data.

[0032] Run-length encoding is the process of representing runs of data having the same value or value pattern using a value or value pattern and a count. In the context of encoding image data, run-length encoding is the process of representing runs of pixels having the same pixel value as a single data value and a count. Run-length encoding is particularly effective when portions of an image have uniform color. The inventors of the present disclosure recognize that RLE is also effective when portions of an image have uniform color, a repeating pattern, or both. In one or more examples, in the case of a value pattern or a repeating pattern, a symbol may be utilized to identify the pattern. The symbol may be identified in an index or dictionary that associates the symbol with the pattern. A decoder having an index or dictionary that associates the symbol with the pattern may decode the symbol.

[0033] Gradient encoding (sometimes called "difference encoding") is the process of representing pixels in an image by the difference between pixel values ​​of adjacent pixels (rather than absolute pixel values), thereby utilizing a reduced number of bits. Runs of pixels with the same pixel value difference can be represented as a pixel value and a count. Many natural images have smooth transitions (small incremental pixel-to-pixel values), and therefore encoding the differences between adjacent pixels can produce compressed data.

[0034] Run-length encoding and gradient encoding can be applied line by line ("line by line" encoding is also called "scan line encoding") or to the entire image.

[0035] A "run" is one or more sequential data elements from a set of data elements. The "run length" of a run is the number of data elements in the run. In one or more examples, the data elements of a run may or may not be consecutive in the set of data elements. In one or more examples, a data element may be a pixel value or a difference between two pixel values.

[0036] In general, gradient encoding is computationally more expensive than run-length encoding because gradient encoding involves subtraction for each pixel and storing the difference between the pixel and the next, while run-length encoding involves scanning the image pixel by pixel and counting repetitions. However, in images that exhibit long, smooth transitions, gradient encoding produces higher compression ratios than run-length encoding.

[0037] One or more examples generally relate to encoding image data in portions using run-length encoding or gradient encoding. For respective image data, a number of pixels in a run that is compressible via run-length encoding is determined, and a number of pixels in a run that is compressible via gradient encoding is determined. The higher of the determined number of pixels in a run that is compressible via run-length encoding and the determined number of pixels in a run that is compressible via gradient encoding is determined. The image data portion is encoded using an encoding scheme (run-length encoding or gradient encoding) corresponding to the higher of the determined number of pixels in the run. The number of pixels encoded in the image data portion may correspond to the determined number of pixels in the run that is compressible for the encoding scheme utilized. As a non-limiting example, the image data may be iteratively processed until a row of image data is encoded or an entire image of the image data is encoded.

[0038] In one or more examples, for a given row of image data, the number of pixels in the corresponding run compressible via run-length encoding is determined, and the highest number of pixels in a single run of the corresponding run compressible via run-length encoding is determined. For a given row of image data, the number of pixels in the corresponding run compressible via gradient encoding is determined, and the highest number of pixels in a single run of the corresponding run compressible via gradient encoding is determined. The row of image data is encoded using an encoding scheme corresponding to the higher of the highest number of pixels in a single run compressible via run-length encoding and the highest number of pixels in a single run compressible via gradient encoding. This process can be performed iteratively until all rows of image data are encoded.

[0039] In one or more examples, any suitable means for expressing the number of pixels may be utilized without exceeding the scope of the present disclosure. As non-limiting examples, the number of pixels may be expressed as: a value representing the amount of pixels, such as a count (e.g., 1, 2, 3, ... 10, ... 100 pixels, but not limited thereto), a quantity (e.g., a byte used to represent a pixel value, but not limited thereto); a value representing pixel density (e.g., pixels per inch, but not limited thereto); or a fraction of a total number (e.g., 1 / 100, 1 / 10, 1 / 4, or 1 / 2 pixels in a row of image data or a scene represented by an image, but not limited thereto).

[0040] In one or more examples, the number of pixels in a run that is compressible via run-length encoding or gradient encoding can be counted, measured, or calculated directly. In other examples, a proxy value for the number of pixels in a single run that is compressible via run-length encoding or gradient encoding can be utilized. As a non-limiting example, the number of runs per row for run-length encoding and gradient encoding can be determined, and an encoding scheme with the least number of runs can be selected. Using an encoding scheme that encodes rows with the least number of runs means that fewer runs are utilized to represent rows of image data, and therefore are more compact than alternative encoding schemes.

[0041] The examples discussed herein may be particularly suitable for grayscale image encoding. A grayscale image is an image in which the value of each pixel represents only the amount of light. Thus, the pixel value represents only the intensity. A grayscale image is different from a one-bit two-tone black and white image, which in the context of computer imaging is an image with only two colors (black and white). In a grayscale image, as a non-limiting example, for an 8-bit image, the corresponding pixel may have a value ranging from 0 (black) to 255 (white). The use of other pixel value ranges is within the scope of this disclosure. Intermediate values ​​represent varying shades of gray (i.e., the amount of light present).

[0042] Since the pixel values ​​in a grayscale image represent only the intensity (i.e., the amount of light), in the case of a natural image captured by a stationary or moving image capture device, portions of the image closer to the light source present more captured light than portions of the image farther from the light source. In images of natural scenes, some portions of the image farther from the light source may present uniform light intensity (uniform pixel values), and some portions of the image closer to the light source may present less uniform or varying light intensity (varying pixel values). As discussed above, run-length encoding may be particularly suitable for portions of an image that present uniform pixel values, and gradient encoding may be particularly suitable for portions of an image that present smoothly varying pixel values.

[0043] One or more examples relate to a scanline encoder that provides both run-length encoding and gradient encoding, and selectively applies the run-length encoding or the gradient encoding to lines of a grayscale image to provide improved compression.

[0044] Image processing applications such as for detecting moving objects or light patterns typically use grayscale images generated by a camera or calculated based on information captured or generated by a camera. For example, modern automotive headlights (i.e., the entire lighting assembly at the front of the vehicle, which may include one or more of the high beam, low beam, turn signal, and optionally other lights) include a camera. Headlight cameras typically have a high resolution (>16k pixels) and a refresh rate of at least 60 frames per second (fps). The headlight unit or partition controller sends an 8-bit grayscale image to the device controlling the headlight using a transmission protocol (e.g., RFC4175, but not limited thereto) over the Ethernet physical layer. The bandwidth for sending a 32,000 pixel, 8-bit / pixel image is 23,000 pixels * 8 bits / pixel * 60fps = 15.36Mbps. RFC4175 requires line-by-line transmission. Compression is helpful, but functional safety requires lossless data compression.

[0045] One or more examples are generally directed to an image capture system that includes a grayscale image capture device and a scan line encoder that selectively applies run length encoding or gradient encoding to a grayscale image generated by the image capture device to provide improved compression. In one or more examples, the image capture system may be included in a vehicle headlight.

[0046] Figure 1 is a flow chart depicting a process 100 of encoding an image via run-length encoding or gradient encoding.

[0047] Although the example process 100 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of the process 100. In other examples, different components of an example device or system implementing the process 100 may perform functions substantially simultaneously or in a particular order.

[0048] According to one or more examples, process 100 includes determining, for at least a portion of an image, at operation 102, a highest number of pixels in a run compressible via run-length encoding and a highest number of pixels in a run compressible via gradient encoding. In one or more examples, process 100 may include determining a number of pixels per run compressible via run-length encoding and a number of pixels per run compressible via gradient encoding. Process 100 may include determining a highest number of pixels in a run compressible via run-length encoding and a highest number of pixels in a run compressible via gradient encoding. Process 100 may include determining a highest number of pixels in a run compressible via run-length encoding and a highest number of pixels in a run compressible via gradient encoding.

[0049] According to one or more examples, process 100 includes selectively encoding at least some pixels of the image via one of run-length encoding or gradient encoding corresponding to the determined highest number of pixels in the compressible run at operation 104. In one or more examples, the number of pixels encoded at operation 104 corresponds to the total number of pixels in a row of the image. In one or more examples, the number of pixels encoded at operation 104 may correspond to a portion of the row. The portion of the row may include the number of pixels that is the highest number of pixels in the run determined in operation 102.

[0050] Process 100 may optionally include selectively encoding the remaining pixels of the image via one or more of run-length encoding or gradient encoding based at least in part on the respective determined highest number of pixels in a single run compressible via run-length encoding or gradient encoding. Process 100 may optionally include sending the image over a network, the image including a portion of the image data encoded via run-length encoding and a portion of the image data encoded via gradient encoding.

[0051] Figure 2 An example process 200 for determining a highest number of a number of pixels in a run compressible via run-length encoding and a number of pixels in a run compressible via gradient encoding is illustrated according to one or more examples.

[0052] Although example operation 200 depicts a particular order of operations, the order may be changed without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without substantially affecting the functionality of operation 200. In other examples, different components of an example device or system implementing operation 200 may perform functions substantially simultaneously or in a particular order.

[0053] According to one or more examples, process 200 includes determining the number of pixels in a run that are compressible via run-length encoding at operation 202. In one or more examples, the determination is made for a corresponding row of an image.

[0054] According to one or more examples, process 200 includes determining the number of pixels in a run that are compressible via gradient encoding at operation 204. In one or more examples, this determination is made for a corresponding row of the same image as operation 202.

[0055] According to one or more examples, process 200 includes determining a highest number of the number of pixels in the run compressible via run length encoding and the number of pixels in the run compressible via gradient encoding at operation 206. The highest number may be determined using any suitable technique. As non-limiting examples, the number of compressible pixels in the respective runs may be counted and compared; the amount of data compressed in the respective runs may be determined and compared, the number of respective runs compressible via run length and gradient encoding may be determined, and the encoding scheme corresponding to the least number of runs may be selected; and combinations and sub-combinations thereof.

[0056] Figure 3 An example process 300 for determining a number of pixels in a run that is compressible via run-length encoding is illustrated according to one or more examples.

[0057] Although the example process 300 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of the process 300. In other examples, different components of an example device or system implementing the process 300 may perform functions substantially simultaneously or in a particular order.

[0058] According to one or more examples, process 300 includes determining the number of pixels in a sequence of pixels having the same pixel value at operation 302. In one or more examples, process 300 can count the number of pixels in the sequence having the same corresponding pixel value. In the case where all of a row of image data is to be encoded using run-length encoding or gradient encoding, process 300 can determine the number of pixels in a corresponding sequence having the same corresponding pixel value for the row.

[0059] A corresponding sequence of pixels that can be compressed by one of the corresponding encoding algorithms is a “run,” and the number of pixels in a run is a “run length.” A corresponding row can exhibit multiple runs of pixel values, and process 300 can determine corresponding run lengths for multiple corresponding runs in a corresponding row.

[0060] According to one or more examples, process 300 includes determining a number of pixels in a run compressible via run length encoding based at least in part on the determined number of pixels in the sequence having the same pixel value at operation 304. In the event that all of a row of image data is to be encoded using run length encoding or gradient encoding and the corresponding row exhibits multiple runs, process 300 may select the longest run length (the run with the highest number of pixels) and use that number as the number of pixels in the run compressible via run length encoding.

[0061] Figure 4 An example process 400 for determining a number of pixels in a run that is compressible via gradient encoding is illustrated according to one or more examples.

[0062] Although the example process 400 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of the process 400. In other examples, different components of the example device or system implementing the process 400 may perform functions substantially simultaneously or in a particular order.

[0063] According to one or more examples, process 400 includes determining the number of pixels in a sequence where the difference between adjacent pixel values ​​in the sequence is the same at operation 402. In one or more examples, process 400 may include counting the number of consecutive pixels that exhibit the same difference between adjacent pixel values ​​for a corresponding row of an image (where the sequence is the pixels in the corresponding row). A corresponding set of such consecutive pixels exhibits a constant variation, and the number of consecutive pixels that exhibit the constant variation is the length of the run of the constant variation. The image data row may exhibit multiple runs of the constant variation, and thus process 400 may determine the corresponding lengths of multiple corresponding constant variations of the runs of the constant variation in the corresponding row.

[0064] According to one or more examples, process 400 optionally includes, in response to and indicating a determination that the difference between adjacent pixel values ​​exceeds a second predetermined threshold at operation 406, setting the determined number of pixels in which the difference between adjacent pixel values ​​is the same to zero or NULL. In one or more examples, the second predetermined threshold may represent a value that may be sent, for example, in a transmission (such as Figure 6In one or more examples, the upper limit may be determined by the number of bits available for representing the difference in pixel values. Figure 6 In the depicted non-limiting example, two 4-bit two's complement numbers are used for the difference of the pixel values ​​of the run encoded via gradient encoding. The two 4-bit numbers represent the difference from -8 to 7 or -7 to 8. If the difference between two adjacent pixels is greater than a second predetermined threshold, gradient encoding is not used, and the determined number of pixels in which the difference between adjacent pixel values ​​is the same is set to zero or NULL. As a non-limiting example, the second predetermined threshold can be selected based on specific operating conditions (such as the number of bits that can be used to represent the difference in pixel values ​​(using more or fewer bits to represent the difference is not beyond the scope of the present disclosure)) or a convention for representing quantities (e.g., two's complement, but not limited to this) (but not limited to this).

[0065] According to one or more examples, process 400 optionally includes, in response to and indicating a determination that the difference between adjacent pixel values ​​exceeds a second predetermined threshold at operation 406, setting the determined number of pixels in which the difference between adjacent pixel values ​​is the same to zero or NULL. In one or more examples, the second predetermined threshold may represent a value that may be sent, for example, in a transmission (such as Figure 6 In one or more examples, the upper limit may be determined by the number of bits available for representing the difference in pixel values. Figure 6 In the depicted example, two 4-bit two's complement numbers are used for the difference of the pixel values ​​of the run encoded via gradient encoding. Two 4-bit numbers can be used to represent the difference from -8 to 7 or -7 to 8. If the difference between two adjacent pixels is greater than a second predetermined threshold, gradient encoding is not used, and the determined number of pixels where the difference between adjacent pixel values ​​is the same is set to zero or NULL. As a non-limiting example, the second predetermined threshold can be selected based on a particular operating condition (such as the number of bits that can be used to represent the difference in pixel values) or a convention (but not limited to) for representing quantities (e.g., two's complement, but not limited to this).

[0066] According to one or more examples, process 400 includes determining a number of pixels in a run that are compressible via gradient coding based at least in part on the determined number of pixels where differences between adjacent pixel values ​​in the sequence are the same, at operation 408. In the event that corresponding rows of the image data exhibit multiple constant changes, process 400 may select a longest run length and use that number as the number of pixels in a run that are compressible via gradient coding.

[0067] Figure 5 An example process 500 for sending encoded lines of image data is illustrated according to one or more examples.

[0068] Although example process 500 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of process 500. In other examples, different components of an example device or system implementing process 500 may perform functions substantially simultaneously or in a particular order.

[0069] According to one or more examples, process 500 includes selectively encoding a portion of an image via run-length encoding or gradient encoding, according to which provides a determined highest number of pixels in a run that is compressible via run-length encoding or gradient encoding, at operation 502. In one or more examples, process 500 can encode a line of image data according to one or more of process 100, process 200, process 300, or process 400.

[0070] According to one or more examples, process 500 includes setting a value of an indicator bit including a transmission of an encoded portion of an image at operation 504, the value of the indicator bit indicating a coding scheme used to encode the encoded portion of the image. A first value that may be set at the indicator bit indicates gradient coding, and a second value that may be set at the indicator bit indicates run-length coding, the first value being different from the second value. In one or more examples, a first value of the indicator bit (e.g., '0' or '1') indicates gradient coding, and a second value of the indicator bit (e.g., the other of '0' or '1') indicates run-length coding. In one or more examples, bits of a real-time transport protocol (RTP) frame may be used as indicator bits. RTP typically involves transmitting rows of uncompressed image and video data, and therefore there may be unutilized bits due to the reduced size of the encoded image data rows.

[0071] According to one or more examples, process 500 includes transmitting a transmission over a network, the transmission including the encoded image data row and setting the indicator bit. In one or more examples, in addition to encoding / compressing the image data row according to operation 502, the transmission can have a format according to an RTP payload format for uncompressed video.

[0072] Figure 6 is a block diagram illustrating an example of a portion of a transmission 600 (also referred to herein as "transmission portion 600") for transmitting encoded image data according to one or more examples.

[0073] The transmission portion 600 includes fields for grayscale bytes 602, encoded data length 604, and gradient values ​​608. The field for encoded data length 604 includes bits for indicator bits 606. The field for gradient values ​​608 includes respective subfields for first component 610 and second component 612.

[0074] Gray byte 602 is the value of the byte in the corresponding row of image data. Encoded data length 604 is the length or number of pixels represented in the encoding. In the case of run-length encoding, the value of encoded data length 604 represents the length of the run for the value stored in gray byte 602. Indicator bit 606 indicates run-length encoding or gradient encoding. If indicator bit 606 indicates gradient encoding, gray byte 602 is the value of the initial byte of the image data row. The field for the first component 610 and the field for the second component 612 respectively store a signed 4-bit value (using two's complement notation) that together represents the difference between the gray values.

[0075] In one or more examples, the image data encoded according to one or more examples can be recovered by processing the encoded image data using a decoding algorithm corresponding to the encoding algorithm. Any suitable technique can be used to indicate (e.g., to a decoder, but not limited to) the encoding algorithm used to encode the corresponding line of the encoded image, i.e., run-length encoding or gradient encoding. It is noted that once the appropriate decoder has been identified, any scan line gradient decoder scan line run length decoder can be used.

[0076] Figure 7 An example process 700 for decoding an image is illustrated according to one or more examples.

[0077] Although the example process 700 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of the process 700. In other examples, different components of an example device or system implementing the process 700 may perform functions substantially simultaneously or in a particular order.

[0078] According to one or more examples, process 700 includes determining, at operation 702, an encoder scheme for encoding a portion of the encoded image data, at least in part in response to an indicator bit included with the encoded image data. In one or more examples, the value of the indicator bit is used to indicate run-length encoding or gradient encoding. A first value of the indicator bit indicates run-length encoding, and a second value of the indicator bit indicates gradient encoding. In one or more examples, the indicator bit may be associated with the portion of the encoded image data. As a non-limiting example, the indicator bit may be associated with the portion of the encoded image data based on a predetermined format of a packet or frame used to transmit the portion of the encoded image data. For example, the position of the indicator bit in a transmission is pre-associated with the position of the portion of the encoded image data included in the transmission. As a non-limiting example, indicator bit 606 is the first bit of a field of encoded data length 604 for transmission 600, and it is pre-associated with the first bit of a field of encoded data length 604 for transmission 600. Figure 6 The gradient value 608 field is associated with the gradient value 608 field.

[0079] According to one or more examples, process 700 includes, at operation 704, decoding the portion of the encoded image data using run length decoding in response to the indicator bits indicating that the portion of the encoded image data was encoded using run length encoding; or decoding the portion of the encoded image data using gradient decoding in response to the indicator bits indicating that the portion of the encoded image data was encoded using gradient encoding.

[0080] Figure 8 An example process 800 for decoding encoded lines of image data is illustrated according to one or more examples.

[0081] Although example process 800 depicts a particular order of operations, the order may be altered without departing from the scope of the present disclosure. For example, some of the depicted operations may be performed in parallel or in a different order without materially affecting the functionality of process 800. In other examples, different components of an example device or system implementing process 800 may perform functions substantially simultaneously or in a particular order.

[0082] According to one or more examples, process 800 includes obtaining (e.g., extracting via processing, but not limited to) a pixel value from a portion of the encoded image data at operation 802. In one or more examples, the pixel value can be obtained from a predetermined byte of the encoded image data (such as, but not limited to, an initial byte of the encoded image data).

[0083] According to one or more examples, process 800 includes obtaining (e.g., extracting via processing, but not limited to) an encoded data length value from the portion of the encoded image data at operation 804. In one or more examples, the encoded data length value may be obtained from one or more predetermined bytes of the encoded image data (such as, but not limited to, the next N bytes (where N is an integer greater than 1) consecutively after a predetermined byte including a pixel value).

[0084] According to one or more examples, process 800 includes obtaining an indicator value at operation 806, the indicator value indicating a coding scheme used to encode the portion of the encoded image data. Coding schemes that may be indicated by the indicator value include run-length encoding and gradient encoding. In one or more examples, the indicator value may be obtained from an indicator bit included with the portion of the encoded image data. In one or more examples, the indicator bit may be a bit of the portion of the encoded image data, or may be a bit of a transmission (e.g., one or more packets, but not limited thereto) that includes the portion of the encoded image data.

[0085] According to one or more examples, process 800 includes, at operation 808, decoding the portion of the encoded image data via the encoding scheme indicated by the indicator, and decoding any remaining portion of the encoded image data via one or more of run-length encoding or gradient encoding. In one or more examples, decoding the portion of the encoded image data includes decoding via gradient encoding or run-length encoding indicated by the indicator. Process 800 may be performed to decode the remaining portion of the image data, if any.

[0086] Fig. 9 is a flow chart illustrating a process 900 of encoding image data according to one or more examples.

[0087] At block 902, process 900 receives unencoded image data of length LEN_U (ie, already includes a number of pixels equal to LEN_U). In one or more examples, this is image data for a row of a grayscale image.

[0088] At block 1000, process 900 executes a subroutine ("subroutine 1000") "get same color count" (where the term "color" is understood to be a pixel value) that determines and returns, for each pixel value in the unencoded image data of length LEN_U, a value representing the number of pixels in a run that is compressible via run-length encoding. Fig.10 Subroutine 1000 is described. In one or more examples, some or all of the operations of subroutine 1000 may be performed by a run-length encoding circuit that also performs run-length encoding.

[0089] At block 1100, process 900 executes a subroutine ("subroutine 1100") "getcolorgradientamount", which is a subroutine that determines and returns the number of pixels in a run that is compressible via gradient encoding for each difference value presented by the unencoded image data of length LEN_U. Fig.11 Subroutine 1100 is described. Subroutine 1100 may be initialized and executed for a duration that partially or completely overlaps with a duration of execution of subroutine 1000, or for a duration that does not overlap with a duration of execution of subroutine 1000. In one or more examples, some or all of the operations of subroutine 1100 may be performed by a gradient encoding circuit that also performs gradient encoding.

[0090] Block 904 receives the output of subroutine 1000 and determines the number of pixels in a run that is compressible via run-length encoding, where the number of pixels in a run that is compressible via run-length encoding for unencoded image data is denoted as LEN_R. Block 906 receives the output of subroutine 1100 and determines the number of pixels in a run that is compressible via gradient encoding, where the number of pixels in a run that is compressible via gradient encoding for unencoded image data is denoted as LEN_G. Blocks 904 and 906 may be performed during respective durations that substantially overlap.

[0091] At block 908, the process 900 determines whether LEN_R is greater than or equal to LEN_G. If "yes", the process 900 proceeds to block 912, and if "no", the process 900 proceeds to block 910. In one example, when the number of pixels in a run that can be compressed via gradient encoding is equal to the number of pixels in a run that can be compressed via run-length encoding, run-length encoding is preferred because the payload and gradient values ​​do not need to be sent, thereby saving bandwidth.

[0092] At block 912, process 900 encodes a LEN_R amount of unencoded image data via run-length encoding. At block 914, process 900 subtracts the number of pixels LEN_R in the run that are compressible via run-length encoding from the number of pixels LEN_U in the unencoded image data, and the result is the remaining number of unencoded pixels in the image data.

[0093] At block 910, process 900 encodes a LEN_G amount of unencoded image data via gradient encoding. At block 916, the number of pixels LEN_G in the run that are compressible via gradient encoding is subtracted from the number of pixels LEN_U in the unencoded image data, and the result is the remaining number of unencoded pixels in the image data.

[0094] At block 918, the process 900 determines whether the number of pixels of remaining image data = 0 (i.e., whether the entire image has been encoded). If "no," the process 900 loops back to block 902. If "yes," the process 900 compresses any remaining unencoded pixels (such as, but not limited to, any single pixel where neither run-length encoding nor gradient encoding is applied) using RLE and ends.

[0095] Fig.10 is a flow chart depicting a subroutine 1000 for determining, for each pixel value in image data, a number of pixels in a run that are compressible via run-length encoding, according to one or more examples.

[0096] At block 1002, subroutine 1000 receives uncoded image data of length LEN_U. At block 1004, subroutine 1000 executes a function to obtain a first pixel value of the uncoded image data and sets a variable 'current value' equal to the output of the function. At block 1006, the function executed in block 1004 returns the pixel value stored in 'current value', which can be compared to the next pixel value (if any).

[0097] At box 1008, subroutine 1000 determines whether there is a next pixel value. If "no", subroutine 1000 ends. If "yes", at box 1010, subroutine 1000 executes a function to obtain the next pixel value of the uncoded image data. At box 1012, subroutine 1000 receives the output of the function and stores it in the variable "next value". At box 1014, subroutine 1000 determines whether the current value is equal to the next value. If "no", the subroutine ends. If "yes", at box 1016, subroutine 1000 executes a function "increment equal counter", which increments a variable "equal count" used as a counter for the run length. At box 1018, subroutine 1000 updates the value of the equal counter (increments it by 1). At block 1020 , the subroutine 1000 sets the current value equal to the next value, effectively making the next value the current value, and then loops back to block 1006 .

[0098] Fig.11 is a flow chart depicting a subroutine 1100 for determining, for each difference value present in image data, a number of pixels in a run that are compressible via gradient encoding, according to one or more examples.

[0099] At block 1102, subroutine 1100 receives uncoded image data of length LEN_U. At block 1104, subroutine 1100 executes a function to obtain a first pixel value of the uncoded image data and sets a variable 'current value' equal to the output of the function. At block 1106, the function executed in block 1104 returns the pixel value stored in 'current value', which can be compared to the next pixel value (if any).

[0100] At block 1108, the subroutine 1100 determines whether there is a next pixel value. If "no", the subroutine 1100 ends. If "yes", at block 1110, the subroutine 1100 executes a function to obtain the next pixel value of the unencoded image data. At block 1112, the subroutine 1100 receives the output of the function and stores it in the variable "next value".

[0101] At block 1114, the subroutine 1100 subtracts the current value from the next value and sets the variable "diff" equal to the result. At block 1116, the subroutine 1100 stores the output of the difference operation in block 1114 in the variable "diff".

[0102] At block 1118, the subroutine 1100 determines whether the value of the difference is within a predetermined bit limit. The bit limit is the amount of bits used to store or send the gradient. If the number of bits required to represent the value exceeds the number of bits available to store or send the gradient, then gradient encoding is not applicable in this case, and so if "no", the subroutine 1100 ends. If "yes", at block 1120, the subroutine 1100 executes the function "increment gradient counter", which increments the variable "gradient count" used as a counter of the gradient length. At block 1122, the subroutine 1100 updates the value of the gradient counter (increments it by 1). At block 1124, the subroutine 1100 sets the current value equal to the next value, effectively making the next value the current value, and then loops back to block 1106.

[0103] Fig.12 is a block diagram depicting a system 1200 according to one or more examples.

[0104] The system 1200 includes an encoding device 1202, a network 1234, and a decoding device 1204. The encoding device 1202 includes a frame buffer 1206, a line scanner 1208, a line compressor 1210, a serializer 1212, a network protocol 1214, a network stack 1216, and a network interface driver 1218. The decoding device 1204 includes a network interface driver 1220, a network stack 1222, a network protocol 1224, a deserializer 1226, a line decompressor 1228, a line renderer 1230, and a frame buffer 1232.

[0105] The encoding device 1202 is a device or system including an encoder as discussed herein, for example, a headlight unit or a zone controller of an automobile that includes an encoder and includes or is coupled (e.g., for electrical communication, but not limited to) to an imager (e.g., an image capture device including a camera and optionally including a sensor (e.g., infrared, sonar, lidar, but not limited to this). In one or more examples, the imager may include the encoder discussed herein. Using the example of a headlight, the brightness may be controlled via a pulse width modulation (PWM) signal generated at a controller (e.g., a headlight controller or an automobile controller including headlight control functionality, but not limited to this) at least in part in response to the imager, which captures and encodes an image of the resulting light, an image of light from one or more other light sources (e.g., from the headlights of another vehicle, but not limited to this), or both, but not limited to this. The discussion of headlights and automobiles is not intended to limit the scope of the present disclosure in any way, and other applications are within the scope of the present disclosure. To change the brightness, the duty cycle (relative time between on and off) is changed (eg, the duty cycle is decreased to increase brightness and increased to decrease brightness, or vice versa, but not limited thereto).

[0106] The decoding device 1204 is a device including a decoder as discussed herein, for example, the headlight controller described above. The encoding device 1202 and the decoding device 1204 communicate via a network 1234, which may be a car network as a non-limiting example. When the encoding device 1202 sends the encoded image data to the decoding device 1204 via the network 1234, the encoding device 1202 may also be referred to as a "transmitter 1202," and the decoding device may also be referred to as a receiver 1204.

[0107] The frame buffer 1206 is a temporary storage device that stores the current frame (image data) to be encoded.

[0108] The row scanner 1208 scans the image rows stored in the frame buffer 1206 row by row, for example, from top to bottom or from bottom to top. The row scanner 1208 reads the image data rows from the frame buffer 1206 and prepares the read image data rows for encoding.

[0109] Line compressor 1210 (which may also be referred to herein as "line encoder 1210") encodes scanned image data lines to reduce the amount of data. Line compressor 1210 may perform some or all of the operations of process 100, process 200, process 300, process 400, process 500, process 900, subroutine 1000, or subroutine 1100 discussed above.

[0110] Serializer 1212 converts the encoded image data lines into a serial format, ie, a sequence of bits that can be sent over a network.

[0111] The network protocol 1214 defines the rules for how data (here, encoded lines of image data) will be transmitted over the network 1234. The network protocol 1214 structures the serialized, encoded lines of image data into packets or frames and adds headers and trailers.

[0112] The network stack 1216 is a collection of software layers that prepares serialized, encoded lines of image data for transmission over the network 1234. Each layer has specific responsibilities, such as error checking or resolution.

[0113] The network interface driver 1218 is a software component that interfaces with physical network hardware (such as Ethernet or Wi-Fi, but not limited to this). The network interface driver 1218 takes packets from the network stack 1216 and transmits them out on the network 1234. The network protocol 1214, the network stack 1216, and the network interface driver 1218 perform the functions of a network device for transmitting and receiving data over a network (including but not limited to the network 1234).

[0114] The network interface driver 1220 is a software component that interfaces with the hardware of the network 1234 and receives incoming data packets including serialized, encoded lines of image data from the network 1234 .

[0115] The network stack 1222 handles incoming data packets, including serialized, encoded lines of image data, from the network 1234. The network stack 1222 extracts the data from the packets, checks for errors, and prepares it for further processing by upper layers.

[0116] The network protocol 1224 extracts the serialized data from the structured packets or frames. The network protocol 1224 understands the rules (header, trailer) set by the corresponding network protocol 1214 of the encoding device 1202.

[0117] The network interface driver 1220, the network stack 1222, and the network protocol 1224 perform the functions of a network device for transmitting and receiving data over a network (including but not limited to the network 1234).

[0118] Deserializer 1226 is the inverse of serializer 1212 and converts the serialized, encoded lines of image data back into a format suitable for decoding.

[0119] The row decompressor 1228 (which may also be referred to herein as "row decode 1228") decodes the image data row back to its original format, thereby reversing the work done by the row encoder in the encoding device. The row decompressor 1228 performs some of the overall operations of process 700, process 800, or 900.

[0120] The line renderer 1230 puts the lines of image data received via the network 1234 back together, recreating the image from the line data.

[0121] The frame buffer 1232 stores the decoded reconstructed frames (images). It can be likened to a canvas where image information is displayed after processing.

[0122] Fig.13 1 is a block diagram depicting an apparatus 1300 for encoding a line of image data via run-length encoding or gradient encoding according to one or more examples. In the encoding example, the apparatus 1300 is Fig.12 Non-limiting example of a row compressor 1210.

[0123] Apparatus 1300 includes a run-length encoding circuit 1302 , a gradient encoding logic circuit 1306 , and image data 1308 .

[0124] The run-length encoding circuit 1302 receives the image data portion 1308 and encodes a portion of the image data portion 1308 using gradient encoding and outputs the portion of the image data portion encoded via the gradient encoding. The gradient encoding circuit 1304 receives the image data portion 1308 and encodes a portion of the image data portion 1308 using run-length encoding and outputs the portion of the image data portion encoded via the run-length encoding. In one or more examples, the run-length encoding circuit 1302 determines and provides one or more values ​​representing the number of pixels per run that are compressible via the run-length encoding of the portion of the image data portion 1308, and the gradient encoding circuit 1304 determines and provides one or more values ​​representing the number of pixels per run that are compressible via the gradient encoding of the portion of the image data portion 1308. Logic circuit 1306 selects a highest number of the numbers of pixels in the run that are compressible via run-length encoding circuit 1302 and gradient encoding circuit 1304, and logic circuit 1306 instructs a respective one of run-length encoding circuit 1302 and gradient encoding circuit 1304 to encode a respective portion of image data portion 1308 according to the highest number of pixels in the run. Logic circuit 1306 iteratively determines the highest number of pixels in the run that are compressible by run-length encoding circuit 1302 and gradient encoding circuit 1304 until image data portion 1308 has been compressed by one or more of run-length encoding circuit 1302 and gradient encoding circuit 1304.

[0125] As described above, logic circuit 1306 receives respective values ​​representing the number of pixels in a run that are compressible from run-length encoding circuit 1302 and gradient encoding circuit 1304, determines a highest number of these numbers, and selectively encodes the portion of the row of image data 1308 using the corresponding one of run-length encoding circuit 1302 and gradient encoding circuit 1304 that corresponds to the highest number. In one or more examples, logic circuit 1306 may select the output of the one of run-length encoding circuit 1302 and gradient encoding circuit 1304 that corresponds to the highest number for use as the encoded portion that, in combination, forms the row of image data 1308. Thus, the number of pixels in a run is defined by the highest number of pixels that are compressible via one of run-length encoding circuit 1302 and gradient encoding circuit 1304.

[0126] In one or more examples, logic circuit 1306 can perform some or all of the operations of the processes discussed above, including but not limited to process 100, process 200, or process 900. In one or more examples, run-length encoding circuit 1302 can perform some or all of the operations of the processes discussed above, including but not limited to process 300 or subroutine 1000. In one or more examples, gradient encoding circuit 1304 can perform some or all of the operations of the processes discussed above, including but not limited to process 400 or system 1200.

[0127] Those of ordinary skill in the art will appreciate that the functional elements (eg, functions, operations, actions, processes and / or methods) of the embodiments disclosed herein may be implemented in any suitable hardware, software, firmware, or a combination thereof. Fig.14 Non-limiting examples of specific implementations of the functional elements disclosed herein are illustrated.In some embodiments, some or all of the functional elements disclosed herein may be performed by hardware specifically configured to perform these functional elements.

[0128] Fig.141400 is a block diagram of a circuit 1400 that can be used to implement various functions, operations, actions, processes and / or methods disclosed herein in some embodiments. The circuit 1400 includes one or more processors 1402 (sometimes referred to herein as "processor 1402") that are operably coupled to one or more data storage devices (sometimes referred to herein as "storage device 1404"). The storage device 1404 includes machine executable code 1406 stored thereon, and the processor 1402 includes logic circuit 1408. The machine executable code 1406 includes information describing functional elements that can be implemented by the logic circuit 1408 (e.g., executed by the logic circuit). The logic circuit 1408 is suitable for implementing (e.g., executing) the functional elements described by the machine executable code 1406. When the functional elements described by the machine executable code 1406 are executed, the circuit 1400 should be regarded as dedicated hardware configured to implement the functional elements disclosed herein. In some embodiments, processor 1402 may execute the functional elements described by machine executable code 1406 sequentially, concurrently (eg, on one or more different hardware platforms), or in one or more parallel process flows.

[0129] When implemented by logic circuitry 1408 of processor 1402, machine executable code 1406 adapts processor 1402 to perform operations of embodiments disclosed herein. For example, machine executable code 1406 may adapt processor 1402 to perform at least a portion or all of the operations of process 100, process 200, process 300, process 400, process 500, process 700, process 800, process 900, subroutine 1000, subroutine 1100, or system 1200. Machine executable code 1406 may adapt processor 1402 to include or perform at least a portion or all of the operations of system 1200, encoding device 1202, and decoding device 1204.

[0130] Processor 1402 may include a general-purpose processor, a special-purpose processor, a central processing unit (CPU), a microcontroller, a programmable logic controller (PLC), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic, a discrete hardware component, other programmable devices, or any combination thereof designed to perform the functions disclosed herein. A general-purpose computer including a processor is considered a special-purpose computer, and the general-purpose computer executes functional elements corresponding to the machine executable code 1406 (e.g., software code, firmware code, hardware description) associated with the embodiments of the present disclosure. It should be noted that a general-purpose processor (also referred to as a host processor or simply a host in this article) can be a microprocessor, but in an alternative, processor 1402 may include any conventional processor, controller, microcontroller, or state machine. Processor 1402 may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors combined with a DSP core, or any other such configuration.

[0131] In some embodiments, the storage device 1404 includes a volatile data storage device (e.g., a random access memory (RAM)), a non-volatile data storage device (e.g., a flash memory, a hard disk drive, a solid-state drive, an erasable programmable read-only memory (EPROM), etc.). In some embodiments, the processor 1402 and the storage device 1404 may be implemented as a single device (e.g., a semiconductor device product, a system on a chip (SOC), etc.). In some embodiments, the processor 1402 and the storage device 1404 may be implemented as separate devices.

[0132] In some embodiments, machine executable code 1406 may include computer readable instructions (e.g., software code, firmware code). By way of non-limiting example, the computer readable instructions may be stored by storage device 1404, directly accessed by processor 1402, and executed by processor 1402 using at least logic circuit 1408. Also by way of non-limiting example, the computer readable instructions may be stored on storage device 1404, transferred to a memory device (not shown) for execution, and executed by processor 1402 using at least logic circuit 1408. Thus, in some embodiments, logic circuit 1408 includes logic circuit 1408 that can be configured electrically.

[0133] In some embodiments, machine executable code 1406 may describe hardware (e.g., circuits) to be implemented in logic circuit 1408 to perform a functional element. The hardware may be described at any of a variety of abstraction levels from low-level transistor layout to a high-level description language. At a high level of abstraction, a hardware description language (HDL) may be used, such as an IEEE standard hardware description language (HDL). By way of non-limiting example, a VERILOG TM 、SYSTEMVERILOG TM or Very Large Scale Integration (VLSI) Hardware Description Language (VHDL TM ).

[0134] The HDL description may be converted into a description at any of a variety of other abstraction levels as desired. As a non-limiting example, the high-level description may be converted into a logic-level description such as a register transfer language (RTL), a gate-level (GL) description, a layout-level description, or a mask-level description. As a non-limiting example, the micro-operations to be performed by the hardware logic circuits (e.g., gates, flip-flops, registers, but not limited thereto) of the logic circuit 1408 may be described in RTL, then converted into a GL description by a synthesis tool, and the GL description may be converted into a layout-level description by a placement and routing tool, the layout-level description corresponding to the physical layout of an integrated circuit, a discrete gate or transistor logic element, a discrete hardware component, or a combination thereof of a programmable logic device. Therefore, in some embodiments, the machine executable code 1406 may include HDL, RTL, GL description, mask-level description, other hardware descriptions, or any combination thereof.

[0135] In embodiments where the machine executable code 1406 includes a hardware description (at any level of abstraction), a system (not shown, but including the storage device 1404) may be configured to implement the hardware description described by the machine executable code 1406. By way of non-limiting example, the processor 1402 may include a programmable logic device (e.g., an FPGA or a PLC), and the logic circuit 1408 may be electrically controlled to implement a circuit corresponding to the hardware description as the logic circuit 1408. Also by way of non-limiting example, the logic circuit 1408 may include hard-wired logic manufactured by a manufacturing system (not shown, but including the storage device 1404) according to the hardware description of the machine executable code 1406.

[0136] Regardless of whether the machine executable code 1406 includes computer readable instructions or a hardware description, the logic circuit 1408 is suitable for performing the functional elements described by the machine executable code 1406 when implementing the functional elements of the machine executable code 1406. It should be noted that although the hardware description may not directly describe the functional elements, the hardware description indirectly describes the functional elements that the hardware elements described by the hardware description are capable of performing.

[0137] As used in this disclosure, the term "module" or "component" may refer to a specific hardware implementation that is configured to perform the actions of a module or component and / or software object or software routine that may be stored on and / or executed by general-purpose hardware of a computing system (e.g., computer-readable media, processing devices, etc.). In some embodiments, the different components, modules, engines, and services described in this disclosure may be implemented as objects or processes (e.g., as separate threads) that execute on a computing system. Although some of the systems and methods described in this disclosure are generally described as being implemented in software (stored on and / or executed by general-purpose hardware), specific hardware implementations or combinations of software and specific hardware implementations are possible and contemplated.

[0138] As used in this disclosure, the term "combination" referring to a plurality of elements may include any combination of all elements or various subcombinations of certain elements. For example, the phrase "A, B, C, D, or a combination thereof" may refer to any one of A, B, C, or D; a combination of each of A, B, C, and D; and any subcombination of A, B, C, or D, such as A, B, and C; A, B, and D; A, C, and D; B, C, and D; A and B; A and C; A and D; B and C; B and D; or C and D.

[0139] The terms used in this disclosure, especially in the appended claims (e.g., the bodies of the appended claims) are generally intended to be “open” terms (e.g., the term “comprising” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “having at least,” the term “including” should be interpreted as “including but not limited to,” etc.).

[0140] Additionally, if a specific number of introduced claim expressions is intended, such intent will be expressly recited in the claim, and in the absence of such a recitation, no such intent is present. For example, as an aid to understanding, the following appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce claim expressions. However, the use of such phrases should not be construed to imply that a claim expression introduced by the indefinite article "a" or "an" will limit any particular claim containing such introduced claim expression to an embodiment containing only one such expression, even when the same claim includes the introductory phrases "one or more" or "at least one" and an indefinite article, such as "a" or "a kind" (e.g., "a" and / or "an" may be interpreted to mean "at least one" or "one or more"); the same is true when a claim expression is introduced using a definite article.

[0141] In addition, even if a specific number of an introduced claim recitation is explicitly recited, one skilled in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the unmodified recitation "two recitations" means at least two recitations, or two or more recitations, in the absence of other modifiers). Moreover, in those cases where a convention similar to "at least one of A, B, and C, etc." or "one or more of A, B, and C, etc." is used, such construction is generally intended to include only A, only B, only C, both A and B, both A and C, both B and C, or A, B, and C, etc.

[0142] In addition, any separate word or phrase presenting two or more alternative terms, whether in the specification, claims or drawings, should be understood to include the possibility of one of the terms, any one of the terms, or both of the terms. For example, the phrase "A or B" should be understood to include the possibility of "A" or "B" or "A and B".

[0143] Additional non-limiting examples include:

[0144] Embodiment 1: A method, comprising: for at least a portion of an image, determining the highest number of pixels in a run that can be compressed via run-length encoding and the highest number of pixels in a run that can be compressed via gradient encoding; and selectively encoding at least some pixels of the image via one of run-length encoding or gradient encoding corresponding to the determined highest number.

[0145] Embodiment 2: According to the method described in Embodiment 1, the method includes: selectively encoding the remaining pixels of the image via one or more of run-length coding or gradient coding based at least in part on the corresponding determined highest number of pixels in the run that can be compressed via run-length coding or gradient coding.

[0146] Embodiment 3: According to the method described in any one of Embodiments 1 and 2, the method comprises sending via a network, the sending comprising the encoded image and an indicator bit, the indicator bit indicating a coding scheme used to encode the encoded image, the coding scheme that can be indicated by the indicator bit comprising run-length coding and gradient coding.

[0147] Embodiment 4: A method according to any one of embodiments 1 to 3, wherein determining the highest number of the number of pixels in the run that can be compressed via run-length encoding and the number of pixels in the run that can be compressed via gradient encoding comprises: determining the number of pixels in the run that can be compressed via run-length encoding; determining the number of pixels in the run that can be compressed via gradient encoding; and determining the highest number of the number of pixels in the run that can be compressed via run-length encoding and the number of pixels in the run that can be compressed via gradient encoding.

[0148] Embodiment 5: A method according to any one of embodiments 1 to 4, wherein determining the number of pixels in the run that can be compressed via run-length encoding comprises: determining the number of pixels in a sequence having the same pixel value; and determining the number of pixels in the run that can be compressed via run-length encoding based at least in part on the determined number of pixels in the sequence having the same pixel value.

[0149] Embodiment 6: A method according to any one of embodiments 1 to 5, wherein determining the number of pixels in the run that can be compressed via gradient coding comprises: determining the number of pixels in a sequence in which the differences between adjacent pixel values ​​are the same; and determining the number of pixels in the run that can be compressed via gradient coding based at least in part on the determined number of pixels in the sequence in which the differences between adjacent pixel values ​​in the sequence are the same.

[0150] Embodiment 7: A method according to any one of embodiments 1 to 6, the method comprising: indicating that the determined number of pixels where the differences between adjacent pixel values ​​are the same is less than a first predetermined threshold.

[0151] Embodiment 8: According to the method described in any one of Embodiments 1 to 7, the method includes: in response to determining that the number of pixels where the difference between adjacent pixel values ​​is the same is less than a first predetermined threshold, setting the number of pixels where the difference between adjacent pixel values ​​is the same to zero.

[0152] Embodiment 9: According to the method described in any one of embodiments 1 to 8, the method comprises: indicating that the difference between adjacent pixel values ​​exceeds a second predetermined threshold.

[0153] Embodiment 10: According to the method described in any one of embodiments 1 to 9, the method comprises: in response to determining that the difference between adjacent pixel values ​​exceeds a second predetermined threshold, setting the determined number of pixels in which the difference between adjacent pixel values ​​is the same to zero.

[0154] Embodiment 11: A method according to any one of embodiments 1 to 10, wherein selectively encoding at least some pixels of the image via one of run-length coding or gradient coding corresponding to the determined highest number includes: selectively encoding the remaining portion of the image via one or more of run-length coding or gradient coding.

[0155] Embodiment 12: According to the method of any one of embodiments 1 to 11, setting the value of the indicator bit of the transmission of the encoded part of the image, the value of the indicator bit indicates the encoding scheme used to encode the encoded part of the image.

[0156] Embodiment 13: A device comprising: at least one processor; and a memory for storing machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: determine the highest number of pixels in a run that can be compressed via run-length encoding and the highest number of pixels in a run that can be compressed via gradient encoding; and selectively encode at least some pixels of an image via one of run-length encoding or gradient encoding corresponding to the determined highest number.

[0157] Embodiment 14: A device according to embodiment 13, wherein the memory is used to store machine executable instructions, which when executed by the at least one processor enable the at least one processor to: selectively encode the remaining pixels of the image via one or more of run-length coding or gradient coding based at least in part on the corresponding determined highest number of pixels in the run that can be compressed via run-length coding or gradient coding.

[0158] Embodiment 15: A device according to any one of embodiments 13 and 14, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: determine the number of pixels in the run that can be compressed via run-length encoding; determine the number of pixels in the run that can be compressed via gradient encoding; compare the determined number of pixels in the run that can be compressed via run-length encoding with the determined number of pixels in the run that can be compressed via gradient encoding; and in response to the comparison: determine the highest number of the number of pixels in the run that can be compressed via run-length encoding and the number of pixels in the run that can be compressed via gradient encoding.

[0159] Embodiment 16: A device according to any one of Embodiments 13 to 14, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: determine the number of pixels in a sequence having the same pixel value; and determine the number of pixels in a run that can be compressed via run-length encoding based at least in part on the determined number of pixels in the sequence having the same pixel value.

[0160] Embodiment 17: An apparatus according to any one of Embodiments 13 to 16, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: determine the number of pixels in a sequence in which the differences between adjacent pixel values ​​are the same; and determine the number of pixels in a run that can be compressed via gradient coding based at least in part on the determined number of pixels in the sequence in which the differences between adjacent pixel values ​​in the sequence are the same.

[0161] Embodiment 18: An apparatus according to any one of Embodiments 13 to 17, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: in response to determining that the number of pixels where the differences between adjacent pixel values ​​are the same does not exceed a predetermined threshold, set the number of pixels where the differences between adjacent pixel values ​​are the same to zero.

[0162] Embodiment 19: An apparatus according to any one of Embodiments 13 to 28, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: indicate that the determined number of pixels in which the difference between adjacent pixel values ​​is the same does not exceed a predetermined threshold.

[0163] Embodiment 20: An apparatus according to any one of Embodiments 13 to 19, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: in response to determining that the number of pixels where the differences between adjacent pixel values ​​are the same is less than a first predetermined threshold, set the number of pixels where the differences between adjacent pixel values ​​are the same to zero.

[0164] Embodiment 21: A device according to any one of embodiments 13 to 20, wherein the memory is used to store machine executable instructions, which, when executed by the at least one processor, enable the at least one processor to: indicate that the determined number of pixels in which the difference between adjacent pixel values ​​is the same is less than a first predetermined threshold.

[0165] Embodiment 22: A device comprising: a run-length encoding circuit; a gradient encoding circuit; and a logic circuit, the logic circuit being used to: determine the highest number of pixels in a run that can be compressed via run-length encoding and the highest number of pixels in the run that can be compressed via gradient encoding; and selectively encode at least some pixels of an image via one of run-length encoding or gradient encoding corresponding to the determined highest number.

[0166] Embodiment 23: The apparatus of embodiment 22, wherein the run-length encoding circuit is used to determine the number of pixels in the run that can be compressed via run-length encoding.

[0167] Embodiment 24: A device according to any one of embodiments 22 and 23, wherein, in order to determine the number of pixels in the run that can be compressed via run-length encoding, the run-length encoding circuit is used to: determine the number of pixels in a sequence having the same pixel value; and determine the number of pixels in the run that can be compressed via run-length encoding based at least in part on the determined number of pixels in the sequence having the same pixel value.

[0168] Embodiment 25: The apparatus of any one of Embodiments 22 to 24, wherein the gradient encoding circuit is used to determine the number of pixels in the run that can be compressed via gradient encoding.

[0169] Embodiment 26: A device according to any one of embodiments 22 to 25, wherein, in order to determine the number of pixels in the run that can be compressed via gradient coding, the gradient coding circuit is used to: determine the number of pixels in a sequence in which the differences between adjacent pixel values ​​are the same; and determine the number of pixels in the run that can be compressed via gradient coding based at least in part on the determined number of pixels in the sequence in which the differences between adjacent pixel values ​​in the sequence are the same.

[0170] Embodiment 27: A device according to any one of embodiments 22 to 25, wherein the logic circuit is used to: selectively encode the remaining pixels of the image via one or more of run-length coding or gradient coding based at least in part on the corresponding determined maximum number of pixels that can be compressed in a run via run-length coding or gradient coding.

[0171] Embodiment 28: An apparatus according to any one of embodiments 22 to 27, the apparatus comprising a network device for transmitting the image to a network, the image comprising an image data portion encoded via run-length coding and an image data portion encoded via gradient coding.

[0172] Embodiment 29: A device according to any one of embodiments 22 to 28, wherein the logic circuit is used to set the value of the indicator bit of the transmission including the encoded portion of the image, and the value of the indicator bit indicates the encoding scheme used to encode the encoded portion of the image.

[0173] Embodiment 30: A method, the method comprising: determining an encoder scheme for encoding a portion of the encoded image data at least in part in response to an indicator bit included with the encoded image data, the state of the indicator bit being used to identify one of run-length encoding or gradient encoding; and decoding the portion of the encoded image data using run-length decoding in response to the indicator bit indicating that the portion of the encoded image data is encoded using run-length encoding; or decoding the portion of the encoded image data using gradient decoding in response to the indicator bit indicating that the portion of the encoded image data is encoded using gradient encoding.

[0174] Embodiment 31: According to the method described in Embodiment 30, the method includes: obtaining pixel values ​​from the portion of the encoded image data; and obtaining the encoded data length value from the portion of the encoded image data.

[0175] Embodiment 32: According to the method described in any one of embodiments 30 and 31, the method comprises: decoding the encoded image data using the encoding scheme indicated by the indicator bit, the pixel value and the encoded data length value.

[0176] Embodiment 33: According to the method described in any one of Embodiments 30 to 32, the method comprises: obtaining another pixel value from another part of the encoded image data; obtaining another encoded data length value from another part of the encoded image data; and decoding the other part of the encoded image data using a coding scheme indicated by another indicator bit, the other pixel value and the other encoded data length value, wherein the other indicator bit is included together with the other encoded image data.

[0177] Embodiment 34: A method according to any one of embodiments 30 to 33, wherein the pixel value comprises a grayscale value or a color value.

[0178] Embodiment 35: A method according to any one of embodiments 30 to 34, wherein the indicator bits can be set to alternately indicate run-length coding or gradient coding.

[0179] Embodiment 36: A method according to any one of embodiments 30 to 35, comprising: decoding the remaining portion of the image data via one or more of run-length decoding or gradient decoding.

[0180] Embodiment 37: A device, comprising: at least one processor; and a memory having hardware executable instructions stored thereon, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: determine an encoder scheme for encoding a portion of the encoded image data at least in part in response to an indicator bit included with the encoded image data, the value of the indicator bit being used to identify one of run-length encoding or gradient encoding; in response to the determined encoder scheme, decode the portion of the encoded image data using run-length decoding in response to the indicator bit indicating that the portion of the encoded image data is encoded using run-length encoding; or decode the portion of the encoded image data using gradient decoding in response to the indicator bit indicating that the portion of the encoded image data is encoded using gradient encoding.

[0181] Embodiment 38: According to the device described in embodiment 37, the device includes: a run-length decoding circuit, the run-length decoding circuit is used to decode the encoded image data using run-length decoding; and a gradient decoding circuit, the gradient decoding circuit is used to decode the encoded image data using gradient decoding.

[0182] Embodiment 39: The apparatus of any one of Embodiments 37 and 38, wherein the indicator bits are capable of being set to alternately indicate run-length coding or gradient coding.

[0183] Embodiment 40: A device according to any one of embodiments 37 to 39, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: obtain pixel values ​​from the portion of the encoded image data; and obtain an encoded data length value from the portion of the encoded image data.

[0184] Embodiment 41: A device according to any one of embodiments 37 to 40, wherein the instruction, when executed by the at least one processor, enables the at least one processor to: decode the encoded image data using the encoding scheme indicated by the indicator bit, the pixel value and the encoded data length value.

[0185] Embodiment 42: A device according to any one of Embodiments 37 to 41, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: obtain another pixel value from another portion of the encoded image data; obtain another encoded data length value from another portion of the encoded image data; and decode the other portion of the encoded image data using a coding scheme indicated by another indicator bit, the other pixel value and the other encoded data length value, wherein the other indicator bit is included together with the other encoded image data.

[0186] Embodiment 43: A device according to any one of Embodiments 37 to 42, wherein the pixel value comprises a grayscale value or a color value.

[0187] Although the present invention is described herein with respect to certain illustrated embodiments, those of ordinary skill in the art will recognize and appreciate that the present invention is not so limited. Rather, many additions, deletions, and modifications may be made to the illustrated embodiments and the described embodiments without departing from the scope of the present invention as claimed below and its legal equivalents. Furthermore, features from one embodiment may be combined with features of another embodiment while still being included within the scope of the present invention as contemplated by the inventor.

Claims

1. A method, comprising: determining, for at least a portion of the image, a highest number of pixels in a run that are compressible via run-length encoding and a number of pixels in a run that are compressible via gradient encoding; as well as At least some pixels of the image are selectively encoded via one of run-length encoding or gradient encoding corresponding to the determined highest number.

2. The method according to claim 1, comprising: The remaining pixels of the image are selectively encoded via one or more of run-length encoding or gradient encoding based at least in part on a respective determined highest number of pixels in the run that are compressible via run-length encoding or gradient encoding.

3. The method of claim 2, comprising transmitting via a network, the transmission comprising the encoded image and an indicator bit, the indicator bit indicating a coding scheme used to encode the encoded image, the coding schemes that can be indicated by the indicator bit comprising run-length coding and gradient coding.

4. The method of claim 1 , wherein determining the highest number of the number of pixels in the run that are compressible via run-length encoding and the number of pixels in the run that are compressible via gradient encoding comprises: determining the number of pixels in the run that can be compressed via run-length encoding; determining a number of the pixels in the run-length that can be compressed via gradient encoding; as well as The highest number of the number of pixels in the run compressible via run-length encoding and the number of pixels in the run compressible via gradient encoding is determined.

5. The method of claim 4, wherein determining the number of pixels in the run that are compressible via run-length encoding comprises: determining the number of pixels in a sequence having the same pixel value; as well as The number of pixels in the run compressible via run-length encoding is determined based at least in part on the determined number of pixels in the sequence having the same pixel value.

6. The method of claim 4, wherein determining the number of pixels in the run that can be compressed via gradient coding comprises: determining the number of pixels in the sequence in which the differences between adjacent pixel values ​​are the same; and determining the number of pixels in the run compressible via gradient encoding based at least in part on the determined number of pixels in the sequence where the differences between adjacent pixel values ​​in the sequence are the same.

7. The method according to claim 6, comprising: In response to determining that the determined number of pixels where the difference between adjacent pixel values ​​is the same is less than a first predetermined threshold, the determined number of pixels where the difference between adjacent pixel values ​​is the same is set to zero.

8. The method according to claim 6, comprising: In response to determining that the difference between adjacent pixel values ​​exceeds a second predetermined threshold, the determined number of pixels where the difference between adjacent pixel values ​​is the same is set to zero.

9. The method of claim 1 , wherein selectively encoding at least some pixels of the image via one of run-length encoding or gradient encoding corresponding to the determined highest number comprises: The remainder of the image is selectively encoded via one or more of run-length encoding or gradient encoding.

10. The method of claim 1, setting a value of an indicator bit comprising transmission of an encoded portion of the image, the value of the indicator bit indicating an encoding scheme used to encode the encoded portion of the image.

11. A device, comprising: at least one processor; and a memory for storing machine-executable instructions that, when executed by the at least one processor, enable the at least one processor to: determining a highest number of a number of pixels in a run that can be compressed via run-length encoding and a number of pixels in a run that can be compressed via gradient encoding; as well as At least some pixels of the image are selectively encoded via one of run-length encoding or gradient encoding corresponding to the determined highest number.

12. The apparatus of claim 11, wherein the memory is to store machine executable instructions that, when executed by the at least one processor, enable the at least one processor to: The remaining pixels of the image are selectively encoded via one or more of run-length encoding or gradient encoding based at least in part on a respective determined highest number of pixels in the run that are compressible via run-length encoding or gradient encoding.

13. The apparatus of claim 11, wherein the memory is to store machine executable instructions that, when executed by the at least one processor, enable the at least one processor to: determining the number of pixels in the run that can be compressed via run-length encoding; determining a number of said pixels in said run-length that can be compressed via gradient encoding; comparing the determined number of pixels in the run that is compressible via run-length encoding to the determined number of pixels in the run that is compressible via gradient encoding; as well as Responsive to the comparing: determining the highest number of the number of pixels in the run compressible via run-length encoding and the number of pixels in the run compressible via gradient encoding.

14. The apparatus of claim 13, wherein the memory is to store machine executable instructions that, when executed by the at least one processor, enable the at least one processor to: determining the number of pixels in the sequence having the same pixel value; and The number of pixels in the run compressible via run length encoding is determined based at least in part on the determined number of pixels in the sequence having the same pixel value.

15. The apparatus of claim 12, wherein the memory is to store machine executable instructions that, when executed by the at least one processor, enable the at least one processor to: determining a number of pixels in a sequence in which differences between adjacent pixel values ​​are the same; and determining a number of pixels in a run compressible via gradient coding based at least in part on the determined number of pixels in the sequence in which the differences between adjacent pixel values ​​in the sequence are the same.

16. The apparatus of claim 12, wherein the memory is to store machine-executable instructions that, when executed by the at least one processor, enable the at least one processor to: In response to determining that the determined number of pixels where the difference between adjacent pixel values ​​is the same does not exceed a predetermined threshold, the determined number of pixels where the difference between adjacent pixel values ​​is the same is set to zero.

17. The apparatus of claim 12, wherein the memory is to store machine-executable instructions that, when executed by the at least one processor, enable the at least one processor to: In response to determining that the determined number of pixels where the difference between adjacent pixel values ​​is the same is less than a first predetermined threshold, the determined number of pixels where the difference between adjacent pixel values ​​is the same is set to zero.

18. A device, comprising: Run length encoding circuit; Gradient encoding circuit; and A logic circuit, the logic circuit being used for: determining a highest number of a number of pixels in a run that can be compressed via run-length encoding and a number of pixels in the run that can be compressed via gradient encoding; as well as At least some pixels of the image are selectively encoded via one of run-length encoding or gradient encoding corresponding to the determined highest number.

19. The apparatus of claim 18, wherein the run-length encoding circuit is used to determine the number of pixels in the run that can be compressed via run-length encoding.

20. The device according to claim 19, wherein To determine the number of pixels in the run that can be compressed via run-length encoding, the run-length encoding circuit is used to: determining the number of pixels in a sequence having the same pixel value; as well as The number of pixels in the run compressible via run-length encoding is determined based at least in part on the determined number of pixels in the sequence having the same pixel value.

21. The apparatus of claim 19, wherein the gradient encoding circuit is to determine the number of pixels in the run that can be compressed via gradient encoding.

22. The device according to claim 20, wherein: To determine the number of pixels in the run that can be compressed via gradient coding, the gradient coding circuit is configured to: determining the number of pixels in the sequence in which the differences between adjacent pixel values ​​are the same; and determining the number of pixels in the run compressible via gradient encoding based at least in part on the determined number of pixels in the sequence where the differences between adjacent pixel values ​​in the sequence are the same.

23. The apparatus of claim 18, wherein the logic circuit is configured to: The remaining pixels of the image are selectively encoded via one or more of run-length encoding or gradient encoding based at least in part on a respective determined highest number of pixels compressible in a run via run-length encoding or gradient encoding.

24. The apparatus of claim 18, comprising network equipment for transmitting the image to a network, the image comprising a portion of image data encoded via run-length encoding and a portion of image data encoded via gradient encoding.

25. The apparatus of claim 18, wherein the logic circuit is to set a value of an indicator bit comprising the transmission of the encoded portion of the image, the value of the indicator bit indicating a coding scheme used to encode the encoded portion of the image.

26. A method comprising: determining an encoder scheme for encoding a portion of the encoded image data responsive at least in part to an indicator bit included with the encoded image data, a state of the indicator bit identifying one of run-length encoding or gradient encoding; and decoding the portion of the encoded image data by: using run length decoding in response to the indicator bits indicating that the portion of the encoded image data was encoded using run length encoding; or Gradient decoding is used in response to the indicator bits indicating that the portion of the encoded image data is encoded using gradient encoding.

27. The method according to claim 26, comprising: obtaining pixel values ​​from the portion of the encoded image data; as well as An encoded data length value is obtained from the portion of the encoded image data.

28. The method according to claim 27, comprising: The encoded image data is decoded using the encoding scheme indicated by the indicator bits, the pixel values, and the encoded data length value.

29. The method according to claim 27, comprising: obtaining another pixel value from another portion of the encoded image data; obtaining another encoded data length value from another portion of the encoded image data; and decoding the further portion of the encoded image data using the encoding scheme indicated by a further indicator bit, the further pixel value and the further encoded data length value, wherein the further indicator bit is included with the further encoded image data.

30. The method of claim 27, wherein the pixel value comprises a grayscale value or a color value.

31. The method of claim 26, wherein the indicator bits are configurable to alternately indicate run-length encoding or gradient encoding.

32. The method of claim 27, comprising: The remainder of the image data is decoded via one or more of run-length decoding or gradient decoding.

33. An apparatus, comprising: at least one processor; and a memory having hardware executable instructions stored thereon, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: determining an encoder scheme for encoding a portion of the encoded image data responsive at least in part to an indicator bit included with the encoded image data, the indicator bit having a value identifying one of run-length encoding or gradient encoding; In response to the determined encoder scheme, decoding the portion of the encoded image data by: utilizing run-length decoding in response to the indicator bits indicating that the portion of the encoded image data was encoded using run-length encoding; or Gradient decoding is utilized in response to the indicator bits indicating that the portion of the encoded image data is encoded using gradient encoding.

34. The apparatus according to claim 33, comprising: a run-length decoding circuit for decoding the encoded image data using run-length decoding; and A gradient decoding circuit is used to decode the encoded image data using gradient decoding.

35. The apparatus of claim 33, wherein the indicator bits are configurable to alternately indicate run-length encoding or gradient encoding.

36. The apparatus of claim 33, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: obtaining pixel values ​​from the portion of the encoded image data; and An encoded data length value is obtained from the portion of the encoded image data.

37. The apparatus of claim 36, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: The encoded image data is decoded using the encoding scheme indicated by the indicator bits, the pixel values, and the encoded data length value.

38. The apparatus of claim 36, wherein the instructions, when executed by the at least one processor, enable the at least one processor to: obtaining another pixel value from another portion of the encoded image data; Obtaining another encoded data length value from another portion of the encoded image data; and decoding the other portion of the encoded image data using a coding scheme indicated by another indicator bit, the other pixel value, and the other encoded data length value, wherein the other indicator bit is included together with the other encoded image data.

39. The apparatus of claim 36, wherein the pixel value comprises a grayscale value or a color value.

Images