Fair arbitration complementary steering routing method based on three-dimensional network-on-chip

Abstract

The invention discloses a fair arbitration complementary steering routing method based on a three-dimensional network-on-chip, which belongs to the field of network-on-chip communication, and is characterized in that an output port of a first node is determined according to an arbitration mechanism, the first node comprises a plurality of output ports, and each output port corresponds to a second node; according to a steering model of a routing layer where the first node is located, whether the steering direction corresponding to the output port is one steering direction limited by the steering model or not is judged; and if not, the to-be-sent data is sent to one of the routing nodes on the adjacent routing layer, and one of the routing nodes on the adjacent routing layer forms a second node after receiving the to-be-sent data. The congestion avoidance performance of the adaptive routing method and the uniform distribution of communication flow in the network can be further improved, and finally the purpose of improving the communication performance and reliability of the three-dimensional network-on-chip is achieved.

Description

Technical Field

[0001] The present invention relates to the field of network-on-chip communication technology, and more particularly to a fair arbitration complementary steering routing method based on a three-dimensional network-on-chip. Background Art

[0002] The emergence of Network-on-Chip (NOC) effectively solves the bottleneck problems of multi-core communication performance and single-core performance improvement of traditional digital chips in the current multi-core system field, including cloud computing servers, embedded devices, neural network accelerators, image processors, etc., and greatly promotes the performance ceiling of modern digital chip design, making people's lives more intelligent and digital. With the continuous advancement of chip technology, the emergence and development of Through S ili con-Vi a TSV technology enables us to achieve a three-dimensional network-on-chip chip architecture with high-density and high-speed interconnection by vertically stacking multiple chips, thereby significantly reducing chip latency and power consumption. The routing method determines the transmission path of the data packet in the network-on-chip. An effective routing method can ensure that the data packet can reach the destination node quickly and reliably.

[0003] For example, the invention patent with authorization announcement number CN112073314B provides a large-scale three-dimensional on-chip network deterministic path routing method that tolerates multiple faults. The nodes in the on-chip network are utilized to the maximum extent through deterministic routing. However, the above routing method cannot meet the rich path diversity, so the existing technology has shortcomings. Summary of the invention

[0004] In view of the shortcomings of the prior art, the purpose of the present invention is to provide a fair arbitration complementary steering routing method based on a three-dimensional on-chip network. By combining the design of the complementary layer with the arbitration decision, a multi-core system based on a three-dimensional on-chip network can achieve higher communication performance.

[0005] To achieve the above object, the present invention provides the following technical solutions:

[0006] The present invention provides a fair arbitration complementary steering routing method based on a three-dimensional network on chip, wherein the three-dimensional network on chip includes a plurality of routing layer units, each routing layer unit includes a plurality of routing layers, and in the same routing layer unit, the steering directions corresponding to the steering models of all routing layers are complementary, and each routing layer includes a plurality of routing nodes. The routing method is executed by a first node, and the first node is a routing node currently sending data. The routing method includes:

[0007] Determine the output port of the first node according to the arbitration mechanism, the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data;

[0008] According to a steering model of the routing layer where the first node is located, determining whether the steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0009] If not, the data to be sent is sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent, and the second node determines whether it is the target routing node, if not, the second node defines itself as the first node.

[0010] As a further improvement of the present invention, determining the output port of the first node according to the arbitration mechanism includes selecting one of the output ports as the output port of the first node according to an arbitration priority sequence, wherein the arbitration priority sequence is obtained according to the priority ranking of each output port.

[0011] As a further improvement of the present invention, selecting one of the output ports as the output port of the first node according to the arbitration priority sequence includes:

[0012] According to the arbitration priority sequence, selecting the output port at the first position in the arbitration priority sequence as the output port of the first node; or,

[0013] According to the arbitration priority sequence, the output ports in the first N positions in the arbitration priority sequence are selected as the output ports of the first node, wherein 1<N<M, and M is the number of the output ports of the first node.

[0014] The present invention provides a first node, which is applied to the above-mentioned fair arbitration complementary steering routing method based on a three-dimensional network on chip, and the first node includes:

[0015] an arbitrator, determining an output port of the first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data;

[0016] A first judger, based on a steering model of a routing layer where the first node is located, determines whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0017] The transmitter sends the data to be sent to one of the routing nodes on the adjacent routing layer if the judgment result is no, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent.

[0018] As a further improvement of the present invention, one of the routing nodes on the adjacent routing layer is bound to the first node.

[0019] As a further improvement of the present invention, the output ports of the first node include a plurality of horizontal output ports, a plurality of vertical output ports and a local port.

[0020] The present invention provides a second node, which is applied to the above-mentioned fair arbitration complementary steering routing method based on three-dimensional network on chip, and the second node includes:

[0021] A receiver, receiving the to-be-sent data sent by the first node;

[0022] The second determiner determines whether it is the target routing node. If not, the second node defines itself as the first node.

[0023] The present invention provides a three-dimensional network on chip, the three-dimensional network on chip includes a plurality of routing layer units, each routing layer unit includes a plurality of routing layers, in the same routing layer unit, the steering directions corresponding to the steering models of all routing layers are complementary, each routing layer includes a plurality of routing nodes, wherein the routing node currently sending data is a first node, the routing node currently receiving data is a second node, and the first node includes:

[0024] an arbitrator, determining an output port of the first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data;

[0025] A first judger, based on a steering model of a routing layer where the first node is located, determines whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0026] The transmitter, if the judgment result is no, sends the data to be sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent;

[0027] The second node comprises:

[0028] A receiver, receiving the to-be-sent data sent by the first node;

[0029] The second determiner determines whether it is the target routing node. If not, the second node defines itself as the first node.

[0030] As a further improvement of the present invention, each of the routing layer units independently includes two routing layers or more than two routing layers.

[0031] As a further improvement of the present invention, the number of routing nodes in each routing layer is the same or different, and / or the node network topology structure of each routing layer is the same or different.

[0032] The present invention is based on the steering method and arbitration mechanism of the two-dimensional on-chip network model, and expands it to form a fair arbitration complementary steering routing method based on the three-dimensional on-chip network, breaking the limitation of illegal steering on the adaptive routing method in the vertical direction, and avoiding the problem of unfair port arbitration that is common in the steering model. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 is a flow chart of the method steps of the present invention;

[0034] Figure 2 Schematic diagram of the odd-even steering model in a two-dimensional on-chip network;

[0035] Figure 3 Schematic diagram of the even-odd steering model in a two-dimensional on-chip network;

[0036] Figure 4 Schematic diagram of a transmission scenario when the initial node and the target node are located in adjacent routing layers;

[0037] Figure 5 Schematic diagram of a transmission scenario when the initial node and the target node are located in non-adjacent routing layers;

[0038] Figure 6 It is a schematic diagram of simulation results of the present invention;

[0039] Figure 7 The present invention is a flowchart of the method. DETAILED DESCRIPTION

[0040] The technical solution of the present invention is described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations of the technical solution of the present invention.

[0041] The term "and / or" in the following text is only a description of the association relationship between the associated objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " generally indicates that the associated objects before and after are in an "or" relationship.

[0042] Traditional on-chip network routing methods are mainly divided into deterministic routing and adaptive routing. Compared with deterministic routing methods, adaptive routing methods are dynamically adjustable, so they have advantages in improving chip reliability and communication performance. At present, the main challenge of adaptive routing methods is the deadlock problem, and the solutions are mainly divided into turn model and virtual channel. The use of virtual channel will greatly increase the area overhead of the chip, so the routing method based on the turn model has been widely studied. At present, the routing method for three-dimensional on-chip networks mainly comes from the simple two-dimensional routing extension and the elevator model routing method with higher overhead. It does not fully consider the path combination of adaptive routing in adjacent layers, and does not consider the port arbitration unfairness problem that is common in the turn model.

[0043] In order to solve the above problems, an embodiment of the present application provides a three-dimensional on-chip network, which includes multiple routing layer units, each routing layer unit includes multiple routing layers, and in the same routing layer unit, the steering directions corresponding to the steering models of all routing layers are complementary, and each routing layer includes multiple routing nodes, wherein the routing node currently sending data is the first node, and the routing node currently receiving data is the second node, and the first node includes:

[0044] An arbitrator, which determines an output port of a first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each of which corresponds to a second node, and the second node is a routing node currently receiving data;

[0045] A first judger, based on a steering model of a routing layer where the first node is located, judges whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0046] The transmitter, if the judgment result is no, sends the data to be sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms a second node after receiving the data to be sent;

[0047] The second node includes:

[0048] A receiver, receiving the to-be-sent data sent by the first node;

[0049] The second determiner determines whether it is a target routing node. If not, the second node defines itself as the first node.

[0050] Each routing layer unit independently includes two or more routing layers, that is, the three-dimensional on-chip network may include multiple routing layer units with different numbers of layers. In addition, the number of routing nodes in each routing layer is the same or different, and / or the node network topology of each routing layer is the same or different.

[0051] Among them, the steering directions corresponding to the steering models of all routing layers in the same routing layer unit are complementary, that is, the legal steering in all routing layers in the same routing layer unit can jointly constitute the basic steering in the three-dimensional on-chip network steering model; the steering direction defined by the steering model refers to the legal steering specified in the steering model.

[0052] Further, such as Figure 1 As shown, the embodiment of the present application provides a fair arbitration complementary steering routing method based on a three-dimensional on-chip network, which is executed by the above-mentioned first node, and the routing method includes:

[0053] Determine an output port of a first node according to an arbitration mechanism, the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data;

[0054] According to the steering model of the routing layer where the first node is located, determining whether the steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0055] If not, the data to be sent is sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms a second node after receiving the data to be sent, and the second node determines whether it is the target routing node, if not, the second node defines itself as the first node.

[0056] Among them, if the output port is one of the steering directions limited by the steering model, the data to be sent is sent to the second node corresponding to the output port through the output port, and then the second node determines whether it is the target routing node. If not, the second node defines itself as the first node.

[0057] The fair arbitration complementary steering routing method based on three-dimensional network on chip provided in this embodiment breaks the limitation of illegal steering on the adaptive routing method in the vertical direction by setting multiple routing layers with complementary steering models.

[0058] Furthermore, this embodiment provides a step of determining the output port of the first node according to the arbitration mechanism, including selecting one of the output ports as the output port of the first node according to an arbitration priority sequence, wherein the arbitration priority sequence is obtained according to the priority ranking of each output port.

[0059] Specifically, the arbitration priority sequence is obtained by sorting the output ports in descending order according to the usage frequency.

[0060] Furthermore, this embodiment provides a step of selecting one of the output ports as the output port of the first node according to the arbitration priority sequence, including:

[0061] According to the arbitration priority sequence, selecting the output port at the first position in the arbitration priority sequence as the output port of the first node; or,

[0062] According to the arbitration priority sequence, the output ports in the first N positions in the arbitration priority sequence are selected as the output ports of the first node, wherein 1<N<M, and M is the number of the output ports of the first node.

[0063] The routing method provided in this embodiment completes a fairer port arbitration decision through an arbitration mechanism, avoids the problem of unfair port arbitration that is common in steering models, and determines whether an output port can be used for the transmission of data to be sent through the steering model, thereby ensuring the effective transmission of data to be sent.

[0064] Specifically, the following takes the example that the routing layer unit includes two routing layers, and the number of routing nodes in each routing layer is the same as the node network topology structure of each routing layer, to specifically introduce the fair arbitration complementary steering routing algorithm in the three-dimensional on-chip network, wherein one of the two routing layers included in the routing layer unit serves as the original routing layer, and the other serves as the complementary layer.

[0065] First, according to the existing routing method based on the turning model, the basic turns in the two-dimensional on-chip network turning model can be divided into the following two groups and eight categories according to the input ports and output ports of the routing nodes, the clockwise group: southeast, southwest, west-east, northeast-east, and the counterclockwise group: southwest, southeast, northeast, northwest. According to their relative positions in the deadlock loop, they can be divided into four columns: southeast / southwest, northwest / northeast, southwest / southeast, northeast / northwest.

[0066] According to the above classification of four-column turns, the existing illegal turn model is expanded to obtain the routing rules of the complementary layer. Exemplarily, one of the illegal turn models in the prior art is the even-odd turn (ODD_EVEN) model, which selectively prohibits southeast and northeast turns as well as southwest and northwest turns according to the parity of the number of columns in the on-chip network. The complementary prohibition model of the even-odd turn model is the even-odd turn model. By extending the even-odd turn model to the adjacent layer (complementary layer) of the original routing layer in the three-dimensional on-chip network, the routing rules of the complementary layer can be designed. Figure 2 and Figure 3As shown, taking the column as the basis, when the column coordinate of the routing node is an even number, the turns prohibited by the odd-even steering model are southeast turns and northeast turns, and when the column coordinate of the routing node is an odd number, the turns prohibited by the odd-even steering model are southwest turns and northwest turns, thereby breaking the deadlock dependency loop, and using this steering method to design a complementary steering method, that is, when the column coordinate of the routing node is an even number, the prohibited illegal turns are southwest turns and northwest turns, and when the column coordinate of the routing node is an odd number, the prohibited illegal turns are southeast turns and northeast turns, among which the turn opposite to the illegal turn is called a legal turn.

[0067] Furthermore, according to the prohibited steering rules of the two-dimensional on-chip network steering model, illegal steering can be divided into two categories: explicit illegal steering and implicit illegal steering. The north port and south port of the routing node are steerings explicitly prohibited by the even-odd steering rule, which are explicit illegal steering, while the east port and west port of the routing node are steerings implicitly prohibited under the even-odd steering rule in order to remove the restriction of livelock, which are implicit illegal steering. Livelock means that the data packet has been circulating repeatedly between certain routing nodes and cannot be continuously and effectively advanced toward the destination node, causing transmission stagnation.

[0068] Different from the other routing methods that use each port more evenly, the routing method based on the steering model restricts the above illegal steering in different columns, which actually causes uneven distribution of the ports of the routing nodes in the on-chip network. Among them, the north / south ports have more intensive arbitration requests due to the prohibition of explicit illegal steering, while the arbitration requests of the local port are relatively the lowest. Therefore, the priority of the two-dimensional on-chip network steering method is north / south port>east / west port>local port. The arbitration mechanism based on this priority sequence is called a fairer arbitration mechanism for the steering model.

[0069] After that, the complementary layer is placed adjacent to the original routing layer and expanded in the vertical direction to form a three-dimensional on-chip network. Since the illegal turns actually restricted by the original routing layer and its complementary layer are the same, i.e., north / south turns, the usage of each port of each routing node should also be similar, i.e., the north / south ports of routing nodes in different layers are used most frequently, so they have the highest priority. After the priority is confirmed, this mechanism is improved on the arbitrator of the routing node to obtain a packet priority arbitration design. Specifically, when the data to be sent arrives at the routing node, the arbitrator, as a crossbar, will give priority to the south / north ports with the highest frequency of use, followed by the lower / upper ports with relatively high frequency of use, and finally the east / west and the local ports with the lowest frequency of use.

[0070] Moreover, in a three-dimensional on-chip network, as time goes by, the network communication mode will tend to be a random mode, so the illegal steering restrictions on the same routing layer are more than the illegal steering restrictions between different routing layers. Therefore, the priority sequence obtained under the two-dimensional on-chip network steering method is extended to the three-dimensional on-chip network, which should be north / south port>lower / upper port>east / west port>local port, among which only the east, west and local ports are free (no illegal situation). The arbitration mechanism provided in this embodiment can complete a more fair port arbitration decision because it takes into account the restrictions on illegal steering by the steering model.

[0071] For example, Figure 4 As shown, in a three-dimensional on-chip network, when the S node is ready to transmit the data to be sent to the target node (D node), according to the above arbitration mechanism, the S node will select the south port with the most concentrated frequency and lower congestion among the lower, east and south ports for output, but due to the limitation of the steering model of this layer, the steering corresponding to the south port of the routing node in the odd column of this layer is an illegal steering, so it cannot be selected for data packet transmission. At this time, the data packet will be transmitted to the routing node (B node) in the adjacent complementary layer through the lower port of the routing node, and then the south port will be selected for transmission according to the above arbitration mechanism. Since the steering corresponding to the south port of the routing node in the even column of the complementary layer is an illegal steering, and the odd column has no such limitation, the limitation of illegal steering on the adaptive routing method can be broken in the vertical direction, that is, the data to be sent can be transmitted to the D node through the south port at the B node, thereby avoiding communication congestion or fault areas, thereby improving performance.

[0072] For example, Figure 5 As shown, when the initial node (S node) and the target node (D node) are not located in adjacent routing layers, the data to be sent is first transmitted to the X node according to the same steps as the above example. Then, according to the arbitration mechanism, the X node will select the south port with the most concentrated usage frequency and lower congestion for output. However, at this time, the turn corresponding to the south port of the X node in the even column is an illegal turn, so it cannot be selected for data packet transmission. At this time, the data to be sent will be transmitted to the routing node (Y node) in the adjacent original routing layer through the lower port of the routing node, and the Y node in the odd column is not restricted by the illegal turn, so the data to be sent can be transmitted to the D node through the south port.

[0073] This example only introduces the case where the routing layer unit includes two routing layers, and the number of routing nodes in each routing layer is the same as the node network topology of each routing layer. However, the fair arbitration complementary steering routing method for the three-dimensional on-chip network provided in this embodiment is not limited to this. Exemplarily, the routing layer unit may include four routing layers, and the steering model of each routing layer only prohibits one of the southeast / southwest, northwest / northeast, southwest / southeast, and northeast / northwest, and the node network topology of each routing layer may use other structures such as a tree topology or a ring topology.

[0074] Further, such as Figure 6 As shown, in order to analyze the communication performance of different injection amounts under the random traffic mode, this embodiment implements the finally generated routing method, namely the router architecture, on a simulation experiment platform, wherein the three-dimensional even-odd steering method (oe_3d) is the most basic even-odd steering extension of the two-dimensional on-chip network, the complementary three-dimensional steering method (c_oe_3d) is the complementary layer extension implemented by the complementary steering routing method, and ec_oe_3d is the complementary steering routing method using a fair arbitration mechanism. It can be seen that compared with the three-dimensional extension routing method of the most basic steering model, the complementary steering routing method of fair arbitration and the complementary steering routing method can have higher communication performance.

[0075] In summary, if Figure 7 As shown, the implementation steps of the fair arbitration complementary steering routing method of the three-dimensional on-chip network include:

[0076] Illegal steering analysis of steering model: First, analyze the existing steering model, and analyze the request status of each port of the routing node based on the existing steering characteristics to obtain the priority results of different ports;

[0077] Routing port priority setting: According to the priority results of different ports, the port arbitration mechanism of the routing node is designed with priority slicing;

[0078] Customized arbitration method design: The arbitration mechanism in 2D NoC is extended to obtain the arbitration method for 3D NoC;

[0079] Complementary layer routing method design: By analyzing and expanding different types of illegal diversion models, complementary layer routing rules are designed;

[0080] Design of 3D NOC routing rules: Place the complementary layer adjacent to the original routing layer in the vertical direction, and apply the above routing rules to the 3D NOC;

[0081] Design of fair arbitration complementary steering routing method for three-dimensional on-chip network: Combining the arbitration method of the three-dimensional on-chip network with the routing rules of the complementary layer, a fair arbitration complementary steering routing method based on the three-dimensional on-chip network is obtained;

[0082] Architecture implementation and traffic analysis: The final generated routing method is implemented on the simulation experiment platform.

[0083] Furthermore, this embodiment provides a first node, which is applied to the above-mentioned fair arbitration complementary steering routing method based on a three-dimensional network on chip, and the first node includes:

[0084] An arbitrator, which determines an output port of a first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each of which corresponds to a second node, and the second node is a routing node currently receiving data;

[0085] A first judger, based on a steering model of a routing layer where the first node is located, judges whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model;

[0086] The transmitter, if the judgment result is no, sends the data to be sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms a second node after receiving the data to be sent.

[0087] Among them, one of the routing nodes on the adjacent routing layer can be bound to the first node, that is, the first node can directly send the data to be sent to one of the routing nodes on the adjacent routing layer without transmitting through other routing nodes.

[0088] Further, the output ports of the first node include multiple horizontal output ports, multiple vertical output ports and local ports. Exemplarily, the horizontal output ports include a south port, a north port, an east port and a west port, and the vertical output ports include an upper port and a lower port.

[0089] Furthermore, this embodiment provides a second node, which is applied to the above-mentioned fair arbitration complementary steering routing method based on a three-dimensional network on chip, and the second node includes:

[0090] A receiver, receiving the to-be-sent data sent by the first node;

[0091] The second determiner determines whether it is a target routing node. If not, the second node defines itself as the first node.

[0092] Furthermore, an embodiment of the present application provides a SOC chip, which is applied to the above-mentioned fair arbitration complementary steering routing method based on three-dimensional on-chip network.

[0093] Furthermore, an embodiment of the present application provides a terminal device, which is applied to the above-mentioned SOC chip.

[0094] The embodiment of the present application provides a fair arbitration complementary steering routing method based on a three-dimensional on-chip network, which uses complementary layers to perform adaptive routing in the three-dimensional on-chip network. When the data to be sent cannot be illegally turned in the original routing layer to reach the vertical layer of the destination, the complementary layer can be used for steering routing, because the steering of the complementary layer in the vertical direction is legal at this time, which can reduce the problem of reduced path diversity caused by prohibiting illegal steering. In addition, based on the Hamilton rule inference, it can be known that when the steering model is used to eliminate deadlock in each horizontal layer, a suitable steering model is further selected to eliminate routing deadlock between vertical layers, and the final three-dimensional on-chip network is deadlock-free. At the same time, the present invention combines the fair arbitration method with the complementary routing rule, which can further improve the congestion avoidance performance of the adaptive routing method and the uniform distribution of communication traffic in the network, and ultimately improve the communication performance and reliability of the three-dimensional on-chip network.

[0095] Those skilled in the art will appreciate that embodiments of the present invention may be provided as methods, systems, or computer program products. Therefore, the present invention may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present invention may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0096] The present invention is described with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products according to embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0097] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1A function specified in one or more boxes.

[0098] The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should also be regarded as the protection scope of the present invention.

Claims

1. A fair arbitration complementary steering routing method based on a three-dimensional network on chip, characterized in that: The three-dimensional network on chip includes multiple routing layer units, each routing layer unit includes multiple routing layers, in the same routing layer unit, the steering directions corresponding to the steering models of all routing layers are complementary, each routing layer includes multiple routing nodes, the routing method is executed by a first node, the first node is a routing node currently sending data, and the routing method includes: Determine the output port of the first node according to the arbitration mechanism, the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data; According to a steering model of the routing layer where the first node is located, determining whether the steering direction corresponding to the output port is one of the steering directions defined by the steering model; If not, the data to be sent is sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent, and the second node determines whether it is the target routing node, if not, the second node defines itself as the first node.

2. The fair arbitration complementary steering routing method based on three-dimensional network on chip according to claim 1, characterized in that: Determining the output port of the first node according to the arbitration mechanism includes selecting one of the output ports as the output port of the first node according to an arbitration priority sequence, wherein the arbitration priority sequence is obtained according to the priority ranking of each output port.

3. The fair arbitration complementary steering routing method based on three-dimensional network on chip according to claim 2, characterized in that: The selecting one of the output ports as the output port of the first node according to the arbitration priority sequence includes: According to the arbitration priority sequence, selecting the output port at the first position in the arbitration priority sequence as the output port of the first node; or, According to the arbitration priority sequence, the output ports in the first N positions in the arbitration priority sequence are selected as the output ports of the first node, wherein 1<N<M, and M is the number of the output ports of the first node.

4. A first node, applied to a fair arbitration complementary steering routing method based on a three-dimensional network on chip as claimed in any one of claims 1 to 3, characterized in that: The first node comprises: an arbitrator, determining an output port of the first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data; A first judger, based on a steering model of a routing layer where the first node is located, determines whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model; The transmitter sends the data to be sent to one of the routing nodes on the adjacent routing layer if the judgment result is no, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent.

5. A first node according to claim 4, characterized in that: One of the routing nodes on the adjacent routing layer is bound to the first node.

6. A first node according to claim 4, characterized in that: The output ports of the first node include a plurality of horizontal output ports, a plurality of vertical output ports and a local port.

7. A second node, applied to a fair arbitration complementary steering routing method based on a three-dimensional network on chip as claimed in any one of claims 1 to 3, characterized in that: The second node comprises: A receiver, receiving the to-be-sent data sent by the first node; The second determiner determines whether it is the target routing node. If not, the second node defines itself as the first node.

8. A three-dimensional network on chip, characterized in that: The three-dimensional network on chip includes multiple routing layer units, each routing layer unit includes multiple routing layers, and in the same routing layer unit, the steering directions corresponding to the steering models of all routing layers are complementary. Each routing layer includes multiple routing nodes, wherein the routing node currently sending data is a first node, and the routing node currently receiving data is a second node. The first node includes: an arbitrator, determining an output port of the first node according to an arbitration mechanism, wherein the first node includes a plurality of output ports, each output port corresponds to a second node, and the second node is a routing node currently receiving data; A first judger, based on a steering model of a routing layer where the first node is located, determines whether a steering direction corresponding to the output port is one of the steering directions defined by the steering model; The transmitter, if the judgment result is no, sends the data to be sent to one of the routing nodes on the adjacent routing layer, wherein one of the routing nodes on the adjacent routing layer forms the second node after receiving the data to be sent; The second node comprises: A receiver, receiving the to-be-sent data sent by the first node; The second determiner determines whether it is the target routing node. If not, the second node defines itself as the first node.

9. A three-dimensional network on chip according to claim 8, characterized in that: Each of the routing layer units independently includes two or more routing layers.

10. The three-dimensional network on chip according to claim 9, characterized in that: The number of routing nodes in each routing layer is the same or different, and / or the node network topology structure of each routing layer is the same or different.

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