Active micro-display pixel circuit and display device

Abstract

The application relates to an active micro display device, comprising at least one pixel module, the pixel module comprising at least a light emitting device, a driving transistor and a first capacitor; at least one voltage division module, comprising at least a second capacitor; the capacitance of the second capacitor is m times the capacitance of the first capacitor, and m is greater than 0; the first capacitor and the corresponding second capacitor are configured to share the data voltage. In the charge transfer stage, the charge on the first capacitor is transferred to the corresponding second capacitor according to the proportion of the capacitance value, the expansion of the data voltage programming range is realized by expanding the second capacitor, so that the gray scale display precision is improved; meanwhile, multiple pixel modules can share one or more voltage division modules, the average area of a single pixel circuit in the display device is reduced while the data voltage programming range is expanded, so that the pixel density is improved. The pixel circuit of the application also has a threshold voltage compensation mechanism, which reduces the influence of the threshold voltage dispersion of the driving transistor on the driving current of the light emitting device.

Description

Technical Field

[0001] This application relates to a display technology, and more particularly to an active microdisplay pixel circuit and display device. Background Technology

[0002] In recent years, Organic Light-Emitting Diode (OLED) display technology has gradually developed and grown, and has begun to be industrialized in various application fields. In microdisplay applications, OLED on Silicon (OLEDoS) has also become one of the main technologies for virtual reality (VR) and augmented reality (AR) display applications. Compared with other microdisplay technologies, OLEDoS microdisplay technology has higher contrast, faster response speed, and lower power consumption, thus having significant advantages in high-resolution microdisplay applications.

[0003] However, as pixel density (Pixel Per Inch, PPI) increases, the driving current of OLEDoS pixels continuously decreases to the picoampere to nanoampere level, causing the driving transistors in the pixel circuit to operate in the subthreshold region and compressing the gate voltage range of the driving transistors to several hundred millivolts. Meanwhile, to ensure that the pixel circuit can achieve at least 8-bit grayscale accuracy, the data voltage range from the source driving circuit needs to exceed 2V.

[0004] Currently, there are two methods to extend the data voltage range. The first is to avoid the driving transistors in the pixel circuit operating in the subthreshold region. For example, the OLED can be connected in parallel with a controlled current source, so that the current through the OLED is determined by the difference between the two current sources operating in the saturation region. However, this method introduces additional power consumption and has a large mismatch error.

[0005] The second method to extend the data voltage range utilizes a feedback structure, in which a resistor or diode-connected MOS transistor is connected in series with the source of the driving transistor in the pixel circuit to reduce the ratio between the gate-source voltage of the driving transistor and the data voltage. However, the introduction of the source resistor or MOS transistor increases the layout area of ​​the pixel circuit, which is detrimental to achieving high display density and also adversely affects the uniformity of the display pixels. Summary of the Invention

[0006] To address the technical problems existing in the prior art, this application proposes an active microdisplay device, comprising: at least one pixel module, the pixel module including at least: a light-emitting device; a driving transistor, the drain of which is coupled to the light-emitting device, and the source of which is configured to receive a power supply voltage; and a first capacitor, the first terminal of which is configured to receive a power supply voltage, and the second terminal of which is coupled to the gate of the driving transistor; at least one voltage divider module, the voltage divider module including at least a second capacitor, the first terminal of which is configured to receive a power supply voltage or a first reference voltage, and the second terminal of which is coupled to the gate of the driving transistor; wherein the capacitance value of the second capacitor is m times the capacitance value of the first capacitor, where m is greater than 0; wherein the first capacitor and the corresponding second capacitor are configured to share the data voltage; wherein the first reference voltage is less than the power supply voltage.

[0007] Specifically, multiple pixel modules share one or more voltage divider modules.

[0008] Specifically, the pixel module further includes: a first transistor whose drain is electrically connected to the gate of the driving transistor, whose source is electrically connected to the second terminal of the second capacitor, and whose gate is configured to receive a first control signal; a second transistor whose drain is electrically connected to the drain of the first transistor, whose source is electrically connected to the second terminal of the first capacitor, and whose gate is configured to receive a second control signal; and a sixth transistor whose source is configured to receive a second reference voltage, or the difference between a power supply voltage and a data voltage, whose drain is electrically connected to the source of the second transistor, and whose gate is configured to receive a row scan signal; wherein the second reference voltage is less than the absolute value of the difference between the power supply voltage and the threshold voltage of the driving transistor.

[0009] Specifically, the voltage divider module further includes: a fourth transistor whose source is configured to receive the first reference voltage, whose drain is electrically connected to the first terminal of the second capacitor, and whose gate is configured to receive a fourth control signal; and a fifth transistor whose source is configured to receive a power supply voltage, whose drain is electrically connected to the first terminal of the second capacitor, and whose gate is configured to receive a fifth control signal.

[0010] Specifically, during the initialization phase, the first transistor, the second transistor, the fourth transistor, and the sixth transistor are turned on, the fifth transistor is turned off, and the source of the sixth transistor receives a second reference voltage; during the threshold voltage extraction phase, the first transistor, the fourth transistor, and the sixth transistor are turned on, the second transistor and the fifth transistor are turned off, and the source of the sixth transistor receives the difference between the power supply voltage and the data voltage; and during the charge transfer phase, the first transistor, the second transistor, and the fourth transistor are turned on, and the fifth transistor and the sixth transistor are turned off.

[0011] Specifically, during the voltage bootstrap phase, the first transistor, the second transistor, and the fifth transistor are turned on, while the fourth transistor and the sixth transistor are turned off.

[0012] Specifically, the pixel module further includes a third transistor, the source of which is electrically connected to the gate of the driving transistor, the drain of which is electrically connected to the drain of the driving transistor, and the gate of which is configured to receive a third control signal; wherein, during the threshold voltage extraction phase, the third transistor is turned on.

[0013] Specifically, the pixel module further includes an eighth transistor, the source of which is electrically connected to the drain of the driving transistor, the drain of which is electrically connected to the light-emitting device, and the gate of which is configured to receive an enable signal; wherein, during the light-emitting phase, the driving transistor and the eighth transistor are turned on.

[0014] Specifically, the first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the driving transistor, and the eighth transistor are all P-type transistors.

[0015] Specifically, the first capacitor and the second capacitor include MIM capacitors or MOM capacitors.

[0016] Specifically, the light-emitting device includes any one of LED, OLED, micro LED, QLED, and AMOLED.

[0017] Specifically, it also includes: a gate drive circuit coupled to each of the pixel modules and each of the voltage divider modules, configured to provide the first control signal, the second control signal, the third control signal, the fourth control signal, the fifth control signal, the row scan signal, and the enable signal; and a source drive circuit coupled to each of the pixel modules, configured to provide the second reference voltage or the difference between the power supply voltage and the data voltage to the source of the sixth transistor in each pixel module.

[0018] The active microdisplay pixel circuit proposed in this application introduces a voltage divider capacitor in addition to the basic functional modules of the pixel circuit. Based on the principle of charge conservation, the charge on the storage capacitor is transferred to the voltage divider capacitor according to the capacitance value. By expanding the voltage divider capacitor, the data voltage programming range is extended, thereby improving the grayscale display accuracy.

[0019] Meanwhile, in this application, since the voltage divider capacitor is located outside the basic functional module of the pixel circuit, it will not affect the normal operation of the light-emitting device. Therefore, one voltage divider capacitor can be shared by multiple pixel circuits, reducing the average area of ​​a single pixel circuit in the display device and thus increasing the pixel density. Therefore, the active microdisplay pixel circuit proposed in this application can expand the programming range of the data voltage by tens of times without significantly increasing the size of the pixel circuit, thereby greatly improving the grayscale display accuracy of the pixel circuit. Attached Figure Description

[0020] The preferred embodiments of this application will now be described in further detail with reference to the accompanying drawings, wherein:

[0021] Figure 1 This is a current-voltage transfer characteristic curve of a driving transistor in an active microdisplay pixel circuit according to an embodiment of this application;

[0022] Figure 2 This is a schematic diagram of an active microdisplay pixel circuit according to an embodiment of this application;

[0023] Figure 3 This is a schematic diagram of the operating timing of an active microdisplay pixel circuit according to an embodiment of this application;

[0024] Figure 4 This is a schematic diagram of the operating state circuit during the initialization stage of an active microdisplay pixel circuit according to an embodiment of this application;

[0025] Figure 5 This is a schematic diagram of the operating state circuit of the threshold voltage extraction stage of an active microdisplay pixel circuit according to an embodiment of this application;

[0026] Figure 6 This is a schematic diagram of the working state circuit of the charge transfer stage of an active microdisplay pixel circuit according to an embodiment of this application;

[0027] Figure 7 This is a schematic diagram of the operating state circuit of the voltage bootstrap stage of an active microdisplay pixel circuit according to an embodiment of this application;

[0028] Figure 8 This is a schematic diagram of the operating state of the light-emitting stage of an active microdisplay pixel circuit according to an embodiment of this application; and

[0029] Figure 9 This is a schematic diagram of an active microdisplay device circuit with a shared voltage divider capacitor according to an embodiment of this application. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0031] In the following detailed description, reference can be made to the accompanying drawings, which form part of this application and illustrate specific embodiments of the present application. In the drawings, similar reference numerals describe substantially similar components in different figures. Specific embodiments of the present application are described in sufficient detail below to enable those skilled in the art to implement the technical solutions of the present application. It should be understood that other embodiments may also be utilized, or structural, logical, or electrical changes may be made to the embodiments of the present application.

[0032] Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. The lines connecting the units in the accompanying drawings are merely for illustrative purposes, indicating that at least the units at both ends of the line are communicating with each other, and are not intended to prevent unconnected units from communicating. Furthermore, the number of lines between two units is intended to indicate at least the number of signals involved in communication between the two units or at least the number of output terminals, and is not intended to limit communication between the two units to only the signals shown in the figures.

[0033] A transistor can refer to any type of transistor, such as a field-effect transistor (FET) or a bipolar junction transistor (BJT). When a transistor is a field-effect transistor, depending on the channel material, it can be hydrogenated amorphous silicon, metal oxide, low-temperature polycrystalline silicon, organic transistors, etc. Based on whether the charge carriers are electrons or holes, they can be divided into N-type transistors and P-type transistors. The gate of a field-effect transistor is its control electrode; the first electrode can be the drain or source, and the corresponding second electrode can be the source or drain. When a transistor is a bipolar junction transistor (BJT), its control electrode is its base; the first electrode can be the collector or emitter, and the corresponding second electrode can be the emitter or collector. Transistors can be manufactured using amorphous silicon, polycrystalline silicon, oxide semiconductors, organic semiconductors, NMOS / PMOS processes, or CMOS processes.

[0034] Figure 1This is a current-voltage transfer characteristic curve of the driving transistor in an active microdisplay pixel circuit according to an embodiment of this application. To achieve the pre-designed luminous brightness, the driving current of the light-emitting device in the pixel circuit needs to be 20pA~1nA. To achieve a driving current of 20pA~1nA, the driving transistor must operate in the subthreshold region. Therefore, from the minimum grayscale current to the maximum grayscale current, the gate voltage change of the driving transistor is only 133mV.

[0035] If the pixel circuit is to achieve 8-bit grayscale display accuracy, then the resolution of the data driver in the source drive circuit of the display device must be accurate to approximately 0.52mV (133mV ÷ 2). 8 Currently, the best publicly available data drivers can only achieve a resolution of 3-5mV, which illustrates the necessity of expanding the programming range of data voltages for active microdisplay pixel circuits to improve grayscale display accuracy.

[0036] In existing active microdisplay pixel circuits, one solution is to add a voltage divider capacitor between the data voltage input terminal and the storage capacitor. This expands the data voltage programming range by increasing the storage capacitor, where the ratio of the storage capacitor to the voltage divider capacitor determines the factor by which the data voltage programming range is expanded.

[0037] However, minimizing pixel circuit size to achieve higher pixel density is crucial for near-eye displays and high-resolution imaging applications (e.g., the size of common OLED pixel circuits has been reduced to below 10µm). Therefore, the solution of adding a voltage divider capacitor between the data voltage input and the storage capacitor would obviously increase the pixel circuit area. Under the premise of an acceptable pixel circuit area, this solution typically only expands the programming range of the data voltage by about 3 to 5 times, and its effect on improving grayscale display accuracy is very limited.

[0038] In the past, active microdisplay pixel circuits only considered the structure of adding a voltage divider capacitor between the data voltage input terminal and the storage capacitor. This was because increasing the storage capacitor not only expanded the programming range of the data voltage but also solved the leakage problem of small capacitors. However, with the advancement of device fabrication technology, the leakage problem of small capacitors has been largely overcome, thus providing the conditions for finding a more effective solution to expand the programming range of the data voltage.

[0039] This application proposes an active micro-display pixel circuit, which introduces a voltage divider capacitor in addition to the basic functional modules of the pixel circuit. Based on the principle of charge conservation, the charge on the storage capacitor is transferred to the voltage divider capacitor according to the capacitance value. By expanding the voltage divider capacitor, the data voltage programming range is extended, thereby improving the grayscale display accuracy.

[0040] Meanwhile, in this application, since the voltage divider capacitor is located outside the basic functional module of the pixel circuit, it will not affect the normal operation of the light-emitting device. Therefore, one voltage divider capacitor can be shared by multiple pixel circuits, reducing the average area of ​​a single pixel circuit in the display device and thus increasing the pixel density. Therefore, the active microdisplay pixel circuit proposed in this application can expand the programming range of the data voltage by tens of times without significantly increasing the size of the pixel circuit, thereby greatly improving the grayscale display accuracy of the pixel circuit.

[0041] Furthermore, to address the display uniformity issue caused by threshold voltage drift in the driving transistor, the active microdisplay pixel circuit of this application also introduces a threshold voltage compensation mechanism. Specifically, through a diode connection structure, the driving transistor discharges until its source-gate voltage equals its threshold voltage. The threshold voltage is then extracted, stored in a voltage divider capacitor, and subsequently superimposed on the data voltage, significantly reducing the impact of threshold voltage dispersion in the driving transistor on the driving current of the light-emitting device.

[0042] Figure 2 This is a schematic diagram of an active microdisplay pixel circuit according to an embodiment of this application.

[0043] According to one embodiment, Figure 2 The active microdisplay pixel circuit 100 shown may include a pixel module 120.

[0044] According to one embodiment, pixel module 120 may include a first transistor P1, wherein the first transistor P1 may be a P-type switching transistor, and its gate is configured to receive a first control signal SW1 from a gate driving circuit.

[0045] According to one embodiment, the pixel module 120 may include a second transistor P2, wherein the second transistor P2 may be a P-type switching transistor, the drain of which is electrically connected to the drain of the first transistor P1, and the gate of which is configured to receive a second control signal SW2 from a gate driving circuit; wherein the node between the drain of the first transistor P1 and the drain of the second transistor P2 is a first node A.

[0046] According to one embodiment, pixel module 120 may include storage capacitor C. S1 Its first terminal is configured to receive power supply voltage V. DD Its second terminal is electrically connected to the source of the second transistor P2; wherein the storage capacitor C S1 The node between the second terminal of the transistor P2 and the source of the second transistor P2 is the second node B.

[0047] According to a preferred embodiment, the storage capacitor C S1Metal-insulator-metal (MIM) capacitors or metal-oxide-metal (MOM) capacitors can be used to avoid occupying additional active areas of the active microdisplay chip.

[0048] According to one embodiment, pixel module 120 may include a third transistor P3, wherein the third transistor P3 may be a P-type switching transistor, the source of which is electrically connected to the first node A, and the gate of which is configured to receive a third control signal SW3 from a gate drive circuit.

[0049] According to one embodiment, pixel module 120 may include a sixth transistor P6, wherein the sixth transistor P6 may be a P-type switching transistor, the source of which is configured to receive an input voltage from a source driving circuit, the drain of which is electrically connected to a second node B, and the gate of which is configured to receive a row scan signal Scan[n] from a gate driving circuit; where n represents the row number of the active microdisplay pixel circuit 100 in the display device.

[0050] According to one embodiment, the pixel module 120 may include a seventh transistor P7, wherein the seventh transistor P7 may be a P-type driving transistor, and its source is configured to receive a power supply voltage V. DD Its gate is electrically connected to the first node A, and its drain is electrically connected to the drain of the third transistor P3.

[0051] According to one embodiment, pixel module 120 may include an eighth transistor P8, wherein the eighth transistor P8 may be a P-type enable transistor, the source of which is electrically connected to the drain of a seventh transistor P7, and the gate of which is configured to receive an enable signal EM from a gate drive circuit.

[0052] According to one embodiment, pixel module 120 may include light-emitting device LED1 electrically connected to the drain of eighth transistor P8.

[0053] According to one embodiment, the light-emitting device LED1 can be any one of LED, OLED, Micro-LED, QLED (Quantum Dot Light-Emitting Diodes), AMOLED (Active-Matrix Organic Light-Emitting Diode), etc.

[0054] According to one embodiment, the storage capacitor C S1 The system is configured to store the input voltage from the source drive circuit during programming of the active microdisplay pixel circuit 100 to maintain the bias state of the seventh transistor P7.

[0055] According to one embodiment, the seventh transistor P7 is configured to generate a drive current I that causes the light-emitting device LED1 to emit light. LED1 .

[0056] According to one embodiment, the eighth transistor P8 is configured to control the light emission of the light-emitting device LED1, wherein the light-emitting device LED1 is turned on when the enable signal EM is high and turned off when the enable signal EM is low.

[0057] According to one embodiment, Figure 2 The active microdisplay pixel circuit 100 shown may include a voltage divider module 110.

[0058] According to one embodiment, the voltage divider module 110 may include a fourth transistor P4, wherein the fourth transistor P4 may be a P-type switching transistor, and its source is configured to receive a power supply reference voltage V. REF Its gate is configured to receive a fourth control signal SW4 from the gate drive circuit; wherein the power supply reference voltage V REF Less than the power supply voltage V DD .

[0059] According to one embodiment, the voltage divider module 110 may include a fifth transistor P5, wherein the fifth transistor P5 may be a P-type switching transistor, the source of which is configured to receive a power supply voltage V. DD Its gate is configured to receive the fifth control signal SW5 from the gate drive circuit.

[0060] According to one embodiment, the voltage divider module 110 may include a voltage divider capacitor C. C1 Its first terminal is electrically connected to the drain of the fourth transistor P4 and the drain of the fifth transistor P5, and its second terminal is electrically connected to the source of the first transistor P1; voltage divider capacitor C C1 It is configured to store the threshold voltage information of the seventh transistor P7 and extend the data voltage programming range of the active microdisplay pixel circuit 100.

[0061] According to one embodiment, the voltage divider capacitor C C1 The capacitance value is the storage capacitance C. S1 The capacitance is m times the capacitance value, where m is greater than 0.

[0062] According to a preferred embodiment, the voltage divider capacitor C C1 MIM capacitors or MOM capacitors can be used to avoid occupying additional active areas of the active microdisplay chip.

[0063] According to one embodiment, the first transistor P1, the second transistor P2, the third transistor P3, the fourth transistor P4, the fifth transistor P5, the sixth transistor P6, the seventh transistor P7, and the eighth transistor P8 are of the same type; of course, using transistors of complementary types to replace the circuit formed in the embodiments described herein also falls within the scope of protection of this application.

[0064] According to one embodiment, the active microdisplay pixel circuit proposed in this application includes five operating stages during programming; Figure 3 This is a schematic diagram illustrating the operating timing of an active microdisplay pixel circuit according to an embodiment of this application. The following will be based on... Figure 2 The timing of the active microdisplay pixel circuit 100 in its five operating stages is described below.

[0065] Figure 4 This is a schematic diagram of the operating state circuit during the initialization stage of an active microdisplay pixel circuit according to an embodiment of this application.

[0066] like Figure 3 and Figure 4 As shown, according to one embodiment, in the first stage, namely the initialization stage:

[0067] The first control signal SW1 flips from high level to low level, and the first transistor P1 in pixel module 120 is turned on.

[0068] The second control signal SW2 flips from high level to low level, and the second transistor P2 in pixel module 120 is turned on.

[0069] When the third control signal SW3 is high, the third transistor P3 in the pixel module 120 is disconnected.

[0070] When the row scan signal Scan[n] flips from high to low, the sixth transistor P6 in pixel module 120 turns on. During this stage, the input voltage received by the source of the sixth transistor P6 from the source drive circuit is the data reference voltage V. L Among them, the data reference voltage V L The value is less than the power supply voltage V DD The difference between the absolute value of the threshold voltage of the seventh transistor P7 in the pixel module, i.e.: V L <V DD -|V TH7 |;

[0071] When the fourth control signal SW4 is low, the fourth transistor P4 in the voltage divider module 110 is turned on;

[0072] When the fifth control signal SW5 is at a high level, the fifth transistor P5 in the voltage divider module 110 is disconnected;

[0073] When the enable signal EM is high, the eighth transistor P8 is turned off, no current flows through the light-emitting device LED1, and LED1 does not emit light.

[0074] At this stage, the power supply reference voltage V REF The signal is transmitted to the voltage divider capacitor C via the fourth transistor P4. C1 The first terminal; data reference voltage V L The signal is transmitted to the voltage divider capacitor C via the sixth transistor P6, the second node B, the second transistor P2, and the first transistor P1. C1 The second end.

[0075] At this stage, the power supply voltage V DD Transfer to storage capacitor C S1 The first terminal; data reference voltage V L The signal is transferred to the storage capacitor C via the sixth transistor P6. S1 The second end.

[0076] At this stage, the data reference voltage V L The signal is transmitted through the sixth transistor P6, the second node B, the second transistor P2, and the first node A to the gate of the seventh transistor P7. At this time, the gate voltage of the seventh transistor is V. L Since the source and drain voltages are equal, the seventh transistor P7 is turned on and operates in the deep linear region, with no current flowing through it.

[0077] Figure 5 This is a schematic diagram of the operating state circuit of the threshold voltage extraction stage of an active microdisplay pixel circuit according to an embodiment of this application.

[0078] like Figure 3 and Figure 5 As shown, according to one embodiment, in the second stage, namely the threshold voltage extraction stage:

[0079] The first control signal SW1 remains at a low level, and the first transistor P1 in the pixel module 120 remains on.

[0080] The second control signal SW2 flips from low level to high level, and the second transistor P2 in pixel module 120 is turned off.

[0081] The third control signal SW3 flips from high level to low level, and the third transistor P3 in pixel module 120 is turned on.

[0082] The row scan signal Scan[n] remains low, and the sixth transistor P6 in pixel module 120 remains on. During this stage, the input voltage received by the source of the sixth transistor P6 from the source drive circuit is the power supply voltage V. DD With data voltage V IN The difference, i.e., V DD-V IN ;

[0083] The fourth control signal SW4 remains low, and the fourth transistor P4 in the voltage divider module 110 remains on.

[0084] The fifth control transistor SW5 remains at a high level, and the fifth transistor P5 in the voltage divider module 110 remains disconnected;

[0085] The enable signal EM remains high, the eighth transistor P8 remains off, no current flows through the light-emitting device LED1, and LED1 remains silent.

[0086] During this stage, after the third transistor P3 is turned on, the seventh transistor P7 operates in the saturation region. Its saturation current charges the first node A through the third transistor P3, causing the voltage V of the first node A to increase. A2 V during the initialization phase L Gradually rise to V DD -|V TH7 |,V A2 Reaching V DD -|V TH7 The voltage is then kept essentially constant, causing the seventh transistor P7 to leave the saturation region and enter the subthreshold region, where its source-gate voltage V... GS7 It is equal to its threshold voltage V TH7 .

[0087] At this stage, the voltage divider capacitor C C1 The voltage at the first terminal is still the data reference voltage V. REF Simultaneously, due to the first transistor P1 being turned on, the voltage divider capacitor C... C1 The voltage at the second terminal is equal to the voltage V at the first node A at this time. A2 That is: V DD -|V TH7 |

[0088] At this time, the voltage divider capacitor C is stored in... C1 The expression for the charge Q12 on the surface is:

[0089] Q12 = C C1 capacitance value × (C) C1 Voltage at the first terminal - C C1 (Voltage at the second terminal)

[0090] = C C1 ×[V REF - (V) DD -|V TH7 |)]

[0091] = C C1 ×(V) REF -VDD +|V TH7 |) (1)

[0092] At this stage, the storage capacitor C S1 The voltage at the first terminal is still the power supply voltage V. DD At the same time, the power supply voltage V DD With data input voltage V IN The difference (i.e., V) DD -V IN The signal is transferred to the storage capacitor C via the sixth transistor P6. S1 The second end.

[0093] At this time, the storage capacitor C S1 The expression for the charge Q22 on it is:

[0094] Q22 = C S1 capacitance value × (C) S1 Voltage at the first terminal - C S1 (Voltage at the second terminal)

[0095] = C S1 ×[V DD - (V) DD -V IN )] = C S1 ×V IN (2)

[0096] Figure 6 This is a schematic diagram of the working state circuit of the charge transfer stage of an active microdisplay pixel circuit according to an embodiment of this application.

[0097] like Figure 3 and Figure 6 As shown, according to one embodiment, in the third stage, namely the charge transfer stage:

[0098] The first control signal SW1 remains at a low level, and the first transistor P1 in the pixel module 120 remains on.

[0099] The second control signal SW2 flips from high level to low level, and the second transistor P2 in pixel module 120 is turned on.

[0100] The third control signal SW3 flips from low level to high level, and the third transistor P3 in pixel module 120 is turned off.

[0101] When the row scanning signal Scan[n] flips from low to high, the sixth transistor P6 in the pixel module 120 is turned off. During this stage, the source of the sixth transistor P6 does not receive input voltage from the source drive circuit.

[0102] The fourth control signal SW4 remains low, and the fourth transistor P4 in the voltage divider module 110 remains on.

[0103] The fifth control transistor SW5 remains at a high level, and the fifth transistor P5 in the voltage divider module 110 remains disconnected;

[0104] The enable signal EM remains high, the eighth transistor P8 remains off, no current flows through the light-emitting device LED1, and LED1 remains silent.

[0105] At this stage, the voltage divider capacitor C C1 The voltage at the first terminal is still the data reference voltage V. REF Storage capacitor C S1 The voltage at the first terminal is still the power supply voltage.

[0106] At the same time, since the first transistor P1, the second transistor P2, and the fourth transistor P4 are all turned on, the voltage divider capacitor C... C1 The second terminal and storage capacitor C S1 The second terminal is electrically connected. At the instant of electrical connection, the voltage divider capacitor C... C1 The second terminal and the storage capacitor C S1 The charge at the second end is transferred rapidly, and all of it is equal to the voltage V at the first node A at this time. A3 .

[0107] At this time, the voltage divider capacitor C is stored in... C1 The expression for the charge Q13 on the surface is:

[0108] Q13 = C C1 capacitance value × (C) C1 Voltage at the first terminal - C C1 (Voltage at the second terminal)

[0109] = C C1 ×(V) REF -V A3 (3)

[0110] At this time, the storage capacitor C S1 The expression for the charge Q23 on it is:

[0111] Q23 = C S1 capacitance value × (C) S1 Voltage at the first terminal - C S1 (Voltage at the second terminal)

[0112] = C S1 ×(V) DD -V A3 (4)

[0113] According to the law of conservation of charge, the voltage divider capacitor CC1 and storage capacitor C S1 The total charge stored in the second stage is equal to the total charge stored in the two capacitors in the third stage, that is:

[0114] Q12 + Q22 = Q13 + Q23 (5)

[0115] Substituting equations (1), (2), (3), and (4) into equation (5), we get:

[0116] C C1 ×(V) REF -V DD +|V TH7 |)+C S1 ×V IN =C C1 ×(V) REF -V A3 )+C S1 ×(V) DD -V A3 (6)

[0117] From equation (6), we can obtain:

[0118] (7)

[0119] At this stage, since the first transistor P1 is turned on, the gate voltage of the seventh transistor P7 is the voltage V at the first node A at this time. A3 Since the source and drain voltages are equal, the seventh transistor P7 is turned on and operates in the deep linear region, with no current flowing through it.

[0120] Figure 7 This is a schematic diagram of the operating state of the voltage bootstrap stage of an active microdisplay pixel circuit according to an embodiment of this application.

[0121] like Figure 3 and Figure 7 As shown, according to one embodiment, in the fourth stage, namely the voltage bootstrap stage:

[0122] The first control signal SW1 remains at a low level, and the first transistor P1 in the pixel module 120 remains on.

[0123] The second control signal SW2 remains low, and the second transistor P2 in the pixel module 120 remains on.

[0124] The third control signal SW3 remains high, and the third transistor P3 in the pixel module 120 remains off.

[0125] The row scan signal Scan[n] remains high, and the sixth transistor P6 in the pixel module 120 remains off. During this stage, the source of the sixth transistor P6 does not receive input voltage from the source drive circuit.

[0126] The fourth control signal SW4 flips from low to high, and the fourth transistor P4 in the voltage divider module 110 is disconnected;

[0127] The fifth control module SW5 flips from high level to low level, and the fifth transistor P5 in the voltage divider module 110 is turned on;

[0128] The enable signal EM remains high, the eighth transistor P8 remains off, no current flows through the light-emitting device LED1, and LED1 remains silent.

[0129] After the third stage voltage divider capacitor C C1 and storage capacitor C S1 After the charge transfer occurs, the source-gate voltage V of the seventh transistor P7... SG7 If the voltage is too high, the seventh transistor P7 will be in the saturation region after entering the fifth stage (light emission stage), and the current it provides will be much greater than the current required for the normal operation of the light-emitting device LED1. Therefore, it is necessary to reduce the source-gate voltage V of the seventh transistor P7 in the fourth stage by means of voltage bootstrapping. SG7 .

[0130] During this stage, because the fourth transistor P4 is off and the fifth transistor P5 is on, the voltage divider capacitor C... C1 The voltage at the first terminal is determined by the power supply reference voltage V during the third stage. REF Rise to power supply voltage V DD The magnitude of the increase ΔV = V DD -V REF Simultaneously, both transistors P1 and P2 are turned on. Due to the coupling effect, the voltage at the first node A also rises. Calculate the magnitude of the voltage rise ΔV at the first node A according to Ohm's law. A The expression is:

[0131]

[0132] At this time, the voltage V at the first node A A4 The expression is:

[0133] V A4 = V A3 + ΔV A = (8)

[0134] At this stage, the gate voltage of the seventh transistor P7 also changes from V in the third stage (charge transfer stage). A3Rise to V A4 The seventh transistor operates in the subthreshold region, and no current flows through it;

[0135] At this time, the source-gate voltage V of the seventh transistor P7 SG7 The expression is:

[0136] V SG7 = V DD - V A4 (9)

[0137] Substituting equation (8) into equation (9), we can obtain the source-gate voltage V of the seventh transistor P7 at this time. SG7 The expression is:

[0138] V SG7 = (10)

[0139] Substituting equation (7) into equation (10), we can further obtain the source-gate voltage V of the seventh transistor P7. SG7 The expression is:

[0140] (11)

[0141] Figure 8 This is a schematic diagram of the working state of the active microdisplay pixel circuit during the light-emitting stage according to an embodiment of this application.

[0142] like Figure 3 and Figure 8 As shown, according to one embodiment, in the fifth stage, namely the light-emitting stage:

[0143] The first control signal SW1 flips from low level to high level, and the first transistor P1 in pixel module 120 is turned off.

[0144] The second control signal SW2 remains low, and the second transistor P2 in the pixel module 120 remains on.

[0145] The third control signal SW3 remains high, and the third transistor P3 in the pixel module 120 remains off.

[0146] The row scan signal Scan[n] remains high, and the sixth transistor P6 in the pixel module 120 remains off. During this stage, the source of the sixth transistor P6 does not receive input voltage from the source drive circuit.

[0147] After the first control signal SW1 flips to a high level, the fourth control signal SW4 flips from a high level to a low level, and the fourth transistor P4 in the voltage divider module 110 is turned on.

[0148] After the first control signal SW1 flips to a high level, the fifth control signal SW5 flips from a low level to a high level, and the fifth transistor P5 in the voltage divider module 110 is disconnected;

[0149] The enable signal EM flips from high to low, turning on the eighth transistor P8 and causing the seventh transistor P7 to operate in the subthreshold region, providing the drive current I to the light-emitting device LED1. LED1 LED1, the light-emitting device, enters a stable light-emitting state.

[0150] At this stage, the driving current I of the light-emitting device LED1 LED1 The expression is:

[0151] (12)

[0152] Where W / L is the width-to-length ratio of the seventh transistor P7, n is the subthreshold slope factor of the seventh transistor P7, and V SG7 V is the source-gate voltage of the seventh transistor P7. TH7 V is the threshold voltage of the seventh transistor P7. T7 I0 is the thermal voltage of the seventh transistor P7, and I7 is the threshold normalized current of the seventh transistor P7.

[0153] Substituting equation (11) into equation (12), we can further obtain the expression for the driving current of the light-emitting device LED1 as follows:

[0154] (13)

[0155] It can be observed through equation (13) that, as proposed in this application, Figure 2 In the active microdisplay pixel circuit 100 shown, the data input voltage V IN Multiply by a coefficient Then control the driving current I of the light-emitting device LED1. LED1 Instead of being determined by the data input voltage V IN Direct control of drive current I LED1 .

[0156] Due to the voltage dividing capacitor C C1 The capacitance value is the storage capacitance C. S1 The capacitance is m times the value (m is greater than 0), therefore The value must be less than 1, indicating that the active microdisplay pixel circuit proposed in this application has achieved an extension of the data voltage programming range, and is capable of extending... times.

[0157] To achieve a wider data voltage programming range and thus higher grayscale display accuracy, the value of m can be as large as possible (i.e., the voltage divider capacitor C). C1The capacitance value is much larger than the storage capacitance C. S1 (the capacitance value), so that The value of should be as small as possible, so that the value representing the voltage expansion factor of the data is minimized. Make it as big as possible.

[0158] The active microdisplay pixel circuit proposed in this application introduces a voltage divider capacitor structure outside the basic functional modules of the pixel circuit. By utilizing the charge transfer principle, the voltage divider capacitor diverts the charge stored on the storage capacitor, thereby reducing the voltage of the storage capacitor by a certain factor. This effectively expands the programming range of the data voltage and improves the accuracy of grayscale display.

[0159] Furthermore, it can be observed through equation (13) that, as proposed in this application, Figure 2 In the active microdisplay pixel circuit 100 shown, the threshold voltage V of the seventh transistor P7 (driving transistor) is... TH7 Also need to be multiplied by a coefficient Then control the driving current I of the light-emitting device LED1. LED1 Instead of the threshold voltage V of the seventh transistor P7, TH7 Direct control of drive current I LED1 ,because Since the value is less than 1, the active microdisplay pixel circuit 100 can also reduce the impact of the threshold voltage dispersion of the driving transistor on the display uniformity of the light-emitting device.

[0160] Meanwhile, the active microdisplay pixel circuit proposed in this application employs a diode connection structure (e.g., the seventh transistor P7 and the third transistor P3 in the active microdisplay pixel circuit 200), enabling the gate voltage of the driving transistor (e.g., the seventh transistor P7) to adaptively adjust with changes in the threshold voltage, thereby achieving dynamic compensation for threshold voltage drift. This mechanism ensures that the current provided by the active microdisplay pixel circuit remains consistent after long-term operation, thus improving the uniformity of the display panel at different brightness gray levels.

[0161] This application also proposes an active microdisplay device (not shown), which includes a plurality of active microdisplay pixel circuits 100 as described above, a gate driving circuit coupled to each active microdisplay pixel circuit 100, and a source driving circuit coupled to each active microdisplay pixel circuit 100.

[0162] The gate drive circuit is configured to provide each active microdisplay pixel circuit 100 with a first control signal SW1, a second control signal SW2, a third control signal SW3, a fourth control signal SW4, a fifth control signal SW5, a row scan signal Scan[n], and an enable signal EM.

[0163] The source drive circuit is configured to provide an input voltage to the source of the sixth transistor P6 in each active microdisplay pixel circuit 100.

[0164] Of course, as the value of m increases, the size of the active microdisplay pixel circuit will inevitably increase simultaneously. To expand the data voltage programming range while avoiding a significant increase in pixel circuit size and meeting the pixel density (PPI) requirements of active microdisplay devices, this application also proposes an active microdisplay device in which multiple adjacent active microdisplay pixel circuits share a single voltage-dividing capacitor. This reduces the average area of ​​a single active microdisplay pixel circuit, thereby increasing the pixel density (PPI) of the active microdisplay device. This structure improves the integration of the active microdisplay pixel circuit, making the pixel arrangement more compact and providing technical support for high-resolution displays.

[0165] The active microdisplay device proposed in this application can adopt a shared voltage divider capacitor structure based on the technical means of introducing a voltage divider capacitor outside the basic functional modules of the pixel circuit and expanding the data voltage programming range by increasing the capacitance value of the voltage divider capacitor. In contrast, existing technologies expand the data voltage programming range by adding a voltage divider capacitor between the data voltage input terminal and the storage capacitor and increasing the storage capacitor size. Even if the increase in storage capacitor size leads to an unacceptable increase in the area of ​​the active microdisplay pixel circuit in practical applications, existing technologies cannot use a shared storage capacitor structure to reduce the area of ​​the pixel circuit. This is because the function of the storage capacitor is to maintain the bias state of the driving transistor, which is directly related to the light emission of the light-emitting device in each pixel circuit. Therefore, each pixel circuit must have its own dedicated storage capacitor, which cannot be shared with other pixel circuits.

[0166] Therefore, the active microdisplay device proposed in this application can expand the programming range of data voltage by tens of times without significantly increasing the size of the pixel circuit, while the prior art cannot achieve the same technical effect.

[0167] Figure 9 This is a schematic diagram of an active microdisplay device circuit with a shared voltage divider capacitor according to an embodiment of this application.

[0168] According to one embodiment, Figure 9 The active microdisplay device 900 shown may include a voltage divider module 910.

[0169] According to one embodiment, the voltage divider module 910 may include a fourth transistor P94, wherein the fourth transistor P94 may be a P-type switching transistor, and its source is configured to receive a power supply reference voltage V. REF Its gate is configured to receive a fourth control signal SW4 from the gate drive circuit; wherein the power supply reference voltage VREF Less than the power supply voltage V DD .

[0170] According to one embodiment, the voltage divider module 910 may include a fifth transistor P95, wherein the fifth transistor P95 may be a P-type switching transistor, and its source is configured to receive the power supply voltage V. DD Its gate is configured to receive the fifth control signal SW5 from the gate drive circuit.

[0171] According to one embodiment, the voltage divider module 910 may include a voltage divider capacitor C. C9 Its first terminal is electrically connected to the drain of the fourth transistor P4 and the drain of the fifth transistor P5.

[0172] According to a preferred embodiment, the voltage divider capacitor C C9 MIM capacitors or MOM capacitors can be used to avoid occupying additional active areas of the active microdisplay chip.

[0173] According to one embodiment, Figure 9 The active microdisplay device 900 shown may include pixel modules with k active display pixel circuits, such as pixel modules 921 to 92k. The structure and circuit connection of the pixel module are described below using pixel module 921 as an example.

[0174] According to one embodiment, pixel module 921 may include a first transistor P911, wherein the first transistor P911 may be a P-type switching transistor, its gate being configured to receive a first control signal SW1 from a gate driving circuit, and its source being configured to be electrically connected to the voltage dividing capacitor C in voltage dividing module 910. C9 The second end.

[0175] According to one embodiment, pixel module 921 may include a second transistor P921, wherein the second transistor P921 may be a P-type switching transistor, the drain of which is electrically connected to the drain of the first transistor P911, and the gate of which is configured to receive a second control signal SW2 from a gate driving circuit; wherein the node between the drain of the first transistor P911 and the drain of the second transistor P921 is a first node A.

[0176] According to one embodiment, pixel module 921 may include storage capacitor C. S91 Its first terminal is configured to receive power supply voltage V. DD Its second terminal is electrically connected to the source of the second transistor P921; wherein the storage capacitor C S91 The node between the second terminal and the source of the second transistor P921 is the second node B.

[0177] According to a preferred embodiment, the storage capacitor C S1MIM capacitors or MOM capacitors can be used to avoid occupying additional active areas of the active microdisplay chip.

[0178] According to one embodiment, pixel module 921 may include a third transistor P931, wherein the third transistor P931 may be a P-type switching transistor, the source of which is electrically connected to the first node A, and the gate of which is configured to receive a third control signal SW3 from a gate drive circuit.

[0179] According to one embodiment, pixel module 921 may include a sixth transistor P961, wherein the sixth transistor P961 may be a P-type switching transistor, the source of which is configured to receive an input voltage from a source driving circuit, the drain of which is electrically connected to a second node B, and the gate of which is configured to receive a row scan signal Scan[n] from a gate driving circuit; where n represents the row number of pixel module 921 in the display device.

[0180] According to one embodiment, pixel module 921 may include a seventh transistor P971, wherein the seventh transistor P971 may be a P-type driving transistor, and its source is configured to receive a power supply voltage V. DD Its gate is electrically connected to the first node A, and its drain is electrically connected to the drain of the third transistor P931.

[0181] According to one embodiment, pixel module 921 may include an eighth transistor P981, wherein the eighth transistor P981 may be a P-type enable transistor, the source of which is electrically connected to the drain of a seventh transistor P971, and the gate of which is configured to receive an enable signal EM from a gate drive circuit.

[0182] According to one embodiment, pixel module 921 may include light-emitting device LED 91 electrically connected to the drain of eighth transistor P981.

[0183] According to one embodiment, the light-emitting device LED91 can be any of LED, OLED, micro LED, QLED, AMOLED, etc.

[0184] According to one embodiment, the seventh transistor P971 is configured to generate a drive current that causes the light-emitting device LED91 to emit light.

[0185] According to one embodiment, the eighth transistor P981 is configured to control the light emission of the light-emitting device LED91, wherein the light-emitting device LED91 is turned on when the enable signal EM is high and turned off when the enable signal EM is low.

[0186] According to one embodiment, the voltage dividing capacitor C in the voltage divider module 910... C9 The capacitance value is the storage capacitor C in pixel module 921. S91The capacitance is m times the capacitance value, where m is greater than 0.

[0187] According to one embodiment, the storage capacitor C S91 The input voltage from the source drive circuit is configured to be stored during programming of the active microdisplay pixel circuit composed of pixel module 921 and voltage divider module 910 in order to maintain the bias state of the seventh transistor P971.

[0188] According to one embodiment, the voltage divider capacitor C C9 It is configured to store the threshold voltage information of the seventh transistor P971 and extend the data voltage programming range of the active microdisplay pixel circuit composed of pixel module 921 and voltage divider module 910.

[0189] According to one embodiment, the first transistor P911, the second transistor P921, the third transistor P931, the fourth transistor P94, the fifth transistor P95, the sixth transistor P961, the seventh transistor P971, and the eighth transistor P981 are of the same type; of course, using transistors of complementary types to replace the circuit formed in the embodiments described herein also falls within the scope of protection of this application.

[0190] According to one embodiment, Figure 9 The working principle of the active microdisplay pixel circuit composed of pixel module 921 and voltage divider module 910 in the active microdisplay device shown is as follows: Figure 2 The working principle of the active microdisplay pixel circuit 100 shown is similar, and will not be described again here.

[0191] According to one embodiment, Figure 9 The active microdisplay device shown also includes k-1 pixel modules (including pixel module 921) in addition to pixel module 921. Figure 9 The pixel modules 92k shown in the figure have the same internal circuit structure, circuit connections, and connection relationship between each pixel module and the voltage divider module 910 as pixel module 921, and will not be described again here.

[0192] According to one embodiment, Figure 9 The other k-1 pixel modules (including) in the active microdisplay device shown Figure 9 The working principle of the active microdisplay pixel circuit composed of pixel module 92k and voltage divider module 910 shown in the figure is as follows: Figure 2 The working principle of the active microdisplay pixel circuit 100 shown is similar, and will not be described again here.

[0193] According to one embodiment, the active microdisplay device 900 further includes a gate drive circuit coupled to pixel modules 921 to 92k and voltage divider module 910, configured to provide each pixel module with a first control signal SW1, a second control signal SW2, a third control signal SW3, a fourth control signal SW4, a fifth control signal SW5, a row scan signal Scan[n], and an enable signal EM.

[0194] According to one embodiment, the active microdisplay device 900 further includes a source drive circuit coupled to pixel modules 921 to 92k, configured to provide an input voltage to the source of a sixth transistor P6 in each pixel module.

[0195] It should be noted that, Figure 9 The diagram shows a schematic of an active microdisplay device where k pixel modules share a single voltage divider module. However, in the actual design of active microdisplay integrated circuits, different circuit / layout arrangements may be used depending on the specific needs. For example, an active microdisplay device may include multiple voltage divider modules, or it may include multiple arrays of k pixel modules sharing a single voltage divider module (i.e., multiple...). Figure 9 The array of active microdisplay devices 900 shown, or the different arrangements of k pixel modules sharing a single voltage divider module, are all within the scope of protection of this application.

[0196] According to one embodiment, if both m and k are 20, that is, in an active microdisplay device, every 20 pixel modules share a voltage divider module, and the capacitance value of the voltage divider capacitor in the voltage divider module is 20 times the capacitance value of the storage capacitor in these 20 pixel modules, and OLED is selected as the light-emitting device, and transistors with a minimum channel length of 270nm implemented by 40nm CMOS process are selected, the active microdisplay device can ultimately expand the programming range of data voltage by 21 times, the PPI of the active microdisplay device can reach 7134, and the average size of a single active microdisplay pixel circuit composed of one pixel module and the voltage divider module shared with it can be reduced to 1.19μm × 3.56μm, while achieving a current non-uniformity of less than 6% across the entire grayscale range, fully demonstrating the excellent technical effects that the active microdisplay pixel circuit and display device of this application can achieve.

[0197] The above embodiments are for illustrative purposes only and are not intended to limit the scope of this application. Those skilled in the art can make various changes and modifications without departing from the scope of this application. Therefore, all equivalent technical solutions should also fall within the scope of this application.

Claims

1. An active microdisplay device, comprising: At least one pixel module, the pixel module comprising at least: Light-emitting devices; A driving transistor, the drain of which is coupled to the light-emitting device, and the source of which is configured to receive a power supply voltage; The first capacitor has its first terminal configured to receive the power supply voltage; A first transistor, the drain of which is electrically connected to the gate of the driving transistor, the gate of which is configured to receive a first control signal; A second transistor, whose drain is electrically connected to the drain of the first transistor, whose source is electrically connected to the second terminal of the first capacitor, and whose gate is configured to receive a second control signal; and The sixth transistor has its source configured to receive a second reference voltage, or the difference between a power supply voltage and a data voltage, its drain electrically connected to the source of the second transistor, and its gate configured to receive a row scan signal; wherein the second reference voltage is less than the absolute value of the difference between the power supply voltage and the threshold voltage of the driving transistor. At least one voltage divider module, the voltage divider module including at least a second capacitor, the first terminal of the second capacitor being configured to receive a power supply voltage or a first reference voltage, and the second terminal of the second capacitor being coupled to the source of the first transistor; Wherein, the capacitance value of the second capacitor is m times the capacitance value of the first capacitor, where m is greater than 0; The first capacitor and the second capacitor are configured to share the data voltage by transferring the charge on the first capacitor to the second capacitor in proportion to the capacitance value. Wherein, the first reference voltage is less than the power supply voltage.

2. The active microdisplay device according to claim 1, wherein, Multiple pixel modules share one or more voltage divider modules; The first capacitor and the corresponding second capacitor are configured to share the data voltage by transferring the charge on the first capacitor to the corresponding second capacitor in proportion to the capacitance value.

3. The active microdisplay device according to claim 1 or 2, wherein the voltage divider module further comprises: The fourth transistor has its source configured to receive the first reference voltage, its drain electrically connected to the first terminal of the second capacitor, and its gate configured to receive a fourth control signal. as well as The fifth transistor has its source configured to receive the power supply voltage, its drain electrically connected to the first terminal of the second capacitor, and its gate configured to receive the fifth control signal.

4. The active microdisplay device according to claim 3, wherein, During the initialization phase, the first transistor, the second transistor, the fourth transistor, and the sixth transistor are turned on, the fifth transistor is turned off, and the source of the sixth transistor receives a second reference voltage. In the threshold voltage extraction stage, the first transistor, the fourth transistor, and the sixth transistor are turned on, the second transistor and the fifth transistor are turned off, and the source of the sixth transistor receives the difference between the power supply voltage and the data voltage. During the charge transfer phase, the first transistor, the second transistor, and the fourth transistor are turned on, while the fifth transistor and the sixth transistor are turned off.

5. The active microdisplay device according to claim 3, wherein, During the voltage bootstrap phase, the first transistor, the second transistor, and the fifth transistor are turned on, while the fourth transistor and the sixth transistor are turned off.

6. The active microdisplay device according to claim 4, wherein, The pixel module further includes a third transistor, the source of which is electrically connected to the gate of the driving transistor, the drain of which is electrically connected to the drain of the driving transistor, and the gate of which is configured to receive a third control signal. During the threshold voltage extraction stage, the third transistor is turned on.

7. The active microdisplay device according to claim 6, wherein, The pixel module further includes an eighth transistor, the source of which is electrically connected to the drain of the driving transistor, the drain of which is electrically connected to the light-emitting device, and the gate of which is configured to receive an enable signal. During the light-emitting phase, the driving transistor and the eighth transistor are turned on.

8. The active microdisplay device according to claim 7, wherein, The first transistor, the second transistor, the third transistor, the fourth transistor, the fifth transistor, the sixth transistor, the driving transistor, and the eighth transistor are all P-type transistors.

9. The active microdisplay device according to claim 1, wherein, The first capacitor and the second capacitor include MIM capacitors or MOM capacitors.

10. The active microdisplay device according to claim 1, wherein, The light-emitting device includes any one of LED, OLED, micro LED, QLED, and AMOLED.

11. The active microdisplay device according to claim 7, further comprising: The gate drive circuit coupled to each of the pixel modules and each of the voltage divider modules is configured to provide the first control signal, the second control signal, the third control signal, the fourth control signal, the fifth control signal, the row scan signal, and the enable signal; as well as The source drive circuit coupled to each of the pixel modules is configured to provide the second reference voltage or the difference between the power supply voltage and the data voltage to the source of the sixth transistor in each pixel module.

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