Integrated circuit micro bump stress failure control structure and method

Abstract

The invention belongs to the technical field of integrated circuits, and particularly relates to an integrated circuit micro bump stress failure control structure and method. According to the technical scheme, the integrated circuit micro-bump stress failure control structure comprises a silicon-based SIP tube shell, a transition substrate and a PCB substrate which are sequentially arranged, micro-bumps are connected between the silicon-based SIP tube shell and the transition substrate and between the transition substrate and the PCB substrate, and silicone rubber is used between the transition substrate and the PCB substrate for dispensing reinforcement. The invention provides an integrated circuit micro bump stress failure control structure and method.

Description

Technical Field

[0001] The invention belongs to the technical field of integrated circuits, and in particular relates to a stress failure control structure and method for integrated circuit micro-bumps. Background Art

[0002] In pursuit of ultimate performance, the new generation of electronic equipment is developing towards vertical high integration and thinness in terms of overall product form. The development of traditional brick-type phased array antennas is limited due to the two-dimensional density. The antenna size begins to integrate in the Z direction and develops towards three-dimensional heterogeneous integrated SIP. Multi-layer silicon-based SIP packaging technology has significant advantages in three-dimensional stacking structure and high-integration design, and has received great attention at home and abroad. In the PCB substrate packaging structure, the substrate forms a high-density interconnection with multiple multi-layer silicon-based SIP shells placed side by side. The small-sized, narrow-pitch silicon-based SIP shells have a large difference in thermal expansion coefficient with the organic substrate, which causes the PCB substrate to expand and contract more during heating and cooling. After multiple thermal cycles, the micro-bumps between the silicon-based SIP shell and the substrate may have cold solder joints or cracks.

[0003] To address this problem, the most commonly used solution is the bottom filling process technology, which fills the chip and substrate with glue at the bottom to alleviate the thermal stress caused by the thermal mismatch between the chip, micro-bumps, and substrate, and reduce the risk of cracking and failure of micro-bumps due to thermal stress. However, there are still several problems in the small-size, narrow-pitch silicon-based SIP tube shell three-dimensional integrated packaging, which makes it difficult for the bottom filling glue to control the stress failure of micro-bumps. Specifically, the multi-layer silicon-based SIP tube shell has a high integration density and a small spacing, which increases the difficulty of filling glue and the quality of filling glue cannot be guaranteed. Second, the number of micro-bumps is large and the pitch is small, which seriously affects the fluidity of the filling glue, making the bottom filling glue irregular in shape and increasing the bottom filling glue process time. Third, the filling glue changes the electrical performance transmission medium, which may affect the signal transmission. Fourth, the bonding force of the bottom filling glue is large after curing, which greatly increases the difficulty of product rework. In addition, there are also ways to reduce micro-bump stress concentration by designing a reasonable solder joint structure and layout, selecting appropriate soldering materials, and optimizing reflow process parameters, but these methods have great limitations on the use environment and cannot be a permanent solution. Summary of the invention

[0004] In order to solve the above problems existing in the prior art, the object of the present invention is to provide an integrated circuit micro-bump stress failure control structure and method.

[0005] The technical solution adopted by the present invention is:

[0006] An integrated circuit micro-bump stress failure control structure comprises a silicon-based SIP tube shell, a transition substrate and a PCB substrate which are arranged in sequence. Micro-bumps are connected between the silicon-based SIP tube shell and the transition substrate, and between the transition substrate and the PCB substrate. Silicone rubber is used for glue point reinforcement between the transition substrate and the PCB substrate.

[0007] The present invention adopts an aluminum oxide or aluminum nitride ceramic substrate with a moderate thermal expansion coefficient as a transition substrate, connects to a PCB substrate below by ball planting, then reinforces the four corners of the transition substrate by epoxy adhesive, and finally connects to a multi-layer silicon-based SIP tube shell above by ball planting, thereby completing vertical interconnection between layers and realizing electrical interconnection of the packaging structure.

[0008] The present invention uses a layer of transition substrate to connect the packaged component and the substrate, and the glue dispensing position becomes between the thinner transition substrate and the PCB substrate, which reduces the difficulty of glue filling and ensures the quality of glue filling; the fluidity of the filling glue is ensured by sufficient space, so that the shape of the bottom filling glue is regular, and the bottom filling glue process time is shortened.

[0009] The present invention avoids changing the electrical performance transmission medium due to the filling of glue by dispensing glue between the transition substrate and the PCB substrate, and does not affect signal transmission.

[0010] The present invention can control the formation of micro-bump stress failure defects through flexible selection of the transition substrate.

[0011] The present invention can not only achieve the control of micro-bump stress failure defects, but also avoid the limitations caused by the selection of packaging components and substrate materials, the layout of ball solder joints, and the reflow soldering process, thereby improving the wide applicability of integrated circuit substrate packaging technology.

[0012] The present invention is particularly suitable for silicon-based three-dimensional heterogeneous integrated millimeter wave phased array antennas in new-generation electronic information equipment. It can significantly improve the reliability of multi-layer silicon-based SIP tube shells after being implanted on a PCB substrate, and meet the requirements of high density, small size, and narrow spacing.

[0013] As a preferred embodiment of the present invention, SAC305 solder paste is printed on the pads on the lower surfaces of the silicon-based SIP tube shell and the transition substrate, the coating area of ​​the solder paste on the pads is not less than 85% of the pad area, the coating height is 30% of the ball diameter of the micro-bumps, and the micro-bumps are implanted on the solder paste.

[0014] As a preferred solution of the present invention, the coplanarity of the micro-bumps on the silicon-based SIP tube shell and the transition substrate is within 20% of the ball diameter of the micro-bumps, and the ball planting accuracy of the micro-bumps is ±10μm.

[0015] As a preferred solution of the present invention, the transition substrate with micro-bumps implanted is welded to the PCB substrate, and the silicon-based SIP tube shell with micro-bumps implanted is welded to the transition substrate.

[0016] As a preferred embodiment of the present invention, the material of the micro-bumps is Pb95Sn5.

[0017] As a preferred solution of the present invention, the length of a single side of the glue spot between the transition substrate and the PCB substrate is greater than 1 / 4 of the length of the corresponding glue spot side on the transition substrate.

[0018] As a preferred embodiment of the present invention, the climbing top of the glue spot between the transition substrate and the PCB substrate is higher than 90% of the height of the transition substrate, the outer edge width of the glue spot is 1 to 1.5 times the climbing height, and the outer edge width of the glue spot does not exceed the distance between adjacent silicon-based SIP tube shells.

[0019] As a preferred embodiment of the present invention, the material of the transition substrate is an aluminum oxide or aluminum nitride ceramic substrate, the thickness of the transition substrate is 0.5 to 1 mm, the warpage of the transition substrate is less than 3‰, and the thermal expansion coefficient of the transition substrate is 4 to 8.2 ppm·K -1 .

[0020] As a preferred solution of the present invention, silicone rubber is used for glue point reinforcement between the four corners of the transition substrate and the PCB substrate. The glue point of the present invention is between the four corners of the transition substrate and the PCB substrate, avoiding the problem of greatly increased difficulty in product rework due to the large adhesive force after the bottom filler is cured.

[0021] A method for controlling stress failure of integrated circuit micro-bumps comprises the following steps:

[0022] S1: Print SAC305 solder paste on the pads on the lower surface of the silicon-based SIP tube shell and the transition substrate, plant Pb95Sn5 balls on the solder paste as micro-bumps, and then place the substrate in a reflow oven to complete curing;

[0023] S2: Solder the transition substrate with implanted balls to the PCB substrate, and then use silicone rubber for glue reinforcement. The length of the single side of the glue is greater than 1 / 4 of the length of the corresponding glue side on the transition substrate. The climbing top of the glue is higher than 90% of the height of the transition substrate. The width of the outer side of the glue is 1 to 1.5 times the climbing height but not more than the distance between adjacent silicon-based SIP tube shells; room temperature curing for 72 hours;

[0024] S3: Welding the silicon-based SIP tube shell with implanted balls to the transition substrate.

[0025] The beneficial effects of the present invention are:

[0026] 1. The present invention can control the formation of micro-bump stress failure defects through flexible selection of the transition substrate.

[0027] 2. The present invention can not only achieve the control of micro-bump stress failure defects, but also avoid the limitations caused by the selection of packaging components and substrate materials, ball implantation solder joint layout, and reflow soldering process, thereby improving the wide applicability of integrated circuit substrate packaging technology.

[0028] 3. The present invention is particularly suitable for silicon-based three-dimensional heterogeneous integrated millimeter wave phased array antennas in new generation electronic information equipment. It can significantly improve the reliability of multi-layer silicon-based SIP tube shells after implanting balls on PCB substrates, and meet the requirements of high density, small size and narrow spacing. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 Schematic diagram of three-dimensional heterogeneous integrated packaging of a silicon-based SIP tube shell and a PCB substrate of electronic information equipment in an embodiment of the present invention;

[0030] Figure 2 It is a schematic diagram of the three-dimensional structure of the transition substrate reinforced by using silicone rubber for dispensing;

[0031] Figure 3 It is a schematic diagram of the two-dimensional structure of the transition substrate reinforced by dispensing silicone rubber.

[0032] In the figure: 1-silicon-based SIP tube shell; 2-transition substrate; 3-PCB substrate; 4-micro-bump; 5-silicon rubber. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0034] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in the field without creative work are within the scope of protection of the present invention. It should be noted that the embodiments of the present invention and the features in the embodiments can be combined with each other without conflict.

[0035] like Figure 1 to Figure 3As shown, the integrated circuit micro-bump stress failure control structure of this embodiment includes a silicon-based SIP tube shell 1, a transition substrate 2 and a PCB substrate 3 arranged in sequence, micro-bumps 4 are connected between the silicon-based SIP tube shell 1 and the transition substrate 2, and between the transition substrate 2 and the PCB substrate 3, and silicone rubber 5 is used for glue reinforcement between the transition substrate 2 and the PCB substrate 3. Among them, the multi-layer silicon-based SIP tube shell 1 integrates a multifunctional chip, and the layers can be interconnected, the transition substrate 2 is an aluminum oxide or aluminum nitride ceramic substrate, and the PCB substrate 3 is a multi-layer laminated ceramic substrate.

[0036] Specifically, SAC305 solder paste is printed on the pads on the lower surfaces of the silicon-based SIP tube shell 1 and the transition substrate 2, the coating area of ​​the solder paste on the pad is not less than 85% of the pad area, the coating height is 30% of the ball diameter of the micro bump 4, and the micro bump 4 is implanted on the solder paste.

[0037] The coplanarity of the micro bumps 4 on the silicon-based SIP tube shell 1 and the transition substrate 2 is within 20% of the ball diameter of the micro bumps 4, and the ball planting accuracy of the micro bumps 4 is ±10 μm.

[0038] The transition substrate 2 with the micro-bumps 4 implanted thereon is welded to the PCB substrate 3 , and the silicon-based SIP tube shell 1 with the micro-bumps 4 implanted thereon is welded to the transition substrate 2 .

[0039] The material of the micro-bump 4 is Pb95Sn5.

[0040] like Figure 2 and Figure 3 As shown, a is the width of the outer side of the silicone rubber 5, b is the climbing height of the silicone rubber 5, c is the length of the transition substrate 2, and d is the width of the transition substrate 2. The length of the single side of the glue spot between the transition substrate 2 and the PCB substrate 3 is greater than 1 / 4 of the length of the corresponding glue spot on the transition substrate 2. The climbing top of the glue spot between the transition substrate 2 and the PCB substrate 3 is higher than 90% of the height of the transition substrate 2, the outer side width of the glue spot is 1 to 1.5 times the climbing height, and the outer side width of the glue spot does not exceed the distance between adjacent silicon-based SIP tube shells 1.

[0041] The material of the transition substrate 2 is an aluminum oxide or aluminum nitride ceramic substrate. The thickness of the transition substrate 2 is 0.5 to 1 mm. The warpage of the transition substrate 2 is less than 3‰. The thermal expansion coefficient of the transition substrate 2 is 4 to 8.2 ppm·K. -1 .

[0042] Silicone rubber 5 is used for glue spot reinforcement between the four corners of the transition substrate 2 and the PCB substrate 3. The glue spot of the present invention is between the four corners of the transition substrate 2 and the PCB substrate 3, avoiding the problem of greatly increased difficulty in product rework due to the strong bonding force after the bottom filler is cured.

[0043] The present invention aims to solve the problem of stress cracking of the middle micro-bumps 4 caused by the difference in thermal expansion coefficients during the service of the multi-layer silicon-based SIP tube shell 1 and the PCB substrate 3. In this method, a layer of transition substrate 2 is used, and its upper and lower layers are the silicon-based SIP tube shell 1 and the PCB substrate 3 respectively. The lower surface of the silicon-based SIP tube shell 1, the upper and lower surfaces of the transition substrate 2 and the upper surface of the PCB substrate 3 are uniformly distributed with high-density micro-bump 4 pads. The balls are planted on the surface pads through reflow soldering, and vertical interconnection channels between layers are formed after welding to realize the electrical interconnection of the packaging structure. The thermal expansion coefficient of the commonly used PCB substrate 3 is 10-18ppm·K -1 The thermal expansion coefficient of the silicon-based SIP tube shell 1 is 2.6ppm·K -1 The transition substrate 2 is an aluminum oxide or aluminum nitride ceramic substrate with a thickness of 0.5 to 1 mm, a warpage of less than 3‰, and a thermal expansion coefficient of 4 to 8.2 ppm·K -1 , between the silicon-based SIP tube shell 1 and the PCB substrate 3. The multi-layer silicon-based SIP tube shell 1 has a high density and a small spacing, and the distance between each silicon-based SIP tube shell 1 is 1 to 2 mm.

[0044] The integrated circuit micro-bump stress failure control method of the present embodiment comprises the following steps:

[0045] S1: Print SAC305 solder paste on the pads on the lower surface of the silicon-based SIP tube shell 1 and the transition substrate 2. The coating area of ​​the solder paste on the pad should be no less than 85% of the pad area, and the coating height is 30% of the ball diameter. Plant Pb95Sn5 balls as micro bumps 4, and then place the substrate in a reflow oven to complete curing. The coplanarity is required to be within 20% of the ball diameter, and the ball planting accuracy is ±10μm.

[0046] S2: Use SAC305 solder to solder the transition substrate 2 with implanted balls to the PCB substrate 3, and then use silicone rubber 5 for glue reinforcement. Its thermal expansion coefficient should be close to that of the solder ball. The distance between the transition substrate 2 and the PCB substrate 3 is less than 2mm. The glue should be evenly dispensed and appropriate. The diameter of the glue tip should be more than 0.8mm. The length of the single side of the glue should be greater than 1 / 4 of the length of the device glue side. The climbing height should be higher than 90% of the height of the transition substrate 2. The width of the epitaxial edge is 1 to 1.5 times the climbing height, but must not exceed the distance between adjacent silicon-based SIP tube shells 1; cure at room temperature for 72 hours.

[0047] S3: welding the silicon-based SIP tube shell 1 after ball implantation to the transition substrate 2.

[0048] The present invention adopts an aluminum oxide or aluminum nitride ceramic substrate with a moderate thermal expansion coefficient as a transition substrate 2, connects to a PCB substrate 3 below by ball planting, then reinforces the four corners of the transition substrate 2 by epoxy adhesive, and finally connects to a multi-layer silicon-based SIP tube shell 1 above by ball planting, thereby completing vertical interconnection between layers and realizing electrical interconnection of the packaging structure.

[0049] The present invention uses a layer of transition substrate 2 to connect the packaged components and the substrate, and the glue dispensing position becomes between the thinner transition substrate 2 and the PCB substrate 3, which reduces the difficulty of filling glue and ensures the quality of filling glue; the fluidity of the filling glue is ensured by sufficient space, so that the shape of the bottom filling glue is regular, and the bottom filling glue process time is shortened.

[0050] The present invention dispenses glue between the transition substrate 2 and the PCB substrate 3, thereby avoiding the filling of glue to change the electrical performance transmission medium and not affecting signal transmission.

[0051] The present invention can control the formation of stress failure defects of the micro-bumps 4 through flexible selection of the transition substrate 2.

[0052] The present invention can not only achieve the control of stress failure defects of micro-bumps 4, but also avoid the limitations caused by the selection of packaging components and substrate materials, the layout of ball solder joints, and the reflow soldering process, thereby improving the wide applicability of integrated circuit substrate packaging technology.

[0053] The present invention is particularly suitable for silicon-based three-dimensional heterogeneous integrated millimeter wave phased array antennas in new generation electronic information equipment, which can significantly improve the reliability of the multi-layer silicon-based SIP tube shell 1 after being implanted on the PCB substrate 3, and meet the requirements of high density, small size and narrow spacing.

[0054] The present invention is not limited to the above-mentioned optional implementation modes. Anyone can derive other various forms of products under the inspiration of the present invention. However, no matter what changes are made in the shape or structure, all technical solutions that fall within the scope defined by the claims of the present invention fall within the protection scope of the present invention.

Claims

1. An integrated circuit micro-bump stress failure control structure, characterized in that: The invention comprises a silicon-based SIP tube shell (1), a transition substrate (2) and a PCB substrate (3) which are arranged in sequence, micro-bumps (4) are connected between the silicon-based SIP tube shell (1) and the transition substrate (2), and between the transition substrate (2) and the PCB substrate (3), and silicone rubber (5) is used to perform glue point reinforcement between the transition substrate (2) and the PCB substrate (3).

2. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: SAC305 solder paste is printed on the pads on the lower surfaces of the silicon-based SIP tube shell (1) and the transition substrate (2); the coating area of ​​the solder paste on the pad is not less than 85% of the pad area; the coating height is 30% of the ball diameter of the micro-bump (4); and the micro-bump (4) is implanted on the solder paste.

3. The integrated circuit micro-bump stress failure control structure according to claim 2, characterized in that: The coplanarity of a plurality of micro-bumps (4) on the silicon-based SIP tube shell (1) and the transition substrate (2) is within 20% of the ball diameter of the micro-bumps (4), and the ball planting accuracy of the micro-bumps (4) is ±10 μm.

4. The integrated circuit micro-bump stress failure control structure according to claim 2, characterized in that: The transition substrate (2) on which the micro-bumps (4) are implanted is welded to the PCB substrate (3), and the silicon-based SIP tube shell (1) on which the micro-bumps (4) are implanted is welded to the transition substrate (2).

5. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: The material of the micro-bumps (4) is Pb95Sn5.

6. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: The length of a single glue spot side between the transition substrate (2) and the PCB substrate (3) is greater than 1 / 4 of the length of a corresponding glue spot side on the transition substrate (2).

7. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: The climbing top of the glue point between the transition substrate (2) and the PCB substrate (3) is higher than 90% of the height of the transition substrate (2), the outer edge width of the glue point is 1 to 1.5 times the climbing height, and the outer edge width of the glue point does not exceed the distance between adjacent silicon-based SIP tube shells (1).

8. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: The material of the transition substrate (2) is an aluminum oxide or aluminum nitride ceramic substrate, the thickness of the transition substrate (2) is 0.5 to 1 mm, the warpage of the transition substrate (2) is less than 3‰, and the thermal expansion coefficient of the transition substrate (2) is 4 to 8.2 ppm·K -1 .

9. The integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: Silicone rubber (5) is used to perform glue spot reinforcement between the four corners of the transition substrate (2) and the PCB substrate (3).

10. A method for controlling stress failure of integrated circuit micro-bumps, using the integrated circuit micro-bump stress failure control structure according to claim 1, characterized in that: The following steps are involved: S1: Printing SAC305 solder paste on the pads on the lower surfaces of the silicon-based SIP tube shell (1) and the transition substrate (2), implanting Pb95Sn5 balls on the solder paste as micro-bumps (4), and then placing the substrate in a reflow oven to complete curing; S2: Solder the transition substrate (2) with the ball implanted to the PCB substrate (3), and then use silicone rubber (5) for glue reinforcement, the length of the single side of the glue is greater than 1 / 4 of the length of the corresponding glue side on the transition substrate (2), the top of the glue climbing is higher than 90% of the height of the transition substrate (2), and the width of the outer side of the glue is 1 to 1.5 times the climbing height but does not exceed the distance between adjacent silicon-based SIP tube shells (1); room temperature curing for 72 hours; S3: welding the silicon-based SIP tube shell (1) with the ball implanted to the transition substrate (2).

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