Nonlinear equalization circuit

Abstract

The application provides a nonlinear equalization circuit, which can be applied to the field of high-speed optical communication technology, and the circuit comprises N basic units, wherein N is a positive integer, the basic unit comprises an adjustable delay circuit, a pulse current generation circuit and an equalization strength adjustable circuit, the adjustable delay circuit comprises a first adjustable delay circuit and a second adjustable delay circuit, the first adjustable delay circuit and the second adjustable delay circuit are used for delaying input differential data to generate a first delay signal and a second delay signal, the equalization strength adjustable circuit is used for adjusting the amplitude of the pulse current generated by the pulse current generation circuit to adjust the equalization strength, and the pulse current generation circuit is used for logically combining the first delay signal and the second delay signal to generate a pulse current for compensating the dynamic nonlinearity of a laser. Various requirements for nonlinear compensation are supported, and meanwhile, the main signal is not weakened.

Description

Technical Field

[0001] This invention relates to the field of high-speed optical communication technology, and in particular to a nonlinear equalization circuit. Background Technology

[0002] With the rapid development of technologies such as the Internet, cloud computing, and big data, data traffic has shown an exponential growth trend. However, traditional electrical interconnection methods are increasingly unable to meet the demands of high-density, high-speed data transmission due to increasing losses. Against this backdrop, optical interconnection technology has gradually emerged as a mainstream solution in the field of data transmission.

[0003] Optical interconnect technologies are mainly divided into two categories: direct modulation and indirect modulation. Direct modulation, with its significant advantages of low cost and low power consumption, has been widely used in short-to-medium distance interconnects. Lasers used for direct modulation mainly include distributed feedback (DFB) lasers and vertical-cavity surface-emitting lasers (VCSELs). However, both types of lasers exhibit dynamic nonlinearity, meaning their electro-optic frequency response curves change with the bias current. In the time domain, this manifests as overshoot and ringing when the laser current transitions from low to high; conversely, when the current transitions from high to low, the current drop-off is slow, resulting in insufficient bandwidth.

[0004] For non-return-to-zero (NRZ) modulation, this dynamic nonlinearity of the laser may not be a fatal problem. However, with the continuous increase in transmission rate, when using four-level pulse amplitude modulation (PAM4), overshoot will seriously affect the size of adjacent sub-eyes in the eye diagram, causing each sub-eye to tilt, which in turn puts great pressure on the sampling work of the receiver.

[0005] Therefore, in order to eliminate ringing on the rising edge and slow falling edge, and to solve the signal integrity problem of direct modulated lasers in PAM4 modulation format, we urgently need a circuit that can compensate for the dynamic nonlinearity of the laser. Summary of the Invention

[0006] (a) Technical problems to be solved

[0007] To address the signal integrity issues of directly modulated lasers in the four-level pulse amplitude (PAM4) modulation format in the prior art, embodiments of the present invention provide a nonlinear equalization circuit. This nonlinear equalization circuit generates pulses with adjustable number, adjustable direction, and independently adjustable start time, duration, and amplitude, supporting various requirements for nonlinear compensation without weakening the main signal. When there is no equalization signal, the output current is 0, and the amplitude of the main signal is not weakened.

[0008] (II) Technical Solution

[0009] To address the aforementioned technical problems, embodiments of the present invention propose a nonlinear equalization circuit.

[0010] According to a first aspect of the present invention, a nonlinear equalization circuit is provided, comprising N basic units, wherein N is a positive integer. The basic units include: an adjustable delay circuit, a pulse current generation circuit, and an adjustable equalization intensity circuit. The adjustable delay circuit includes a first adjustable delay circuit and a second adjustable delay circuit, which delay input differential data to generate a first delayed signal and a second delayed signal. The adjustable equalization intensity circuit adjusts the amplitude of the pulse current generated by the pulse current generation circuit to adjust the equalization intensity. The pulse current generation circuit logically combines the first delayed signal and the second delayed signal to generate a pulse current for compensating for the dynamic nonlinearity of a laser.

[0011] In some exemplary embodiments, the delay times of the first adjustable delay circuit and the second adjustable delay circuit are independent of each other and can be adjusted; the delay time of the first adjustable delay circuit is greater than or equal to 0; and the delay time of the second adjustable delay circuit is greater than or equal to 0.

[0012] In some exemplary embodiments, the adjustable delay circuit consists of an inverter chain with multiple adjustable load capacitors. By adjusting the capacitance, the rise and fall times of the input signal can be changed to obtain different delay signals.

[0013] In some exemplary embodiments, the final stage inverter is able to restore the rise and fall times of the signal to the input signal bandwidth to ensure signal quality.

[0014] In some exemplary embodiments, the adjustable delay circuit is implemented by an on-chip transmission line; or the adjustable delay circuit is implemented by a cascaded controllable delay buffer; or when the delay time is 0, the adjustable delay circuit is directly connected to the input of the pulse current generating circuit.

[0015] In some exemplary embodiments, the equalization intensity adjustable circuit uses a transistor as a control switch to control the output impedance by controlling the conduction or short-circuiting of a resistor connected in parallel with the transistor, thereby adjusting the amplitude of the pulse current.

[0016] In some exemplary embodiments, the equalization intensity adjustable circuit includes logic units that, by combining multiple logic units and controlling the individual logic units to turn on and off, adjust the amplitude of the pulse current.

[0017] In some exemplary embodiments, the pulse current generation circuit consists of transistors forming current-mode combinational logic to generate a corresponding pulse current for an input delayed signal; wherein the pulse current can respond to the rising or falling edge of the signal; and the pulse current generation start time, pulse current width, and amplitude can be adjusted.

[0018] In some exemplary embodiments, the pulsed current is directly output to the laser; or the pulsed current is superimposed on one end of the differential input pair and ultimately superimposed on the laser.

[0019] In some exemplary embodiments, each of the N basic units can be configured as a nonlinear compensation circuit with different transition edges, different pulse generation and duration, and different equalization intensities by adjusting the delay, intensity, and combinational logic.

[0020] (III) Beneficial Effects

[0021] As can be seen from the above technical solutions, the nonlinear equalization circuit provided by the embodiments of the present invention has at least the following beneficial effects:

[0022] (1) The structure is simple and does not require a detector for detecting rising or falling edges, thus saving power consumption.

[0023] (2) Configurability of pulse current: the number of pulse signals is adjustable, the direction is adjustable, the start time, duration and amplitude are independently adjustable, and various requirements for nonlinear compensation are supported.

[0024] (3) It will not weaken the main signal. When there is no equalization signal, the output current is 0, which will not weaken the amplitude of the main signal. Attached Figure Description

[0025] The above-described features, other objects, and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0026] Figure 1 The schematic diagram illustrates the principle architecture of a nonlinear equalization circuit according to an embodiment of the present invention;

[0027] Figure 2A schematic diagram of the adjustable delay circuit according to an embodiment of the present invention is shown.

[0028] Figure 3 The schematic diagram illustrates the structure of an adjustable equalization intensity circuit according to an embodiment of the present invention;

[0029] Figure 4 A schematic diagram of the structure of a pulse current generating circuit according to an embodiment of the present invention is shown; and

[0030] Figure 5 A timing diagram illustrating the superposition of pulsed current onto a laser according to an embodiment of the present invention is shown. Detailed Implementation

[0031] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0032] Figure 1 The schematic diagram illustrates the principle architecture of a nonlinear equalization circuit according to an embodiment of the present invention.

[0033] like Figure 1 As shown, a nonlinear equalization circuit according to an embodiment of the present invention includes N basic units, where N is a positive integer. The basic units include: an adjustable delay circuit, a pulse current generation circuit, and an adjustable equalization intensity circuit. The adjustable delay circuit includes a first adjustable delay circuit and a second adjustable delay circuit, which delay the input differential data to generate a first delayed signal and a second delayed signal. The adjustable equalization intensity circuit adjusts the amplitude of the pulse current generated by the pulse current generation circuit to adjust the equalization intensity. The pulse current generation circuit logically combines the first delayed signal and the second delayed signal to generate a pulse current for compensating for the dynamic nonlinearity of the laser.

[0034] In this embodiment of the invention, each of the N basic units can be configured as a nonlinear compensation circuit with different transition edges, different pulse generation and duration, and different equalization intensity by adjusting the delay, intensity, and combinational logic.

[0035] In this embodiment of the invention, the delay times of the first adjustable delay circuit and the second adjustable delay circuit are independent and adjustable; the delay time of the first adjustable delay circuit is greater than or equal to 0; and the delay time of the second adjustable delay circuit is greater than or equal to 0. When the delay time is 0, it means that the input data is directly connected to the input terminal of the pulse generation circuit.

[0036] Figure 2 A schematic diagram of an adjustable delay circuit according to an embodiment of the present invention is shown.

[0037] like Figure 2 As shown, the adjustable delay circuit according to an embodiment of the present invention is composed of a multi-stage inverter chain with adjustable load capacitors. By adjusting the capacitance, the rise and fall times of the input signal can be changed to obtain different delay signals. The last stage inverter can restore the rise and fall times of the signal to the input signal bandwidth to ensure signal quality.

[0038] In this embodiment of the invention, the adjustable delay circuit is implemented by an on-chip transmission line; or the adjustable delay circuit is implemented by a cascaded controllable delay buffer; or when the delay time is 0, the adjustable delay circuit is directly connected to the input terminal of the pulse current generating circuit.

[0039] Figure 3 A schematic diagram of the structure of an adjustable equalization intensity circuit according to an embodiment of the present invention is shown.

[0040] like Figure 3 As shown, the adjustable equalization intensity circuit according to an embodiment of the present invention utilizes a transistor as a control switch. By controlling the conduction or short-circuiting of the resistor connected in parallel with the transistor, the output impedance is controlled, thereby adjusting the amplitude of the pulse current. By changing the amplitude of the pulse current, the equalization intensity can be adjusted. Optionally, in addition to changing the size of the equivalent resistance at the tail to control the pulse current size, using multiple logic units (slices) combined and controlling the on and off of each slice also falls within the protection scope of the present invention.

[0041] Figure 4 A schematic diagram of the structure of a pulse current generating circuit according to an embodiment of the present invention is shown; and Figure 5 A timing diagram illustrating the superposition of pulsed current onto a laser according to an embodiment of the present invention is shown.

[0042] like Figure 4 and Figure 5As shown, the pulse current generation circuit according to an embodiment of the present invention comprises current-mode combinational logic composed of transistors, used to generate a corresponding pulse current for an input delayed signal; wherein, the pulse current can respond to the rising or falling edge of the signal; the pulse current generation start time, pulse current width, and amplitude can be adjusted. The pulse current is directly output to the laser; or the pulse current is superimposed on one end of the differential input pair and finally superimposed on the laser.

[0043] For example, AND logic can be composed of two N-type metal-oxide-semiconductor (NMOS) transistors connected in series. Figure 5 In the diagram, (a), (c), (e), and (g) represent the pulse current generated by the falling edge of the laser. The input differential signal passes through an adjustable delay circuit. This circuit is configured such that the delay time at the positive input is Δt1 (Δt1≠0), and the delay at the negative input is 0, meaning it is directly connected to the input of the pulse current generation circuit. When the signal reaches the pulse current generation circuit, due to the different delays of the two signals, they may both be at a high level simultaneously. The pulse current generation circuit implements AND-AND combinational logic, meaning that current is only generated when both input signals are simultaneously 1; otherwise, it remains off. Therefore... Figure 5 In the signal timing diagrams (a), (c), (e), and (g), during the Δt1 time period after the input voltage (VIN) signal changes from low to high, the delayed signal of the input differential signal (VIP) and VIN are simultaneously 1, thereby turning on the series NMOS and generating a pulse current with a duration of Δt1. This current is superimposed on the laser current, thus generating an additional current signal during the Δt1 time period after the laser output current changes from high to low, accelerating the downward transition of the signal. Figure 5 In the diagram, (b), (d), (f), and (h) refer to generating a pulsed current on the rising edge of the laser. The input differential signal passes through an adjustable delay circuit. The adjustable delay circuit is configured such that the delay time at the positive input terminal is 0, meaning it is directly connected to the input terminal of the pulsed current generation circuit, and the delay at the negative input terminal is Δt4. When the signal reaches the pulsed current generation circuit, due to the different delays of the two signals, a situation may occur where both signals are at a high level simultaneously. Figure 5 The signal timing diagrams shown in (b), (d), (f), and (h) indicate that during the Δt4 time period after the VIP signal changes from low to high, the delay signal of VIN and VIP are both 1, which causes the series NMOS to turn on and generate a pulse current with a duration of Δt4. This current is superimposed on the laser current in reverse, so that the laser output current does not immediately rise to the highest current value during the Δt4 time period after it changes from high to low, thus slowing down the ringing of the rising edge.

[0044] It should be noted that although the embodiments of this application only describe the number of basic units N=2 and configure equalization at the rising and falling edges respectively, N can actually take any value and be configured differently. For example, N=3 and equalization is only performed on the rising edge. In this way, three current pulses are generated after the rising edge transition. The occurrence time of the current pulses is independent of each other, and the duration and amplitude may also be different, but they all fall within the protection scope of the embodiments of this application.

[0045] Furthermore, it should be understood that although the specific implementation is based on a laser, such as a DFB or VCSEL, nonlinear equalization techniques applied to other purposes are also within the scope of protection of the embodiments of this application.

[0046] In summary, this invention provides an equalization circuit for dynamic nonlinearity of lasers, including an adjustable delay circuit, an equalization intensity adjustment circuit, and a pulse generation circuit, achieving a low-power, widely adaptable nonlinear equalization circuit.

[0047] The above specific embodiments further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A nonlinear equalization circuit, comprising: The circuit comprises N basic units, where N is a positive integer. These basic units include: an adjustable delay circuit, a pulse current generation circuit, and an adjustable equalization intensity circuit. The adjustable delay circuit includes a first adjustable delay circuit and a second adjustable delay circuit. The first adjustable delay circuit and the second adjustable delay circuit are used to delay the input differential data to generate a first delayed signal and a second delayed signal. The adjustable equalization intensity circuit is used to adjust the amplitude of the pulse current generated by the pulse current generation circuit, thereby adjusting the equalization intensity; and The pulse current generating circuit is used to logically combine the first delay signal and the second delay signal to generate a pulse current for compensating for the dynamic nonlinearity of the laser.

2. The nonlinear equalization circuit of claim 1, wherein, The delay times of the first adjustable delay circuit and the second adjustable delay circuit are independent of each other and can be adjusted. The delay time of the first adjustable delay circuit is greater than or equal to 0; and The delay time of the second adjustable delay circuit is greater than or equal to 0.

3. The nonlinear equalization circuit of claim 1, wherein, The adjustable delay circuit consists of an inverter chain with multiple adjustable load capacitors. By adjusting the capacitance, the rise and fall times of the input signal can be changed to obtain different delay signals.

4. The non-linear equalization circuit of claim 3, wherein, The final inverter stage restores the rise and fall times of the signal to the input signal bandwidth to ensure signal quality.

5. The nonlinear equalization circuit of claim 1, wherein, The adjustable delay circuit is implemented using an on-chip transmission line; or The adjustable delay circuit is implemented by cascaded controllable delay buffers; or When the delay time is 0, the adjustable delay circuit is directly connected to the input terminal of the pulse current generating circuit.

6. The non-linear equalization circuit of claim 1, wherein, The equalization intensity adjustable circuit uses a transistor as a control switch. By controlling the conduction or short-circuiting of the resistor connected in parallel with the transistor, the output impedance is controlled, thereby adjusting the amplitude of the pulse current.

7. The nonlinear equalization circuit of claim 6, wherein, The equalization intensity adjustable circuit includes logic units. By combining multiple logic units and controlling the opening and closing of each logic unit, the amplitude of the pulse current can be adjusted.

8. The nonlinear equalization circuit according to claim 1, characterized in that, The pulse current generating circuit consists of transistors forming a current-mode combinational logic, used to generate a corresponding pulse current for the input delayed signal. The pulse current is capable of responding to the rising or falling edge of the signal; The start time, pulse current width, and amplitude of the pulse current generation can be adjusted.

9. The nonlinear equalization circuit according to claim 1, characterized in that, The pulsed current is directly output to the laser; or The pulsed current is superimposed on one end of the differential input pair and finally superimposed on the laser.

10. The nonlinear equalization circuit according to claim 1, characterized in that, Each of the N basic units can be configured as a nonlinear compensation circuit with different transition edges, different pulse generation and duration, and different equalization intensities by adjusting the delay, intensity, and combinational logic.

Images