Diamond composite inversion channel enhanced field-effect transistor and its fabrication method

Abstract

This invention discloses a diamond composite inverted-channel enhancement-mode field-effect transistor (FET) and its fabrication method. The FET employs an n-type diamond epitaxial layer and a hydrogen-terminated p-type conductive layer with p-type two-dimensional hole gas to form the under-gate channel. When a positive gate voltage is applied to the gate electrode of the proposed enhancement-mode FET, the two-dimensional hole gas in the under-gate channel conducts, the holes are repelled and depleted, and the channel is turned off. When the gate voltage is zero, the electrons in the n-type diamond epitaxial layer and the holes in the hydrogen-terminated p-type conductive layer, at equivalent concentrations, cancel each other out, and the channel is turned off. When a negative gate voltage is applied, the holes in the hydrogen-terminated p-type conductive layer are attracted, and the electrons in the n-type diamond epitaxial layer are repelled, forming an inverted channel, which conducts, thus achieving a conductive channel with good conductivity. The source-drain current formed in the hydrogen-terminated p-type conductive layer can increase the gate charge carrier concentration of the FET, increase the current density, reduce the channel resistance, and enhance the gate control capability.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, specifically relating to a diamond composite inverted channel enhancement field-effect transistor and its fabrication method. Background Technology

[0002] Compared to other semiconductor materials, diamond, as the "ultimate semiconductor," possesses significant advantages, such as a large bandgap, strong breakdown field, high carrier mobility, and high thermal conductivity. Therefore, it holds great potential in applications such as high-frequency, high-power, and high-temperature electronic devices, nuclear radiation detectors, optoelectronic devices, and microelectromechanical systems (MEMS). Currently, in the fabrication of diamond field-effect transistors (FETs), a surface hydrogen termination method is typically used to form a p-type two-dimensional hole gas conductive layer on the diamond surface through transfer doping, followed by subsequent device fabrication processes. However, such devices inherently exhibit depletion-mode behavior, and the difficulty in controlling them and the high power consumption limit their application in logic circuit design and power management.

[0003] A p-type two-dimensional hole gas conductive layer forms on the surface of hydrogen-terminated diamond. To realize an enhancement-mode field-effect transistor, additional processes are needed to deplete the high areal density of holes on the surface of the hydrogen-terminated diamond. For example, local conductivity modulation can be achieved by bombarding the surface of the hydrogen-terminated diamond with an argon ion beam, or by using gate dielectrics such as aluminum nitride and boron nitride for charge modulation. However, these processes will lead to problems such as reducing the carrier concentration in the device channel, increasing the channel on-resistance, and reducing the source-drain output current. Summary of the Invention

[0004] To address the aforementioned problems in the prior art, this invention provides a diamond composite inversion-channel reinforced field-effect transistor and its fabrication method. The technical problem to be solved by this invention is achieved through the following technical solution:

[0005] In a first aspect, the present invention provides a diamond composite inversion channel enhanced field-effect transistor, comprising:

[0006] The structure consists of an intrinsic diamond layer, an n-type diamond epitaxial layer, a hydrogen-terminated p-type conductive layer, a source electrode, a drain electrode, a gate dielectric, and a gate electrode; among which...

[0007] The n-type diamond epitaxial layer is disposed in the gate position region in the middle of the upper surface of the intrinsic diamond layer;

[0008] The hydrogen-terminated p-type conductive layer is disposed in the region below the upper surface of the intrinsic diamond layer;

[0009] The source electrode is disposed at one end of the upper surface of the intrinsic diamond layer;

[0010] The drain electrode is disposed at the other end of the upper surface of the intrinsic diamond layer;

[0011] The gate dielectric is disposed in the remaining region on the upper surface of the intrinsic diamond layer and on the upper surface of the n-type diamond epitaxial layer;

[0012] The gate electrode is disposed on the upper surface of the gate dielectric corresponding to the gate location region.

[0013] In one embodiment of the present invention, the n-type diamond epitaxial layer includes:

[0014] A diamond layer doped with phosphorus, lithium, or sodium, or a diamond layer co-doped with selenium and phosphorus.

[0015] In one embodiment of the present invention, the n-type diamond epitaxial layer and the hydrogen-terminated p-type conductive layer constitute a gate under-channel.

[0016] In one embodiment of the present invention, the carrier surface density of the hydrogen-terminated p-type conductive layer is 1 × 10⁻⁶. 12 cm -2 -10 14 cm -2 The carrier mobility is 50 cm⁻¹ 2 / (V·S)-200cm 2 / (V·S).

[0017] In one embodiment of the present invention, the gate dielectric material comprises Al2O3 with a thickness of 10nm-25nm.

[0018] Secondly, the present invention provides a method for fabricating a diamond composite inversion channel enhanced field-effect transistor, comprising:

[0019] Obtain an intrinsic diamond layer as a substrate;

[0020] An n-type diamond epitaxial layer is grown in the gate location region in the middle of the upper surface of the intrinsic diamond layer;

[0021] The upper surface of the intrinsic diamond layer is subjected to hydrogen termination treatment, and a hydrogen-terminated p-type conductive layer is generated in the region below the upper surface of the intrinsic diamond layer.

[0022] At both ends of the upper surface of the intrinsic diamond layer, a source electrode and a drain electrode are deposited, respectively.

[0023] A gate dielectric is prepared in the remaining region on the upper surface of the intrinsic diamond layer and on the upper surface of the n-type diamond epitaxial layer;

[0024] A gate electrode is prepared on the upper surface of the gate dielectric corresponding to the gate location region.

[0025] In one embodiment of the present invention, an n-type diamond epitaxial layer is grown in the gate position region at the middle of the upper surface of the intrinsic diamond layer, including:

[0026] A protective layer is deposited on the upper surface of the intrinsic diamond layer;

[0027] Remove the protective layer on the gate location region in the middle of the upper surface of the intrinsic diamond layer;

[0028] Under preset chamber conditions, an n-type diamond epitaxial layer is grown on the upper surface of the intrinsic diamond layer;

[0029] Remove the protective layer from the upper surface of the remaining intrinsic diamond layer.

[0030] In one embodiment of the present invention, a protective layer is deposited on the upper surface of the intrinsic diamond layer, comprising:

[0031] A protective layer is deposited on the upper surface of the intrinsic diamond layer using electron beam evaporation or magnetron sputtering; wherein the material of the protective layer includes a titanium / gold alloy layer or SiO2, and the thickness is 80-120 nm.

[0032] In one embodiment of the present invention, the upper surface of the intrinsic diamond layer is subjected to hydrogen termination treatment, and a hydrogen-terminated p-type conductive layer is generated in the region below the upper surface of the intrinsic diamond layer, including:

[0033] In an MPCVD device, a hydrogen-terminated p-type conductive layer is generated in the region below the upper surface of the intrinsic diamond layer by means of preset chamber conditions; wherein the preset chamber conditions include: hydrogen flow rate: 200 sccm-400 sccm, chamber pressure: 140 mbar-160 mbar, microwave power: 2 kW-2.5 kW, temperature: 650℃-850℃, methane flow rate: 5 sccm-20 sccm, and processing time: 10 min-45 min.

[0034] In one embodiment of the present invention, a gate dielectric is fabricated in the remaining region on the upper surface of the intrinsic diamond layer and on the upper surface of the n-type diamond epitaxial layer, comprising:

[0035] Using atomic layer deposition, under preset process conditions, a gate dielectric is prepared in the remaining region on the upper surface of the intrinsic diamond layer and on the upper surface of the n-type diamond epitaxial layer; wherein the preset process conditions are a process temperature of 150℃-400℃ and a gate dielectric thickness of 10nm-25nm.

[0036] The beneficial effects of this invention are:

[0037] In the solution provided by this invention, the field-effect transistor (FET) uses an n-type diamond epitaxial layer and a hydrogen-terminated p-type conductive layer with p-type two-dimensional hole gas to form the under-gate channel. When a positive gate voltage is applied to the gate electrode of the enhancement-mode FET proposed in this invention, the two-dimensional hole gas in the under-gate channel conducts, the holes are repelled and depleted, and the channel is turned off. When the gate voltage is zero, the electrons in the n-type diamond epitaxial layer and the holes in the hydrogen-terminated p-type conductive layer cancel each other out and neutralize each other when their concentrations are equal, and the channel is turned off. When a negative gate voltage is applied to the gate electrode, the holes in the hydrogen-terminated p-type conductive layer are attracted, and the electrons in the n-type diamond epitaxial layer are repelled, forming an inversion channel, and the channel is turned on, thereby achieving a conductive channel with better conductivity. The source-drain current formed in the hydrogen-terminated p-type conductive layer can increase the carrier concentration under the gate of the FET, increase the current density, reduce the channel resistance, and enhance the gate control capability. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the structure of a diamond composite inverse-channel reinforced field-effect transistor provided in an embodiment of the present invention;

[0039] Figure 2 A schematic diagram illustrating the steps of a method for fabricating a diamond composite inverted channel enhanced field-effect transistor according to an embodiment of the present invention;

[0040] Figure 3 This is a schematic diagram illustrating the preparation process of the n-type diamond epitaxial layer in a method for preparing a diamond composite inverse channel enhanced field-effect transistor provided in an embodiment of the present invention.

[0041] Figures 4A-4D The flowchart illustrates the process of preparing an n-type diamond epitaxial layer in a method for fabricating a diamond composite inverse channel enhanced field-effect transistor provided in this embodiment of the invention.

[0042] Figure Labels

[0043] 1-Intrinsic diamond layer, 2-n-type diamond epitaxial layer, 2a-hydrogen-terminated p-type conductive layer, 3a-source electrode, 3b-drain electrode, 4-gate dielectric, 5-gate electrode. Detailed Implementation

[0044] The present invention will be further described in detail below with reference to specific embodiments, but the implementation of the present invention is not limited thereto.

[0045] To address the issues of high power consumption and difficulty in driving circuit design in current depletion-type diamond field-effect transistors (DFETs), as well as the poor characteristics of enhancement-type DFETs with gate-channel processing, this invention provides a diamond composite conductivity inverse-channel enhancement-type field-effect transistor and its fabrication method.

[0046] Below, we will first introduce a diamond composite inverse channel enhanced field-effect transistor provided in the embodiments of the present invention.

[0047] like Figure 1 As shown in the embodiment of the present invention, a diamond composite inversion channel enhancement field-effect transistor may include:

[0048] The structure comprises: intrinsic diamond layer 1, n-type diamond epitaxial layer 2, hydrogen-terminated p-type conductive layer 2a, source electrode 3a, drain electrode 3b, gate dielectric 4, and gate electrode 5; wherein...

[0049] The n-type diamond epitaxial layer 2 is disposed in the gate position region in the middle of the upper surface of the intrinsic diamond layer 1.

[0050] A hydrogen-terminated p-type conductive layer 2a is disposed in the region below the upper surface of the intrinsic diamond layer 1.

[0051] The source electrode 3a is disposed at one end of the upper surface of the intrinsic diamond layer 1;

[0052] The drain electrode 3b is disposed at the other end of the upper surface of the intrinsic diamond layer 1;

[0053] Gate dielectric 4 is disposed in the remaining area on the upper surface of the intrinsic diamond layer 1 and on the upper surface of the n-type diamond epitaxial layer 2;

[0054] The gate electrode 5 is disposed on the upper surface of the gate dielectric 4 corresponding to the gate position region.

[0055] Optionally, the n-type diamond epitaxial layer 2 may include:

[0056] A diamond layer doped with phosphorus, lithium, or sodium, or a diamond layer co-doped with selenium and phosphorus.

[0057] The carrier surface density of the hydrogen-terminated p-type conductive layer 2a is 1 × 10⁻⁶. 12 cm -2 -10 14 cm -2 The carrier mobility is 50 cm⁻¹ 2 / (V·S)-200cm 2 / (V·S).

[0058] Specifically, the n-type diamond epitaxial layer 2 and the hydrogen-terminated p-type conductive layer 2a constitute the gate under-channel.

[0059] To address the issues of low carrier concentration, high channel on-resistance, and low source-drain output current in enhancement-mode devices, this invention employs a combination of an n-type diamond epitaxial layer and a hydrogen-terminated p-type conductive layer with p-type two-dimensional hole gas in the gate-under-channel. The n-type diamond epitaxial layer is a lightly doped diamond epitaxial layer. When the carrier concentrations of the two conductive layers are comparable, at a positive gate voltage, the two-dimensional hole gas in the hydrogen-terminated p-type conductive layer is repelled, and the n-type diamond epitaxial layer acts as a turn-off channel. At zero gate voltage, the two layers cancel each other out, resulting in a turn-off gate-under-channel. At a negative gate voltage, the two-dimensional hole gas in the hydrogen-terminated p-type conductive layer is attracted, and the electrons in the n-type diamond epitaxial layer are repelled, thus achieving a highly conductive on-channel. This allows for the realization of enhancement-mode (normally off) diamond field-effect transistors using an inverse channel based on a diamond bulk-doped conductive layer and surface conductivity. This has significant implications for future logic circuit applications and driver circuit design of diamond field-effect transistors.

[0060] Optionally, the material of the gate dielectric 4 may include Al2O3 with a thickness of 10nm-25nm.

[0061] The field-effect transistor proposed in this invention is implemented as a composite inversion channel based on the conductivity of diamond dopant and the surface conductivity of two-dimensional electron gas based on surface holes. Its gate channel consists of an n-type diamond epitaxial layer as the lower layer and a hydrogen-terminated p-type conductive layer as the upper layer. When different gate voltages are applied, the inversion channel formed by the n-type diamond epitaxial layer and the hydrogen-terminated p-type conductive layer achieves the function of turning on or off.

[0062] Secondly, corresponding to the above-described device embodiments, this invention also provides a method for fabricating a diamond composite inversion channel enhancement-mode field-effect transistor, such as... Figure 2 As shown, it may include:

[0063] S1, obtain intrinsic diamond layer 1 as substrate.

[0064] The intrinsic diamond layer 1 can be a preform that is obtained directly, and after the intrinsic diamond layer 1 is cleaned accordingly, it can be used as a substrate.

[0065] S2, an n-type diamond epitaxial layer 2 is grown in the gate position region in the middle of the upper surface of the intrinsic diamond layer 1.

[0066] For S2, such as Figure 3 As shown, it may include:

[0067] S21, a protective layer is deposited on the upper surface of the intrinsic diamond layer 1, which may include:

[0068] A protective layer is deposited on the upper surface of the intrinsic diamond layer 1 using electron beam evaporation or magnetron sputtering; the protective layer material may include a titanium / gold alloy layer or SiO2, with a thickness of 80-120 nm. The device after obtaining the protective layer in step S21 is as follows... Figure 4A As shown.

[0069] S22, removing the protective layer on the gate location region in the middle of the upper surface of the intrinsic diamond layer 1, may include:

[0070] A layer of photoresist (e.g., AZ5214) is uniformly coated onto the protective layer and dried at 100°C for 150 seconds. Using a UV lithography machine, the gate location region in the center of the upper surface of the intrinsic diamond layer 1 is exposed through a mask pattern for 3.3 seconds. This is followed by development in a positive developer for 45 seconds to expose the exposed area. The area is then immersed in a KI / I2 solution for 6-10 seconds and a BOE solution for 3-6 minutes to prevent significant lateral etching. This yields the protective layer exposing the gate location region. The material is then cleaned with acetone to remove the photoresist, resulting in the device shown below. Figure 4B As shown.

[0071] S23, under preset chamber conditions, an n-type diamond epitaxial layer 2 is grown on the upper surface of the intrinsic diamond layer 1.

[0072] Specifically, in the gate location region at the center of the upper surface of the intrinsic diamond layer 1, an n-type diamond epitaxial layer 2 is grown using microwave plasma chemical vapor deposition (MPCVD). The specific chamber conditions are: hydrogen flow rate 200-400 sccm, chamber pressure 140-160 mbar, temperature 700-1000℃, methane flow rate 5-20 sccm, oxygen flow rate 0.2-0.8 sccm, and processing time 5-15 min. The phosphorus-doped diamond thickness is 100-300 nm. The device obtained through step S23 is as follows... Figure 4C As shown.

[0073] S24, Remove the protective layer from the upper surface of the remaining intrinsic diamond layer 1.

[0074] Specifically, the device obtained in step S23 is immersed in KI / I2 solution and BOE (Buffered Oxide Etch) solution to completely remove the protective layer, resulting in a device as shown in the image. Figure 4D As shown.

[0075] S3, perform hydrogen termination treatment on the upper surface of the intrinsic diamond layer 1, and generate a hydrogen-terminated p-type conductive layer 2a in the region below the upper surface of the intrinsic diamond layer 1.

[0076] For S3, it can include:

[0077] In an MPCVD device, a hydrogen-terminated p-type conductive layer 2a is generated in the region below the upper surface of the intrinsic diamond layer 1 under preset chamber conditions. The preset chamber conditions include: hydrogen flow rate: 200 sccm-400 sccm, chamber pressure: 140 mbar-160 mbar, microwave power: 2 kW-2.5 kW, temperature: 650℃-850℃, methane flow rate: 5 sccm-20 sccm, and processing time: 10 min-45 min.

[0078] The carrier surface density of the hydrogen-terminated p-type conductive layer 2a obtained through step S3 can be 1×10⁻⁶. 12 cm -2 -10 14 cm -2 The carrier mobility can be 50 cm⁻¹ 2 / (V·S)-200cm 2 / (V· S).

[0079] After completing step S3, the n-type diamond epitaxial layer and the p-type conductive layer with p-type two-dimensional hole gas can form a gate under-gate channel. The gate under-gate channel is as follows: the lower layer is the n-type diamond epitaxial layer and the upper layer is the p-type two-dimensional hole gas conductive layer. When different gate voltages are applied, the inverse channel formed by the n-type diamond epitaxial layer and the surface p-type two-dimensional hole gas conductive layer can achieve the function of turning on or off.

[0080] S4, at both ends of the upper surface of the intrinsic diamond layer 1, a source electrode 3a and a drain electrode 3b are deposited respectively.

[0081] For S4, it can include:

[0082] A 100 nm gold (Au) thin film is deposited on the diamond surface with a hydrogen-terminated p-type conductive layer 2a by thermal evaporation. A photoresist (AZ6112 type) is then uniformly coated and dried at 90°C for 90 seconds. The non-source / drain electrode pattern positions on the photomask are exposed using an ultraviolet lithography machine. The photomask is then immersed in a KI / I2 solution for 6-10 seconds to remove the gold thin film layer at the non-source / drain positions, leaving the gold thin film layer at the source / drain electrode positions, which will be used as the source electrode 3a and the drain electrode 3b, respectively.

[0083] S5, fabricating the gate dielectric 4 in the remaining region on the upper surface of the intrinsic diamond layer 1 and the upper surface of the n-type diamond epitaxial layer 2 may include:

[0084] Using atomic layer deposition, under preset process conditions, a gate dielectric (4) is prepared in the remaining area on the upper surface of the intrinsic diamond layer (1) and on the upper surface of the n-type diamond epitaxial layer (2); wherein, the preset process conditions are a process temperature of 150℃-400℃, a thickness of 10nm-25nm for the gate dielectric (4), and the material of the gate dielectric (4) may include Al2O3.

[0085] S6, fabricating a gate electrode 5 on the upper surface of the gate dielectric 4 corresponding to the gate location region may include:

[0086] The deposited regions are distributed across all areas except the source and drain locations, achieving passivation to protect the hydrogen-terminated p-type conductive layer and improve device stability. A layer of photoresist (AZ6130, for example) is uniformly coated onto the diamond layer surface containing the gate dielectric 4 and dried at 90°C for 90 seconds. Using ultraviolet lithography, a pattern is left in the preset gate location area through a mask gate pattern. Then, aluminum (Al) is deposited with a thickness of 100 nm by electron beam evaporation to obtain the gate electrode 5.

[0087] The field-effect transistor (FET) provided in this embodiment of the invention uses an n-type diamond epitaxial layer and a hydrogen-terminated p-type conductive layer with p-type two-dimensional hole gas to form a channel below the gate. When a positive gate voltage is applied to the gate electrode of the enhancement-mode FET proposed in this invention, the two-dimensional hole gas in the channel below the gate conducts, the holes are repelled and depleted, and the channel is turned off. When the gate voltage is zero, the electrons in the n-type diamond epitaxial layer and the holes in the hydrogen-terminated p-type conductive layer cancel each other out and neutralize each other when their concentrations are equal, and the channel is turned off. When a negative gate voltage is applied to the gate electrode, the holes in the hydrogen-terminated p-type conductive layer are attracted, and the electrons in the n-type diamond epitaxial layer are repelled, forming an inversion channel, and the channel is turned on, thereby achieving a conductive channel with better conductivity. The source-drain current formed in the hydrogen-terminated p-type conductive layer can increase the carrier concentration below the gate of the FET, increase the current density, reduce the channel resistance, and enhance the gate control capability.

[0088] It should be noted that, in the description of this invention, the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0089] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A diamond composite inversion channel reinforcement field-effect transistor, characterized in that, include: The structure consists of an intrinsic diamond layer (1), an n-type diamond epitaxial layer (2), a hydrogen-terminated p-type conductive layer (2a), a source electrode (3a), a drain electrode (3b), a gate dielectric (4), and a gate electrode (5); among which, The n-type diamond epitaxial layer (2) is disposed in the gate position region in the middle of the upper surface of the intrinsic diamond layer (1); The hydrogen-terminated p-type conductive layer (2a) is disposed in the region below the upper surface of the intrinsic diamond layer (1); The source electrode (3a) is disposed at one end of the upper surface of the intrinsic diamond layer (1); The drain electrode (3b) is disposed at the other end of the upper surface of the intrinsic diamond layer (1); The gate dielectric (4) is disposed in the remaining area on the upper surface of the intrinsic diamond layer (1) and on the upper surface of the n-type diamond epitaxial layer (2); The gate electrode (5) is disposed on the upper surface of the gate dielectric (4) corresponding to the gate position region.

2. The diamond composite inversion channel enhanced field-effect transistor according to claim 1, characterized in that, The n-type diamond epitaxial layer (2) includes: A diamond layer doped with phosphorus, lithium, or sodium, or a diamond layer co-doped with selenium and phosphorus.

3. The diamond composite inversion channel enhanced field-effect transistor according to claim 1, characterized in that, The n-type diamond epitaxial layer (2) and the hydrogen-terminated p-type conductive layer (2a) constitute a gate under-channel.

4. The diamond composite inversion channel enhanced field-effect transistor according to claim 1, characterized in that, The carrier surface density of the hydrogen-terminated p-type conductive layer (2a) is 1×10⁻⁶. 12 cm -2 -10 14 cm -2 The carrier mobility is 50 cm⁻¹ 2 / (V·S)-200cm 2 / (V·S).

5. A diamond composite inversion channel enhanced field-effect transistor according to claim 1, characterized in that, The gate dielectric (4) is made of Al2O3 and has a thickness of 10nm-25nm.

6. A method for fabricating a diamond composite inversion channel enhancement-mode field-effect transistor, characterized in that, include: An intrinsic diamond layer (1) is obtained as a substrate; An n-type diamond epitaxial layer (2) is grown in the gate position region in the middle of the upper surface of the intrinsic diamond layer (1); Hydrogen-terminated treatment is performed on the upper surface of the intrinsic diamond layer (1) to generate a hydrogen-terminated p-type conductive layer (2a) in the region below the upper surface of the intrinsic diamond layer (1). At both ends of the upper surface of the intrinsic diamond layer (1), a source electrode (3a) and a drain electrode (3b) are deposited respectively; A gate dielectric (4) is prepared in the remaining region on the upper surface of the intrinsic diamond layer (1) and on the upper surface of the n-type diamond epitaxial layer (2); A gate electrode (5) is prepared on the upper surface of the gate dielectric (4) corresponding to the gate location region.

7. The method for fabricating a diamond composite inversion channel enhanced field-effect transistor according to claim 6, characterized in that, An n-type diamond epitaxial layer (2) is grown in the gate position region at the middle of the upper surface of the intrinsic diamond layer (1), comprising: A protective layer is deposited on the upper surface of the intrinsic diamond layer (1); Remove the protective layer on the gate location region in the middle of the upper surface of the intrinsic diamond layer (1); Under preset chamber conditions, an n-type diamond epitaxial layer (2) is grown on the upper surface of the intrinsic diamond layer (1); Remove the protective layer from the upper surface of the remaining intrinsic diamond layer (1).

8. The method for fabricating a diamond composite inversion channel enhanced field-effect transistor according to claim 7, characterized in that, A protective layer is deposited on the upper surface of the intrinsic diamond layer (1), comprising: A protective layer is deposited on the upper surface of the intrinsic diamond layer (1) by means of electron beam evaporation or magnetron sputtering; wherein the material of the protective layer includes a titanium / gold alloy layer or SiO2, and the thickness is 80-120nm.

9. The method for fabricating a diamond composite inversion channel enhanced field-effect transistor according to claim 6, characterized in that, The upper surface of the intrinsic diamond layer (1) is subjected to hydrogen termination treatment, and a hydrogen-terminated p-type conductive layer (2a) is formed in the region below the upper surface of the intrinsic diamond layer (1), including: In an MPCVD device, a hydrogen-terminated p-type conductive layer (2a) is generated in the region below the upper surface of the intrinsic diamond layer (1) by means of preset chamber conditions; wherein the preset chamber conditions include: hydrogen flow rate: 200 sccm-400 sccm, chamber pressure: 140 mbar-160 mbar, microwave power: 2 kW-2.5 kW, temperature: 650 ℃-850 ℃, methane flow rate: 5 sccm-20 sccm, and processing time: 10 min-45 min.

10. The method for fabricating a diamond composite inversion channel enhanced field-effect transistor according to claim 6, characterized in that, A gate dielectric (4) is fabricated in the remaining region on the upper surface of the intrinsic diamond layer (1) and on the upper surface of the n-type diamond epitaxial layer (2), comprising: Using atomic layer deposition, under preset process conditions, a gate dielectric (4) is prepared in the remaining area on the upper surface of the intrinsic diamond layer (1) and on the upper surface of the n-type diamond epitaxial layer (2); wherein the preset process conditions are a process temperature of 150℃-400℃ and a thickness of 10nm-25nm for the gate dielectric (4).

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