Micro light-emitting diodes with high surface light extraction efficiency and preparation method thereof

Abstract

The present invention discloses a micro light-emitting diode with high surface light extraction efficiency and a preparation method thereof. The preparation method includes the following steps: providing an LED epitaxial wafer; wherein, the LED epitaxial wafer includes a stacked GaN semiconductor layer, a quantum well layer, and a p-GaN layer; annealing the N surface of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer; etching the N surface of the GaN-GaO semiconductor layer to obtain a multi-faceted microcone mirror pattern layer; wherein, the multi-faceted microcone mirror pattern layer includes a plurality of regularly arranged multi-faceted microcone mirrors, and the bottom edges of adjacent multi-faceted microcone mirrors are mutually attached; the bottom height ratio of the multi-faceted microcone mirror is (1-2.5):1. The method for improving the surface light extraction efficiency of the micro light-emitting diode of the present invention can increase the surface light extraction efficiency and the surface light output ratio by arranging a multi-faceted microcone mirror pattern layer with a special structure on the N surface of the semiconductor layer.

Description

Technical Field

[0001] The present invention relates to the technical field of micro light-emitting diodes, and particularly relates to a preparation method of a micro light-emitting diode with high surface light extraction efficiency and a micro light-emitting diode with high surface light extraction efficiency prepared by using the preparation method. Background Art

[0002] In recent years, micro light-emitting diodes (Micro-LEDs) have had very broad application prospects in the fields of display, communication, medical treatment, etc. due to their advantages such as higher light efficiency, higher brightness, and ultra-high resolution. Currently, most of the GaN-based Micro-LEDs on the market are heteroepitaxial, that is, the substrate is sapphire, and the homoepitaxial Micro-LED chips are also being actively explored and relevant progress has been made; the sapphire substrate has a lower price, while the homoepitaxial substrate has a lower dislocation density (2-3 orders of magnitude lower) and extremely small stress compared with the sapphire substrate.

[0003] However, the quantum efficiency of current Micro-LEDs is still relatively low, and the problem of improving the light extraction efficiency (Light Extraction Efficiency, LEE) needs to be solved urgently. For traditional large-size LEDs, due to the small surface / volume ratio, the light extraction from the sidewalls accounts for a relatively small proportion, but as the size decreases, the surface / volume ratio increases, making the light extraction from the sidewalls of Micro-LEDs gradually increase. Micro-LEDs applied to the micro-display field generally require a size of less than 10 μm. For a 10-μm Micro-LED, the light extraction from the sidewalls accounts for more than half of the total light extraction, and the surface light extraction efficiency (LSE) and the surface light extraction ratio (S) greatly limit the performance of Micro-LEDs. In practical applications, due to the large light extraction from the sidewalls and less light extraction from the top, this will cause serious crosstalk between pixels, reduce the resolution and contrast, and also cause obstruction of the light extraction from the sidewalls during the packaging process. Therefore, in essence, the light extraction efficiency still needs to improve the light extraction efficiency of the surface.

[0004] However, several current methods for improving light extraction are costly and highly dependent on process precision and technology. They are more obvious for large-size LEDs, but have limited effects on Micro-LEDs, and there is a lack of an optimization scheme specifically for LSE. For example: patterned substrates, surface plasmon polaritons, photonic crystal micro-nano structures, etc. Among them, the preparation process of the patterned substrate is complex, the cost is high, and the etching process requirements are strict; the preparation process of the photonic crystal is very complex and the process precision requirements are high; the characteristics of the surface plasmon polaritons are greatly affected by the surrounding environment, which may affect the stability and reliability of the device, and the preparation is relatively complex and the cost is high.

[0005] Traditional large-sized LEDs only need to focus on the overall LEE, while Micro-LEDs are different. In view of the problems of relatively low LSE and low surface light extraction ratio existing in current Micro-LEDs, there is an urgent need for a relatively simple and feasible method for improving LSE and S applicable to Micro-LEDs. Summary of the Invention

[0006] In view of this, the purpose of the present invention is to provide a preparation method for micro light-emitting diodes with high surface light extraction efficiency, which can effectively improve the surface light extraction efficiency of micro light-emitting diodes.

[0007] In the first aspect, the present invention provides a preparation method for micro light-emitting diodes with high surface light extraction efficiency, including the following steps:

[0008] Provide an LED epitaxial wafer; wherein, the LED epitaxial wafer includes a stacked GaN semiconductor layer, a quantum well layer, and a p-GaN layer;

[0009] Anneal the N surface of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer;

[0010] Etch the N surface of the GaN-GaO semiconductor layer to obtain a multi-faceted microcone mirror pattern layer;

[0011] Wherein, the multi-faceted microcone mirror pattern layer includes a plurality of regularly arranged multi-faceted microcone mirrors, the bottom edges of adjacent multi-faceted microcone mirrors are in contact with each other, that is, adjacent multi-faceted microcone mirrors are closely arranged; the bottom-to-height ratio of the multi-faceted microcone mirror is (1-2.5):1. Preferably, the bottom-to-height ratio of the multi-faceted microcone mirror is 1:1, 4:3, 5:3, 5:2; more preferably, the bottom-to-height ratio of the multi-faceted microcone mirror is 4:3.

[0012] According to some preferred implementation aspects of the present invention, the GaN semiconductor layer includes an n-GaN layer, and the multi-faceted microcone mirror pattern layer is arranged on the n-GaN layer; or, the GaN semiconductor layer includes a u-GaN layer and an n-GaN layer, and the multi-faceted microcone mirror pattern layer is arranged on the u-GaN layer.

[0013] According to some preferred implementation aspects of the present invention, the multi-faceted microcone mirror is a three-sided microcone mirror, a six-sided microcone mirror, or a twelve-sided microcone mirror. When the multi-faceted microcone mirror is a three-sided microcone mirror or a six-sided microcone mirror, the bottom edges of the multi-faceted microcone mirrors are completely in contact without gaps; when the multi-faceted microcone mirror is a twelve-sided microcone mirror, some of the bottom edges of the multi-faceted microcone mirrors are completely in contact without gaps. Although the bottoms of multiple twelve-sided microcone mirrors are closely arranged, there will be a triangular gap in the middle of every three closely arranged twelve-sided microcone mirrors.

[0014] According to some preferred implementation aspects of the present invention, the bottom surface size of the multi-faceted microcone mirror is 100 - 1000 nm, preferably 200 - 1000 nm. When the multi-faceted microcone mirror is a three-sided microcone mirror, the height of the bottom surface triangle is 100 - 1000 nm; when the multi-faceted microcone mirror is a six-sided microcone mirror or a twelve-sided microcone mirror, the distance between opposite sides of the bottom surface is 100 - 1000 nm. The six-sided microcone mirror pattern has a better effect of enhancing the surface light extraction. At the same time, not all pattern layer sizes have a positive effect on light extraction. When the bottom surface size is less than 100 nm, the effect is not obvious, and it is even not conducive to the surface light extraction of the micro light-emitting diode.

[0015] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows:

[0016] Under the condition that the temperature is 80 - 120 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 10 - 40 min to obtain closely arranged six-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. Each of the six sides of each six-sided microcone mirror is a {10-11} crystal plane;

[0017] Among them, the etching solution is a mixed solution formed by ammonia water, H2O2 and H2O, and the volume ratio is ammonia water:H2O2:H2O = 1:0.5 - 1.5:4 - 6.

[0018] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows:

[0019] Under the condition that the temperature is 80 - 120 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 10 - 30 min to obtain closely arranged six-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. Each of the six sides of each six-sided microcone mirror is a {10-1-1} crystal plane;

[0020] Among them, the etching solution is a mixed solution of KOH solution and water, and the volume ratio is KOH solution:H2O = 1:4 - 6.

[0021] According to some preferred implementation aspects of the present invention, the etching method is wet etching, and the steps of the wet etching are as follows:

[0022] Under the condition that the temperature is 80 - 120 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 10 - 40 min to obtain closely arranged twelve-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. Six of the twelve sides of each twelve-sided microcone mirror are {20-2-3} crystal planes, and the remaining six sides are {22-4-5} crystal planes, and the two are alternately distributed;

[0023] The etchant is an H3PO4 solution, or the etchant is a mixed solution formed by an H3PO4 solution and water.

[0024] According to some preferred implementation aspects of the present invention, the process conditions of the annealing treatment include: the temperature is 400 - 600 °C, the gas atmosphere is an oxygen atmosphere, and the treatment time is 5 - 20 min; and / or,

[0025] The step further includes a pretreatment before the annealing treatment:

[0026] Clean the GaN semiconductor layer;

[0027] At room temperature, blow dry the N side of the GaN semiconductor layer with nitrogen for 3 - 30 min; or dry the GaN semiconductor layer in a nitrogen oven, wherein the process conditions of the drying treatment include a drying time of 3 - 15 min and a drying temperature of 40 - 80 °C.

[0028] According to some preferred implementation aspects of the present invention, the preparation of the LED epitaxial wafer includes:

[0029] Provide a substrate structure, and sequentially prepare an n-GaN layer, a stress release layer, the quantum well layer, an electron blocking layer, and a p-GaN layer on the substrate structure to obtain a first epitaxial wafer;

[0030] Process the first epitaxial wafer to obtain the LED epitaxial wafer;

[0031] Before the step of annealing the N side of the GaN semiconductor layer, it includes:

[0032] Coat a photoresist on the surface of the LED epitaxial wafer and bake it;

[0033] After the step of annealing the N side of the GaN semiconductor layer, it includes:

[0034] Remove the photoresist to obtain the micro light-emitting diode.

[0035] According to some preferred implementation aspects of the present invention, the process of processing the first epitaxial wafer to obtain the LED epitaxial wafer includes:

[0036] Clean the first epitaxial wafer;

[0037] Prepare a transparent conductive layer on the p-GaN layer to obtain a second epitaxial wafer; wherein, the second epitaxial wafer includes the substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer, and the transparent conductive layer stacked together;

[0038] Etch starting from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures;

[0039] Deposit a passivation layer on the sidewalls of the mesa structures, the upper surfaces of the mesa structures, and between two adjacent mesa structures;

[0040] Etch the passivation layer to form an n-electrode window, and fabricate an n-electrode within the n-electrode window to form a first LED epitaxial structure; wherein, the n-electrode is in contact with the n-GaN layer;

[0041] Anneal the first LED epitaxial structure to obtain a second LED epitaxial structure;

[0042] Etch the passivation layer in the second LED epitaxial structure to form a p-electrode window, and fabricate a p-electrode within the p-electrode window to obtain a third LED epitaxial structure; wherein, the p-electrode is in contact with the transparent conductive layer;

[0043] Bond the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure;

[0044] Thin or peel off the fourth LED epitaxial structure to obtain the LED epitaxial wafer.

[0045] According to some preferred embodiments of the present invention, the substrate structure includes a hetero-substrate and a u-GaN layer stacked, and the thinning or peeling of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling off the hetero-substrate to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or, peeling off the hetero-substrate and the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer;

[0046] Or, the substrate structure is a u-GaN layer, and the thinning or peeling of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes:

[0047] Thin the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned u-GaN layer; or, thin the u-GaN layer and the n-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned n-GaN layer.

[0048] In some embodiments of the present invention, the method for preparing a micro light-emitting diode with high surface light extraction efficiency specifically includes the following steps:

[0049] S1. Prepare an LED epitaxial wafer

[0050] The preparation of the LED epitaxial wafer includes:

[0051] S11. Provide a substrate structure, and sequentially prepare an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer on the substrate structure by metal organic chemical vapor deposition to obtain a first epitaxial wafer.

[0052] S12. Process the first epitaxial wafer to obtain the LED epitaxial wafer.

[0053] Specifically, it includes:

[0054] S121. Clean the first epitaxial wafer.

[0055] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer; wherein, the second epitaxial wafer includes the substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer, and the transparent conductive layer which are stacked.

[0056] S123. Etch from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures.

[0057] S124. Deposit a passivation layer on the sidewalls of the mesa structures, the upper surfaces of the mesa structures, and between two adjacent mesa structures.

[0058] S125. Etch the passivation layer to form an n-electrode window, and prepare an n-electrode in the n-electrode window to form a first LED epitaxial structure; wherein, the n-electrode is in contact with the n-GaN layer.

[0059] S126. Anneal the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0060] S127. Etch the passivation layer in the second LED epitaxial structure to form a p-electrode window, and prepare a p-electrode in the p-electrode window to obtain a third LED epitaxial structure; wherein, the p-electrode is in contact with the transparent conductive layer.

[0061] S128. Bond the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure.

[0062] S129. Thin or peel the fourth LED epitaxial structure to obtain the LED epitaxial wafer.

[0063] Preferably, the above steps further include a step of depositing a sidewall metal reflective layer after depositing the passivation layer. The sidewall metal reflective layer can reflect the light originally emitted from the sidewall back, enabling more light to be emitted from the surface, and thus can better improve the surface light extraction efficiency of the micro light-emitting diode.

[0064] In some embodiments, the substrate structure includes a hetero-substrate (such as sapphire) and a u-GaN layer stacked. Thinning or peeling the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling the hetero-substrate to obtain the LED epitaxial wafer, where the GaN semiconductor layer is the u-GaN layer; or peeling the hetero-substrate and the u-GaN layer to obtain the LED epitaxial wafer, where the GaN semiconductor layer is the n-GaN layer.

[0065] In other embodiments, the substrate structure is a u-GaN layer. Thinning or peeling the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: thinning the u-GaN layer to obtain the LED epitaxial wafer, where the GaN semiconductor layer is the thinned homo-substrate; or thinning the u-GaN layer and the n-GaN layer to obtain the LED epitaxial wafer, where the GaN semiconductor layer is the thinned n-GaN layer.

[0066] S2. Anneal the N surface of the GaN semiconductor layer to convert the GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer;

[0067] S3. Etch the N surface of the GaN-GaO semiconductor layer to obtain a multi-faceted microcone mirror pattern layer;

[0068] By etching a multi-faceted microcone mirror pattern layer with a special structure on the N surface of the GaN-GaO semiconductor layer, the surface light extraction efficiency and the surface light emission ratio of the micro light-emitting diode can be increased. Among them, the multi-faceted microcone mirror pattern layer includes a plurality of regularly arranged multi-faceted microcone mirrors, and the bottom edges of adjacent multi-faceted microcone mirrors are in contact with each other, that is, adjacent multi-faceted microcone mirrors are closely arranged; the bottom height ratio of the multi-faceted microcone mirror is (1-2.5):1, the multi-faceted microcone mirror is a three-sided microcone mirror, a six-sided microcone mirror or a twelve-sided microcone mirror; the bottom surface size of the multi-faceted microcone mirror is 100-1000 nm. When the multi-faceted microcone mirror is a three-sided microcone mirror or a six-sided microcone mirror, there is no gap between the bottom edges of the multi-faceted microcone mirrors; when the multi-faceted microcone mirror is a twelve-sided microcone mirror, there is no gap between some of the bottom edges of the multi-faceted microcone mirrors.

[0069] Preferably, the etching method is selected from one of wet etching, photolithography, dry etching, and laser direct writing lithography.

[0070] Specifically, when the etching method is wet etching, the following steps are included:

[0071] S31. Cleaning

[0072] The GaN semiconductor layer of the micro light-emitting diode is sequentially placed in acetone, alcohol, and deionized water for ultrasonic cleaning for 3 - 20 min to remove surface organic contamination. The purpose of cleaning is to enable the N side of the GaN semiconductor layer to better contact the etching solution.

[0073] S32. Removing Residual Surface Liquid

[0074] At room temperature, use a nitrogen gun to blow-dry the N side of the GaN semiconductor layer with N2 for 3 - 30 min; alternatively, use an N2 oven to dry the GaN semiconductor layer for 3 - 15 min at a temperature of 40 - 80 °C.

[0075] S33. Annealing

[0076] Perform rapid annealing treatment on the N side of the GaN semiconductor layer to convert the GaN compound on the surface of the GaN semiconductor layer into a GaO compound that is easier to etch, forming a GaN-GaO semiconductor layer and enhancing the etching effect of the solution. The process conditions for the annealing treatment include: temperature of 400 - 600 °C, gas atmosphere of oxygen atmosphere, and treatment time of 5 - 20 min.

[0077] S34. Wet Etching

[0078] Perform a wet etching process on the N side of the GaN-GaO semiconductor layer as follows:

[0079] Under the condition of a temperature of 80 - 120 °C, place the GaN-GaO semiconductor layer in the etching solution and heat for 10 - 40 min to obtain closely arranged six-sided microcone mirrors on the N side of the GaN-GaO semiconductor layer, and each of the 6 faces of each six-sided microcone mirror is a {10 - 11} crystal plane;

[0080] Among them, the etching solution is a mixed solution formed by ammonia water, H2O2, and H2O, and the volume ratio is ammonia water:H2O2:H2O = 1:0.5 - 1.5:4 - 6; preferably, the volume ratio of substances in the etching solution is ammonia water:H2O2:H2O = 1:1:5 ammonia water. The ammonia water is an ammonia water solution with a mass percentage of 20% - 30%, and the concentration of the H2O2 solution is 25% - 35%.

[0081] Alternatively, under the condition that the temperature is 80 - 120 °C, place the GaN-GaO semiconductor layer in an etching solution and heat it for 10 - 30 min to obtain closely arranged six-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer, and the 6 faces of each six-sided microcone mirror are all {10-1-1} crystal planes;

[0082] Among them, the etching solution is a mixed solution of KOH solution and water, and the volume ratio is KOH solution : H2O = 1 : 4 - 6; preferably, the volume ratio of substances in the etching solution is KOH solution : H2O = 1 : 5, where the KOH solution is a solution with a concentration of 0.01 - 0.02 mol / L.

[0083] Alternatively, under the condition that the temperature is 80 - 120 °C, place the GaN-GaO semiconductor layer in an etching solution and heat it for 10 - 40 min to obtain closely arranged dodecahedral microcone mirrors on the N surface of the GaN-GaO semiconductor layer. Among the 6 faces of each dodecahedral microcone mirror, 6 faces are {20-2-3} crystal planes, and the remaining 6 faces are {22-4-5} crystal planes, and the two are alternately distributed;

[0084] The etching solution is H3PO4 solution, or the etching solution is a mixed solution formed by H3PO4 solution and water, and the volume ratio is H3PO4 solution : H2O = 1 : 16 - 128. Preferably, the volume ratio of substances in the etching solution is H3PO4 solution : H2O = 1 : 16, 1 : 32, 1 : 64 or 1 : 128, where the H3PO4 solution is a solution with a concentration of 0.1 - 0.3 mol / L.

[0085] S4. Remove the photoresist to obtain the micro light-emitting diode.

[0086] In a second aspect, the present invention also provides a micro light-emitting diode prepared by the preparation method as described above.

[0087] The preparation method of the micro light-emitting diode with high surface light extraction efficiency provided by the present invention anneals the N surface of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer; then etches the N surface of the GaN-GaO semiconductor layer to obtain a multi-faceted microcone mirror pattern layer, where the multi-faceted microcone mirror pattern layer includes a plurality of regularly arranged multi-faceted microcone mirrors, the bottom edges of adjacent multi-faceted microcone mirrors are in contact with each other, and the bottom height ratio of the multi-faceted microcone mirror is (1-2.5):1. By annealing the GaN semiconductor layer, GaN on the surface of the GaN semiconductor layer can be converted into GaO, and the material with GaO on the surface is convenient for subsequent etching to form the required multi-faceted microcone mirror pattern layer; moreover, since the multi-faceted microcone mirror pattern layer is arranged densely on the N surface of the GaN-GaO semiconductor layer, the surface light extraction efficiency and the surface light output ratio of the micro light-emitting diode can be increased; in addition, by setting the bottom height ratio of the multi-faceted microcone mirror to (1-2.5):1, better surface light output efficiency can be obtained, and at the same time, it is more conducive to the preparation of the micro light-emitting diode. BRIEF DESCRIPTION OF THE DRAWINGS

[0088] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0089] Figure 1 It is a schematic flow chart of the preparation method of the micro light-emitting diode provided by the present invention;

[0090] Figure 2 It is a schematic structural diagram of the micro light-emitting diode provided by the present invention;

[0091] Figure 3 It is another schematic structural diagram of the micro light-emitting diode provided by the present invention;

[0092] Figure 4 It is a top view structural diagram of the six-sided microcone mirror pattern layer provided by the present invention;

[0093] Figure 5 It is a three-dimensional structural diagram of the six-sided microcone mirror pattern layer provided by the present invention;

[0094] Figure 6 It is an LSE result diagram of different bottom height ratios of the six-sided microcone mirror structure on the surface of a 10-μm micro light-emitting diode;

[0095] Figure 7It is the LSE result diagram of the 10-μm micro light-emitting diode corresponding to the three-sided microcone mirror, six-sided microcone mirror, and twelve-sided microcone mirror structures, with the bottom-to-height ratio = 4:3;

[0096] Figure 8 It is the LSE and S effect diagrams of the six-sided microcone mirror pattern layer of the 10-μm micro light-emitting diode under different bottom sizes T of the microcone mirror;

[0097] Figure 9 It is the photoluminescence (PL) spectrogram of the homogeneous 10-μm micro light-emitting diode before and after wet etching;

[0098] Reference numerals include: 10 is the n-GaN layer; 11 is the passivation layer; 12 is the main structure; 13 is the driving substrate; 14 is the n electrode; 15 is the solder; 16 is the solder joint; 17 is the multi-sided microcone mirror pattern layer; 18 is the sidewall metal reflection layer; 19 is the p electrode. Detailed implementation manners

[0099] In order to enable those skilled in the art to better understand the solution of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

[0100] The prior art, such as patent CN201010617750.5, is a method for preparing a patterned GaN substrate, mainly preparing micro-nano patterns on the GaN surface of a GaN single crystal or composite substrate, and then it can be used as a growth substrate to prepare high-performance GaN-based LEDs. When used for LEDs, since n-GaN needs to be grown again on the top of the substrate, the substrate and the epitaxial layer will have the same material, resulting in an unclear interface and unable to achieve a better effect of reducing total reflection and increasing light extraction. At the same time, for Micro-LEDs, the structure in this patent cannot achieve a better enhancement effect. When used for flip chips, the substrate needs to be peeled off, and the GaN patterned substrate cannot be peeled off well from the GaN-based material of the LED epitaxial layer, and the pattern layer cannot be retained well.

[0101] For another example, in patent CN202010600418.1, an AlN micro-nano structure surface is used as a light extraction optimization layer, and the surface of the annealed AlN is N-polar. Epitaxial layer growth and light extraction structure fabrication are respectively carried out on the first surface and the second surface of the substrate. However, due to the very thick substrate layer that is not thinned, the heat dissipation effect is poor and large total reflection will occur between the epitaxial layer material and the substrate material. Coupled with the absorption of the substrate, etc., in fact, the light extraction structure on the first surface cannot achieve a good effect of enhancing light extraction.

[0102] For another example, in patent CN201710024540.7, which is a method for preparing a nano-patterned substrate using polymer microspheres, it can realize the preparation of a PSS sapphire substrate at the micron and nano scales for improving the light extraction efficiency of GaN-based LEDs. However, in the actual preparation of flip-chip Micro-LED devices, the relatively thick substrate will affect light extraction, and the substrate needs to be peeled and thinned. At this time, the PSS sapphire substrate has limited use and the preparation process is relatively complex.

[0103] Based on this, the present invention provides a method for preparing a micro light-emitting diode based on a multi-faceted microcone mirror that can increase the surface light extraction efficiency and the surface light emission ratio, which will be specifically described below.

[0104] As Figure 1 shown, Figure 1 is a schematic flow chart of the method for preparing a micro light-emitting diode provided by the present invention. The method for preparing a micro light-emitting diode with high surface light extraction efficiency of the present invention specifically includes the following steps:

[0105] S1. Prepare an LED epitaxial wafer

[0106] The preparation of the LED epitaxial wafer includes:

[0107] S11. Provide a substrate structure, and sequentially prepare an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer on the substrate structure by means of Metal-organic Chemical Vapor Deposition (MOCVD) to obtain a first epitaxial wafer.

[0108] S12. Process the first epitaxial wafer to obtain an LED epitaxial wafer.

[0109] Specifically, it includes:

[0110] S121. Clean the first epitaxial wafer.

[0111] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer. The second epitaxial wafer includes a substrate structure, an n-GaN layer, a stress relaxation layer, a quantum well layer, an electron blocking layer, a p-GaN layer, and a transparent conductive layer which are stacked.

[0112] S123. Etch from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures.

[0113] S124. Deposit a passivation layer made of SiO2 on the sidewalls of the mesa structures, the upper surfaces of the mesa structures, and between two adjacent mesas by using plasma enhanced chemical vapor deposition (PECVD), and the deposition thickness is 50 - 300 nm.

[0114] S125. Etch the passivation layer with BOE etching solution to form an n-electrode window, and prepare an n-electrode made of Ti / Al / Ti / Au in the n-electrode window by using electron beam evaporation to form a first LED epitaxial structure. The n-electrode is in contact with the n-GaN layer.

[0115] S126. Anneal the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0116] S127. Etch the passivation layer in the second LED epitaxial structure to form a p-electrode window, and prepare a p-electrode in the p-electrode window to obtain a third LED epitaxial structure. The p-electrode is in contact with the transparent conductive layer.

[0117] S128. Bond the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure.

[0118] S129. Thin or peel the fourth LED epitaxial structure to obtain an LED epitaxial wafer.

[0119] Preferably, the above steps further include a step of depositing a sidewall metal reflection layer after depositing the passivation layer. The material of the sidewall metal reflection layer can be a metal material such as Au, Al, or Ag. The sidewall metal reflection layer is disposed outside the passivation layer on the sides of the stress relaxation layer, the quantum well layer, the electron blocking layer, and the p-GaN layer. The sidewall metal reflection layer is used to reflect the light on the sidewalls back, and it cooperates with the multi-faceted microcone mirror pattern layer to enable more light to exit from the surface, better improving the surface light extraction efficiency and the surface light extraction ratio of the micro light emitting diode.

[0120] In some embodiments, the substrate structure includes a hetero-substrate (such as sapphire) and a u-GaN layer stacked thereon. The fourth LED epitaxial structure is thinned or peeled off to obtain an LED epitaxial wafer, including: peeling off the hetero-substrate to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or, peeling off the hetero-substrate and the u-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer.

[0121] In other embodiments, the substrate structure is a u-GaN layer. The fourth LED epitaxial structure is thinned or peeled off to obtain an LED epitaxial wafer, including: thinning the u-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned homo-substrate; or, thinning the u-GaN layer and the n-GaN layer to obtain an LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned n-GaN layer.

[0122] That is, the substrate structure includes a u-GaN layer. The first epitaxial wafer includes a substrate structure, an n-GaN layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer stacked thereon. For heteroepitaxial growth, laser lift-off of the sapphire substrate is required; for homoepitaxial growth, the u-GaN layer needs to be thinned. After substrate treatment, if the u-GaN layer still remains on the LED epitaxial wafer, a dense multi-faceted microcone mirror pattern layer is etched on the u-GaN layer subsequently; if the u-GaN layer is completely removed, a dense multi-faceted microcone mirror pattern layer is etched on the n-GaN layer subsequently. The finally formed LED epitaxial wafer sequentially includes a GaN semiconductor layer, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer, and the GaN semiconductor layer is the thinned u-GaN layer or n-GaN layer.

[0123] S2. Anneal the N surface of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer.

[0124] S3. Etch the N surface of the GaN-GaO semiconductor layer to obtain a multi-faceted microcone mirror pattern layer.

[0125] Coat a photoresist on the N surface of the GaN-GaO semiconductor layer and bake it, and then etch it to obtain a multi-faceted microcone mirror pattern layer.

[0126] By etching a multi-faceted microcone mirror pattern layer with a special structure on the N surface of the GaN-GaO semiconductor layer, the surface light extraction efficiency and the surface light output ratio can be increased.

[0127] Further, the multi-faceted microcone mirror pattern layer includes a plurality of regularly arranged multi-faceted microcone mirrors, and the bottom edges of adjacent multi-faceted microcone mirrors are in contact with each other, that is, they are closely arranged; the bottom height ratio of the multi-faceted microcone mirror is (1 - 2.5):1. Preferably, the bottom height ratio of the multi-faceted microcone mirror is 1:1, 4:3, 5:3, 5:2; more preferably, the bottom height ratio of the multi-faceted microcone mirror is 4:3. As Figure 6 shown, as the bottom height ratio increases, the surface light extraction efficiency first increases and then decreases; within this range of the bottom height ratio, better surface light extraction efficiency can be achieved, and it is more conducive to the preparation of actual products. If the bottom height ratio is too large or too small, the process difficulty of preparation will increase.

[0128] Further, the multi-faceted microcone mirror is a three-sided microcone mirror, a six-sided microcone mirror or a twelve-sided microcone mirror. When the multi-faceted microcone mirror is a three-sided microcone mirror or a six-sided microcone mirror, the bottom edges of the multi-faceted microcone mirrors are in complete contact without gaps; when the multi-faceted microcone mirror is a twelve-sided microcone mirror, some of the bottom edges of the multi-faceted microcone mirrors are in complete contact without gaps. Although the bottoms of multiple twelve-sided microcone mirrors are closely arranged, there will be a triangular gap in the middle of every three closely arranged twelve-sided microcone mirrors.

[0129] Further, the bottom surface size of the multi-faceted microcone mirror is 100 - 1000 nm, preferably 200 - 1000 nm. When the multi-faceted microcone mirror is a three-sided microcone mirror, the height of the bottom triangle is 100 - 1000 nm; when the multi-faceted microcone mirror is a six-sided microcone mirror or a twelve-sided microcone mirror, the distance between opposite sides of the bottom surface is 100 - 1000 nm.

[0130] Preferably, the etching method is selected from one of wet etching, photolithography, dry etching, and laser direct writing lithography.

[0131] Specifically, when the etching method is wet etching, it includes the following steps:

[0132] S31. Cleaning

[0133] The GaN semiconductor layer is successively placed in acetone, alcohol, and deionized water and ultrasonically cleaned for 3 - 20 min to remove surface organic contamination. The purpose of cleaning is to enable the N surface of the GaN semiconductor layer to better contact the etching solution.

[0134] S32. Removing surface liquid residue

[0135] At room temperature, the N surface of the GaN semiconductor layer is dried with N2 using a nitrogen gun for 3 - 30 min; or the GaN semiconductor layer is dried in an N2 oven for 3 - 15 min at a temperature of 40 - 80 °C.

[0136] S33. Annealing

[0137] Perform rapid annealing treatment on the N side of the GaN semiconductor layer, so that the GaN compound on the surface of the GaN semiconductor layer is converted into a GaO compound that is easier to etch, forming a GaN-GaO semiconductor layer and enhancing the etching effect of the solution. The process conditions for the annealing treatment include: the temperature is 400-600 °C, the gas atmosphere is an oxygen atmosphere, and the treatment time is 5-20 min.

[0138] S34, wet etching

[0139] In one embodiment, perform a wet etching process on the N side of the GaN-GaO semiconductor layer as follows:

[0140] Under the condition that the temperature is 80-120 °C (for example: 80 °C, 85 °C, 90 °C, 95 °C, 100 °C, 105 °C, 110 °C, 115 °C or 120 °C), place the GaN-GaO semiconductor layer in the etching solution and heat it for 10-40 min (for example: 10 min, 15 min, 20 min, 25 min, 30 min, 35 min or 40 min) to obtain closely arranged six-sided microcone mirrors on the N side of the GaN-GaO semiconductor layer, and the 6 faces of each six-sided microcone mirror are all {10-11} crystal planes.

[0141] Furthermore, the etching solution is a mixed solution formed by ammonia water, H2O2 and H2O, and the volume ratio is ammonia water:H2O2:H2O = 1:(0.5-1.5):(4-6), for example: 1:0.5:4, 1:1:4, 1:1.5:4, 1:0.5:5, 1:1:5, 1:1.5:5, 1:0.5:6, 1:1:6 or 1:1.5:6; preferably, the volume ratio of the substances in the etching solution is ammonia water:H2O2:H2O = 1:1:5, the ammonia water is an ammonia water solution with a mass percentage of 25%, and the concentration of the H2O2 solution is 30%.

[0142] In another embodiment, perform a wet etching process on the N side of the GaN-GaO semiconductor layer as follows:

[0143] Under the condition that the temperature is 80-120 °C (for example: 80 °C, 85 °C, 90 °C, 95 °C, 100 °C, 105 °C, 110 °C, 115 °C or 120 °C), place the GaN-GaO semiconductor layer in the etching solution and heat it for 10-30 min (for example: 10 min, 13 min, 15 min, 17 min, 20 min, 23 min, 25 min, 27 min or 30 min) to obtain closely arranged six-sided microcone mirrors on the N side of the GaN-GaO semiconductor layer, and the 6 faces of each six-sided microcone mirror are all {10-1-1} crystal planes.

[0144] Further, the etching solution is a mixed solution of KOH solution and water, and the volume ratio is KOH solution: H2O = 1:4 - 6. For example: 1:4, 1:4.2, 1:4.4, 1:4.6, 1:4.8, 1:5, 1:5.2, 1:5.4, 1:5.6, 1:5.8 or 1:6; preferably, the volume ratio of substances in the etching solution is KOH solution: H2O = 1:5. The KOH solution is a solution with a concentration of 0.01 mol / L.

[0145] In other embodiments, a wet etching process is performed on the N face of the GaN-GaO semiconductor layer, specifically as follows:

[0146] Under the condition that the temperature is 80 - 120 °C (for example: 80 °C, 85 °C, 90 °C, 95 °C, 100 °C, 105 °C, 110 °C, 115 °C or 120 °C), the GaN-GaO semiconductor layer is placed in the etching solution and heated for 10 - 40 min (for example: 10 min, 15 min, 20 min, 25 min, 30 min, 35 min or 40 min) to obtain closely arranged dodecahedral microcone mirrors on the N face of the GaN-GaO semiconductor layer. Six of the faces in each dodecahedral microcone mirror are {20 - 2 - 3} crystal planes, and the remaining six faces are {22 - 4 - 5} crystal planes, and the two are alternately distributed.

[0147] Further, the etching solution is H3PO4 solution. Or, the etching solution is a mixed solution formed by H3PO4 solution and water, and the volume ratio of H3PO4 solution: H2O = 1:(16 - 128). For example: 1:16, 1:26, 1:32, 1:36, 1:46, 1:56, 1:64, 1:66, 1:76, 1:86, 1:96, 1:106, 1:116, 1:122 or 1:128; preferably, the volume ratio of substances in the etching solution is H3PO4 solution: H2O = 1:16, 1:32, 1:64 or 1:128, and the H3PO4 solution is a solution with a concentration of 0.2 mol / L.

[0148] After the etching is completed, organic cleaning is performed to remove the photoresist, and a micro light-emitting diode with a multi-faceted microcone mirror pattern layer is obtained.

[0149] The size of the micro light-emitting diode includes but is not limited to 10 μm and can be from 100 μm to infinitely small.

[0150] The micro light-emitting diodes prepared by the above method sequentially include a multi-faceted microcone mirror pattern layer, an epitaxial layer, electrodes, and a driving substrate, which can effectively improve the surface light extraction efficiency and the surface light output ratio of the micro light-emitting diodes. Among them, the epitaxial layer sequentially includes a GaN-GaO semiconductor layer (an n-GaN layer or a stacked u-GaN layer and n-GaN layer), a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer. The multi-faceted microcone mirror pattern layer is disposed on the GaN-GaO semiconductor layer. A p electrode extending toward the driving substrate is provided on the p-GaN layer, an n electrode extending toward the driving substrate is provided on the semiconductor layer, solder joints corresponding to the p electrode and the n electrode are provided on the driving substrate, and the p electrode and the n electrode are bonded to the solder joints through solder. A passivation layer is provided on the bottom surface of the GaN-GaO semiconductor layer and on the side surfaces of the stress release layer, the quantum well layer, the electron blocking layer, and the p-GaN layer.

[0151] The above etching step needs to control the solution ratio, water bath temperature, and time according to the required multi-faceted microcone mirror pattern layer structure. When using other methods such as dry etching for etching treatment, the corresponding shape is prepared by bombarding the GaN surface with Cl2 or other gases, and the etching gas ratio, flow rate, time, etc. are adjusted as needed for control. Example 1

[0152] In this example, the etching method of the micro light-emitting diode is wet etching, including the following steps:

[0153] S31. Cleaning

[0154] The GaN semiconductor layer is sequentially ultrasonically cleaned in acetone, alcohol, and deionized water for 20 min to remove surface organic contamination. The purpose of cleaning is to enable the N surface of the GaN semiconductor layer to better contact the etching solution.

[0155] S32. Removing surface liquid residue

[0156] At room temperature, the N surface of the GaN semiconductor layer is dried with an N2 gas gun using N2 for 30 min.

[0157] S33. Annealing

[0158] The N surface of the GaN semiconductor layer is subjected to rapid annealing treatment to convert the GaN compound on the surface of the GaN semiconductor layer into a GaO compound that is more easily etched, forming a GaN-GaO semiconductor layer and enhancing the etching effect of the solution. The process conditions for the annealing treatment include: temperature of 500 °C, gas atmosphere of oxygen atmosphere, and treatment time of 20 min.

[0159] S34. Wet etching

[0160] Under the condition that the temperature is 100 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 30 min to obtain closely arranged six-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. The 6 faces of each six-sided microcone mirror are all crystal planes of the same crystal plane family {10-11}S. There is no gap between the bottom edges of multiple six-sided microcone mirrors, and they are completely adhered to each other.

[0161] Among them, the etching solution is a mixed solution formed by ammonia water, H2O2 and H2O, and the volume ratio is ammonia water:H2O2:H2O = 1:1:5. The ammonia water is an ammonia water solution with a mass percentage of 25%, and the concentration of the H2O2 solution is 30%. Example 2

[0162] The wet etching of this example is different from that of Example 1 in that steps S32 and S34 are different.

[0163] In step S32 of this example, the whole piece is dried using an N2 oven for 10 min at a temperature of 60 °C.

[0164] The wet etching step of step S34 in this example is specifically as follows:

[0165] Under the condition that the temperature is 100 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 30 min to obtain closely arranged six-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. The 6 faces of each six-sided microcone mirror are all {10-1-1} crystal planes. There is no gap between the bottom edges of multiple six-sided microcone mirrors, and they are completely adhered to each other.

[0166] Among them, the etching solution is a mixed solution of KOH solution and water, and the volume ratio of the substances in the etching solution is KOH solution:H2O = 1:5, where the KOH solution is a solution with a concentration of 0.01 mol / L. Example 3

[0167] The wet etching of this example is different from that of Example 1 in that step S34 is different. The wet etching step of step S34 in this example is specifically as follows:

[0168] Under the condition that the temperature is 100 °C, the GaN-GaO semiconductor layer is placed in the etching solution and heated for 30 min to obtain closely arranged twelve-sided microcone mirrors on the N surface of the GaN-GaO semiconductor layer. 6 faces of each twelve-sided microcone mirror are {20-2-3} crystal planes, and the remaining 6 faces are {22-4-5} crystal planes, and the two are alternately distributed. The bottoms of multiple twelve-sided microcone mirrors are closely arranged, and there is no gap between some of the bottom edges and they are completely adhered to each other.

[0169] The etching solution is a mixed solution formed by H3PO4 solution and water. The volume ratio of substances in the etching solution is H3PO4 solution:H2O = 1:16, and the H3PO4 solution is a solution with a concentration of 0.2 mol / L. Example 4

[0170] As Figure 1-2 shown, the preparation method of the micro light-emitting diode in this embodiment specifically includes the following steps:

[0171] S1. Prepare an LED epitaxial wafer

[0172] The substrate structure is a u-GaN layer, and the preparation of the LED epitaxial wafer includes:

[0173] S11. Grow a first epitaxial wafer on the substrate structure by metal-organic chemical vapor deposition. The first epitaxial wafer includes, from bottom to top in sequence: a u-GaN layer, an n-GaN layer 10, a stress release layer, a quantum well layer, an electron blocking layer, and a p-GaN layer.

[0174] S12. Process the first epitaxial wafer to obtain an LED epitaxial wafer, that is, use the first epitaxial wafer for the preparation of a Micro-LED flip chip, which includes, in sequence, cleaning of the LED epitaxial wafer, deposition of an ITO thin film, mesa etching, deposition of a passivation layer 11, preparation of an n electrode 14, rapid annealing (high-temperature annealing to form an ohmic contact), preparation of a p electrode 19, thermocompression bonding with a driving substrate 13, and substrate structure processing. Specifically as follows:

[0175] S121. Clean the first epitaxial wafer.

[0176] S122. Prepare a transparent conductive layer such as ITO on the p-GaN layer to obtain a second epitaxial wafer; wherein, the second epitaxial wafer includes a substrate structure, an n-GaN layer 10, a stress release layer, a quantum well layer, an electron blocking layer, a p-GaN layer, and a transparent conductive layer stacked in sequence.

[0177] S123. Etch from the transparent conductive layer until the n-GaN layer 10 is exposed to obtain a plurality of mesa structures.

[0178] S124. Deposit a passivation layer 11 with a material of SiO2 on the sidewalls of the mesa structures, the upper surface of the mesa structures, and between two adjacent mesa structures by PECVD, and the deposition thickness is 200 nm.

[0179] S125. Use a BOE etching solution to etch the passivation layer 11 to form an n electrode 14 window, and use electron beam evaporation to prepare an n electrode 14 with a material of Ti / Al / Ti / Au in the n electrode 14 window to form a first LED epitaxial structure; wherein, the n electrode 14 is in contact with the n-GaN layer 10.

[0180] S126. Anneal the first LED epitaxial structure to obtain a second LED epitaxial structure.

[0181] S127. Etch the passivation layer 11 in the second LED epitaxial structure to form a p-electrode window, and fabricate a p-electrode 19 within the p-electrode window to obtain a third LED epitaxial structure; wherein, the p-electrode 19 is in contact with the transparent conductive layer.

[0182] S128. Bond the third LED epitaxial structure to the driving substrate 13 to obtain a fourth LED epitaxial structure.

[0183] S129. Thin the u-GaN layer of the fourth LED epitaxial structure to obtain an LED epitaxial wafer.

[0184] S2. Anneal the N surface of the GaN semiconductor layer to convert the GaN on the surface of the GaN semiconductor layer into GaO, obtaining a GaN-GaO semiconductor layer.

[0185] S3. Coat a photoresist on the N surface of the GaN-GaO semiconductor layer and perform etching to obtain a multi-faceted microcone mirror pattern layer 17.

[0186] After the etching is completed, perform an organic cleaning to remove the photoresist, obtaining a micro light-emitting diode with a multi-faceted microcone mirror pattern layer 17.

[0187] It can be understood that the semiconductor layer on the top of the chip is etched according to the etching steps in the above embodiments to obtain a dense multi-faceted microcone mirror pattern layer 17, that is, the multiple multi-faceted microcones are closely arranged, which will not be elaborated here.

[0188] As Figure 2 shown, the micro light-emitting diode prepared by the above method sequentially includes a multi-faceted microcone mirror pattern layer 17, an epitaxial layer, an electrode, and a driving substrate 13, which can effectively improve the surface light extraction efficiency of the micro light-emitting diode.

[0189] Further, the epitaxial layer sequentially includes an n-GaN layer 10 and a main structure 12 (including a stacked stress relaxation layer, quantum well layer, electron blocking layer, and p-GaN layer). The multi-faceted microcone mirror pattern layer 17 is disposed on the u-GaN layer. The p-GaN layer has a p-electrode 19 extending towards the driving substrate 13. The semiconductor layer has an n-electrode 14 extending towards the driving substrate 13. The driving substrate 13 has solder joints 16 corresponding to the p-electrode 19 and the n-electrode 14. The p-electrode 19 and the n-electrode 14 are bonded to the corresponding solder joints 16 through solder 15. The bottom surface of the u-GaN layer and the side surfaces of the n-GaN layer 10, stress relaxation layer, quantum well layer, electron blocking layer, and p-GaN layer have a passivation layer 11. Example 5

[0190] As shown Figure 3 in the figure, the preparation method of the micro light-emitting diode in this embodiment is different from that in Embodiment 4 in that, in this embodiment, there is also a step of depositing a metal reflective layer on the sidewall of the Micro-LED between the deposition of the passivation layer 11 (step S124) and the preparation of the n electrode 14 (step S125), so as to form a sidewall metal reflective layer 18 on the outside of the passivation layer 11 on the sides of the stress release layer, the quantum well layer, the electron blocking layer, and the p-GaN layer. Other steps are basically the same as those in Embodiment 4 and will not be elaborated here.

[0191] Testing and Results

[0192] According to the foregoing Embodiment 1, after wet chemical etching, the N surface of the GaN-GaO semiconductor layer will present a dense six-sided microcone mirror pattern layer as shown Figure 4-5 in the figure, where T is the distance between the opposite sides of the bottom surface of the six-sided microcone mirror, and H is the height of the six-sided microcone mirror. The size of different structures can be achieved by adjusting the solution ratio, water bath temperature, and time.

[0193] (1) Bottom-to-height ratio

[0194] Figure 6 LSE diagrams of the six-sided microcone mirror structure of the micro light-emitting diode with a bottom height of 10 μm at different bottom:height ratios.

[0195] Figure 6 It shows that compared with the LSE (6.5%) of the structure without the surface microcone mirror, the LSE of the structure with the six-sided microcone mirror is more than twice that of the original. When the bottom:height = 4:3, the best LSE result can be achieved, which is 15.5%, 2.38 times that of the structure without the surface microcone mirror.

[0196] (2) Microcone mirror structures with different numbers of sides

[0197] According to the foregoing Embodiments 1 to 3, microcone mirror structures with different numbers of sides are formed on the semiconductor layer. Figure 7 LSEs of the N surface of the GaN-GaO semiconductor layer of the micro light-emitting diode with a bottom height of 10 μm corresponding to the three-sided microcone mirror, six-sided microcone mirror, and twelve-sided microcone mirror structures. The bottom-to-height ratio of the multi-sided microcone mirror is 4:3. Figure 7 It shows that the three-sided / six-sided / twelve-sided microcone mirror structures have different improvement effects on the LSE. Among them, the six-sided pyramid mirror structure can achieve the best improvement effect.

[0198] (3) Bottom surface size of the microcone mirror

[0199] Taking the six-sided microcone mirror structure as an example, Figure 8Effect diagrams of the surface light extraction efficiency (LSE) and surface light extraction ratio (S) of the six-sided microcone mirror pattern layer of a 10-μm micro light-emitting diode at different bottom surface sizes T (100 - 1200 nm) of the microcone mirror. Figure 8 It shows that the 100-nm structure has no positive effect on the LSE. When the size is between 200 - 600 nm, the LSE increases with the increase of the micro-nano structure. The structure between 600 - 800 nm remains relatively stable with slight fluctuations. The 1000-nm structure achieves the best LSE and S effects. At this time, S can reach 47%, which is 2.14 times that without the microcone mirror structure (S = 22%), showing an obvious improvement effect.

[0200] (4) Photoluminescence spectrum

[0201] Figure 9 Photoluminescence spectra of micro-regions of homogeneous and 10-μm-sized micro light-emitting diodes before and after wet etching. The horizontal axis is the wavelength, and the vertical axis is the emission intensity. To reduce errors, multiple tests were conducted and the average value of the emission intensity was taken. Figure 9 It shows that the emission intensity of the micro light-emitting diode with a six-sided microcone mirror structure is significantly improved. Its emission intensity is 146.08% of that without the six-sided microcone mirror structure, showing an obvious optimization effect. The overall width of the spectrum becomes wider, but the full width at half maximum remains unchanged.

[0202] There are significant differences between the concepts and objectives of surface light extraction efficiency and overall light extraction efficiency. The preparation method of the micro light-emitting diode with high surface light extraction efficiency in the present invention improves the surface light extraction efficiency and surface light extraction ratio of the flip-chip Micro-LED device through the multi-sided microcone mirror pattern layer with a dense micro-nano structure. It is applicable to Micro-LEDs on the micron scale and does not limit the type of substrate. All LED epitaxial wafer structures can be applied, including but not limited to homogeneous (GaN) and heterogeneous (sapphire, Si, etc.) substrates. The homogeneous substrate is thinned, and the heterogeneous substrate is peeled. At the same time, the multi-sided microcone mirror pattern layer in the above embodiments is formed by etching on the semiconductor. In some other embodiments, dielectric films such as ZnO, SiO2, and Al2O3 can also be formed on the semiconductor layer by evaporation, deposition, etc., and then the multi-sided microcone mirror pattern layer is formed on the dielectric film by the above etching method.

[0203] The preparation method of the micro light-emitting diode in the present invention can be used to improve the surface light extraction efficiency and surface light extraction ratio of the micro light-emitting diode, and can solve the problem of low surface light extraction efficiency of Micro-LEDs. By using the multi-sided microcone mirror pattern layer closely arranged on the top of the micro light-emitting diode, the surface light extraction efficiency of the micro light-emitting diode can be improved, and the improvement effects of the multi-sided microcone mirror pattern layers with different structures and sizes on the surface light extraction efficiency and surface light extraction ratio are different.

[0204] The above embodiments are only used to illustrate the technical concept and characteristics of the present invention, and the purpose is to enable those skilled in the art to understand the content of the present invention and implement it accordingly. It should not be used to limit the protection scope of the present invention. Any equivalent changes or modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.

[0205] The endpoints and any values disclosed herein of a range are not limited to the exact range or value. These ranges or values should be understood to include values close to these ranges or values. For numerical ranges, between the endpoint values of each range, between the endpoint values of each range and a single point value, and between single point values, they can be combined with each other to obtain one or more new numerical ranges, and these numerical ranges should be regarded as specifically disclosed herein.

Claims

1. A method for preparing a micro light emitting diode with high surface light extraction efficiency, characterized in that: The preparation method comprises the following steps: An LED epitaxial wafer is provided; wherein the LED epitaxial wafer comprises a stacked GaN semiconductor layer, a quantum well layer and a p-GaN layer; Annealing the N-side of the GaN semiconductor layer to convert GaN on the surface of the GaN semiconductor layer into GaO to obtain a GaN-GaO semiconductor layer; Etching the N-side of the GaN-GaO semiconductor layer to obtain a multi-faceted micro-conical mirror pattern layer; The multi-faceted micro-conical mirror pattern layer includes a plurality of multi-faceted micro-conical mirrors arranged regularly, and the bottom edges of adjacent multi-faceted micro-conical mirrors are attached to each other; the bottom-to-height ratio of the multi-faceted micro-conical mirrors is (1-2.5):1; The process conditions of the annealing treatment include the gas atmosphere being an oxygen atmosphere; The etching method is wet etching, and the steps of wet etching are as follows: Under the condition of temperature of 80-120° C., placing the GaN-GaO semiconductor layer in an etching solution and heating for 10-40 minutes, so as to obtain closely arranged six-sided micro-conical mirrors on the N-face of the GaN-GaO semiconductor layer, wherein the six faces of each six-sided micro-conical mirror are all {10-11} crystal faces; The etching solution is a mixed solution of ammonia water, H2O2 and H2O, and the volume ratio is ammonia water: H2O2: H2O = 1: (0.5-1.5): (4-6).

2. The preparation method according to claim 1, characterized in that: The process conditions of the annealing treatment include: a temperature of 400-600° C. or a treatment time of 5-20 min; and / or, The steps also include pre-treatment before annealing: Cleaning the GaN semiconductor layer; The N surface of the GaN semiconductor layer is blown dry with nitrogen at room temperature for 3-30 minutes; or the GaN semiconductor layer is dried in a nitrogen oven, wherein the process conditions of the drying treatment include a drying time of 3-15 minutes or a drying temperature of 40-80°C.

3. The preparation method according to claim 1, characterized in that: The preparation of the LED epitaxial wafer includes: Providing a substrate structure, and sequentially preparing an n-GaN layer, a stress release layer, the quantum well layer, an electron blocking layer and the p-GaN layer on the substrate structure to obtain a first epitaxial wafer; Processing the first epitaxial wafer to obtain the LED epitaxial wafer; Before the step of annealing the N-side of the GaN semiconductor layer, the method comprises: Coating photoresist on the surface of the LED epitaxial wafer and baking it; After the step of annealing the N-side of the GaN semiconductor layer, the method further comprises: The photoresist is removed to obtain the micro light emitting diode.

4. The preparation method according to claim 3, characterized in that: The step of processing the first epitaxial wafer to obtain the LED epitaxial wafer comprises: Cleaning the first epitaxial wafer; Preparing a transparent conductive layer on the p-GaN layer to obtain a second epitaxial wafer; wherein the second epitaxial wafer comprises the substrate structure, the n-GaN layer, the stress release layer, the quantum well layer, the electron blocking layer, the p-GaN layer and the transparent conductive layer which are stacked; Etching from the transparent conductive layer until the n-GaN layer is exposed to obtain a plurality of mesa structures; Depositing a passivation layer on the sidewall of the mesa structure, the upper surface of the mesa structure, and between two adjacent mesas; The passivation layer is etched to form an n-electrode window, and an n-electrode is prepared in the n-electrode window to form a first LED epitaxial structure; wherein the n-electrode is in contact with the n-GaN layer; Performing annealing treatment on the first LED epitaxial structure to obtain a second LED epitaxial structure; The passivation layer in the second LED epitaxial structure is etched to form a p-electrode window, and a p-electrode is prepared in the p-electrode window to obtain a third LED epitaxial structure; wherein the p-electrode is in contact with the transparent conductive layer; Bonding the third LED epitaxial structure to a driving substrate to obtain a fourth LED epitaxial structure; The fourth LED epitaxial structure is thinned or peeled off to obtain the LED epitaxial wafer.

5. The preparation method according to claim 4, characterized in that: The substrate structure includes a stacked heterogeneous substrate and a u-GaN layer, and the thinning or peeling off of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: peeling off the heterogeneous substrate to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the u-GaN layer; or peeling off the heterogeneous substrate and the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the n-GaN layer; Alternatively, the substrate structure is a u-GaN layer, and the thinning or peeling off of the fourth LED epitaxial structure to obtain the LED epitaxial wafer includes: thinning the u-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned u-GaN layer; or thinning the u-GaN layer and the n-GaN layer to obtain the LED epitaxial wafer, wherein the GaN semiconductor layer is the thinned n-GaN layer.

6. A micro light emitting diode, wherein the micro light emitting diode is prepared by the preparation method according to any one of claims 1 to 5.

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