Amplitude and phase alignment of phased array elements

Abstract

Systems and methods for operating a beamforming circuit are described. The processor may activate a transmitting element of the plurality of transmitting elements of the beamforming circuit. The processor may activate a receiving element of a plurality of receiving elements of the beamforming circuit. The processor may receive a direct current (DC) signal representing phases and amplitudes of the activated transmitting element and the activated receiving element. The processor may adjust a setting of the beamforming circuit to receive additional DC signals representative of phases and amplitudes of the activated transmitting element and the activated receiving element at the adjusted setting. The processor may determine a calibration value for the beamforming circuit based on the DC signal and the additional DC signal.

Description

Technical Field

[0001] The present application relates to antennas, phased arrays, beamforming, integrated circuits and programs, and to computer-implemented methods and systems related to amplitude and phase alignment of phased array elements. Background Art

[0002] A phased array system may include a beamforming integrated circuit (IC) and multiple antennas. The phased array system may use multiple antenna signal paths, each of which may have a variable time delay. For a phased array system implemented as a receiver (or a receiver channel in a transceiver), the beamforming circuit may use the propagation delay generated by the variable time delay in each antenna signal path of the signal received by the phased array to achieve a higher receiver gain for signals arriving from a specific direction. For a phased array system implemented as a transmitter (or a transmit channel in a transceiver), the beamforming circuit may control the time delay difference between consecutive antenna signal paths of multiple antennas to generate an electromagnetic beam with a specific direction. The beamforming IC may use the change in the time delay difference to direct the electromagnetic beam to different directions. Summary of the invention

[0003] In one embodiment, a method for operating a beamforming circuit is generally described. The method may include activating a transmitting element among a plurality of transmitting elements of the beamforming circuit. The method may also include activating a receiving element among a plurality of receiving elements of the beamforming circuit. The method may also include receiving a direct current (DC) signal representing the phase and amplitude of the activated transmitting element and the activated receiving element. The method may also include adjusting the settings of the beamforming circuit to receive an additional DC signal representing the phase and amplitude of the activated transmitting element and the activated receiving element under the adjusted settings. The method may also include determining a calibration value for the beamforming circuit based on the DC signal and the additional DC signal. The method may align the gain and / or phase of different antennas in a phased array without performing relatively complex signal processing techniques or field measurements.

[0004] In one embodiment, receiving the DC signal and the additional DC signal may include receiving the DC signal and the additional DC signal from a mixer configured to mix the input of the activated transmitting element with the output of the activated receiving element to generate the DC signal and the additional DC signal. Using a mixer in this method can avoid the use of hardware components such as a high sampling rate analog-to-digital converter (ADC) and a digital signal processor (DSP).

[0005] In one embodiment, adjusting the settings of the beamforming circuitry may include scanning a phase shifter in at least one selected from the group consisting of an activated transmit element and an activated receive element. In response to the scanning, the DC signal and the additional DC signal may form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and the adjusted settings. The scanning of the phase shifter may utilize circuitry in a phased array system that includes the beamforming circuitry and may generate different DC signals, wherein variations of the different DC signals may enable relatively low complexity calibration.

[0006] In one embodiment, scanning may include scanning a phase shifter of an activated receive element. Phase scanning of the phase shifter may utilize circuitry in a phased array system including beamforming circuitry and may generate different DC signals, wherein variations in the different DC signals may enable relatively low complexity calibration.

[0007] In one embodiment, the method may further include storing the DC signal and the additional DC signal in a memory. The stored DC signal may be used to align the gain and / or phase of different antennas in the phased array without having to perform relatively complex signal processing techniques or field measurements.

[0008] In one embodiment, the activated transmitting element may be a first transmitting element, the activated receiving element may be a first receiving element, the DC signal may be a first DC signal, and the additional DC signal may be a first additional DC signal. The method may also include storing the first DC signal in a memory in response to receiving the first DC signal and the first additional DC signal. The method may also include deactivating the first transmitting element and the first receiving element in response to storing the first DC signal and the first additional DC signal. The method may also include activating a second transmitting element among a plurality of transmitting elements. The method may also include activating a second receiving element among a plurality of receiving elements. The method may also include receiving a second DC signal representing the phase and amplitude of the second transmitting element and the second receiving element. The method may also include adjusting the settings of the beamforming circuit to receive a second additional DC signal, the second additional DC signal representing the phase and amplitude of the second transmitting element and the second receiving element under the adjusted settings. The method may also include determining a calibration value for the beamforming circuit based on the first DC signal, the first additional DC signal, the second DC signal, and the second additional DC signal. The additional DC signal may be used to align the gain and / or phase of different antennas in a phased array without having to perform relatively complex signal processing techniques or field measurements.

[0009] In one embodiment, the DC signal and the additional DC signal may form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and the adjusted settings. Determining the calibration value may include determining the calibration value based on at least one selected from the group consisting of an extracted parameter of the function, a maximum value of the function, a minimum value of the function, and a zero crossing point of the function. Utilizing features in the sine function may avoid performing relatively complex signal processing techniques or field measurements.

[0010] In one embodiment, determining the calibration value may include determining the calibration value based on the maximum and minimum values ​​of the function to calibrate the gain setting of the beamforming circuit, and determining the calibration value based on the zero crossing point of the sine function to calibrate the phase setting of the beamforming circuit. Utilizing features in the function may avoid performing relatively complex signal processing techniques or field measurements.

[0011] In one embodiment, the activated transmit element may be in a first tile of a multi-tile phased array. The activated receive element may be in a second tile of the multi-tile phased array. A DC signal may be received from a down-conversion mixer of the activated receive element. The method may be implemented to calibrate various types of mismatches or imbalances in a phased array including a multi-tile phased array.

[0012] In one embodiment, a device for operating a phased array is generally described. The device may include a plurality of transmitting elements, a plurality of receiving elements, and a mixer. The mixer may be configured to generate a DC signal representing the phase and amplitude of an activated transmitting element and an activated receiving element in response to being connected to a transmitting element in a plurality of transmitting elements and a receiving element in a plurality of receiving elements. The mixer may be further configured to output a DC signal to a processor to determine a calibration value for the device based on the DC signal. In response to an adjustment of a phase shifter in one of the transmitting element and the receiving element, the mixer may output an additional DC signal representing the phase and amplitude of the transmitting element and the receiving element under the adjustment of the phase shifter. The device can align the gain and / or phase of different antennas in a phased array without having to perform relatively complex signal processing techniques or field measurements.

[0013] In one embodiment, the mixer may be configured to mix the input of the transmit element and the output of the receive element to generate a DC signal. Utilizing a mixer may avoid the use of hardware components such as a high sampling rate analog-to-digital converter (ADC) and a digital signal processor (DSP).

[0014] In one embodiment, the adjustment of the phase shifter can be a scan of the phase shifter in at least one selected from the group consisting of a transmit element and a receive element. The phase scan of the phase shifter can utilize circuits in a phased array system including a beamforming circuit and can generate different DC signals, wherein changes in the different DC signals can achieve relatively low complexity calibration.

[0015] In one embodiment, the transmitting element may be a first transmitting element, the receiving element is a first receiving element, the DC signal is a first DC signal, and the additional DC signal is a first additional DC signal. The mixer may be further configured to operate in response to disconnecting from the first transmitting element and the first receiving element. The mixer may be further configured to generate a second DC signal representing the phase and amplitude of the second transmitting element and the second receiving element in response to being connected to the second transmitting element and the second receiving element. The mixer may be further configured to output a second additional DC signal representing the phase and amplitude of the second transmitting element and the second receiving element under the adjustment of the other phase shifter in response to the adjustment of the other phase shifter in one of the second transmitting element and the second receiving element. The mixer may be further configured to output the second DC signal and the second additional DC signal to the processor. The additional DC signal can be used to align the gain and / or phase of different antennas in the phased array without performing relatively complex signal processing techniques or field measurements.

[0016] In one embodiment, the transmit element may be in a first tile of a multi-tile phased array. The receive element may be in a second tile of the multi-tile phased array. The mixer may be a down-conversion mixer of an activated receive element. The method may be implemented to calibrate various types of mismatches or imbalances in a phased array including a multi-tile phased array.

[0017] In one embodiment, a system for operating a phased array is generally described. The system may include a beamforming circuit including a plurality of transmitting elements and a plurality of receiving elements. The system may also include a mixer and at least one processor. The at least one processor may be configured as the at least one processor is configured to activate a transmitting element in the plurality of transmitting elements. The at least one processor may further be configured to activate a receiving element in the plurality of receiving elements. The mixer may be configured to mix the input of the activated transmitting element and the output of the activated receiving element to generate a DC signal representing the phase and amplitude of the activated transmitting element and the activated receiving element. The at least one processor may be configured to receive the DC signal from the mixer. The at least one processor may be configured to adjust the settings of the beamforming circuit to receive an additional DC signal from the mixer. The additional DC signal may represent the phase and amplitude of the activated transmitting element and the activated receiving element under the adjusted settings. The at least one processor may be configured to determine a calibration value for the beamforming circuit based on the DC signal and the additional DC signal. The system can align the gain and / or phase of different antennas in the phased array without having to perform relatively complex signal processing techniques or field measurements.

[0018] In one embodiment, at least one processor may be configured to scan a phase shifter. The phase shifter may be in one of an activated transmit element and an activated receive element. In response to the scan, the DC signal and the additional DC signal may form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and an adjusted setting. The scanning of the phase shifter may utilize circuitry in a phased array system including beamforming circuitry, and may generate different DC signals, wherein variations of the different DC signals may enable relatively low complexity calibration.

[0019] In one embodiment, the activated transmitting element may be a first transmitting element, the activated receiving element may be a first receiving element, the DC signal may be a first DC signal, and the additional DC signal may be a first additional DC signal. The at least one processor may be configured to store the first DC signal in a memory in response to receiving the first DC signal. The at least one processor may be configured to deactivate the first transmitting element and the first receiving element in response to storing the first DC signal. The at least one processor may be further configured to activate a second transmitting element among the plurality of transmitting elements. The at least one processor may be configured to activate a second receiving element among the plurality of receiving elements. The mixer may be configured to generate a second DC signal representing a phase and a gain of a second transmitting element and a second receiving element. The at least one processor may be configured to receive the second DC signal from the mixer. The at least one processor may be configured to adjust the settings of the beamforming circuit to receive the second additional DC signal from the mixer. The second additional DC signal may represent the phase and amplitude of the second transmitting element and the second receiving element under the adjusted settings. The at least one processor may be configured to determine a calibration value for the beamforming circuit based on the first DC signal, the first additional DC signal, the second DC signal, and the second additional DC signal. The additional DC signal may be used to align the gain and / or phase of different antennas in a phased array without having to perform relatively complex signal processing techniques or field measurements.

[0020] In one embodiment, the DC signal and the additional DC signal may form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and an adjusted setting. The at least one processor may be configured to determine the calibration value based on at least one selected from the group consisting of an extracted parameter of the function, a maximum value of the function, a minimum value of the function, and a zero crossing point of the function. Utilizing features in the sine function may avoid performing relatively complex signal processing techniques or field measurements.

[0021] In one embodiment, the at least one processor may be configured to determine a calibration value based on a maximum value and a minimum value of the function to calibrate a gain setting of the beamforming circuit, and to determine a calibration value based on a zero crossing point of the sine function to calibrate a phase setting of the beamforming circuit. Utilizing features in the function may avoid performing relatively complex signal processing techniques or field measurements.

[0022] In one embodiment, the activated transmit element can be in a first tile of a multi-tile phased array, the activated receive element can be in a second tile of the multi-tile phased array, and the mixer can be a down-conversion mixer of the activated receive element. The system can be implemented for calibrating various types of mismatches or imbalances in a phased array including a multi-tile phased array.

[0023] Further features as well as the structure and operation of various embodiments are described in detail below with reference to the accompanying drawings. In the drawings, like reference numerals indicate identical or functionally similar elements. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1A An example system is shown that can achieve amplitude and phase alignment of phased array elements in one embodiment.

[0025] Figure 1B Another example system that can achieve amplitude and phase alignment of phased array elements in one embodiment is shown.

[0026] Figure 1C Another example system that can achieve amplitude and phase alignment of phased array elements in one embodiment is shown.

[0027] Figure 2A The process of amplitude and phase alignment of phased array elements in one embodiment is shown.

[0028] Figure 2B In one embodiment, Figure 2A continuation of the process.

[0029] Figure 3 A multi-tile phased array is shown that can achieve amplitude and phase alignment of phased array elements in one embodiment.

[0030] Figure 4A An example implementation of amplitude and phase alignment of phased array elements in a multi-tile phased array in one embodiment is shown.

[0031] Figure 4B In one embodiment, Figure 4A Continuation of the example implementation of .

[0032] Figure 5 A flow chart related to amplitude and phase alignment of phased array elements in one embodiment is shown. DETAILED DESCRIPTION

[0033] In one aspect, changes between the gain and / or phase in the signal paths corresponding to the two antennas can produce different amplitudes and / or phases in the signals radiated by the antennas. Therefore, having the same or substantially the same gain and phase across the antenna array can be advantageous for the antenna array to transmit the same signal. Gain and / or phase calibration can be performed to align the antennas in amplitude and / or phase, respectively. Gain and / or phase alignment can reduce variations between different antennas. The systems (e.g., system 100 in FIG. 1 ) and methods described herein can align the gain and / or phase of different antennas without performing relatively complex signal processing techniques. In response to the alignment, the phased array can form a transmit or receive beam in a predictable manner by applying a corresponding phase or time delay to each antenna.

[0034] Figure 1A An example system is shown that can implement amplitude and phase alignment of phased array elements in one embodiment. System 100 can be an RF system implemented by a communication device such as a radio frequency (RF) transmitter, an RF receiver, or an RF transceiver. System 100 can be configured to operate at public wireless radio frequencies, millimeter wave frequencies, microwave frequencies, and / or other frequencies. System 100 can be part of a wireless communication network, such as a fourth generation (4G) wireless communication system, a fifth generation (5G) wireless communication system, a satellite communication system, a point-to-point communication system such as a public data link, and / or other types of wireless communication networks.

[0035] System 100 may include circuit 101, one or more beamforming integrated circuits (ICs)

[0036] 102, multiple antennas 103, a processing element 120, and a mixer 150. The beamforming IC 102 and the multiple antennas 103 may form a phased array system. The multiple antennas 103 may include multiple individual antennas and / or antenna arrays with different numbers of antennas. Each antenna in the antenna 103 may output an RF signal with a corresponding amplitude and phase. The system 100 may include K beamforming ICs 102 (e.g., 1021, ..., 102 K ), they can be identical to each other. Figure 1A In the case of a beamforming IC 102 K As an example, each beamforming IC 102 may include a processing element 120, a mixer 150, a memory device 122, a plurality of transmit elements 106 (eg, M transmit elements 1061, . . . , 106 M ), and a plurality of receiving elements 108 (eg, N receiving elements 108 1 , . . . , 108 N). In one or more embodiments, the beamforming IC 102 may include elements (e.g., tiles), each of which may include one transmit element 106 and one receive element 108, and each element may be switched to perform a transmit or receive function. The memory device 122 may include volatile memory, non-volatile memory, registers, and / or other types of storage devices that may store data related to the operation of the system 100.

[0037] exist Figure 1B In another embodiment shown, the processing element 120, the memory device 122, and the mixer 150 may be stand-alone devices external to the beamforming IC 102. In one embodiment, the processing element 120 may be a stand-alone processing device, such as a field programmable gate array (FPGA) device or a state machine. In other embodiments, the processing element 120 may be software running on a general-purpose computer platform that interacts with the beamforming IC 102. In one or more embodiments, the processing element 120 may include an analog-to-digital converter (ADC) to process direct current (DC) signals. In one or more embodiments, the processing element 120 may be connected to an ADC that is external to the processing element 120 and may process DC signals. Each transmitting element 106 and receiving element 108 may include a corresponding set of components, such as a gain control circuit 109, a phase shifter 110, one or more mixers, such as mixer 150, for combining an RF signal with a local oscillator (LO) signal. In Figure 1C In another embodiment shown, the processing element 120, the memory device 122, and the mixer 150 can be separate devices external to the beamforming IC 102, and the mixer 150 can be connected to the splitter 130 and the combiner 133 of the beamforming IC 102. The splitter 130 can be connected to the transmit element 106 to route the signal to the transmit element 106. The combiner 133 can be connected to the receive element 108 to combine the signals from the receive element 108. In some embodiments, multiple transmit elements can be grouped together and activated together, and similarly, multiple receive elements can be grouped together and activated together. The mixer 150 can process the combined signal through the multiple activated transmit elements and the multiple activated receive elements and the corresponding antennas.

[0038] Circuit 101 may be part of an RF communication device, such as a radio frequency (RF) transmitter, an RF receiver, a transmission channel of an RF transceiver, or a receiver channel of an RF transceiver. In one embodiment, circuit 101 may include a baseband processor, a mixer circuit such as an up-down converter, a filter, a memory device, a local oscillator, a digital-to-analog converter (DAC) (if circuit 101 is an RF transmitter, or a transmission channel of an RF transceiver), an analog-to-digital converter (ADC) (if circuit 101 is an RF receiver, or a receiver channel of an RF transceiver), a signal generator, a microcontroller, and / or other types of components or integrated circuits belonging to an RF communication device. When system 100 is intended to operate as a transmitter, circuit 101 may be configured to output an RF signal, such as RF signal 132, to transmit element 106. In examples where circuit 101 is part of an RF transceiver or receiver, circuit 101 may also be configured to receive an RF signal, such as RF signal 134, from receive element 108 of beamforming IC 102. The RF signals exchanged between circuitry 101 and beamforming IC 102 may be signals at radio frequencies, millimeter wave frequencies, microwave frequencies, and / or other frequencies that may carry information or data.

[0039] Phase shift control settings may be input to each phase shifter 110 to control the phase of the RF signal output or received by the antenna 103. Gain control settings may be input to each gain control circuit 109 to control the gain of the RF signal output or received by the antenna 103. In some embodiments, the phase shifter 110 may be implemented in software, an FPGA, and / or another processor. In one or more embodiments, the phase shifter 110 may be implemented on one or more of the local oscillator (LO) path, the RF path, and the intermediate frequency (IF) path of the beamforming IC 102. The embodiments described below assume an RF phase shifter. In order to transmit an RF signal, beam control may be achieved by adjusting the phase shifter 110 in the transmit element 106. The phase delay on the transmit element 106 may produce an interference pattern that can focus the beam 104 in a particular direction. The beam 104 may have a field pattern and a beam direction, which may be based on gain and phase parameters set in the front-end circuit of the beamforming IC 102. To receive RF signals, the phase delays on the receive element 108 can cause the received RF signals to coherently combine when arriving at the antenna 103 from a particular direction, thereby forming a receiver beam in the particular direction. The receiver beam can have a field pattern and beam direction that can be based on the gain and phase parameters set in the receive element 108.

[0040] The mixer 150 may be configured to receive two input signals and generate an output signal having a new frequency component. In one embodiment, the system 100 may operate in a calibration mode, and the two input signals that may be input to the mixer 150 may be 1) an RF signal 132 input to the transmit element 1061, and 2) an RF signal 134 from the receive element 1081. In the calibration mode, the RF signal 132 may be a test signal applied from the circuit 101 to the input of the activated transmit element 1061. The RF signals 132, 134 may be sinusoidal signals having the same frequency. In one embodiment, the output of the activated transmit element and the input of the activated receive element may not be completely isolated, thereby enabling signals to be coupled between them. In response to receiving the RF signals 132, 134 as inputs, the mixer 150 may generate an output signal 152. In one embodiment, the output signal 152 may be a direct current (DC) output or DC signal that represents or captures a combination of the phase and gain of the activated transmit and receive elements (e.g., the transmit element 1061 and the receive element 1081). In one embodiment, at a particular phase setting of the phase shifter 110 in at least one of the activated transmit and receive elements, the DC output may be a value indicating a combination of the path gain and phase of the activated transmit element 1061 and receive element 1081 and the gain and phase of the wireless coupling between the antennas connected to the activated transmit and receive elements. When the phase setting of the activated transmit and / or receive element changes, the signal 152 may also change, and the change in the signal 152 may represent or capture the phase and gain changes of the activated transmit and receive elements. In one embodiment, the mixer 150 may be implemented in hardware such as an analog circuit. In another embodiment, the mixer 150 may be implemented as software, an FPGA, and / or another processor by processing in-phase and quadrature data or RF data.

[0041] In one embodiment, output signals from the mixer 150, including the output signal 152, can be used to determine calibration values ​​or parameters that can be used to calibrate the gain and / or phase settings of the transmit element 106 and the receive element 108 of the beamforming IC 102. In one aspect, the calibration values ​​can provide settings that make the gain and / or phase of the transmit element and the receive element precise (e.g., with minimal error) or deterministic. For example, when a phased array is used to create a beam pointing in its main direction (broadside), the calibration mode of the system 100 can align the gain and / or phase of different antennas in the phased array without performing relatively complex signal processing techniques or field measurements. In another example, when a phased array is used to create a beam with a specified shape, the calibration described herein can ensure that the gain and / or phase of each antenna in the phased array is exactly the specified value, and this can be achieved using relatively simple signal processing techniques and field measurements. In one embodiment, the processing element 120 can be configured to perform a scan of the phase shifter 110 in the transmit element 106 and / or the receive element 108. The scanning may include, for example, setting the phase shifter to a plurality of different phase settings within a predetermined amount of time. In response to the transmit element and the receive element being activated, the scanning performed by the processing element 120 may cause the mixer 150 to output one or more DC signals (e.g., DC outputs) that may form a sinusoidal function of the phase and amplitude (or gain) of the activated transmit and receive elements. In one aspect, if the phase shifter 110 is configured to a specific phase setting, the output of the mixer 150 may be a constant value. The scanning performed by the processing element 120 allows the mixer 150 to provide different values ​​that vary with the phase setting, and the varying values ​​form a DC output (or a set of DC outputs) having a sinusoidal waveform. In one embodiment, in response to the scanned phase shifter being a calibrated phase shifter (e.g., an ideal phase shifter without gain non-ideality or phase non-ideality), the DC output may form a sinusoidal function. In one embodiment, if the phase shifter is non-ideal or uncalibrated, separate compensation of the non-ideality produces a sinusoidal waveform. Furthermore, the amplitude of the sinusoidal waveform may be a function of the gain of the transmit element 106 and the receive element 108. In one embodiment, the peak-to-peak (e.g., maximum value minus minimum value) of the sinusoidal waveform may be proportional to the total gain of the transmit path of the activated transmit element, the receive path of the activated receive element, and the coupling gain between the antennas connected to the activated transmit and receive elements. Furthermore, the phase setting that results in the zero crossing of the sinusoid may indicate the total phase of the coupling gain between the transmit path of the activated transmit element, the receive path of the activated receive element, and the antennas connected to the activated transmit and receive elements.In one embodiment, for a given set of settings or variables (e.g., N types or combinations of gain and / or phase settings), the function can be a multidimensional function including coefficients and parameters, where the coefficients and parameters can represent fitting parameters for the N types of settings (e.g., gain and / or phase settings), as well as gain and phase variations within an element. Under specific goals and / or constraints (e.g., target accuracy for a specific beam shape and direction), the solution to the multidimensional function can generate a set of fitting parameters that can be used to determine calibration values. For example, the solution to the sine function formed by the DC output of mixer 150 can extract features such as the minimum, maximum, and zero crossing points of the sine function, and these extracted features are used to determine calibration values.

[0042] In response to obtaining the DC output indicating the phase and gain changes between the activated transmit and receive elements, the processing element 120 may deactivate the activated transmit and receive elements and activate a new set or pair of transmit and receive elements. The processing element 120 may perform a scan of the new set of transmit and receive elements to measure another DC output from the mixer 150 indicating the phase and gain changes between the new set of transmit and receive elements. The processing element 120 may continue to scan each pair of transmit and receive elements in the beamforming IC 102 and store the DC output in a memory device of the beamforming IC 102. In one embodiment, to activate a pair of elements including one transmit element and one receive element, the processing element 120 may switch or select connections in the splitter 130 and / or combiner 133 of the beamforming IC 102 to connect the pair of elements to the mixer 150 (e.g., the deselected elements may be disconnected from the mixer 150). In embodiments where the splitter 130 and the combiner 133 are passive devices, activating the individual transmit and receive elements is sufficient to connect the activated elements to the mixer 150. To deactivate an element pair including one transmit element and one receive element, the processing element 120 may disconnect the mixer 150 from the activated element pair. Thus, a splitter and / or combiner embedded in the beamforming IC 102 may be utilized.

[0043] In response to storing the DC output indicating the phase and gain variations of each pair of transmit and receive elements in the beamforming IC 102, the processing element 120 may perform one or more calculations on the stored phase and gain variations to determine an imbalance (e.g., gain and / or phase difference or imbalance) between transmit elements and / or an imbalance between receive elements of the beamforming IC 102. The processing element 120 may determine calibration values ​​to calibrate the gain (or amplitude) and / or phase settings of the transmit elements 106 and the gain (or amplitude) and / or phase settings of the receive elements 108 in the beamforming IC 102. The calibration may account for the imbalance between the transmit elements 106 and the imbalance between the receive elements 108 in the beamforming IC 102. In one aspect, the resulting phase and amplitude mismatch may occur in each element of the phased array due to variations in intermediate frequency (IF) circuitry and signal distribution, or local oscillator (LO) circuitry and signal distribution, or radio frequency (RF) circuitry signal distribution. In some embodiments, mixer 150 may be integrated at a specific location in system 100 so that these different types of changes can be calibrated. In one or more embodiments, one or more types of changes in these changes may be calibrated. In one or more embodiments, processing element 120 may use specific characteristics of the stored sinusoidal function of phase and gain changes, such as maximum values, minimum values, zero crossing point values, or other characteristics, to determine calibration values. In one embodiment, processing element 120 may determine calibration values ​​based on the maximum and minimum values ​​of the sinusoidal function to calibrate the gain setting of gain control circuit 109 in beamforming IC 102. Processor element 120 may also determine calibration values ​​based on the zero crossing points of the sinusoidal function to calibrate the phase setting of phase shifter 110 of beamforming IC 102.

[0044] Figure 2A and Figure 2B A process 200 for amplitude and phase alignment of phased array elements in one embodiment is shown. The process 200 may be performed by the processing unit 120 (see FIG. 1 ) to obtain a plurality of DC outputs indicating phase and gain changes between the transmit and receive element pairs of the beamforming IC 102 in FIG. 1 . In one iteration 202 of the process 200 , the processing unit 120 may activate the connection between the mixer 150 and the transmit element 1061 and the receive element 1082 . The mixer 150 may generate a series of output signals, which may form a DC output having a sinusoidal waveform, which represents or captures the phase change θ between the transmit element 1061 and the receive element 1082 12. The processing element 120 may scan the phase shifter 110 of the receiving element 1082 by adjusting the phase setting of the phase shifter 110 of the receiving element 1082 for one or more iterations. In one embodiment, the processing element 120 may scan the phase shifter 110 by adjusting the phase setting to a plurality of predetermined values, or by randomly selecting a phase setting within a predetermined phase range (e.g., from -90° to 90°, etc.). In one or more embodiments, the phase shifter in the LO path or the IF path may undergo a sweep such that the phase of the transmitting element or the phase of the receiving element changes. The processing element 120 may scan the phase shifter 110 representing θ 12 The DC output of the beamforming IC 102 is stored in a memory device of the corresponding beamforming IC 102, and the stored representation θ 12 The DC output of θ may be associated or mapped in the memory device with the transmitting element 1061 and the receiving element 1082. The processing element 120 may use the stored representation θ 12 The DC output of θ is used to determine the calibration values ​​for the transmitting element 1061 and the receiving element 1082. For example, θ 12 can be the zero crossing value of the mixer 150 (or the phase shifter setting that results in the zero crossing of the sine wave). In addition, the maximum and minimum values ​​of the sinusoidal curve (here g 12,min-max ) may be stored in the processing element 120 to represent or capture the magnitude.

[0045] In response to processing element 120 storing a representation θ 12 and g 12,min-max The process 200 may proceed to iteration 204, where the processing element 120 may deactivate the connection between the mixer 150 and the transmitting element 1061 and the receiving element 1082, and activate the connection between the mixer 150 and the transmitting element 1064 and the receiving element 1082. The mixer 150 may generate a series of output signals, which may form a DC output having a sinusoidal waveform, which represents or captures the phase change θ between the transmitting element 1064 and the receiving element 1082. 42 The processing element 120 may scan the phase shifter 110 of the receiving element 1082 by adjusting the phase setting of the phase shifter 110 of the receiving element 1082 for one or more iterations. 42 The processing element 120 may be a phase shifter setting that results in a zero crossing of the DC waveform. 42 The DC output of the beamforming IC 102 is stored in a memory device of the corresponding beamforming IC 102, and the stored representation θ 42 The DC output of θ may be associated or mapped in the memory device with the transmitting element 1064 and the receiving element 1082. The processing element 120 may use the stored representation θ 42The DC output of θ can be used to determine the calibration values ​​for the transmitting element 1064 and the receiving element 1082. 42 The maximum and minimum values ​​of the DC output sinusoidal curve (here g 42,min,max ).

[0046] In response to processing element 120 storing θ 42 , process 200 may proceed to iteration 206, where processing element 120 may deactivate the connection between mixer 150 and transmit element 1064 and receive element 1082, and activate the connection between mixer 150 and transmit element 1061 and receive element 1083. Mixer 150 may generate a series of output signals, which may form a DC output having a sinusoidal waveform, which DC output represents a phase change θ between transmit element 1061 and receive element 1083. 13 The processing element 120 may scan the phase shifter 110 of the receiving element 1083 by adjusting the phase setting of the phase shifter 110 of the receiving element 1083 for one or more iterations. ... 13 The DC output of the beamforming IC 102 is stored in a memory device of the corresponding beamforming IC 102, and the stored representation θ 13 The DC output of θ may be associated or mapped in the memory device with the transmitting element 1061 and the receiving element 1083. The processing element 120 may use the stored representation θ 13 The DC output of θ can be used to determine the calibration values ​​for the transmitting element 1061 and the receiving element 1083. 13 The maximum and minimum values ​​of the DC output sinusoidal curve (here g 13,min,max ).

[0047] In response to processing element 120 storing θ 13 , process 200 may proceed to iteration 208, where processing element 120 may deactivate the connection between mixer 150 and transmit element 1061 and receive element 1083, and activate the connection between mixer 150 and transmit element 1064 and receive element 1083. Mixer 150 may generate a series of output signals, which may form a DC output having a sinusoidal waveform, which DC output represents a phase change θ between transmit element 1064 and receive element 1083. 43 The processing element 120 may scan the phase shifter 110 of the receiving element 1083 by adjusting the phase setting of the phase shifter 110 of the receiving element 1083 for one or more iterations. ... 43 The DC output of the beamforming IC 102 is stored in a memory device of the corresponding beamforming IC 102, and the stored representation θ 43The DC output of θ may be associated or mapped in the memory device with the transmitting element 1064 and the receiving element 1083. The processing element 120 may use the stored representation θ 43 The DC output of θ can be used to determine the calibration values ​​for the transmitting element 1064 and the receiving element 1083. 43 The maximum and minimum values ​​of the DC output sinusoidal curve (here g 43,min,max ).

[0048] The processing element 120 may continue to activate one transmit element and one receive element at a time, and for each activation, scan the phase shifter of the activated transmit element and one of the activated receive elements to obtain a DC output from the mixer 150. The processing element 120 may perform iterative activation and scanning for each pair of transmit and receive elements in the beamforming IC 102. The DC output obtained from the activation and scanning may be stored and used in the determination of the calibration value. In one embodiment, the processing element 120 may obtain the DC output of each pair of transmit elements and receive elements, store the DC output, and use the stored DC output to determine the calibration value of the beamforming IC 102.

[0049] In another embodiment, the processing element 120 may perform a scan and obtain the DC output of a particular group of transmit and receive elements, and determine the calibration values ​​of the particular group of transmit and receive elements before continuing to scan the next group of transmit and receive elements. For example, the processing element 120 may perform a scan and obtain the DC output of two transmit elements and two receive elements (e.g., process 200), and determine the calibration values ​​of the two transmit elements and two receive elements before continuing to scan the next group of transmit and receive elements. The number of elements in the transmit and receive element group may be arbitrary and depends on the desired implementation of the system 100. In addition, scanning a particular group of elements at a time may allow the system to adaptively determine the number of elements to scan, rather than every element in the beamforming IC 102. For example, if after scanning and calibrating X transmit and receive elements, the imbalance between the transmit elements of the beamforming IC 102, or the imbalance between the receive elements, falls below a predefined threshold, the system 100 may stop scanning until the imbalance exceeds the predefined threshold.

[0050] In one embodiment, processing element 120 may compile an equation describing the relationship between a pair of elements (e.g., transmit and / or receive elements). For example, processing element 120 may sum the DC outputs of the different elements, remove the common component in the sum, and the remaining component may indicate an imbalance between the different elements. Figure 2A and Figure 2B As an example, in response to obtaining a representation θ 12 ,θ 42 ,θ 13,θ 43 The processing element 120 can use these obtained DC outputs to determine the imbalance (e.g., gain and / or phase difference or imbalance) between the transmitting elements 1061 and 1064 and generate calibration values ​​for the transmitting elements 1061 and 1064.

[0051] To determine the phase difference or phase imbalance between transmit elements 1061 and 1064, processing element 120 may perform calculations using the stored DC outputs. Note that θ 12＝ θ TX1 +θ RX2 +θ C12 θ C12 can be the phase of the coupling between the transmitting element 1061 and the receiving element 1062, for example through the respective antennas. Similarly, θ 42＝ θ TX4 +θ RX2 +θ C42 By subtracting θ 12 and θ 42 , removing the common θ RX2 term, leading to θ 12 -θ 42 =θ TX1 -θ TX4 +θ C12 -θ C42 θ C42 can be the phase of the coupling between the transmitting element 1064 and the receiving element 1062, for example through the respective antennas. Similarly, we can calculate θ 13 -θ 43＝ θ TX1 -θ TX4 +θ C13 -θ C43 By adding the two resulting equations, we obtain 2(θ TX1 -θ TX4 )=(θ 12 -θ 42 )+(θ 13 -θ 43 )+(θ C12 -θ C43 )+(θ C13 -θ C42 ).θ C13 θ may be the phase of the coupling between the transmitting element 1061 and the receiving element 1063, for example via the respective antennas. C43θ may be the phase of the coupling between the transmit element 1064 and the receive element 1063, for example through the respective antennas. Assuming that the four antennas are selected with a certain symmetry, the coupling terms may be equal and thus cancel. Thus, the phase difference between the transmit elements 1061 and 1064 may be calculated using the previously stored values ​​as ((θ 12 -θ 42 )+(θ 13 -θ 43 )) / 2. Once the phase difference is obtained, the corresponding phase difference can be used as a calibration value. In a similar manner, the phase difference between receiver elements 1082 and 1083 can be calculated as ((θ 12 -θ 13 )+(θ 42 -θ 43 )) / 2. In addition, in a similar manner, the gain difference between the transmitting elements and the gain difference between the receiving elements can be calculated using the previously stored g min,max The values ​​are calculated and the obtained gain difference can be applied as calibration. In some embodiments, instead of using two transmitters and two receivers, a larger number can be used to obtain more equations with more redundancy in order to reduce the calibration uncertainty due to any measurement noise and uncertainty.

[0052] In one aspect, calibration of relatively large phased arrays may be critical for performance improvement, since an uncalibrated phased array may have, for example, a signal loss of 6 decibels (dB) and sidelobe levels that may be up to, for example, 10 dB worse than expected. The systems and methods described herein may avoid implementing expensive techniques such as field measurements or complex digital signal processing. The methods described herein, including process 200, may be implemented for multi-tile phased arrays and for various array geometries for both transmitting and receiving elements. In some embodiments, the systems and methods described herein may avoid the use of digital hardware components, such as ADCs and digital signal processors (DSPs). In addition, the imbalance and calibration determination described herein may be applicable to various mismatches in phased arrays, such as local oscillator (LO) input phase mismatches between ICs and / or packages, intermediate frequency (IF) input phase mismatches between ICs and / or packages, circuit mismatches between elements of an IC, and circuit mismatches between elements on an IC and / or package. It may be noted that coupling between elements operating in different polarizations may also be used for calibration. For example, if the transmitting element operates in H polarization and the receiving element operates in V polarization, the process will still be valid. Additionally, it may be noted that in some embodiments, the transmit element and the receive element may share the same physical antenna. As long as the coupling is symmetrical or identical, the calibration described herein is applicable.

[0053] Figure 3A multi-tile phased array is shown that can achieve amplitude and phase alignment of phased array elements in one embodiment. Figure 3 The multi-tile phased array 300 shown in FIG. 3 may include four tiles, such as tiles 301, 302, 303, and 304. Figure 3 Four tiles are shown in FIG, but the multi-tile phased array 300 may include any number of tiles. A splitter 305 may be connected to tiles 301, 302, 303, 304. Splitter 305 may be configured to receive a local oscillator (LO) signal 306 and distribute the LO signal 306 to tiles 301, 302, 303, 304. The distribution performed by splitter 305 and the traces connecting splitter 305 to tiles 301, 302, 303, 304 may result in phase delays θ0, θ1, θ2, θ3, which may be different from each other, resulting in phase misalignment. If tiles 301, 302, 303, 304 are the same, the differences between θ0, θ1, θ2, θ3 need to be calibrated. In response to phase misalignment between tiles 301, 302, 303, 304, array gain and sidelobe suppression may be significantly degraded. The systems and methods herein can synchronize tiles in a multi-tile phased array 300 (see Figure 4A , Figure 4B ).

[0054] Figure 4A and Figure 4B An example implementation of amplitude and phase alignment of phased array elements in a multi-tile phased array in one embodiment is shown. Figure 4A In one embodiment shown in , tile k and tile k+1 may be a multi-tile phased array (e.g., Figure 3 1 ). Tile k may include element 412, front end 414 connected to antenna 401, and front end 416 connected to antenna 402. Tile k+1 may include element 422, front end 424 connected to antenna 403, and front end 426 connected to antenna 404. Elements 412, 422 may be implemented as transmit elements (e.g., transmit elements 106 in FIG. 1 ) and receive elements (e.g., Figures 1A to 2B The front end 414, 424 may be activated in a transmit mode to transmit signals from the element 412, 422, and the front end 414, 424 may be activated in a receive mode to receive signals via the antenna 401, 402. Each of the elements 412, 422 may include an up-conversion mixer 410 for the transmit mode and a down-conversion mixer 420 for the receive mode. In one embodiment, the down-conversion mixer 420 may be implemented Figure 1A to Figure 2B The mixer 150 shown in FIG.

[0055] To synchronize tile k with tile k+1, a loopback path may be formed from element 412 to element 422 via front end 416, antenna 402, antenna 403, and front end 426. The loopback path may be bidirectional, and the direction of the loopback path may be based on the activation of the transmit mode or receive mode of front end 416, 426. Processing element 120 (see Figures 1A to 2B ) may determine a first combined loopback phase value for tile k and tile k+1 when tile k operates in a transmit mode and tile k+1 operates in a receive mode, and determine a second combined loopback phase value for tile k and tile k+1 when tile k operates in a receive mode and tile k+1 operates in a transmit mode. The processing element 120 may use the first and second combined loopback phase values ​​to determine a calibration offset for calibrating tile k and tile k+1 to synchronize tile k with tile k+1.

[0056] exist Figure 4A In the illustrated embodiment, the transmit mode of the front end 416 may be activated, and the receive mode of the front end 426 may be activated. In response to activation, the loopback path may have a direction from the element 412 to the element 422, and the LO signal 306 may be transmitted from the element 412 to the element 422. The LO signal 306 may be provided to the up-conversion mixer 410 of the element 412, and may induce a DC offset without applying an intermediate frequency (IF) input. Global Phase Shifter Code x in Tile k k (e.g. phase setting) can be fixed as a reference, and the IC (e.g. Figure 1A-Figure 2B The processing element 120 in the tile k+1 may scan the global phase shifter code x k+1 , until the DC signal (e.g. DC out ) reaches a zero crossing point (e.g. changes its polarity from negative to positive). k+1 The value of may be stored in the memory device 122 (see Figure 1A , Figure 1B ) as the phase value represented as a1.

[0057] In one embodiment, the LO phase, phase θ, of the LO signal 306 for tile k LO_k Equivalent to θ k +θ ps_k , where θ ps_k is the phase of the phase shifter in element 412 and may be defined as a digital linear code such as θ ps_k =θ o +s*x k The digital linear code may be generated, for example, by processing element 120 and may be applied to a phase shifter in scanning element 412. The scan may be performed from an initial phase θ oStart with , and linearly increase the phase setting of the phase shifter in increments of s, where s represents a linear coefficient that can be predefined.

[0058] Using Theta tx-ant Denote the LO phase shift from the output of up-conversion mixer 410 in element 412 to antenna 402, using θ ant-rx represents the LO phase shift from antenna 403 to the input of down-conversion mixer 420 in element 422, and uses θ coup Representing the phase shift of the antenna coupling between antennas 402, 403, the total loop-back phase shift from the input of LO signal 306 to down-conversion mixer 420 in element 422 may be θ k +θ ps_k +θ tx-ant +θ coup +θ ant-rx The DC output from down-conversion mixer 420 in element 422 out It can be expressed as V dc_k+1 =A*cos(θ k +θ ps_k +θ tx-ant +θ coup +θ ant-rx -(θ k+1 +θ ps_k+1 )) of the sine curve. Since for the cosine function, V dc_k+1 The polarity of will change at phase π / 2, then θ k +θ ps_k +θ tx-ant +θ coup +θ ant-rx -(θ k+1 +θ ps_k+1 ) = π / 2. Based on the symmetry of antennas 402 and 403, the term θ tx-ant +θ coup +θ ant-rx can be simplified to the total phase shift θ in the loop tx-rx (For example, from the up-conversion mixer output to the down-conversion mixer input via antenna coupling). k+1 The value of is stored as value a1. Therefore, when tile k operates in transmit mode and tile k+1 operates in receive mode, the expression θ k -θ k+1 +s(x k -a1)=π / 2-θ tx-rx Or θ k+1 +s*a1=θ k +sx k +θ tx-rx -π / 2 can capture the first phase imbalance between tile k and tile k+1.

[0059] exist Figure 4B , tile k can be switched from transmit mode to receive mode, and tile k+1 can be switched from receive mode to transmit mode. The loopback path can switch directions, and LO signal 306 can be sent from element 422 to element 412. LO signal 306 can be provided to upconversion mixer 410 of element 412, and global phase shifter code x in tile k+1 k+1 can be fixed as a reference, and the processing element 120 can scan the global phase shifter code x in tile k k , until the DC signal (e.g., DC out ) reaches a zero crossing point (e.g., changes its polarity from positive to negative). k The value of may be stored in the memory device 122 (see Figure 1A , Figure 1B ) as the phase value represented as a2.

[0060] In one embodiment, the LO phase, phase θ, of the LO signal 306 of tile k+1 LO_k Equivalent to θ k +θ ps_k+1 , where θ ps_k+1 is the phase of the phase shifter in element 422 and may be defined as a digital linear code such as θ ps_k+1 =θ o +s*x k+1 The digital linear code may be generated, for example, by processing element 120 and may be applied to a phase shifter in scanning element 412. The scan may be performed from an initial phase θ o Start with s*x k+1 The phase setting of the phase shifter is linearly increased by an increment of , where s represents a linear coefficient that can be predefined.

[0061] Using Theta tx-ant Denote the LO phase shift from the output of up-conversion mixer 410 in element 422 to antenna 403, using θ ant-rx represents the LO phase shift from antenna 402 to the input of down-conversion mixer 420 in element 412, and uses θ coup Representing the phase shift of the antenna coupling between antennas 403, 402, the total loop-back phase shift from the input of LO signal 306 to the down-conversion mixer 420 in element 412 may be θ k+1 +θ ps_k+1 +θ tx-ant +θ coup +θ ant-rx The DC output from the down-conversion mixer 420 in element 412 outIt can be expressed as V dc_k =A*cos(θ k+1 +θ ps_k+1 +θ tx-ant +θ coup +θ ant-rx -(θ k +θ ps_k )) of the sine curve. Since for the cosine function, V dc_k The polarity of will change at phase π / 2, then θ k+1 +θ ps_k+1 +θ tx-ant +θ coup +θ ant-rx -(θ k +θ ps_k ) = π / 2. Based on the symmetry of antennas 402 and 403, the term θ tx-ant +θ coup +θ ant-rx can be simplified to the total phase shift θ in the loop tx-rx (For example, from the up-conversion mixer output to the down-conversion mixer input via antenna coupling). k The value of is stored as value a2. Therefore, when tile k operates in receive mode and tile k+1 operates in transmit mode, the expression θ k -θ k+1 +s(x k -a2)=θ tx-rx -π / 2 or θ k+1 +s*a2=θ k +sx k +π / 2-θ tx-rx A second phase imbalance between tile k and tile k+1 may be captured.

[0062] The first phase imbalance θ k+1 +s*a1=θ k +sx k +θ tx-rx -π / 2 and the second phase imbalance θ k+1 +s*a2=θ k +sx k +π / 2-θ tx-rx The combination (e.g., summation) of produces θ k+1 +sx k+1 =θ k

[0063] +sx k Calibrate and synchronize the phase shifter code x between tile k and tile k+1 k+1 The final value can be x k+1 =(a1+a2) / 2. Since θps_k =θ o +s*x k and θ ps_k+1 =θ o +s*x k+1 , so the expression θ k+1 +sx k+1 =θ k +sx k can be transformed into θ k+1 +θ ps_k+1 =θ k +θ ps_k , indicating that tile k is synchronized with tile k+1. Therefore, using the values ​​of a1 and a2, set x k+1 To (a1+a2) / 2 can synchronize the phase of the LO signal 306 at tile k and tile k+1.

[0064] Figure 5 A flow chart related to amplitude and phase alignment of phased array elements in one embodiment is shown. Figure 5 The process 500 in the example may be implemented using, for example, the computer system 100 described above. The example process may include one or more operations, actions, or functions as shown by one or more of blocks 502, 504, 506, 508, and / or 510. Although illustrated as discrete blocks, various blocks may be divided into additional blocks, combined into fewer blocks, eliminated, performed in a different order, or performed in parallel, depending on the desired implementation.

[0065] Process 500 may begin at block 502. At block 502, a processor (e.g., Figures 1A to 2B The processing element 120 in the beamforming circuit may activate a transmit element in a plurality of transmit elements in the beamforming circuit. Process 500 may proceed from block 502 to block 504. In block 504, the processor may activate a receive element in a plurality of receive elements in the beamforming circuit.

[0066] Process 500 may proceed from block 504 to block 506. At block 506, the processor may receive a direct current (DC) signal representing the phase and amplitude of an activated transmit element and an activated receive element, indicating a phase difference between the activated transmit element and the activated receive element.

[0067] Process 500 may proceed from block 506 to block 508. At block 508, the processor may adjust settings of the beamforming circuitry to receive additional DC signals representative of the phase and amplitude of the activated transmit elements and activated receive elements under the adjusted settings.

[0068] Process 500 may proceed from block 508 to block 510. At block 510, the processor may determine a calibration value for the beamforming circuit based on the DC signal and the additional DC signal.

[0069] In one embodiment, the processor may receive the DC signal and the additional DC signal from a mixer configured to mix the input of the activated transmit element with the output of the activated receive element to generate the DC signal and the additional DC signal.

[0070] In one embodiment, scanning may include scanning phase shifters of activated receive elements.In one embodiment, the processor may store the DC signal and the additional DC signal in a memory.

[0071] In one embodiment, the activated transmitting element may be a first transmitting element, the activated receiving element may be a first receiving element, the DC signal may be a first DC signal, and the additional DC signal may be a first additional DC signal. In response to receiving the first DC signal and the first additional DC signal, the processor may store the first DC signal in a memory. In response to storing the first DC signal, the processor may deactivate the first transmitting element and the first receiving element. The processor may activate a second transmitting element among the plurality of transmitting elements. The processor may activate a second receiving element among the plurality of receiving elements. The processor may receive a second DC signal representing a phase and an amplitude of the second transmitting element and the second receiving element. The processor may determine a calibration value for the beamforming circuit based on the first DC signal, the first additional DC signal, the second DC signal, and the second additional DC signal.

[0072] In one embodiment, the DC signal and the additional DC signal may form a sinusoidal function of a combined phase and a combined gain of the activated transmit element and the activated receive element. The processor may determine the calibration value by determining the calibration value based on at least one selected from the group consisting of a maximum value of the sinusoidal function, a minimum value of the sinusoidal function, and a zero crossing point of the sinusoidal function.

[0073] In one embodiment, the processor may determine calibration values ​​based on the maximum and minimum values ​​of the sine function to calibrate the gain setting of the beamforming circuit.The processor may determine calibration values ​​based on the zero crossing points of the sine function to calibrate the phase setting of the beamforming circuit.

[0074] Flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to various embodiments of the present invention.In this regard, each frame in flow chart or block diagram can represent the module, segment or part of instruction, and it comprises one or more executable instructions for realizing the logical function of appointment.In some alternative embodiments, the function mentioned in the frame may not occur in the order mentioned in the figure.For example, depending on the function involved, the two frames shown continuously can actually be realized substantially at the same time, or these frames can sometimes be realized in reverse order.It will also be noted that the combination of the frame in each frame of block diagram and / or flow chart illustration and block diagram and / or flow chart illustration can be realized by the dedicated hardware-based system of performing a specified function or action or performing a combination of special hardware and computer instruction.

[0075] The terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the present invention. As used herein, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the terms "comprises" and / or "comprising" when used in this specification specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0076] The corresponding structures, materials, actions, and equivalents (if any) of all means or step-plus-function elements in the following claims are intended to include any structure, material, or action for performing a function in combination with other claimed elements as specifically claimed. A description of the present invention has been given for purposes of illustration and description, but the description is not exhaustive or limits the invention to the disclosed form. Many modifications and variations are clear to those of ordinary skill in the art without departing from the scope of the invention. The embodiments are selected and described in order to best explain the principles and practical applications of the invention, and to enable other persons of ordinary skill in the art to understand the various embodiments of the present invention with various modifications that are suitable for the specific purposes contemplated.

Claims

1. A method for operating a beamforming circuit, the method comprising: activating a transmit element of a plurality of transmit elements of a beamforming circuit; activating a receiving element of a plurality of receiving elements of a beamforming circuit; receiving a direct current (DC) signal representing the phase and amplitude of the activated transmitting element and the activated receiving element; adjusting settings of the beamforming circuit to receive an additional DC signal, the additional DC signal representing the phase and amplitude of the activated transmit element and the activated receive element under the adjusted settings; as well as A calibration value for the beamforming circuit is determined based on the DC signal and the additional DC signal.

2. The method of claim 1 , wherein receiving the DC signal and the additional DC signal comprises receiving the DC signal and the additional DC signal from a mixer configured to mix an input of the activated transmitting element with an output of the activated receiving element to generate the DC signal and the additional DC signal.

3. The method of claim 1 , wherein adjusting the setting of the beamforming circuit comprises scanning a phase shifter in at least one selected from the group consisting of the activated transmit element and the activated receive element, wherein in response to the scanning, the DC signal and the additional DC signal form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and the adjusted setting. The method of claim 3 , wherein scanning the phase shifters comprises scanning the phase shifters of the activated receiving elements. 5 . The method of claim 1 , further comprising storing the DC signal and the additional DC signal in a memory.

6. The method of claim 1 , wherein the activated transmitting element is a first transmitting element, the activated receiving element is a first receiving element, the DC signal is a first DC signal, and the additional DC signal is a first additional DC signal, and the method further comprises: responsive to receiving the first DC signal and the first additional DC signal, storing the first DC signal and the first additional DC signal in a memory; as well as in response to storing the first DC signal and the first additional DC signal, deactivating the first transmitting element and the first receiving element; as well as activating a second emitting element among the plurality of emitting elements; as well as activating a second receiving element among the plurality of receiving elements; receiving a second DC signal representing the phase and amplitude of the second transmitting element and the second receiving element; adjusting the settings of the beamforming circuit to receive a second additional DC signal, the second additional DC signal representing the phase and amplitude of the second transmit element and the second receive element under the adjusted settings; as well as The calibration value for the beamforming circuit is determined based on the first DC signal, the first additional DC signal, the second DC signal, and the second additional DC signal.

7. The method of claim 1 , wherein the DC signal and the additional DC signal form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and a setting of the adjustment, and determining the calibration value comprises determining the calibration value based on at least one selected from the group consisting of: Extraction parameters of said function; the maximum value of the function; the minimum value of the function; and The zero crossing points of the function.

8. The method of claim 7, wherein determining the calibration value comprises: determining the calibration value based on the maximum and minimum values ​​of the function to calibrate a gain setting of the beamforming circuit; as well as The calibration value is determined based on a zero crossing point of the function to calibrate a phase setting of the beamforming circuit.

9. The method according to claim 1, wherein: The activated transmitting element is in a first tile of a multi-tile phased array; The activated receiving element is in a second tile of the multi-tile phased array; as well as The DC signal is received from a down-conversion mixer of the activated receiving element.

10. An apparatus comprising: Multiple transmitting elements; A plurality of receiving elements; The mixer is configured as: generating a DC signal representing a phase and an amplitude of the activated transmitting element and the activated receiving element in response to being connected to a transmitting element of the plurality of transmitting elements and a receiving element of the plurality of receiving elements; outputting the DC signal to a processor to determine a calibration value for the device based on the DC signal; as well as In response to adjustment of a phase shifter in one of the transmit element and the receive element, an additional DC signal is output, the additional DC signal representing the phase and amplitude of the transmit element and the receive element under the adjustment of the phase shifter. 11 . The apparatus of claim 10 , wherein the mixer is configured to mix an input of the transmit element and an output of the receive element to generate the DC signal.

12. The apparatus of claim 11, wherein the adjustment of the phase shifter is a sweep of the phase shifter in at least one selected from the group consisting of the transmit element and the receive element.

13. The apparatus of claim 10, wherein the transmitting element is a first transmitting element, the receiving element is a first receiving element, the DC signal is a first DC signal, and the additional DC signal is a first additional DC signal, and the mixer is further configured to: In response to disconnecting from the first transmitting element and the first receiving element, and in response to connecting to a second transmitting element and a second receiving element, generating a second DC signal representing the phase and amplitude of the second transmitting element and the second receiving element; In response to adjusting another phase shifter in one of the second transmitting element and the second receiving element, outputting a second additional DC signal, the second additional DC signal representing the phase and amplitude of the second transmitting element and the second receiving element under the adjustment of the other phase shifter; as well as The second DC signal and the second additional DC signal are output to the processor.

14. The device according to claim 10, wherein: The activated transmitting element is in a first tile of a multi-tile phased array; The activated receiving element is in a second tile of the multi-tile phased array; as well as The mixer is a down-conversion mixer of the activated receiving element.

15. A system comprising: a beamforming circuit comprising a plurality of transmitting elements and a plurality of receiving elements; Mixer; At least one processor configured to: activating a transmitting element among the plurality of transmitting elements; activating a receiving element among the plurality of receiving elements; The mixer is configured to mix the input of the activated transmit element with the output of the activated receive element to generate a DC signal representing the phase and amplitude of the activated transmit element and the activated receive element; The at least one processor is further configured to: receiving the DC signal from the mixer; adjusting settings of the beamforming circuit to receive an additional DC signal from the mixer, wherein the additional DC signal represents the phase and amplitude of the activated transmit element and the activated receive element under the adjusted settings; as well as A calibration value for the beamforming circuit is determined based on the DC signal and the additional DC signal.

16. The system of claim 15, wherein: The at least one processor is configured to scan a phase shifter, wherein the phase shifter is in at least one selected from the group consisting of the activated transmit element and the activated receive element; and In response to the scanning, the DC signal and the additional DC signal form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and a setting of the adjustment.

17. The system of claim 15, wherein: The activated transmitting element is a first transmitting element; The activated receiving element is a first receiving element; The DC signal is a first DC signal; The additional DC signal is a first additional DC signal; The at least one processor is configured to: In response to receiving the first DC signal, storing the first DC signal and a first additional DC signal in a memory; as well as in response to storing the first DC signal and the first additional DC signal, deactivating the first transmitting element and the first receiving element; activating a second emitting element among the plurality of emitting elements; as well as activating a second receiving element among the plurality of receiving elements; The mixer is configured to generate a second DC signal representing a phase and a gain of the second transmit element and the second receive element; The at least one processor is further configured to: receiving the second DC signal from the mixer; adjusting settings of the beamforming circuit to receive a second additional DC signal from the mixer, wherein the second additional DC signal represents a phase and an amplitude of the second transmit element and the second receive element under the adjusted settings; as well as The calibration value for the beamforming circuit is determined based on the first DC signal, the first additional DC signal, the second DC signal, and the second additional DC signal.

18. The system of claim 15, wherein the DC signal and the additional DC signal form a function of a combined phase of the activated transmit element and the activated receive element, a combined gain of the activated transmit element and the activated receive element, and a setting of the adjustment, and the at least one processor is configured to determine the calibration value based on at least one selected from the group consisting of: Extraction parameters of said function; the maximum value of the function; the minimum value of the function; and The zero crossing points of the function.

19. The system of claim 18, wherein: The at least one processor is configured to: determining the calibration value based on the maximum and minimum values ​​of the function to calibrate a gain setting of the beamforming circuit; and The calibration value is determined based on a zero crossing point of the function to calibrate a phase setting of the beamforming circuit.

20. The system of claim 15, wherein: The activated transmitting element is in a first tile of a multi-tile phased array; The activated receiving element is in a second tile of the multi-tile phased array; as well as The mixer is a down-conversion mixer of the activated receiving element.

21. A computer program product comprising a computer-readable storage medium having instructions embodied therewith, the instructions being executable by a processor to cause the processor to perform the method according to any one of claims 1-9.

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