Design method suitable for high-precision capacity of multilayer chip ceramic dielectric capacitor

Abstract

The invention discloses a high-precision capacity design method suitable for a multi-layer chip ceramic dielectric capacitor, and belongs to the technical field of high-precision capacity design of the multi-layer chip ceramic dielectric capacitor. According to the technical scheme, the method comprises the following steps: measuring and controlling the surface roughness Ra of the ceramic dielectric; the method comprises the following steps: introducing the surface roughness value of a corresponding batch of ceramic dielectric into capacity design, and deriving d = (n-1) epsilon S / C + a * Ra by adopting the following capacitance calculation formula: C = (n-1) epsilon S / (d-a * Ra), after the variable of the surface roughness of the ceramic dielectric is added in a calculation formula, the required thickness of the ceramic dielectric is calculated, so that the trial-manufacture of a product is carried out. The method has the beneficial effects that the design precision of the capacity of the capacitor is improved, the performance of the capacitor is improved, the production process is optimized, the application range is widened, and the like. Due to the beneficial effects, the multilayer chip ceramic dielectric capacitor has remarkable technical advantages and market competitiveness in the field of multilayer chip ceramic dielectric capacitors.

Description

Technical Field

[0001] The present invention relates to the technical field of designing high-precision capacitance of multilayer chip ceramic capacitors, and in particular to a designing method of high-precision capacitance suitable for multilayer chip ceramic capacitors. Background Art

[0002] In the production process of multilayer ceramic capacitors, the capacity of the capacitor must be designed. According to the theoretical model of bipolar plate capacitors, the capacitance of multilayer ceramic capacitors is C = (n-1) εS / d (when the dielectric thickness between each adjacent two layers of electrodes in the multilayer electrodes is the same), where: n is the number of electrode layers inside the capacitor, ε is the dielectric constant of the dielectric between the electrodes, S is the area where the electrodes overlap, and d is the thickness of the ceramic dielectric. Figure 1 , Figure 2 . For multilayer ceramic capacitors, firstly, ceramic dielectric materials are selected according to the customer's requirements for the product. After the ceramic dielectric materials are selected, ε is determined. Secondly, the printed electrode design is determined according to the specifications and dimensions of the multilayer ceramic capacitors, that is, S is determined. Again, the number of electrode layers is determined according to the RF characteristics of the multilayer ceramic capacitors. Finally, the required ceramic dielectric thickness d = (n-1) εS / C is derived based on the capacity formula C = (n-1) εS / d. After the selected ceramic dielectric materials and parameters are determined, the product is trial-produced. After the trial production, it is found that the measured value of the actual capacity of the trial-produced product always deviates from the theoretical value of the original design, especially for products with high precision requirements for capacitance, most of them cannot meet the accuracy requirements of the capacitance. For example, the initial required capacity range is (5.1 ± 0.05) pF, and the trial-produced products are often not within the (5.1 ± 0.05) pF range. According to the deviation, the capacitance design needs to be adjusted before the second round of product trial production. Statistics show that only 35% of product batches meet customer requirements in the first trial production, and 65% of product batches cannot meet customer requirements in the first trial production. Therefore, 65% of product batches have to go through a second round of trial production before being put into production, which results in a longer delivery cycle and higher production costs. Summary of the invention

[0003] In order to overcome the deficiencies in the above-mentioned prior art, the present invention provides a design method for high-precision capacitance of multilayer chip ceramic capacitors, which can improve the design accuracy of high-precision capacitance of multilayer chip ceramic capacitors, save material costs, and shorten product delivery cycle.

[0004] To achieve the above object, the present invention provides the following technical solutions:

[0005] A design method for high-precision capacitance of multilayer ceramic capacitors, the steps are as follows:

[0006] S1. Measure and control the surface roughness Ra of the ceramic medium;

[0007] S2. Introduce the surface roughness value of the corresponding batch of ceramic dielectrics into the capacity design, and use the following capacitance calculation formula:

[0008] C=(n-1)εS / (da·Ra)

[0009] From this we can deduce:

[0010] d=(n-1)εS / C+a·Ra

[0011] Where d is the thickness of the ceramic dielectric, n is the number of electrode layers inside the capacitor, ε is the dielectric constant of the dielectric between the electrodes, C is the capacitance, S is the area of ​​electrode overlap, and a is the correction factor for the surface roughness of different dielectric materials: 0.4<a<0.6;

[0012] S3. After adding the variable of the surface roughness of the ceramic medium into the calculation formula, the required thickness of the ceramic medium is calculated to carry out trial production of the product.

[0013] Furthermore, the a value is 0.55.

[0014] Furthermore, in step S1, the surface roughness Ra of the ceramic medium is measured by a gloss tester or a surface roughness meter.

[0015] Furthermore, in step S1, the ceramic medium is pretreated to remove impurities and contaminants on the surface, thereby further reducing the measurement error of the surface roughness and improving the performance consistency level of the capacitor.

[0016] Furthermore, in step S2, the value of the correction coefficient a is adjusted according to the type of the ceramic dielectric, the dielectric thickness and the required capacitance accuracy.

[0017] Furthermore, the method further comprises step S4: performing performance tests on the trial-produced capacitors, including capacitance measurement, loss measurement and frequency characteristic testing.

[0018] Furthermore, in step S4, the capacitance of the capacitor is measured using a high-precision measuring instrument, and the measurement result is compared with the theoretical design value to evaluate the capacitance accuracy and performance stability of the capacitor.

[0019] Furthermore, the method further comprises step S5: fine-tuning the design parameters of the capacitor according to the performance test results to further improve the performance and capacity accuracy of the capacitor.

[0020] Beneficial effects of the present invention:

[0021] Compared with the prior art, the design method for high-precision capacitance of multilayer ceramic capacitors according to the present invention has the following technical features and beneficial effects:

[0022] (1) Improve the design accuracy of capacitor capacity

[0023] Surface roughness incorporated into design: By accurately measuring and controlling the surface roughness Ra of the ceramic dielectric and introducing it as a design parameter into the capacitance calculation formula, the capacitance of the capacitor can be predicted and controlled more accurately. This helps to improve the design accuracy of the capacitor capacity and make it more in line with the needs of practical applications.

[0024] Revision coefficient optimization: According to the type of ceramic dielectric, dielectric thickness and required capacitance accuracy, the value of revision coefficient a can be adjusted to further optimize the capacitance calculation formula. This flexibility enables the present invention to be applicable to the design requirements of different types of ceramic dielectrics and capacitor capacities.

[0025] (2) Improve capacitor performance

[0026] Reduced loss: By precisely controlling the surface roughness of the ceramic dielectric, the loss of the capacitor during operation can be reduced and its energy efficiency can be improved. This is of great significance for electronic devices that require high efficiency and low loss.

[0027] Enhanced stability: Precisely controlling surface roughness as a design parameter helps enhance the stability and reliability of capacitors. This can reduce performance degradation caused by environmental changes or long-term operation during use.

[0028] (3) Optimize production process

[0029] Simplify the design process: By incorporating surface roughness into the design parameters and using an optimized capacitance calculation formula, the capacitor design process can be simplified, reducing design time and cost.

[0030] Improve production efficiency: Using high-precision measuring instruments such as gloss testers or surface roughness meters to measure the surface roughness of ceramic media can ensure the accuracy and efficiency of the measurement results. This helps to improve the production efficiency of capacitors and reduce production costs.

[0031] (4) Expand the scope of application

[0032] Applicable to high-precision scenarios: The present invention is applicable to the production of high-precision, high-reliability multilayer ceramic capacitors, and is particularly applicable to application scenarios that require high capacitance accuracy, such as communication equipment, wireless equipment, medical equipment, precision instruments, etc. This broadens the application scope of capacitors, enabling them to meet the needs of more fields.

[0033] The beneficial effects of the present invention are mainly reflected in improving capacitor design accuracy, enhancing capacitor performance, optimizing production processes, and broadening the scope of application, etc. These beneficial effects make the present invention have significant technical advantages and market competitiveness in the field of multilayer ceramic capacitors. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the present invention will be described in detail below in combination with the accompanying drawings and detailed embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative labor. Among them:

[0035] Figure 1 It is a schematic diagram of the capacity of a multilayer ceramic capacitor;

[0036] Figure 2 It is a cross-sectional diagram of the stacking and internal structure of a multilayer ceramic capacitor;

[0037] Figure 3 Schematic diagram of medium thickness and surface roughness. DETAILED DESCRIPTION

[0038] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. Figure 1-3 The design method of high-precision capacitance suitable for multilayer ceramic chip capacitors is further explained.

[0039] Example 1

[0040] In the production process of ceramic media, the present invention effectively measures and controls the surface roughness Ra of the ceramic media. Figure 3 , and introduced the surface roughness values ​​of the corresponding batch of ceramic dielectrics into the capacity design, and revised the calculation formula of the capacitance: C = (n-1) εS / (da·Ra), where a is the revision coefficient of the surface roughness of different dielectric materials. Through a large number of dielectrics with different materials and different surface roughness groups, the a value was tested and verified to be about 0.55. After increasing the surface roughness of the ceramic dielectric, the required ceramic dielectric thickness was calculated to carry out the trial production of the product. Improve the product to meet customer requirements after the first trial production.

[0041] This embodiment aims to demonstrate the specific application of a design method for high-precision capacitance of multilayer ceramic capacitors. By accurately measuring and controlling the surface roughness Ra of the ceramic dielectric and using an optimized capacitance calculation formula, this embodiment aims to prepare a multilayer ceramic capacitor with high precision and high reliability to meet the high requirements for capacitance accuracy of communication equipment, wireless equipment, medical equipment, precision instruments, etc.

[0042] Ceramic medium: Select ceramic medium with good dielectric properties and stability.

[0043] Electrode material: Palladium (Pd) or palladium-silver (Pd-Ag) alloy is used as the internal electrode material to improve the reliability and stability of the capacitor.

[0044] Measuring equipment: Use a gloss tester or surface roughness meter to measure the surface roughness Ra of the ceramic medium to ensure the accuracy and high precision of the measurement results.

[0045] Processing equipment: Use high-precision tape casting machine to process and prepare ceramic media.

[0046] Follow these steps:

[0047] Step S1: measuring and controlling the surface roughness Ra of the ceramic medium;

[0048] Use a gloss tester or a surface roughness tester to scan the surface of the ceramic medium and measure its surface roughness Ra.

[0049] Based on the measurement results, the ceramic dielectrics are screened to ensure that all ceramic dielectrics used to make capacitors have consistent surface roughness.

[0050] The screened ceramic media is pre-treated to remove surface impurities or contaminants and further reduce surface roughness.

[0051] Step S2: Introducing surface roughness values ​​into capacity design;

[0052] According to the calculation formula of capacitance C = (n-1)εS / (da·Ra), it can be deduced that: d = (n-1)εS / C + a·Ra, where d is the thickness of the ceramic dielectric, n is the number of electrode layers inside the capacitor, ε is the dielectric constant of the dielectric between the electrodes, C is the capacitance, S is the area of ​​electrode overlap, and a is the correction coefficient for the surface roughness of different dielectric materials.

[0053] In this embodiment, the revision coefficient a is set to 0.55. Based on the required capacitance C and electrode overlap area S, as well as the known number of electrode layers n, dielectric constant ε and revision coefficient a, the required ceramic dielectric thickness d is calculated by substituting them into the formula.

[0054] Step S3: Calculate the thickness of the ceramic medium and conduct product trial production;

[0055] According to the ceramic medium thickness d calculated in step S2, a high-precision tape casting machine is used to prepare a ceramic medium that meets the thickness requirements.

[0056] The thickness and surface roughness of the prepared ceramic medium are tested to ensure that they meet the design requirements.

[0057] Step S4: performance testing and evaluation;

[0058] The performance tests are carried out on the trial-produced capacitor samples, including the measurement of capacitance, loss and frequency characteristics.

[0059] Compare the measured results with the theoretical design values ​​to evaluate the capacitance accuracy and performance stability of the capacitor.

[0060] According to the test results, if the capacitance deviation of the capacitor exceeds the accuracy range, the design parameters of the capacitor need to be fine-tuned to meet the capacitance accuracy requirements of the capacitor.

[0061] By using the method of this embodiment, a multilayer ceramic capacitor with high precision and high reliability was successfully prepared. The test results show that the capacitance accuracy of the capacitor has reached the expected target, the loss is low, and the frequency characteristics are stable. In addition, the manufacturing process of the capacitor is simple and efficient, and the production cost is effectively controlled.

[0062] Example 2

[0063] Figure 1 This is a cross-sectional diagram of a multilayer ceramic capacitor. The capacitor has six layers of metal inner electrodes. The dielectric spacing between two adjacent inner electrodes is the same, d = d1 = d2 = d3 = d4 = d5. The overlap area of ​​the electrodes is S = S1 = S2 = S3 = S4 = S5. C 总 =C1+C2+C3+C4+C5=εS1 / d1+εS2 / d2+εS3 / d3+εS4 / d4+εS5 / d5=(6-1)εS / d.

[0064] Figure 2 It is a cross-sectional diagram of a multilayer ceramic capacitor. Figure 3 It is a schematic diagram of the thickness and surface roughness of the ceramic belt involved in the present invention.

[0065] In the production process of ceramic media, the present invention effectively measures and controls the surface roughness Ra of the ceramic media, and introduces the surface roughness value of the corresponding batch of ceramic media into the capacity design, and revises the calculation formula of the capacitance to C = (n-1) εS / (da·Ra), from which it is derived that: d = (n-1) εS / C + a·Ra, where a is the revision coefficient of the surface roughness of different dielectric materials. Through a large number of dielectrics with different materials and different surface roughness groups, the a value is about 0.55. After increasing the surface roughness of the ceramic medium, the required ceramic medium thickness is calculated to carry out trial production of the product. According to this method, the present invention has carried out tracking statistics of multiple batches, and compared with the production batches that did not adopt this method, the capacitance value detection after trial production found that the actual measured value of the capacitance is close to the theoretical design value of the capacitance. According to batch statistics, the first capacitance value of 85% of the batches of products meets the design requirements. The production cycle is shortened and the comprehensive production cost is saved by more than 60%.

[0066] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent substitutions or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention. Without departing from the concept of the present invention, simple deductions and substitutions can be made, which should be covered by the protection scope of the present invention.

Claims

1. A design method for high-precision capacitance of multilayer ceramic capacitors, characterized in that: Here are the steps: S1. Measure and control the surface roughness Ra of the ceramic medium; S2. Introduce the surface roughness value of the corresponding batch of ceramic dielectrics into the capacity design, and use the following capacitance calculation formula: C=(n-1)εS / (da·Ra) From this we can deduce: d=(n-1)εS / C+a·Ra Where d is the thickness of the ceramic dielectric, n is the number of electrode layers inside the capacitor, ε is the dielectric constant of the dielectric between the electrodes, C is the capacitance, S is the area of ​​electrode overlap, and a is the correction factor for the surface roughness of different dielectric materials: 0.4<a<0.6; S3. After adding the variable of the surface roughness of the ceramic medium into the calculation formula, the required thickness of the ceramic medium is calculated to carry out trial production of the product.

2. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 1, characterized in that: The a value is 0.

55.

3. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 1, characterized in that: In step S1, the surface roughness Ra of the ceramic medium is measured by a gloss tester or a surface roughness meter.

4. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 1, characterized in that: In step S1, the ceramic medium is pre-treated to remove impurities and contaminants on the surface, thereby further reducing the measurement error of the surface roughness and improving the performance consistency level of the capacitor.

5. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 1, characterized in that: In step S2, the value of the correction coefficient a is adjusted according to the type of the ceramic dielectric, the dielectric thickness, and the required capacitance accuracy.

6. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 1, characterized in that: The method further includes step S4: performing performance tests on the trial-produced capacitors, including capacitance measurement, loss measurement, and frequency characteristic testing.

7. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 6, characterized in that: In step S4, the capacitance of the capacitor is measured using a high-precision measuring instrument, and the measurement result is compared with the theoretical design value to evaluate the capacitance accuracy and performance stability of the capacitor.

8. The method for designing high-precision capacitance of a multilayer ceramic capacitor according to claim 6, characterized in that: The method further includes step S5: fine-tuning the design parameters of the capacitor according to the performance test results to further improve the performance and capacity accuracy of the capacitor.

Images