Point inspection chip and point inspection method of integrated circuit test system

Abstract

The invention relates to a spot inspection chip and a spot inspection method of an integrated circuit test system. The spot inspection chip is applied to the integrated circuit test system. The integrated circuit test system is used for detecting a chip to be detected; the spot inspection chip comprises a first chip body and a first packaging structure used for packaging the first chip body. The first chip body of the spot inspection chip is arranged to be the same as the second chip body of the to-be-inspected chip, so that re-platemaking design of the spot inspection chip is avoided, the manufacturing cost of the spot inspection chip is reduced, and the spot inspection chip is more convenient to produce. The point inspection chip and the to-be-detected chip can be distinguished when the integrated circuit test system performs detection by making at least one of the connection relations between the packaging structures corresponding to the first packaging structure of the point inspection chip and the second packaging structure of the to-be-detected chip or between the packaging structures and the chip body different. Therefore, the detection precision and the detection efficiency of the integrated circuit test system are improved.

Description

Technical Field

[0001] The present application relates to the field of chip detection technology, and in particular to a method for spot checking chips and integrated circuit testing systems. Background Art

[0002] In each stage of integrated circuit development, production, and application, integrated circuits need to be inspected and tested repeatedly to ensure product quality, thereby ensuring that the produced integrated circuit products meet the requirements. Chips are a specific form of integrated circuits. By testing chips through integrated circuit test systems, the functions and performance of components in the chips can be evaluated.

[0003] In order to ensure the accuracy of chip detection and improve the reliability of detection results, technicians need to regularly inspect the integrated circuit test system to detect whether the integrated circuit test system has any faults. When inspecting the integrated circuit test system, a spot inspection chip is required. By testing the spot inspection chip, it is determined whether the integrated circuit test system has any faults based on whether the test results are consistent with the expected results.

[0004] In the current related technologies, the inspection chip usually has special ID information built in, so the inspection chip needs to be plated and packaged independently of the chip to be inspected. That is, the inspection chip with built-in special ID information needs to be produced separately during the manufacturing process. Therefore, the production cost of manufacturing the inspection sample is high and the production process is relatively cumbersome. Summary of the invention

[0005] Based on this, it is necessary to provide a spot inspection method for a spot inspection chip and an integrated circuit test system to address the above technical issues.

[0006] In the first aspect, the present application provides a spot inspection chip, which is applied to an integrated circuit testing system; the integrated circuit testing system is used to inspect a chip to be inspected; the spot inspection chip comprises: a first chip body and a first packaging structure for encapsulating the first chip body; the first chip body of the spot inspection chip is the same as the second chip body of the chip to be inspected; the first packaging structure of the spot inspection chip and the second packaging structure of the chip to be inspected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body.

[0007] In one of the embodiments, the first packaging structure includes a structural body and packaging pins arranged on the structural body; a pin pad is arranged on the first chip body; the pin pad is connected to the packaging pin; the first packaging structure of the inspection chip is the same as the second packaging structure of the chip to be inspected; the first connection relationship between the packaging pin and the pin pad in the first packaging structure of the inspection chip is different from the second connection relationship between the packaging pin and the pin pad in the second packaging structure of the chip to be inspected.

[0008] In one of the embodiments, if the package pins in the second package structure of the chip to be inspected include suspended pins; the suspended pins in the first package structure of the inspection chip are connected to the power pad or the ground pad of the first chip body.

[0009] In one of the embodiments, if the power pad in the second chip body of the chip to be inspected is connected to the first packaging pin in the second packaging structure; the ground pad in the second chip body is connected to the second packaging pin in the second packaging structure; then the power pad in the first chip body of the inspection chip is connected to any packaging pin in the first packaging structure except the first packaging pin; or the ground pad in the first chip body of the inspection chip is connected to any packaging pin in the first packaging structure except the second packaging pin.

[0010] In one of the embodiments, a pin pad is provided on the first chip body; the first packaging structure includes a structural body, packaging pins provided on the structural body, and an electrical component; the pin pads of the first chip body are respectively connected to the packaging pins of the first packaging structure; the electrical component is connected between at least one pin pad of the first packaging structure and a power pad; or the electrical component is connected between at least one pin pad of the first packaging structure and a ground pad; or the electrical component is connected to the packaging pins.

[0011] In one embodiment, the electrical component includes a secondary chip; the power pad of the first chip body is connected to the third packaging pin of the first packaging structure; the ground pad of the first chip body is connected to the fourth packaging pin of the first packaging structure; the bidirectional transmission pad of the first chip body is connected to the fifth packaging pin of the first packaging structure; the power pad of the secondary chip is connected to the third packaging pin of the first packaging structure; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure; the bidirectional transmission pad of the secondary chip is connected to the fifth packaging pin of the first packaging structure.

[0012] In one embodiment, the electrical component includes a secondary chip; the power pad of the first chip body is connected to the third packaging pin of the first packaging structure; the ground pad of the first chip body is connected to the fourth packaging pin of the first packaging structure; the input pad of the first chip body is connected to the fifth packaging pin of the first packaging structure; the output pad of the first chip body is connected to the sixth packaging pin of the first packaging structure; the power pad of the secondary chip is connected to the third packaging pin of the first packaging structure; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure; and the bidirectional transmission pads of the secondary chip are respectively connected to the fifth packaging pin and the sixth packaging pin of the first packaging structure.

[0013] In the second aspect, the present application also provides a spot inspection method for an integrated circuit testing system, the method comprising: a loading module places a detection chip on a testing station; the detection chip comprises a chip to be detected or a spot inspection chip; the spot inspection chip is the spot inspection chip described in any one of the above-mentioned first aspect; the detection chip is inspected through a conventional test mode, and based on the inspection result, it is determined whether the detection chip is a spot inspection chip; if the detection chip is a spot inspection chip, the spot inspection chip is inspected through a spot inspection mode.

[0014] In one of the embodiments, the detection chip is detected by a conventional test mode, and determining whether the detection chip is a spot inspection chip based on the detection result includes: detecting the detection chip by an electrical characteristics test to determine the electrical characteristics test result; and determining whether the detection chip is a spot inspection chip based on the electrical characteristics test result.

[0015] In one of the embodiments, the detection chip is detected by a conventional test mode, and determining whether the detection chip is a spot inspection chip based on the detection result includes: detecting the detection chip by an open-short circuit test to determine the open-short circuit test result; and determining whether the detection chip is a spot inspection chip based on the open-short circuit test result.

[0016] In one of the embodiments, the detection chip is detected by a conventional test mode, and determining whether the detection chip is a spot inspection chip based on the detection result includes: detecting the detection chip through a communication test to determine an output response; and determining whether the detection chip is a spot inspection chip based on the output response.

[0017] The inspection method of the inspection chip and the integrated circuit test system mentioned above, the inspection chip is applied to the integrated circuit test system, and the integrated circuit test system is used to detect the chip to be detected. The inspection chip includes: a first chip body and a first packaging structure for packaging the first chip body. The first chip body of the inspection chip is the same as the second chip body of the chip to be detected, and the first packaging structure of the inspection chip and the second packaging structure of the chip to be detected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body. By setting the first chip body of the inspection chip to be the same as the second chip body of the chip to be detected, it is avoided to re-plate the inspection chip, reduce the manufacturing cost of the inspection chip, and make the production of the inspection chip more convenient. By making the packaging structure corresponding to the first packaging structure of the inspection chip and the second packaging structure of the chip to be detected different from at least one of the connection relationship between the packaging structure and the chip body, the inspection chip and the chip to be detected can be distinguished when the integrated circuit test system performs detection, thereby improving the detection accuracy and detection efficiency of the integrated circuit test system. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 A schematic diagram of the structure of a spot inspection chip in an embodiment; Figure 2 This is a schematic diagram of the structure of a first type of spot inspection chip in an embodiment; Figure 3 is a schematic diagram of the structure of a second type of spot inspection chip in an embodiment; Figure 4 A schematic diagram of the structure of a third type of spot inspection chip in an embodiment; Figure 5 is a schematic diagram of the structure of a fourth type of spot inspection chip in an embodiment; Figure 6 FIG. 4 is a flow chart of a spot inspection method for an integrated circuit testing system in one embodiment. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0020] It should be noted that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish a first element from another element. For example, without departing from the scope of this application, a first control module may be referred to as a second control module, and similarly, a second control module may be referred to as a first control module. Both the first control module and the second control module are control modules, but they are not the same control module.

[0021] In each stage of integrated circuit development, production, and application, integrated circuits need to be inspected and tested repeatedly to ensure product quality, thereby ensuring that the produced integrated circuit products meet the requirements. As a specific form of integrated circuits, chips can be tested through integrated circuit test systems to evaluate the functions and performance of components in the chips. In order to ensure the accuracy of chip detection and improve the reliability of test results, technicians need to regularly inspect the integrated circuit test system to detect whether the integrated circuit test system has abnormal faults. When testing the integrated circuit test system, a spot inspection chip is required. By testing the spot inspection chip, it is determined whether the integrated circuit test system has a fault based on whether the test results are consistent with the expected results.

[0022] The inspection chip is a standard chip with good product quality and no abnormalities. The test results of the inspection chip when the integrated circuit test system has no abnormal faults are pre-stored as expected results. When the integrated circuit test system is inspected by the inspection chip, the inspection chip is tested in real time to obtain real-time test results, and the real-time test results are compared with the expected results. If an abnormality is found, the integrated circuit test system has an abnormal fault.

[0023] In the current related technologies, the inspection chip is usually a standard sample with built-in special ID information. However, such inspection samples need to be plated independently from normal mass-produced products to obtain chips, and then packaged to obtain standard samples. In other words, it is necessary to produce inspection chips with built-in special ID information separately during the manufacturing process and manage logistics. It can be seen that the production cost of manufacturing inspection samples in this way is high and the production process is relatively cumbersome.

[0024] The embodiment of the present application provides a spot inspection chip, which does not require any improvement to the integrated circuit of the spot inspection chip itself. Instead, in the process of packaging the spot inspection chip, an independent and different packaging structure is set for the spot inspection chip, so that the spot inspection chip can present an output response that is obviously different from that of the chip to be tested during the test process of the integrated circuit test system, thereby realizing the spot inspection of the integrated circuit test system by the spot inspection chip.

[0025] In one embodiment, Figure 1As shown, a spot inspection chip 100 is provided, and the spot inspection chip 100 is applied to an integrated circuit test system. The integrated circuit test system is used to detect the chip to be inspected or the spot inspection chip 100. Among them, the chip to be inspected is a chip whose product quality and product performance need to be determined. When the integrated circuit test system detects the chip to be inspected, the product quality and product performance of the chip to be inspected can be determined according to the test results obtained by the integrated circuit test system. When the integrated circuit test system detects the spot inspection chip 100, it can determine whether an abnormal fault occurs in the integrated circuit test system according to the test results obtained by the integrated circuit test system, that is, to perform fault detection on the integrated circuit test system itself. This embodiment does not specifically limit the integrated circuit test system, and it is only required to be able to detect the product quality and product performance of the chip.

[0026] The inspection chip 100 includes: a first chip body 110 and a first packaging structure 120 for packaging the first chip body 110. The first chip body 110 of the inspection chip 100 is the same as the second chip body of the chip to be inspected; the first packaging structure 120 of the inspection chip 100 and the second packaging structure of the chip to be inspected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body.

[0027] The inspection chip 100 includes a first chip body 110 and a first packaging structure 120 for encapsulating the first chip body 110. The chip to be inspected includes a second chip body and a second packaging structure for encapsulating the second chip body. The chip body is an integrated circuit, which is composed of a large number of transistors and other electrical components connected to each other. In order to prevent the chip body from being corroded by impurities in the air to the circuit in the chip body during use, the chip body needs to be packaged by a packaging structure. The packaging structure is to connect the pin pads on the chip body to the packaging pins of the packaging structure through wires or other connecting methods, so that the chip is connected to other external components. Therefore, the packaging structure can protect the chip body and provide mechanical support and electrical connection.

[0028] When designing the inspection chip 100, based on the chip to be inspected, the first chip body 110 of the inspection chip 100 and the second chip body of the chip to be inspected can use the same chip design. This avoids re-designing the inspection chip 100, reduces the manufacturing cost of the inspection chip 100, and makes the production of the inspection chip 100 more convenient. Among them, the first chip body 110 is the same as the second chip body, which means that the wafer, substrate, transistor, other electrical components, setting position and connection relationship corresponding to the first chip body 110 are exactly the same as the wafer, substrate, transistor, other electrical components, setting position and connection relationship corresponding to the second chip body. That is, it can be obtained by reusing the design and manufacturing process of the chip to be inspected.

[0029] When packaging the inspection chip 100, the first packaging structure 120 of the inspection chip 100 and the second packaging structure of the chip to be inspected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body. Specifically, the packaging structure is different, which may be that when packaging the chip to be inspected, it is directly packaged through the structural body corresponding to the second packaging structure; when packaging the inspection chip 100, the first packaging structure 120 may include a structural body 121, other chips or other electrical components, and the other chips or other electrical components are packaged through the structural body 121. Specifically, the connection relationship between the packaging structure and the chip body is different, which may be that the connection relationship between the second packaging structure and the second chip body is different from the connection relationship between the first packaging structure 120 and the first chip body 110. It can be understood that between the chip to be inspected and the inspection chip 100, the packaging structure may be different, the connection relationship between the packaging structure and the chip body may be different, or the packaging structure and the connection relationship between the packaging structure and the chip body may be different. By utilizing the differences between the chip to be tested and the inspection chip 100, the integrated circuit testing system can more accurately and conveniently distinguish between the chip to be tested or the inspection chip 100, thereby entering the inspection mode when the inspection chip 100 is detected, thereby improving the detection accuracy and efficiency of the integrated circuit testing system.

[0030] In one of the embodiments, the connection relationship between the corresponding packaging structure and the chip body of the inspection chip 100 and the chip to be inspected is different, specifically: the first packaging structure 120 includes a structural body 121 and a packaging pin 122 arranged on the structural body 121; a pin pad 111 is arranged on the first chip body 110; the pin pad 111 is connected to the packaging pin 122; the first packaging structure 120 of the inspection chip 100 is the same as the second packaging structure of the chip to be inspected; the first connection relationship between the packaging pin 122 and the pin pad 111 in the first packaging structure 120 of the inspection chip 100 is different from the second connection relationship between the packaging pin and the pin pad in the second packaging structure of the chip to be inspected.

[0031] The first packaging structure 120 of the inspection chip 100 includes a structural body 121 and packaging pins 122 arranged on the structural body 121. The second packaging structure of the chip to be inspected also includes a structural body and packaging pins arranged on the structural body. Among them, the structural body 121 is used to fix the chip body and provide a basic framework for the packaging structure. For example, the structural body 121 can be obtained by processes such as injection molding or die casting, and the material of the structural body 121 can be epoxy resin, silicone or ceramic material. The packaging pins 122 are fixedly installed on the structural body 121. The packaging pins 122 are the external interface part of the packaging structure. After the chip body is packaged by the packaging structure, the chip is connected to other electrical components through the packaging pins 122.

[0032] A pin pad 111 is provided on the first chip body 110. A pin pad is also provided on the chip body to be detected. Among them, the pin pad 111 can be a PAD area of ​​the chip body, that is, a metal area. By connecting the pin pad 111 to the package pin 122, the connection between the chip body and other electrical components outside the chip is achieved. The pin pad 111 can be made of conductive materials such as aluminum, copper or gold, and the shape of the pin pad 111 can be rectangular or circular. In this embodiment, the material and shape of the pin pad 111 are not specifically limited, and it is only required that the pin pad 111 is provided on the chip body.

[0033] The first packaging structure 120 corresponds to a structural body 121, the number of packaging pins, and the setting position of the packaging pins; the second packaging structure corresponds to a structural body, the number of packaging pins, and the setting position of the packaging pins. When the connection relationship between the packaging structure and the chip body is different, the first packaging structure 120 corresponding to the inspection chip 100 is the same as the second packaging structure of the chip to be inspected. Specifically, the structural body, the number of packaging pins, and the setting position of the packaging pins corresponding to the first packaging structure 120 and the second packaging structure are the same. At this time, in the inspection chip 100, the connection relationship between the packaging pins 122 of the first packaging structure 120 and the pin pads 111 of the first chip body 110 is a first connection relationship; in the chip to be inspected, the connection relationship between the packaging pins of the second packaging structure and the pin pads of the second chip body is a second connection relationship. The first connection relationship is different from the second connection relationship. More specifically, the different connection relationships can be different corresponding relationships between packaging pins and pin pads.

[0034] The spot inspection chip 100 provided in this embodiment can distinguish the spot inspection chip 100 from the chip to be inspected without changing the packaging structure by keeping the first packaging structure 120 completely identical to the second packaging structure of the chip to be inspected and adjusting the connection relationship between the packaging pin 122 and the pin pad 111. This further reduces the production cost of the spot inspection chip 100.

[0035] Based on the different connection relationships between the packaging structure and the chip body, the inspection chip 100 may include two types, namely, a first type inspection chip and a second type inspection chip.

[0036] In one embodiment, for the first type of inspection chip, such as Figure 2 As shown, if the package pins in the second package structure of the chip to be tested include dangling pins; the dangling pins in the first package structure 120 of the inspection chip 100 are connected to the power pad or the ground pad of the first chip body 110. Among them, the dangling pins can be package pins that are not connected to the pin pads in the package structure, and usually have no specific function, so they remain in a suspended state. That is, if there are dangling pins without connecting pin pads in the chip to be tested, when the inspection chip 100 is packaged, the dangling pins at the corresponding positions are connected to the power pads of the first chip body 110, or the dangling pins at the corresponding positions are connected to the ground pads of the first chip body 110. If there are multiple dangling pins, at least one of the multiple dangling pins is connected to the power pad of the first chip body 110; or at least one of the multiple dangling pins is connected to the ground pad of the first chip body 110. Furthermore, the connection relationship between the other package pins 122 in the first package structure 120 except the suspended pins and the pin pads 111 of the first chip body 110 is exactly the same as that of the chip to be detected. The power pad is used to connect the power supply voltage to provide a stable power supply for the chip. Exemplarily, the power pad may include a metal area on the chip body for connecting the positive power supply. The ground pad is used to connect the ground potential to provide a stable ground potential reference for the chip. Exemplarily, the ground pad may include a metal area on the chip body for connecting the negative pole or ground potential.

[0037] In one of the specific embodiments, the packaging structure of some chips is usually designed with dangling pins, which are not connected to any external circuit, have no actual electrical connection, and are only used to meet the packaging requirements of the components or maintain the integrity of the components. Based on this, when designing the packaging of the inspection chip 100, the dangling pins corresponding to the chip to be inspected can be found, and the dangling pins at the corresponding positions in the first packaging structure 120 of the inspection chip 100 can be connected to the power pad or ground pad of the first chip body 110 inside the packaging structure. Thus, the first type of inspection chip obtained, when performing open-short circuit detection, is shown as a dangling pin short-circuited to the ground, or a dangling pin short-circuited to the power supply. Therefore, in the process of performing conventional tests by the integrated circuit test system, if it is detected that a chip has a dangling pin short-circuited to the ground or short-circuited to the power supply during the open-short circuit detection, the chip can be determined to be the inspection chip 100, and the integrated circuit test system automatically enters the inspection mode to perform inspection tests on the inspection chip 100, and automatically restores the conventional test mode after the inspection chip 100 is tested.

[0038] The first type of inspection chip involved in this embodiment does not need to be processed separately during the chip manufacturing process. It only needs to make special connections to the hanging pins of the inspection chip 100 during the packaging process of the inspection chip 100 to obtain the inspection chip 100 that can be accurately identified by the integrated circuit testing system.

[0039] In one embodiment, for the second type of inspection chip, such as Figure 3 As shown, if the power pad in the second chip body 210 of the chip to be inspected 200 is connected to the first packaging pin in the second packaging structure 220; the ground pad in the second chip body 210 is connected to the second packaging pin in the second packaging structure 220; then the power pad in the first chip body 110 of the inspection chip 100 is connected to any packaging pin 122 in the first packaging structure 120 except the first packaging pin; or the ground pad in the first chip body 110 of the inspection chip 100 is connected to any packaging pin 122 in the first packaging structure 120 except the second packaging pin.

[0040] Based on the package design of the chip 200 to be inspected, the package pin connected to the power pad in the second chip body 210 is recorded as the first package pin; the package pin connected to the ground pad in the second chip body 210 is recorded as the second package pin. When designing the package of the inspection chip 100, the power pad in the first chip body 110 is reconnected to any package pin 122 in the first package structure 120 except the first package pin. Alternatively, when designing the package of the inspection chip 100, the ground pad in the first chip body 110 is reconnected to any package pin 122 in the first package structure 120 except the second package pin. It can be understood that only the connection position of the power pad in the first chip body 110 can be different from that of the chip to be detected 200, or only the connection position of the ground pad in the first chip body 110 can be different from that of the chip to be detected 200; the connection position of the power pad in the first chip body 110 and any other one or more pin pads 111 can also be different from that of the chip to be detected 200; the connection position of the ground pad in the first chip body 110 and any other one or more pin pads 111 can also be different from that of the chip to be detected 200; the connection position of all the pin pads 111 in the first chip body 110 can also be different from that of the chip to be detected 200.

[0041] In one specific embodiment, with respect to the connection relationship between the package pins and the pin pads in the chip, the connection relationship between the package pins 122 and the pin pads 111 in the spot inspection chip 100 is distinguished from the connection relationship between the package pins and the pin pads in the chip to be inspected 200. The connection relationship of the chip to be inspected 200 and the connection relationship of the spot inspection chip 100 are as follows: Figure 3 As shown. The connection relationship between the package pins and the pin pads inside the chip to be detected 200 can be used as a reference, and on this basis, all the package pins 122 in the inspection chip 100 can be rotated clockwise in sequence to connect to the next pin pad 111. Based on the design of the above connection method, the chip to be detected 200 can be distinguished from the inspection chip 100. When actually detecting through the integrated circuit test system, since the internal connection relationship between the chip to be detected 200 and the inspection chip 100 is different, it is necessary to set two sets of test stimuli for open and short circuit tests, a first test stimulus for the chip to be detected 200 and a second test stimulus for the inspection chip 100. Among them, since the only difference between the chip to be detected 200 and the inspection chip 100 is the internal connection relationship, the composition of the first test stimulus and the second test stimulus is exactly the same, except that the corresponding relationship between each signal in the test stimulus and the package pin 122 is different. The corresponding relationship is determined according to the connection relationship between the package pin 122 and the pin pad. When the integrated circuit test system detects the chip, the integrated circuit test system first provides a first test stimulus to test the chip and obtains a first set of test results. If the first set of test results is normal or only some package pins are abnormal, that is, all package pins pass the open-short test or only some package pins fail the open-short test, the chip currently being tested is determined to be the chip to be tested 200, and then the chip to be tested 200 is subjected to subsequent sorting operations according to the first set of test results. If all package pins are abnormal in the first set of test results, that is, all package pins fail the open-short test, the chip currently being tested is determined to be the spot inspection chip 100, and at this time, the integrated circuit test system provides a second test stimulus to test the spot inspection chip 100 and obtain a second set of test results. If the second set of test results is normal or only some package pins are abnormal, that is, all package pins pass the open-short test or only some package pins fail the open-short test, the second set of test results is used as the spot inspection result to analyze the current state of the integrated circuit test system.

[0042] The second type of inspection chip involved in this embodiment does not need to be processed separately during the chip manufacturing process. It only needs to distinguish the internal connection relationship of the inspection chip 100 from the internal connection relationship of the chip to be tested 200 during the packaging process of the inspection chip 100, so as to obtain the inspection chip 100 that can be accurately identified by the integrated circuit testing system.

[0043] In one of the embodiments, the packaging structures corresponding to the inspection chip 100 and the chip to be inspected are different, specifically: a pin pad 111 is provided on the first chip body 110; the first packaging structure 120 includes a structural body 121, a packaging pin 122 provided on the structural body 121, and an electrical component 123; the pin pads 111 of the first chip body 110 are respectively connected to the packaging pins 122 of the first packaging structure 120; the electrical component 123 is connected between at least one pin pad 111 of the first packaging structure 120 and a power supply pad; or the electrical component 123 is connected between at least one pin pad 111 of the first packaging structure 120 and a ground pad; or the electrical component 123 is connected to the packaging pin 122.

[0044] The first packaging structure 120 of the inspection chip 100 includes a structural body 121, packaging pins 122 arranged on the structural body 121, and electrical components 123. The second packaging structure of the chip to be inspected includes a structural body and packaging pins arranged on the structural body. The first packaging structure 120 adds an electrical component 123 compared to the second packaging structure. Among them, the structural body 121 is used to fix the chip body and provide a basic framework for the packaging structure. For example, the structural body 121 can be obtained by processes such as injection molding or die casting, and the material of the structural body 121 can be epoxy resin, silicone or ceramic material. The packaging pins 122 are fixedly installed on the structural body 121. The packaging pins 122 are the external interface part of the packaging structure. After the chip body is packaged by the packaging structure, the chip is connected to other electrical components outside the chip through the packaging pins 122. It can be understood that in this embodiment, the connection relationship between the package pin 122 of the first package structure 120 of the inspection chip 100 and the pin pad 111 of the first chip body 110 is a first connection relationship; the connection relationship between the package pin of the second package structure of the chip to be detected and the pin pad of the second chip body is a second connection relationship. The first connection relationship is exactly the same as the second connection relationship. The electrical component 123 of the first package structure 120 can be other types of chips, resistors, capacitors, diodes, transistors, etc. For example, if the electrical component 123 is a resistor, capacitor, diode, transistor, etc., the electrical component 123 can be connected between at least one pin pad 111 of the first package structure 120 and the power pad, or the electrical component 123 can be connected between at least one pin pad 111 of the first package structure 120 and the ground pad. If the electrical component 123 is another type of chip, the pin pads 111 corresponding to the electrical component 123 can be connected to the package pins 122 of the first package structure 120 respectively.

[0045] The inspection chip 100 provided in this embodiment introduces an electrical element 123 into the first packaging structure 120 to achieve flexible adjustment of the electrical characteristics between the pin pad 111 and the packaging pin 122, thereby distinguishing the inspection chip 100 from the chip to be inspected, further reducing the production cost of the inspection chip 100.

[0046] Based on the different packaging structures of the inspection chip 100 and the chip to be inspected, the inspection chip 100 may include three types, namely, a third type inspection chip, a fourth type inspection chip and a fifth type inspection chip.

[0047] In one embodiment, for the third type of inspection chip, such as Figure 4 As shown, the electrical component 123 includes a secondary chip; the power pad of the first chip body 110 is connected to the third packaging pin of the first packaging structure 120; the grounding pad of the first chip body 110 is connected to the fourth packaging pin of the first packaging structure 120; the bidirectional transmission pad of the first chip body 110 is connected to the fifth packaging pin of the first packaging structure 120; the power pad of the secondary chip is connected to the third packaging pin of the first packaging structure 120; the grounding pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure 120; the bidirectional transmission pad of the secondary chip is connected to the fifth packaging pin of the first packaging structure 120.

[0048] When designing the package of the inspection chip 100, if the first chip body 110 of the inspection chip 100 has an I / O port, that is, a bidirectional transmission pad, the package pin 122 connected to the power pad of the first chip body 110 is recorded as the third package pin; the package pin 122 connected to the ground pad of the first chip body 110 is recorded as the fourth package pin; the package pin 122 connected to the bidirectional transmission pad of the first chip body 110 is recorded as the fifth package pin. When packaging the secondary chip, the power pad of the secondary chip is connected to the third package pin; the ground pad of the secondary chip is connected to the fourth package pin; and the bidirectional transmission pad of the secondary chip is connected to the fifth package pin. Among them, the secondary chip only needs to be able to generate an output response to the input test stimulus, because the I / O port of the first chip body 110 will output a response signal, and the I / O port of the secondary chip will output a response signal; the second chip body is exactly the same as the first chip body 110, and the I / O port output response signals of the second chip body and the first chip body 110 are the same. After the two response signals of the first chip body 110 and the secondary chip are superimposed, they must be different from the response signal of the second chip body. Therefore, the signal output by the I / O port of the chip to be tested is different from the signal output by the I / O port of the inspection chip 100; the chip to be tested and the inspection chip 100 are further distinguished by the response signal.

[0049] In one embodiment, for the fourth type of inspection chip, such as Figure 5 As shown, the electrical component 123 includes a secondary chip; the power pad of the first chip body 110 is connected to the third packaging pin of the first packaging structure 120; the ground pad of the first chip body 110 is connected to the fourth packaging pin of the first packaging structure 120; the input pad of the first chip body 110 is connected to the fifth packaging pin of the first packaging structure 120; the output pad of the first chip body 110 is connected to the sixth packaging pin of the first packaging structure 120; the power pad of the secondary chip is connected to the third packaging pin of the first packaging structure 120; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure 120; and the bidirectional transmission pads of the secondary chip are respectively connected to the fifth packaging pin and the sixth packaging pin of the first packaging structure 120.

[0050] When designing the package of the inspection chip 100, if the first chip body 110 of the inspection chip 100 does not have an I / O port, that is, a bidirectional transmission pad, the package pin 122 connected to the power pad of the first chip body 110 is recorded as the third package pin; the package pin 122 connected to the ground pad of the first chip body 110 is recorded as the fourth package pin; the package pin 122 connected to the input pad of the first chip body 110 is recorded as the fifth package pin; the package pin 122 connected to the output pad of the first chip body 110 is recorded as the sixth package pin. When packaging the secondary chip, the power pad of the secondary chip is connected to the third package pin; the ground pad of the secondary chip is connected to the fourth package pin; and the bidirectional transmission pad of the secondary chip is connected to the fifth package pin and the sixth package pin, respectively. Among them, the secondary chip only needs to be able to generate an output response to the input test stimulus, because the OUT port of the first chip body 110 will output a response signal, and the I / O port of the secondary chip will output a response signal; the second chip body is exactly the same as the first chip body 110, and the OUT port output response signals of the second chip body and the first chip body 110 are the same. After the two response signals of the first chip body 110 and the secondary chip are superimposed, they must be different from the response signal of the second chip body. Therefore, the signal output from the OUT port of the chip to be tested is different from the signal output from the OUT port of the inspection chip 100; further, the chip to be tested and the inspection chip 100 are distinguished by the response signal.

[0051] In one specific embodiment, the connection relationship between the package pin 122 of the first package structure 120 of the inspection chip 100 and the pin pad 111 of the first chip body 110 is a first connection relationship; the connection relationship between the package pin of the second package structure of the chip to be detected and the pin pad of the second chip body is a second connection relationship. The first connection relationship is exactly the same as the second connection relationship. It is just that when the inspection chip 100 is packaged, other electrical components 123 are packaged inside at the same time. If the electrical component 123 is a secondary chip, when the inspection chip 100 is packaged, the first chip body 110 and the secondary chip are sealed together. The secondary chip is a special chip dedicated to the identification inspection chip 100. According to the pin pad 111 of the first chip body 110, the secondary chip needs to have at least three pin pads, namely, a power pad, a ground pad, and a bidirectional transmission pad. When the inspection chip 100 is packaged, each pin pad of the secondary chip is connected to a specific package pin 122 of the first package structure 120. There are two specific cases when packaging. In the first case, the first chip body 110 has an I / O port. At this time, when packaging, the power pad, ground pad and bidirectional transmission pad of the secondary chip are respectively connected to the VDD, GND and I / O package pins of the first package structure. In the second case, the first chip body 110 does not have an I / O port. At this time, when packaging, the power pad, ground pad and bidirectional transmission pad of the secondary chip are respectively connected to the VDD, GND, IN and OUT package pins of the first package structure. When the integrated circuit test system is testing, the chip can be tested according to the test stimulus input by the I / O package pin or the IN package pin, and then the response signal is output through the I / O package pin or the OUT package pin. Since the inspection chip 100 is sealed with a secondary chip inside, the response signals output by the inspection chip 100 and the I / O package pin or the OUT package pin of the chip to be tested are different. By detecting the output response signal, the inspection chip 100 can be identified. After identifying the spot inspection chip 100 , the integrated circuit testing system automatically enters the spot inspection mode to perform a spot inspection test on the spot inspection chip 100 , and automatically returns to the normal test mode after the test of the spot inspection chip 100 is completed.

[0052] The third-category inspection chip or the fourth-category inspection chip involved in this embodiment does not need to be processed separately during the chip manufacturing process. It only needs to seal the secondary chip inside the inspection chip during the packaging process of the inspection chip to obtain the inspection chip that can be accurately identified by the integrated circuit testing system.

[0053] In one of the embodiments, the fifth type of spot inspection chip, the electrical components can be resistors, capacitors, diodes, transistors and other types. When packaging the spot inspection chip, the electrical component 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the power pad, or the electrical component 123 can be connected between at least one pin pad 111 of the first packaging structure 120 and the ground pad. Since the electrical components are added inside the spot inspection chip, when the integrated circuit test system detects the chip, the response of the chip to be tested and the spot inspection chip is different based on the test, so that the chip to be tested and the spot inspection chip can be distinguished. After identifying the spot inspection chip, the integrated circuit test system automatically enters the spot inspection mode to perform a spot inspection test on the spot inspection chip, and automatically restores the normal test mode after the spot inspection chip test is completed.

[0054] The above embodiments are only used to explain the inspection chip, and the inspection chip can also be obtained through other similar packaging methods. It is only necessary to make the packaged inspection chip able to present an output response that is obviously different from the chip to be tested during the test process. When the integrated circuit test system enters the inspection mode, the output response of the inspection can be given according to the inspection test stimulus, thereby realizing the actual function of the inspection chip. Based on the above, the embodiments of the present application do not need to improve the production process of the chip, but only need different packaging to realize the production of the inspection chip. For integrated circuits, there is a mature industry supporting the use of different packages for the same chip, so this solution can realize the production of inspection chips at a lower cost and a convenient process.

[0055] In one embodiment, Figure 6 As shown, a spot inspection method for an integrated circuit test system is provided, which specifically includes the following steps: Step 601: The loading module places the detection chip on the test station.

[0056] Among them, the detection chip includes a chip to be detected or a spot inspection chip. The spot inspection chip is the spot inspection chip of any of the above embodiments. The loading module is any mechanical device that can move the detection chip to the test station, and this embodiment does not specifically limit the loading module. The integrated circuit testing system includes one or more test stations. The test station can be a specific location in the integrated circuit testing system for placing the detection chip and testing it, and usually includes a fixing device, such as a fixture, to ensure the electrical connection between the detection chip and the testing equipment. In this embodiment, the integrated circuit testing system includes a conventional test mode and a spot inspection mode, wherein the conventional test mode is used to detect the product quality and product performance of the chip to be detected; the spot inspection mode is used to determine whether the integrated circuit testing system has an abnormal fault based on the spot inspection chip. A certain number of spot inspection chips are mixed in the chip to be detected, and they are loaded and tested in sequence through the loading module.

[0057] Step 602 , testing the test chip through a conventional test mode, and determining whether the test chip is a spot inspection chip based on the test result.

[0058] Conventional test mode refers to the standard test process used in the integrated circuit test system to detect the function and performance of the chip to be tested. Conventional test mode includes, for example, electrical characteristics test and functional test. Among them, the electrical characteristics test includes, for example, one or more of the following test items: open-short circuit test, leakage current test, static operating current test, and dynamic operating current test, etc.; functional test includes, for example, communication test, etc. After the detection chip is detected by the conventional test mode, the corresponding test result is determined. And based on the test result, it is determined whether the detection chip is a chip to be detected or a spot inspection chip. For example, the result of the open-short circuit test can be used to determine whether the detection chip is a chip to be detected or a spot inspection chip based on the open-short circuit state of the pin. The result of the communication test can be used to determine whether the detection chip is a chip to be detected or a spot inspection chip based on the response of the communication test.

[0059] Step 603: If the detection chip is a spot inspection chip, the spot inspection chip is inspected through a spot inspection mode.

[0060] When it is determined that the test chip is a spot inspection chip, the integrated circuit test system switches to the spot inspection mode, and inspects the spot inspection chip through the spot inspection mode to obtain the spot inspection result, so as to determine whether the integrated circuit test system has an abnormal fault based on the spot inspection result. After the spot inspection mode test is completed, it automatically switches to the normal test mode.

[0061] This embodiment builds a spot inspection mode independent of the conventional test mode into the integrated circuit test system, and wakes up the spot inspection mode of the integrated circuit test system through a spot inspection chip that is different from the chip to be tested, so as to perform a spot inspection operation on the spot inspection chip. Therefore, automatic spot inspection of the integrated circuit test system can be achieved by mixing a certain number of spot inspection chips with the chip to be tested, thereby further improving the detection efficiency and detection accuracy of the integrated circuit test system.

[0062] In one of the embodiments, the detection chip is detected by an electrical characteristic test to determine the electrical characteristic test result; based on the electrical characteristic test result, it is determined whether the detection chip is a spot inspection chip. Wherein, the electrical characteristic test, for example, includes one or more of the following test items: open-short circuit test, leakage current test, static working current test, dynamic working current test, voltage test, resistance test, and impedance test, etc. Because at least one of the packaging structure between the chip to be detected and the spot inspection chip or the connection relationship between the packaging structure and the chip body is different. Therefore, when the chip to be detected or the spot inspection chip is tested by the electrical characteristic test, the output response of each package pin is different. The standard response of the spot inspection chip detected by the electrical characteristic test is pre-stored, and the detection chip is subsequently detected by the electrical characteristic test. After obtaining the electrical characteristic test result, the electrical characteristic test result is compared with the standard response to determine whether the detection chip is a spot inspection chip.

[0063] In one of the embodiments, the detection chip is detected by an open-short circuit test to determine the open-short circuit test result; based on the open-short circuit test result, it is determined whether the detection chip is a spot inspection chip.

[0064] Taking the first type of spot inspection chip as an example, when performing an open-short circuit test, the integrated circuit test system sends a test stimulus to each package pin of the inspection chip, usually by adding a current to the package pin to be tested and measuring its voltage. Since the suspended pins of the chip to be tested are not connected to the pin pads of the chip body and are in an open circuit state, the voltage result of the open-short circuit test shows that the suspended pins are in an open circuit state. In this case, the integrated circuit test system can identify that the inspection chip is a chip to be tested, and then continue to test the chip to be tested, and evaluate the performance of the chip to be tested based on all test results to perform sorting operations. Since the suspended pins of the spot inspection chip are connected to GND or VDD, after sending the open-short circuit test stimulus to it, the received output response shows a short circuit to the ground or a short circuit to the power supply. In this case, the integrated circuit test system can identify that the inspection chip is a spot inspection chip, so that the integrated circuit test system enters the spot inspection mode, continues to test the spot inspection chip, and evaluates the performance of the integrated circuit test system based on all test results. After the test is completed, it automatically returns to the normal test mode.

[0065] Taking the second type of spot inspection chip as an example, during the open-short circuit test, the integrated circuit test system sends a test stimulus to each package pin of the detection chip, usually by adding current to the package pin to be tested and measuring its voltage. In the open-short circuit test, it is necessary to test the open-short circuit conditions of multiple package pins, so the integrated circuit test system needs to input a test stimulus to each package pin to test whether each package pin is open-short circuit. Since the pin pads of the chip body corresponding to each package pin of the chip to be tested and the spot inspection chip are different, the integrated circuit test system needs to set two groups of test stimuli according to the corresponding relationship between the package pins and the pin pads of the two chips, so as to realize accurate testing of the two chips respectively. The composition of the two groups of test stimuli is exactly the same, except that the corresponding relationship between each signal and the package pin is different, that is, the target package pin of the signal is changed. When the integrated circuit test system detects the detection chip, the integrated circuit test system first provides a first test stimulus to test the detection chip and obtains a first group of test results. If the first set of test results shows no abnormality or only some package pins are abnormal, that is, all package pins pass the open-short test or only some package pins fail the open-short test, then the detection chip currently being tested is determined to be the chip to be tested, and then the chip to be tested is subsequently sorted according to the first set of test results. If all package pins in the first set of test results show abnormality, that is, all package pins fail the open-short test, then the detection chip currently being tested is determined to be a spot inspection chip, and at this time the integrated circuit test system provides a second test stimulus to test the spot inspection chip to obtain a second set of test results. If the second set of test results shows no abnormality or only some package pins are abnormal, that is, all package pins pass the open-short test or only some package pins fail the open-short test, then the second set of test results is used as the spot inspection result to analyze the current state of the integrated circuit test system.

[0066] In one of the embodiments, the detection chip is detected through a communication test to determine an output response; based on the output response, it is determined whether the detection chip is a spot inspection chip.

[0067] Taking the third type of inspection chip and the fourth type of inspection chip as examples, when performing communication testing, the integrated circuit test system inputs the test stimulus to the I / O package pin or IN package pin of the detection chip for testing, and outputs the response signal through the I / O package pin or OUT package pin. After the chip to be detected receives the test stimulus, only the chip body feeds back the response signal according to the test stimulus, and the inspection chip, based on the chip body feedback response signal, the secondary chip can also output a response according to the test stimulus. The response of the secondary chip can affect the response signal fed back by the chip body, and then the response signal finally output by the I / O package pin or OUT package pin of the inspection chip is the superposition of the chip body output response and the secondary chip output response. By pre-storing the standard output response of the inspection chip, after obtaining the output response of the detection chip, it is compared with the standard output response to determine whether the detection chip is a spot inspection chip.

[0068] This embodiment automatically switches to the spot inspection mode by identifying the spot inspection chip, so that automatic spot inspection of the integrated circuit test system can be achieved by mixing a certain number of spot inspection chips into the chip to be inspected, thereby further improving the inspection efficiency and detection accuracy of the integrated circuit test system.

[0069] It should be understood that, although the various steps in the flowcharts involved in the above-mentioned embodiments are displayed in sequence according to the indication of the arrows, these steps are not necessarily executed in sequence according to the order indicated by the arrows. Unless there is a clear explanation in this article, the execution of these steps does not have a strict order restriction, and these steps can be executed in other orders. Moreover, at least a part of the steps in the flowcharts involved in the above-mentioned embodiments can include multiple steps or multiple stages, and these steps or stages are not necessarily executed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a part of the steps or stages in other steps.

[0070] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0071] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the present application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A spot inspection chip, characterized in that: Applicable to an integrated circuit test system; the integrated circuit test system is used to test a chip to be tested; the spot-tested chip comprises: a first chip body and a first packaging structure for packaging the first chip body; The first chip body of the inspection chip is the same as the second chip body of the chip to be inspected; The first packaging structure of the inspection chip and the second packaging structure of the chip to be inspected are different in at least one of the packaging structure or the connection relationship between the packaging structure and the chip body.

2. The inspection chip according to claim 1, characterized in that: The first packaging structure includes a structural body and packaging pins arranged on the structural body; a pin pad is arranged on the first chip body; the pin pad is connected to the packaging pin; The first packaging structure of the inspection chip is the same as the second packaging structure of the chip to be inspected; A first connection relationship between package pins and pin pads in the first package structure of the inspection chip is different from a second connection relationship between package pins and pin pads in the second package structure of the chip to be inspected.

3. The inspection chip according to claim 2, characterized in that: If the package pins in the second package structure of the chip to be tested include suspended pins; The suspended pins in the first packaging structure of the inspection chip are connected to the power pad or the ground pad of the first chip body.

4. The inspection chip according to claim 2, characterized in that: If the power pad in the second chip body of the chip to be detected is connected to the first package pin in the second package structure; the ground pad in the second chip body is connected to the second package pin in the second package structure; Then the power pad in the first chip body of the inspection chip is connected to any package pin in the first package structure except the first package pin; or The ground pad in the first chip body of the inspection chip is connected to any package pin except the second package pin in the first package structure.

5. The inspection chip according to claim 1, characterized in that: The first chip body is provided with a pin pad; the first packaging structure comprises a structural body, packaging pins arranged on the structural body and electrical components; The pin pads of the first chip body are respectively connected to the packaging pins of the first packaging structure; The electrical component is connected between at least one pin pad of the first packaging structure and a power pad; or the electrical component is connected between at least one pin pad of the first packaging structure and a ground pad; or the electrical component is connected to a packaging pin.

6. The inspection chip according to claim 5, characterized in that: The electrical component includes a secondary chip; The power pad of the first chip body is connected to the third package pin of the first package structure; the ground pad of the first chip body is connected to the fourth package pin of the first package structure; the bidirectional transmission pad of the first chip body is connected to the fifth package pin of the first package structure; The power pad of the secondary chip is connected to the third packaging pin of the first packaging structure; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure; and the bidirectional transmission pad of the secondary chip is connected to the fifth packaging pin of the first packaging structure.

7. The inspection chip according to claim 5, characterized in that: The electrical component includes a secondary chip; The power pad of the first chip body is connected to the third package pin of the first package structure; the ground pad of the first chip body is connected to the fourth package pin of the first package structure; the input pad of the first chip body is connected to the fifth package pin of the first package structure; the output pad of the first chip body is connected to the sixth package pin of the first package structure; The power pad of the secondary chip is connected to the third packaging pin of the first packaging structure; the ground pad of the secondary chip is connected to the fourth packaging pin of the first packaging structure; the bidirectional transmission pad of the secondary chip is respectively connected to the fifth packaging pin and the sixth packaging pin of the first packaging structure.

8. A spot inspection method for an integrated circuit test system, characterized in that: The method comprises: The loading module places the detection chip on the test station; the detection chip includes a chip to be detected or a spot inspection chip; the spot inspection chip is the spot inspection chip described in any one of claims 1 to 7; Testing the detection chip in a conventional test mode, and determining whether the detection chip is a spot inspection chip based on the detection result; If the detection chip is a spot inspection chip, the spot inspection chip is inspected through a spot inspection mode.

9. The method according to claim 8, characterized in that The testing the detection chip through a conventional test mode and determining whether the detection chip is a spot inspection chip based on the test result includes: Testing the detection chip through an electrical characteristics test to determine the electrical characteristics test result; According to the electrical characteristic test result, it is determined whether the detection chip is a spot inspection chip.

10. The method according to claim 8, characterized in that The testing the detection chip through a conventional test mode and determining whether the detection chip is a spot inspection chip based on the test result includes: Testing the detection chip through an open-short circuit test to determine the open-short circuit test result; According to the open-short circuit test result, it is determined whether the detection chip is a spot inspection chip.

11. The method according to claim 8, characterized in that The testing the detection chip through a conventional test mode and determining whether the detection chip is a spot inspection chip based on the test result includes: Testing the detection chip through a communication test to determine an output response; According to the output response, it is determined whether the detection chip is a spot inspection chip.

Images